Commit e9fff748 authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/NR_UE_MAC_scheduler' into integration_2020_wk46

parents 122e18d0 6056de78
......@@ -3259,7 +3259,7 @@ if (${T_TRACER})
SECU_OSA SECU_CN SCHED_LIB SCHED_NR_LIB SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB default_sched remote_sched RAL
NFAPI_COMMON_LIB NFAPI_LIB NFAPI_PNF_LIB NFAPI_VNF_LIB NFAPI_USER_LIB
PHY_COMMON PHY PHY_UE PHY_NR PHY_NR_COMMON PHY_NR_UE PHY_RU PHY_MEX
L2 L2_LTE L2_NR L2_LTE_NR L2_UE NR_L2_UE MAC_NR_COMMON MAC_NR MAC_UE_NR
L2 L2_LTE L2_NR L2_LTE_NR L2_UE NR_L2_UE L2_UE_LTE_NR MAC_NR_COMMON MAC_NR MAC_UE_NR
CN_UTILS GTPV1U NR_GTPV1U SCTP_CLIENT MME_APP UDP LIB_NAS_UE NB_IoT LFDS LFDS7 SIMU_COMMON SIMU SIMU_ETH OPENAIR0_LIB
ldpc_orig ldpc_optim ldpc_optim8seg ldpc PROTO_AGENT dfts)
if (TARGET ${i})
......
......@@ -23,6 +23,7 @@
#include "PHY/impl_defs_nr.h"
#define NFAPI_UE_MAX_NUM_CB 8
#define NFAPI_MAX_NUM_UL_PDU 8
/*
typedef unsigned int uint32_t;
......@@ -155,7 +156,7 @@ typedef struct {
uint16_t slot;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
fapi_nr_tx_request_body_t tx_request_body[NFAPI_MAX_NUM_UL_PDU];
} fapi_nr_tx_request_t;
/// This struct replaces:
......
......@@ -242,6 +242,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
dlsch0_harq->Qm = nr_get_Qm_dl(dlsch[0]->harq_processes[harq_pid]->mcs, dlsch[0]->harq_processes[harq_pid]->mcs_table);
dlsch0_harq->R = nr_get_code_rate_dl(dlsch[0]->harq_processes[harq_pid]->mcs, dlsch[0]->harq_processes[harq_pid]->mcs_table);
if (dlsch0_harq->Qm == 0 || dlsch0_harq->R == 0) {
LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected DL DCI.\n");
return -1;
}
#ifdef DEBUG_HARQ
printf("[DEMOD] MIMO mode = %d\n", dlsch0_harq->mimo_mode);
......@@ -981,7 +985,12 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
if (dlsch1_harq) {
switch (nr_get_Qm_dl(dlsch1_harq->mcs,dlsch1_harq->mcs_table)) {
uint8_t Qm = nr_get_Qm_dl(dlsch1_harq->mcs,dlsch1_harq->mcs_table);
if (Qm == 0){
LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected DL DCI.\n");
return -1;
}
switch (Qm) {
case 2 :
if (rx_type==rx_standard) {
nr_dlsch_qpsk_llr(frame_parms,
......
......@@ -154,8 +154,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
if (scheduled_response->tx_request){ // TBR todo here it should loop through the number of tx pdus
fapi_nr_tx_request_body_t *tx_req_body = scheduled_response->tx_request->tx_request_body;
if (scheduled_response->tx_request){
fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[i];
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
......
......@@ -671,8 +671,7 @@ int main(int argc, char **argv)
nr_scheduled_response_t scheduled_response;
fapi_nr_ul_config_request_t ul_config;
fapi_nr_tx_request_t tx_req;
fapi_nr_tx_request_body_t tx_req_body;
uint8_t ptrs_mcs1 = 2;
uint8_t ptrs_mcs2 = 4;
uint8_t ptrs_mcs3 = 10;
......@@ -908,16 +907,15 @@ int main(int argc, char **argv)
scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config;
scheduled_response.tx_request = &tx_req;
scheduled_response.tx_request->tx_request_body = &tx_req_body;
// Config UL TX PDU
tx_req.slot = slot;
tx_req.sfn = frame;
// tx_req->tx_config // TbD
tx_req.number_of_pdus = 1;
tx_req_body.pdu_length = TBS/8;
tx_req_body.pdu_index = 0;
tx_req_body.pdu = &ulsch_input_buffer[0];
tx_req.tx_request_body[0].pdu_length = TBS/8;
tx_req.tx_request_body[0].pdu_index = 0;
tx_req.tx_request_body[0].pdu = &ulsch_input_buffer[0];
ul_config.slot = slot;
ul_config.number_pdus = 1;
......
......@@ -1939,7 +1939,7 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][0]);
break;
......@@ -1947,7 +1947,7 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][0]);
break;
......@@ -1955,13 +1955,14 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][0]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
return 0;
}
}
......@@ -1970,7 +1971,7 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][1]);
break;
......@@ -1978,7 +1979,7 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][1]);
break;
......@@ -1986,13 +1987,14 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][1]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,2])\n", table_idx);
return 0;
}
}
......@@ -2001,7 +2003,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][0]);
break;
......@@ -2009,7 +2011,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][0]);
break;
......@@ -2017,7 +2019,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][0]);
break;
......@@ -2025,7 +2027,7 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 3:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61411[Imcs][0]);
break;
......@@ -2033,13 +2035,14 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
case 4:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61412[Imcs][0]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
return 0;
}
}
......@@ -2048,7 +2051,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51311[Imcs][1]);
break;
......@@ -2056,7 +2059,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_51312[Imcs][1]);
break;
......@@ -2064,7 +2067,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
Imcs = 28;
return 0;
}
return (Table_51313[Imcs][1]);
break;
......@@ -2072,7 +2075,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 3:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61411[Imcs][1]);
break;
......@@ -2080,13 +2083,14 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
case 4:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs);
Imcs = 27;
return 0;
}
return (Table_61412[Imcs][1]);
break;
default:
AssertFatal(0, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
LOG_E(MAC, "Invalid MCS table index %d (expected in range [0,4])\n", table_idx);
return 0;
}
}
......
......@@ -252,7 +252,7 @@ typedef struct {
uint8_t generate_nr_prach;
//// FAPI-like interface message
fapi_nr_ul_config_request_t ul_config_request;
fapi_nr_ul_config_request_t *ul_config_request;
fapi_nr_dl_config_request_t dl_config_request;
/// Interface module instances
......
......@@ -119,8 +119,8 @@ uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index,fapi_nr_dci_indication_pdu_t *dci);
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, frame_t frame, int slot, dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
uint32_t get_ssb_frame(uint32_t test);
uint32_t get_ssb_slot(uint32_t ssb_index);
......
......@@ -57,10 +57,21 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst)
if (IS_SOFTMODEM_NOS1){
if (rlc_module_init(0) != 0) {
LOG_I(RLC, "Problem at RLC initiation \n");
}
pdcp_layer_init();
nr_DRB_preconfiguration();
LOG_I(RLC, "Problem at RLC initiation \n");
}
pdcp_layer_init();
nr_DRB_preconfiguration();
}
// Allocate memory for ul_config_request in the mac instance. This is now a pointer and will
// point to a list of structures (one for each UL slot) to store PUSCH scheduling parameters
// received from UL DCI.
if (nr_ue_mac_inst->scc) {
int num_slots_ul = nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (nr_ue_mac_inst->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols>0)
num_slots_ul++;
LOG_D(MAC, "Initializing ul_config_request. num_slots_ul = %d\n", num_slots_ul);
nr_ue_mac_inst->ul_config_request = (fapi_nr_ul_config_request_t *)calloc(num_slots_ul, sizeof(fapi_nr_ul_config_request_t));
}
}
else LOG_I(MAC,"Running without RRC instance\n");
......
......@@ -77,7 +77,7 @@ void nr_config_Msg3_pdu(NR_UE_MAC_INST_t *mac,
uint8_t nb_dmrs_re_per_rb;
uint16_t number_dmrs_symbols = 0;
int N_PRB_oh;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request[0];
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
......
......@@ -64,10 +64,10 @@ int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index,
return 0;
}
// L2 Abstraction Layer
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_indication_pdu_t *dci){
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci){
//printf("handle_dci: rnti %x,dci_type %d\n",rnti,dci_type);
return nr_ue_process_dci_indication_pdu(module_id, cc_id, gNB_index, dci);
return nr_ue_process_dci_indication_pdu(module_id, cc_id, gNB_index, frame, slot, dci);
}
// L2 Abstraction Layer
......@@ -135,8 +135,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
if (!dl_info->dci_ind && !dl_info->rx_ind) {
// UL indication to schedule DCI reception
nr_ue_scheduler(dl_info, NULL);
......@@ -150,13 +149,15 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
int8_t ret = handle_dci(dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dl_info->frame,
dl_info->slot,
dl_info->dci_ind->dci_list+i);
ret_mask |= (ret << FAPI_NR_DCI_IND);
if (ret >= 0) {
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
fill_scheduled_response(&scheduled_response, dl_config, ul_config, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
}
}
......
......@@ -224,7 +224,7 @@ int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, ui
\param pduP pointer to pdu*/
int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_indication_pdu_t *dci);
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
#endif
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment