From 534525eada09297b398edc6f873cbe50f2b3cb2c Mon Sep 17 00:00:00 2001 From: Raphael Defosseux <raphael.defosseux@eurecom.fr> Date: Fri, 29 May 2020 11:58:28 +0200 Subject: [PATCH] CI: fix typo in inria pipeline Signed-off-by: Raphael Defosseux <raphael.defosseux@eurecom.fr> --- ci-scripts/Jenkinsfile-inria-r2lab | 9 +++------ ...10_band7_test_05mhz_tm1_rrc_inactivity_no_flexran.xml | 4 ++-- ...210_band7_test_05mhz_tm1_rrc_inactivity_w_flexran.xml | 4 ++-- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/ci-scripts/Jenkinsfile-inria-r2lab b/ci-scripts/Jenkinsfile-inria-r2lab index bead0c74b50..ada52277f4e 100644 --- a/ci-scripts/Jenkinsfile-inria-r2lab +++ b/ci-scripts/Jenkinsfile-inria-r2lab @@ -158,8 +158,7 @@ pipeline { echo '\u2705 \u001B[32mLoad Image for Python Executor\u001B[0m' try { - //sh "ssh -t inria_oaici@faraday.inria.fr 'rload -i oai-ci-cd-u18-lowlatency-enb-ue ${r2labPythonExeIdx} > /dev/null 2>&1'" - sh "ssh -t inria_oaici@faraday.inria.fr 'rload -i oai-ci-cd-u18-lowlatency-enb-ue ${r2labPythonExeIdx}'" + sh "ssh -t inria_oaici@faraday.inria.fr 'rload -i oai-ci-cd-u18-lowlatency-enb-ue ${r2labPythonExeIdx} > /dev/null 2>&1'" } catch (Exception e) { echo "Why is it wrong?" } @@ -172,14 +171,12 @@ pipeline { echo '\u2705 \u001B[32mLoad Image for two (2) eNBs\u001B[0m' try { - //sh "ssh -t inria_oaici@faraday.inria.fr 'rload -i oai-ci-cd-u18-lowlatency-enb-ue ${r2labENB0Idx},${r2labENB1Idx} > /dev/null 2>&1'" - sh "ssh -t inria_oaici@faraday.inria.fr 'rload -i oai-ci-cd-u18-lowlatency-enb-ue ${r2labENB0Idx},${r2labENB1Idx}" + sh "ssh -t inria_oaici@faraday.inria.fr 'rload -i oai-ci-cd-u18-lowlatency-enb-ue ${r2labENB0Idx},${r2labENB1Idx} > /dev/null 2>&1'" } catch (Exception e) { echo "Why is it wrong?" } try { - //sh "ssh -t inria_oaici@faraday.inria.fr 'rwait --silent ${r2labENB0Idx},${r2labENB1Idx}'" - sh "ssh -t inria_oaici@faraday.inria.fr 'rwait ${r2labENB0Idx},${r2labENB1Idx}'" + sh "ssh -t inria_oaici@faraday.inria.fr 'rwait --silent ${r2labENB0Idx},${r2labENB1Idx}'" } catch (Exception e) { echo "Why is it wrong?" } diff --git a/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_no_flexran.xml b/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_no_flexran.xml index a28a81d970c..41e746bc85d 100644 --- a/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_no_flexran.xml +++ b/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_no_flexran.xml @@ -33,8 +33,8 @@ <testCase id="000001"> <class>IdleSleep</class> - <desc>Waiting for 35 seconds</desc> - <idle_sleep_time_in_sec>35</idle_sleep_time_in_sec> + <desc>Waiting for 55 seconds</desc> + <idle_sleep_time_in_sec>55</idle_sleep_time_in_sec> </testCase> <testCase id="000002"> diff --git a/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_w_flexran.xml b/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_w_flexran.xml index 07cd8fbb304..6ee9247ef34 100644 --- a/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_w_flexran.xml +++ b/ci-scripts/xml_files/enb_usrp210_band7_test_05mhz_tm1_rrc_inactivity_w_flexran.xml @@ -36,8 +36,8 @@ <testCase id="000001"> <class>IdleSleep</class> - <desc>Waiting for 45 seconds</desc> - <idle_sleep_time_in_sec>45</idle_sleep_time_in_sec> + <desc>Waiting for 55 seconds</desc> + <idle_sleep_time_in_sec>55</idle_sleep_time_in_sec> </testCase> <testCase id="000002"> -- GitLab