Commit c5546228 authored by Remi Hardy's avatar Remi Hardy
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Integration 2021 wk12

MR !1037: 5G NR DL MIMO

MR !1089: Fixes two issues that we encountered with the new Quectel modules (RM500Q-GL)
-make LTE RRC buffers large enough
-fix initial{D,U}LBWPlocationAndBandwidth in NR config file so that all accept it
parents b28ac6d9 a84b1b43
...@@ -23,6 +23,7 @@ gNBs = ...@@ -23,6 +23,7 @@ gNBs =
ssb_SubcarrierOffset = 0; ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1; pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
servingCellConfigCommon = ( servingCellConfigCommon = (
{ {
...@@ -46,7 +47,7 @@ gNBs = ...@@ -46,7 +47,7 @@ gNBs =
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart # this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6366; initialDLBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
...@@ -89,7 +90,7 @@ gNBs = ...@@ -89,7 +90,7 @@ gNBs =
pMax = 20; pMax = 20;
#initialUplinkBWP #initialUplinkBWP
#genericParameters #genericParameters
initialULBWPlocationAndBandwidth = 6366; initialULBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1; initialULBWPsubcarrierSpacing = 1;
...@@ -240,7 +241,7 @@ L1s = ( ...@@ -240,7 +241,7 @@ L1s = (
RUs = ( RUs = (
{ {
local_rf = "yes" local_rf = "yes"
nb_tx = 1 nb_tx = 1
nb_rx = 1 nb_rx = 1
att_tx = 0 att_tx = 0
...@@ -249,12 +250,12 @@ RUs = ( ...@@ -249,12 +250,12 @@ RUs = (
max_pdschReferenceSignalPower = -27; max_pdschReferenceSignalPower = -27;
max_rxgain = 75; max_rxgain = 75;
eNB_instances = [0]; eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas ## beamforming 1x2 matrix: 1 layer x 2 antennas
bf_weights = [0x00007fff, 0x0000]; bf_weights = [0x00007fff, 0x0000];
##beamforming 1x4 matrix: 1 layer x 4 antennas ## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000]; #bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix: ## beamforming 2x2 matrix:
# bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff]; #bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix: ## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff]; #bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
......
...@@ -48,7 +48,7 @@ gNBs = ...@@ -48,7 +48,7 @@ gNBs =
#initialDownlinkBWP #initialDownlinkBWP
#genericParameters #genericParameters
# this is RBstart=84,L=13 (275*(L-1))+RBstart # this is RBstart=84,L=13 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6366; //28875; //6366; #6407; #3384; initialDLBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1; initialDLBWPsubcarrierSpacing = 1;
...@@ -90,7 +90,7 @@ gNBs = ...@@ -90,7 +90,7 @@ gNBs =
pMax = 20; pMax = 20;
#initialUplinkBWP #initialUplinkBWP
#genericParameters #genericParameters
initialULBWPlocationAndBandwidth = 6366; //28875; //6366; #6407; #3384; initialULBWPlocationAndBandwidth = 6368;
# subcarrierSpacing # subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120 # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1; initialULBWPsubcarrierSpacing = 1;
......
...@@ -832,7 +832,7 @@ add_library(F1AP ...@@ -832,7 +832,7 @@ add_library(F1AP
# Hardware dependant options # Hardware dependant options
################################### ###################################
add_list1_option(NB_ANTENNAS_RX "2" "Number of antennas in reception" "1" "2" "4") add_list1_option(NB_ANTENNAS_RX "4" "Number of antennas in reception" "1" "2" "4")
add_list1_option(NB_ANTENNAS_TX "4" "Number of antennas in transmission" "1" "2" "4") add_list1_option(NB_ANTENNAS_TX "4" "Number of antennas in transmission" "1" "2" "4")
add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "OAI_USRP" "OAI_BLADERF" "OAI_LMSSDR" "OAI_SIMU") add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "OAI_USRP" "OAI_BLADERF" "OAI_LMSSDR" "OAI_SIMU")
......
...@@ -302,6 +302,9 @@ const char* eurecomFunctionsNames[] = { ...@@ -302,6 +302,9 @@ const char* eurecomFunctionsNames[] = {
/* PHY signals */ /* PHY signals */
"ue_synch", "ue_synch",
"ue_slot_fep", "ue_slot_fep",
"ue_slot_fep_pdcch",
"ue_slot_fep_pbch",
"ue_slot_fep_pdsch",
"ue_slot_fep_mbsfn", "ue_slot_fep_mbsfn",
"ue_slot_fep_mbsfn_khz_1dot25", "ue_slot_fep_mbsfn_khz_1dot25",
"ue_rrc_measurements", "ue_rrc_measurements",
...@@ -390,6 +393,8 @@ const char* eurecomFunctionsNames[] = { ...@@ -390,6 +393,8 @@ const char* eurecomFunctionsNames[] = {
"rx_pmch", "rx_pmch",
"rx_pmch_khz_1dot25", "rx_pmch_khz_1dot25",
"pdsch_procedures", "pdsch_procedures",
"pdsch_procedures_crnti",
//"dlsch_procedures_crnti",
"pdsch_procedures_si", "pdsch_procedures_si",
"pdsch_procedures_p", "pdsch_procedures_p",
"pdsch_procedures_ra", "pdsch_procedures_ra",
......
...@@ -283,6 +283,9 @@ typedef enum { ...@@ -283,6 +283,9 @@ typedef enum {
/* PHY signals */ /* PHY signals */
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SYNCH, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SYNCH,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDCCH,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PBCH,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PDSCH,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_MBSFN, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_MBSFN,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_MBSFN_KHZ_1DOT25, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_MBSFN_KHZ_1DOT25,
VCD_SIGNAL_DUMPER_FUNCTIONS_UE_RRC_MEASUREMENTS, VCD_SIGNAL_DUMPER_FUNCTIONS_UE_RRC_MEASUREMENTS,
...@@ -371,9 +374,11 @@ typedef enum { ...@@ -371,9 +374,11 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PMCH, VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PMCH,
VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PMCH_KHZ_1DOT25, VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PMCH_KHZ_1DOT25,
VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC,
VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_C,
VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI,
VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P,
VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA,
//VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PROC_C,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_CONFIG_SIB1_ENB, VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_CONFIG_SIB1_ENB,
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_CONFIG_SIB2_ENB, VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_CONFIG_SIB2_ENB,
......
...@@ -73,7 +73,7 @@ typedef struct { ...@@ -73,7 +73,7 @@ typedef struct {
} T_cache_t; } T_cache_t;
/* number of VCD functions (to be kept up to date! see in T_messages.txt) */ /* number of VCD functions (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_FUNCTIONS (269) #define VCD_NUM_FUNCTIONS (273)
/* number of VCD variables (to be kept up to date! see in T_messages.txt) */ /* number of VCD variables (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_VARIABLES (187) #define VCD_NUM_VARIABLES (187)
......
...@@ -2407,6 +2407,21 @@ ID = VCD_FUNCTION_UE_SLOT_FEP ...@@ -2407,6 +2407,21 @@ ID = VCD_FUNCTION_UE_SLOT_FEP
GROUP = ALL:VCD:UE:VCD_FUNCTION GROUP = ALL:VCD:UE:VCD_FUNCTION
FORMAT = int,value FORMAT = int,value
VCD_NAME = ue_slot_fep VCD_NAME = ue_slot_fep
ID = VCD_FUNCTION_UE_SLOT_FEP_PDCCH
DESC = VCD function UE_SLOT_FEP_PDCCH
GROUP = ALL:VCD:UE:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = ue_slot_fep_pdcch
ID = VCD_FUNCTION_UE_SLOT_FEP_PBCH
DESC = VCD function UE_SLOT_FEP_PBCH
GROUP = ALL:VCD:UE:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = ue_slot_fep_pbch
ID = VCD_FUNCTION_UE_SLOT_FEP_PDSCH
DESC = VCD function UE_SLOT_FEP_PDSCH
GROUP = ALL:VCD:UE:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = ue_slot_fep_pdsch
ID = VCD_FUNCTION_UE_SLOT_FEP_MBSFN ID = VCD_FUNCTION_UE_SLOT_FEP_MBSFN
DESC = VCD function UE_SLOT_FEP_MBSFN DESC = VCD function UE_SLOT_FEP_MBSFN
GROUP = ALL:VCD:UE:VCD_FUNCTION GROUP = ALL:VCD:UE:VCD_FUNCTION
...@@ -2847,6 +2862,11 @@ ID = VCD_FUNCTION_PDSCH_PROC ...@@ -2847,6 +2862,11 @@ ID = VCD_FUNCTION_PDSCH_PROC
GROUP = ALL:VCD:UE:VCD_FUNCTION GROUP = ALL:VCD:UE:VCD_FUNCTION
FORMAT = int,value FORMAT = int,value
VCD_NAME = pdsch_procedures VCD_NAME = pdsch_procedures
ID = VCD_FUNCTION_PDSCH_PROC_C
DESC = VCD function PDSCH_PROC_C
GROUP = ALL:VCD:UE:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = pdsch_procedures_crnti
ID = VCD_FUNCTION_PDSCH_PROC_SI ID = VCD_FUNCTION_PDSCH_PROC_SI
DESC = VCD function PDSCH_PROC_SI DESC = VCD function PDSCH_PROC_SI
GROUP = ALL:VCD:UE:VCD_FUNCTION GROUP = ALL:VCD:UE:VCD_FUNCTION
......
...@@ -339,7 +339,9 @@ extern "C" { ...@@ -339,7 +339,9 @@ extern "C" {
int itti_create_queue(const task_info_t *taskInfo) { int itti_create_queue(const task_info_t *taskInfo) {
pthread_mutex_lock (&lock_nb_queues); pthread_mutex_lock (&lock_nb_queues);
int newQueue=nb_queues++; int newQueue=nb_queues++;
AssertFatal(tasks=(task_list_t **) realloc(tasks, nb_queues * sizeof(*tasks)),""); task_list_t **new_tasks = (task_list_t **)realloc(tasks, nb_queues * sizeof(*tasks));
AssertFatal(new_tasks != NULL, "could not realloc() tasks list");
tasks = new_tasks;
tasks[newQueue]= new task_list_t; tasks[newQueue]= new task_list_t;
pthread_mutex_unlock (&lock_nb_queues); pthread_mutex_unlock (&lock_nb_queues);
LOG_I(TMR,"Starting itti queue: %s as task %d\n", taskInfo->name, newQueue); LOG_I(TMR,"Starting itti queue: %s as task %d\n", taskInfo->name, newQueue);
......
...@@ -250,13 +250,14 @@ void rx_func(void *param) { ...@@ -250,13 +250,14 @@ void rx_func(void *param) {
L1_nr_prach_procedures(gNB,frame_rx,slot_rx); L1_nr_prach_procedures(gNB,frame_rx,slot_rx);
//apply the rx signal rotation here //apply the rx signal rotation here
apply_nr_rotation_ul(&gNB->frame_parms, for (int aa = 0; aa < gNB->frame_parms.nb_antennas_rx; aa++) {
gNB->common_vars.rxdataF[0], apply_nr_rotation_ul(&gNB->frame_parms,
slot_rx, gNB->common_vars.rxdataF[aa],
0, slot_rx,
gNB->frame_parms.Ncp==EXTENDED?12:14, 0,
gNB->frame_parms.ofdm_symbol_size); gNB->frame_parms.Ncp==EXTENDED?12:14,
gNB->frame_parms.ofdm_symbol_size);
}
phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx); phy_procedures_gNB_uespec_RX(gNB, frame_rx, slot_rx);
} }
......
...@@ -686,13 +686,13 @@ void *UE_thread(void *arg) { ...@@ -686,13 +686,13 @@ void *UE_thread(void *arg) {
if (flags || IS_SOFTMODEM_RFSIM) if (flags || IS_SOFTMODEM_RFSIM)
AssertFatal( writeBlockSize == AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice, UE->rfdevice.trx_write_func(&UE->rfdevice,
writeTimestamp, writeTimestamp,
txp, txp,
writeBlockSize, writeBlockSize,
UE->frame_parms.nb_antennas_tx, UE->frame_parms.nb_antennas_tx,
flags),""); flags),"");
for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++) for (int i=0; i<UE->frame_parms.nb_antennas_tx; i++)
memset(txp[i], 0, writeBlockSize); memset(txp[i], 0, writeBlockSize);
......
...@@ -144,7 +144,7 @@ int test_ldpc(short No_iteration, ...@@ -144,7 +144,7 @@ int test_ldpc(short No_iteration,
t_nrLDPC_procBuf nrLDPC_procBuf; t_nrLDPC_procBuf nrLDPC_procBuf;
t_nrLDPC_procBuf* p_nrLDPC_procBuf = &nrLDPC_procBuf; t_nrLDPC_procBuf* p_nrLDPC_procBuf = &nrLDPC_procBuf;
t_nrLDPC_time_stats decoder_profiler; t_nrLDPC_time_stats decoder_profiler = {0};
t_nrLDPC_time_stats* p_decoder_profiler =&decoder_profiler ; t_nrLDPC_time_stats* p_decoder_profiler =&decoder_profiler ;
int32_t n_iter = 0; int32_t n_iter = 0;
......
...@@ -125,7 +125,7 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -125,7 +125,7 @@ int nr_phy_init_RU(RU_t *ru) {
int beam_count = 0; int beam_count = 0;
if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1 if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) { for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0 //if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++; beam_count++;
} }
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx)); AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
...@@ -133,7 +133,7 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -133,7 +133,7 @@ int nr_phy_init_RU(RU_t *ru) {
int l_ind = 0; int l_ind = 0;
for (i=0; i<RC.nb_nr_L1_inst; i++) { for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<ru->nb_log_antennas;p++) { for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> (63-p)) & 0x01) { //if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*)); ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) { for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t)); ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
...@@ -142,8 +142,8 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -142,8 +142,8 @@ int nr_phy_init_RU(RU_t *ru) {
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j); //printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++; l_ind++;
} // for j } // for j
} // for p //}
} } // for p
} //for i } //for i
} }
} // !=IF5 } // !=IF5
......
...@@ -71,33 +71,39 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch, ...@@ -71,33 +71,39 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
pdsch->llr128 = (int16_t **)malloc16_clear( sizeof(int16_t *) ); pdsch->llr128 = (int16_t **)malloc16_clear( sizeof(int16_t *) );
// FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV // FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV
// FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there // FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there
pdsch->rxdataF_ext = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->rxdataF_ext = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->rxdataF_uespec_pilots = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->rxdataF_uespec_pilots = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->rxdataF_comp0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->rxdataF_comp0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->rho = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) ); pdsch->rho = (int32_t ***)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t **) );
pdsch->dl_ch_estimates = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_ch_estimates = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->dl_ch_estimates_ext = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_ch_estimates_ext = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->dl_bf_ch_estimates = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_bf_ch_estimates = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->dl_bf_ch_estimates_ext = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_bf_ch_estimates_ext = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
//pdsch->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); //pdsch->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
//pdsch->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) ); //pdsch->dl_ch_rho2_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_mag0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_ch_mag0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->dl_ch_magb0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_ch_magb0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->dl_ch_magr0 = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_ch_magr0 = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->ptrs_phase_per_slot = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->ptrs_phase_per_slot = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->ptrs_re_per_slot = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->ptrs_re_per_slot = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
pdsch->dl_ch_ptrs_estimates_ext = (int32_t **)malloc16_clear( 8*sizeof(int32_t *) ); pdsch->dl_ch_ptrs_estimates_ext = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t *) );
// the allocated memory size is fixed: // the allocated memory size is fixed:
AssertFatal( fp->nb_antennas_rx <= 2, "nb_antennas_rx > 2" ); AssertFatal( fp->nb_antennas_rx <= 4, "nb_antennas_rx > 4" );//Extend the max number of UE Rx antennas to 4
const size_t num = 7*2*fp->N_RB_DL*12;
for (int i=0; i<fp->nb_antennas_rx; i++) { for (int i=0; i<fp->nb_antennas_rx; i++) {
pdsch->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_DL*12*7*2) ); pdsch->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->rxdataF_uespec_pilots[i] = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->N_RB_DL*12);
for (int j=0; j<4; j++) { //fp->nb_antennas_tx; j++) pdsch->ptrs_phase_per_slot[i] = (int32_t *)malloc16_clear( sizeof(int32_t) * 14 );
const int idx = (j<<1)+i; pdsch->ptrs_re_per_slot[i] = (int32_t *)malloc16_clear( sizeof(int32_t) * 14);
const size_t num = 7*2*fp->N_RB_DL*12; pdsch->dl_ch_ptrs_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t) * num);
pdsch->rxdataF_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num ); pdsch->rho[i] = (int32_t **)malloc16_clear( NR_MAX_NB_LAYERS*NR_MAX_NB_LAYERS*sizeof(int32_t *) );
pdsch->rxdataF_uespec_pilots[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->N_RB_DL*12);
for (int j=0; j<NR_MAX_NB_LAYERS; j++) {
const int idx = (j*fp->nb_antennas_rx)+i;
for (int k=0; k<NR_MAX_NB_LAYERS; k++) {
pdsch->rho[i][j*NR_MAX_NB_LAYERS+k] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
}
pdsch->rxdataF_comp0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num ); pdsch->rxdataF_comp0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_estimates[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2); pdsch->dl_ch_estimates[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2);
pdsch->dl_ch_estimates_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_estimates_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
...@@ -108,9 +114,6 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch, ...@@ -108,9 +114,6 @@ void phy_init_nr_ue__PDSCH(NR_UE_PDSCH *const pdsch,
pdsch->dl_ch_mag0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_mag0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magb0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_magb0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_magr0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num ); pdsch->dl_ch_magr0[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
pdsch->ptrs_re_per_slot[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * 14);
pdsch->ptrs_phase_per_slot[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * 14 );
pdsch->dl_ch_ptrs_estimates_ext[idx]= (int32_t *)malloc16_clear( sizeof(int32_t) * num);
} }
} }
} }
...@@ -139,16 +142,14 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -139,16 +142,14 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
uint16_t N_n_scid[2] = {0,1}; // [HOTFIX] This is a temporary implementation of scramblingID0 and scramblingID1 which are given by DMRS-UplinkConfig uint16_t N_n_scid[2] = {0,1}; // [HOTFIX] This is a temporary implementation of scramblingID0 and scramblingID1 which are given by DMRS-UplinkConfig
int n_scid; int n_scid;
abstraction_flag = 0; abstraction_flag = 0;
fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1;
// dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig; // dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig;
// ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig; // ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
LOG_I(PHY, "Initializing UE vars (abstraction %u) for gNB TXant %u, UE RXant %u\n", abstraction_flag, fp->nb_antennas_tx, fp->nb_antennas_rx); LOG_I(PHY, "Initializing UE vars (abstraction %u) for gNB TXant %u, UE RXant %u\n", abstraction_flag, fp->nb_antennas_tx, fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST); //LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_gNB_INST);
phy_init_nr_top(ue); phy_init_nr_top(ue);
// many memory allocation sizes are hard coded // many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[gNB_id]" ); AssertFatal( fp->nb_antennas_rx <= 4, "hard coded allocation for ue_common_vars->dl_ch_estimates[gNB_id]" );
AssertFatal(nb_connected_gNB <= NUMBER_OF_CONNECTED_gNB_MAX, "n_connected_gNB is too large" ); AssertFatal( nb_connected_gNB <= NUMBER_OF_CONNECTED_gNB_MAX, "n_connected_gNB is too large" );
// init phy_vars_ue // init phy_vars_ue
for (i=0; i<4; i++) { for (i=0; i<4; i++) {
...@@ -276,7 +277,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -276,7 +277,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
} }
//PDCCH DMRS init (eNB offset = 0) //PDCCH DMRS init (gNB offset = 0)
ue->nr_gold_pdcch[0] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **)); ue->nr_gold_pdcch[0] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***pdcch_dmrs = ue->nr_gold_pdcch[0]; uint32_t ***pdcch_dmrs = ue->nr_gold_pdcch[0];
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n"); AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
...@@ -291,7 +292,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -291,7 +292,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
} }
//PDSCH DMRS init (eNB offset = 0) //PDSCH DMRS init (gNB offset = 0)
ue->nr_gold_pdsch[0] = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***)); ue->nr_gold_pdsch[0] = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0]; uint32_t ****pdsch_dmrs = ue->nr_gold_pdsch[0];
...@@ -329,31 +330,25 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -329,31 +330,25 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
} }
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id]->llr_shifts = (uint8_t *)malloc16_clear(7*2*fp->N_RB_DL*12); ue->pdsch_vars[th_id][gNB_id]->llr_shifts = (uint8_t *)malloc16_clear(7*2*fp->N_RB_DL*12);
ue->pdsch_vars[th_id][gNB_id]->llr_shifts_p = ue->pdsch_vars[0][gNB_id]->llr_shifts; ue->pdsch_vars[th_id][gNB_id]->llr_shifts_p = ue->pdsch_vars[0][gNB_id]->llr_shifts;
ue->pdsch_vars[th_id][gNB_id]->llr[1] = (int16_t *)malloc16_clear((8*(3*8*8448))*sizeof(int16_t)); ue->pdsch_vars[th_id][gNB_id]->llr[1] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
ue->pdsch_vars[th_id][gNB_id]->layer_llr[1] = (int16_t *)malloc16_clear((8*(3*8*8448))*sizeof(int16_t)); ue->pdsch_vars[th_id][gNB_id]->layer_llr[1] = (int16_t *)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream = (int16_t **)malloc16_clear(sizeof(int16_t *)); ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream = (int16_t **)malloc16_clear( sizeof(int16_t *) );
ue->pdsch_vars[th_id][gNB_id]->rho = (int32_t **)malloc16_clear(fp->nb_antennas_rx*sizeof(int32_t *));
} }
for (int i=0; i<fp->nb_antennas_rx; i++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id]->rho[i] = (int32_t *)malloc16_clear(7*2*sizeof(int32_t)*(fp->N_RB_DL*12));
}
}
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho2_ext = (int32_t **)malloc16_clear(8*sizeof(int32_t *)); ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho2_ext = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
} }
for (i=0; i<fp->nb_antennas_rx; i++) for (i=0; i<fp->nb_antennas_rx; i++)
for (j=0; j<4; j++) { for (j=0; j<4; j++) {
const int idx = (j<<1)+i; const int idx = (j*fp->nb_antennas_rx)+i;
const size_t num = 7*2*fp->N_RB_DL*12+4; const size_t num = 7*2*fp->N_RB_DL*12+4;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho2_ext[idx] = (int32_t *)malloc16_clear(sizeof(int32_t) * num); ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho2_ext[idx] = (int32_t *)malloc16_clear( sizeof(int32_t) * num );
} }
} }
...@@ -361,15 +356,15 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, ...@@ -361,15 +356,15 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
for (k=0; k<8; k++) { //harq_pid for (k=0; k<8; k++) { //harq_pid
for (l=0; l<8; l++) { //round for (l=0; l<8; l++) { //round
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) { for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
ue->pdsch_vars[th_id][gNB_id]->rxdataF_comp1[k][l] = (int32_t **)malloc16_clear(8*sizeof(int32_t *)); ue->pdsch_vars[th_id][gNB_id]->rxdataF_comp1[k][l] = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho_ext[k][l] = (int32_t **)malloc16_clear(8*sizeof(int32_t *)); ue->pdsch_vars[th_id][gNB_id]->dl_ch_rho_ext[k][l] = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdsch_vars[th_id][gNB_id]->dl_ch_mag1[k][l] = (int32_t **)malloc16_clear(8*sizeof(int32_t *)); ue->pdsch_vars[th_id][gNB_id]->dl_ch_mag1[k][l] = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
ue->pdsch_vars[th_id][gNB_id]->dl_ch_magb1[k][l] = (int32_t **)malloc16_clear(8*sizeof(int32_t *)); ue->pdsch_vars[th_id][gNB_id]->dl_ch_magb1[k][l] = (int32_t **)malloc16_clear( 4*fp->nb_antennas_rx*sizeof(int32_t *) );
} }
for (int i=0; i<fp->nb_antennas_rx; i++) for (int i=0; i<fp->nb_antennas_rx; i++)
for (int j=0; j<4; j++) { //frame_parms->nb_antennas_tx; j++) for (int j=0; j<4; j++) { //frame_parms->nb_antennas_tx; j++)
const int idx = (j<<1)+i;