...
 
Commits (9)
......@@ -42,6 +42,8 @@ set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY})
project (OpenAirInterface)
#add_definitions("-DEMIT_ASN_DEBUG=1")
###########################################
# macros to define options as there is numerous options in oai
################################################
......@@ -119,6 +121,7 @@ endmacro(add_list_string_option)
####################################################
# compilation flags
#############################################
#set(CMAKE_BUILD_TYPE "Debug")
if (CMAKE_BUILD_TYPE STREQUAL "")
set(CMAKE_BUILD_TYPE "RelWithDebInfo")
endif()
......@@ -173,7 +176,7 @@ add_boolean_option(RRC_MSG_PRINT False "print RRC messages")
add_boolean_option(PDCP_MSG_PRINT False "print PDCP messages")
add_boolean_option(TEST_OMG False "???")
add_boolean_option(DEBUG_OMG False "???")
add_boolean_option(XFORMS False "This adds the possibility to see the signal oscilloscope")
add_boolean_option(XFORMS True "This adds the possibility to see the signal oscilloscope")
add_boolean_option(PRINT_STATS False "This adds the possibility to see the status")
add_boolean_option(DEBUG_CONSOLE False "makes debugging easier, disables stdout/stderr buffering")
......@@ -1605,14 +1608,14 @@ target_link_libraries (mme_gw
-Wl,--start-group
LIB_NAS_MME S1AP_LIB S1AP_EPC GTPV1U GTPV2C SCTP_SERVER UDP_SERVER SECU_CN SECU_OSA S6A SGW MME_APP LFDS MSC ${ITTI_LIB} CN_UTILS HASHTABLE
-Wl,--end-group
pthread m sctp rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} ${CONFIG_LIBRARIES} fdproto fdcore
pthread m sctp rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} ${CONFIG_LIBRARIES} fdproto fdcore gnutls
)
else (MESSAGE_CHART_GENERATOR)
target_link_libraries (mme_gw
-Wl,--start-group
LIB_NAS_MME S1AP_LIB S1AP_EPC GTPV1U GTPV2C SCTP_SERVER UDP_SERVER SECU_CN SECU_OSA S6A SGW MME_APP LFDS ${ITTI_LIB} CN_UTILS HASHTABLE
-Wl,--end-group
pthread m sctp rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} ${CONFIG_LIBRARIES} fdproto fdcore
pthread m sctp rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} ${CONFIG_LIBRARIES} fdproto fdcore gnutls
)
endif(MESSAGE_CHART_GENERATOR)
......
......@@ -30,7 +30,7 @@ set ( LOCALIZATION False )
set ( LOG_NO_THREAD 1 )
set ( LOWLATENCY False )
set ( MAC_CONTEXT 1 )
set ( MAX_NUM_CCs 1 )
set ( MAX_NUM_CCs 2 )
set ( MESSAGE_CHART_GENERATOR False )
set ( MESSAGE_CHART_GENERATOR_RLC_MAC False )
set ( MESSAGE_CHART_GENERATOR_PHY False )
......@@ -79,4 +79,6 @@ set ( TEST_OMG False )
set ( USE_3GPP_ADDR_AS_LINK_ADDR False )
set ( USE_MME "R10" )
set ( USER_MODE True )
set ( XER_PRINT False )
#set ( XER_PRINT False )
set ( XFORMS False )
set ( XER_PRINT True )
......@@ -371,6 +371,7 @@ install_asn1c_from_source(){
svn co https://github.com/vlm/asn1c/trunk /tmp/asn1c-r1516 -r 1516 > /tmp/log_compile_asn1c
patch -p0 < $OPENAIR_DIR/openair-cn/S1AP/MESSAGES/ASN1/asn1cpatch.p0 >> /tmp/log_compile_asn1c
patch -p0 < $OPENAIR_DIR/openair-cn/S1AP/MESSAGES/ASN1/asn1cpatch_2.p0 >> /tmp/log_compile_asn1c
patch -p0 < $OPENAIR_DIR/openair2/RRC/LITE/MESSAGES/asn1c/asn1cpatch.p0 >> /tmp/log_compile_asn1c
./configure
make > /tmp/log_compile_asn1c 2>&1
$SUDO make install
......
......@@ -62,7 +62,8 @@ MME :
# max values = 999.999:65535
# maximum of 32 values, comma separated
TAI_LIST = (
{MCC="208" ; MNC="95"; TAC = "1"; } # YOUR PLMN CONFIG HERE
{MCC="208" ; MNC="93"; TAC = "1"; }, # YOUR PLMN CONFIG HERE
{MCC="208" ; MNC="10"; TAC = "1"; } # YOUR PLMN CONFIG HERE
);
};
......@@ -107,8 +108,8 @@ P-GW =
PGW_INTERFACE_NAME_FOR_S5_S8 = "none"; # DO NOT CHANGE
PGW_IPV4_ADDRESS_FOR_S5_S8 = "0.0.0.0/24"; # DO NOT CHANGE
PGW_INTERFACE_NAME_FOR_SGI = "eth0"; # YOUR NETWORK CONFIG HERE
PGW_IPV4_ADDRESS_FOR_SGI = "192.168.12.213/24"; # YOUR NETWORK CONFIG HERE
PGW_INTERFACE_NAME_FOR_SGI = "eth1"; # YOUR NETWORK CONFIG HERE
PGW_IPV4_ADDRESS_FOR_SGI = "192.168.12.196/24"; # YOUR NETWORK CONFIG HERE
PGW_MASQUERADE_SGI = "yes"; # YOUR NETWORK CONFIG HERE
};
......
......@@ -6,7 +6,110 @@ mkdir -p $1
cd $1
shift
asn1c -gen-PER -fcompound-names $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
#if this script is called with only 2 arguments (so 1 here after the shift), it's for RRC
#(there may be a better way...)
if [ $# -eq 1 ]; then
#asn1c does not work well with extension groups, we need the following fix:
# replace [[ by '<name> SEQUENCE {'
# and ]] by '} OPTIONAL'
#<name> is ext<N> with N starting from 1 and incremented at each new [[ ]] just
#following another [[ ]]
#
#this is what the following C program does
echo generate asnfix.c
cat << EOF > asnfix.c
/* transforms:
* '[[' to 'name SEQUENCE {'
* ']]' to '} OPTIONAL'
* name is ext1, ext2, ..., for each [[ at the same level
* levels are delimited by { and }
* -- to end of line is a comment and unprocessed
* nested [[ ]] not handled
* { and } must be balanced
* [[ and ]] can be whatever, every combination is valid
*/
#include <stdio.h>
#include <stdlib.h>
void level(int toplevel)
{
int c;
int next_name = 1;
while (1) {
c = getchar();
next:
if (c == EOF) { if (toplevel) break; abort(); }
if (c == '-') {
c = getchar();
if (c != '-') { putchar('-'); goto next; }
putchar(c); putchar(c);
while (1) {
c = getchar(); if (c == EOF) abort();
putchar(c);
if (c == '\n') break;
}
continue;
}
if (c == '[') {
c = getchar();
if (c != '[') { putchar('['); goto next; }
printf("ext%d SEQUENCE {", next_name);
next_name++;
continue;
}
if (c == ']') {
c = getchar();
if (c != ']') { putchar(']'); goto next; }
printf("} OPTIONAL");
continue;
}
putchar(c);
if (c == '}') { if (toplevel) abort(); break; }
if (c == '{') level(0);
}
}
int main(void)
{
level(1);
fflush(stdout);
return 0;
}
EOF
echo compile asnfix.c
gcc -Wall -o asnfix asnfix.c
echo run asnfix on $1
./asnfix < $1 > fixed_grammar.asn
rm -f asnfix asnfix.c
echo done with asnfix
echo running asn1c
asn1c -gen-PER -fcompound-names fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
rm -f fixed_grammar.asn
echo asn1c done
else
asn1c -gen-PER -fcompound-names $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
fi
awk '
BEGIN {
......
......@@ -321,7 +321,7 @@ int nas_message_decrypt(
header->message_authentication_code,header->message_authentication_code,
mac,mac, (emm_security_context!=NULL)?emm_security_context->type:88);
#if defined(NAS_MME)
LOG_FUNC_RETURN (TLV_DECODE_MAC_MISMATCH);
//LOG_FUNC_RETURN (TLV_DECODE_MAC_MISMATCH);
#else
#warning "added test on integrity algorithm because of SECURITY_MODE_COMMAND not correctly handled in UE (check integrity)"
......
......@@ -833,11 +833,11 @@ int s1ap_eNB_handle_ue_context_release_command(uint32_t assoc_id,
"existing UE context 0x%06x\n",
assoc_id,
enb_ue_s1ap_id);
/*MessageDef *msg_complete_p;
MessageDef *msg_complete_p;
msg_complete_p = itti_alloc_new_message(TASK_RRC_ENB, S1AP_UE_CONTEXT_RELEASE_COMPLETE);
S1AP_UE_CONTEXT_RELEASE_COMPLETE(msg_complete_p).eNB_ue_s1ap_id = enb_ue_s1ap_id;
itti_send_msg_to_task(TASK_S1AP, ue_desc_p->eNB_instance->instance <=> 0, msg_complete_p);
*/
itti_send_msg_to_task(TASK_S1AP, 0, msg_complete_p);
return -1;
} else {
MSC_LOG_TX_MESSAGE(
......
......@@ -1477,6 +1477,9 @@ int phy_init_lte_eNB(PHY_VARS_eNB *phy_vars_eNB,
init_prach_tables(839);
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
phy_vars_eNB->CA_configured[UE_id] = 0;
return (0);
}
......@@ -2872,10 +2872,13 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
} else {
format1A_size_bits = sizeof_DCI1A_5MHz_FDD_t;
format1A_size_bytes = sizeof(DCI1A_5MHz_FDD_t);
printf("%s:%d: abort for debug\n", __FILE__, __LINE__);
abort();
format0_size_bits = sizeof_DCI0_5MHz_FDD_t;
format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
printf("!!!!!!!!!!!!!!!!!!!! %s\n", __FILE__);
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_5MHz_2A_FDD_t;
......
......@@ -365,6 +365,39 @@ struct DCI0_5MHz_FDD {
typedef struct DCI0_5MHz_FDD DCI0_5MHz_FDD_t;
#define sizeof_DCI0_5MHz_FDD_t 25
#if Rel10
/// DCI Format Type 0 Rel10 UE with Carrier Aggregation configured (5 MHz,FDD, 27 bits)
struct DCI0_5MHz_FDD_R10_CA_UEspec_RAT {
/// Padding
uint32_t padding:6;
/// Resource allocation type
uint32_t rat:1;
/// SRS Request
uint32_t srs_req:1;
/// CQI Request
uint32_t cqi_req:2;
/// DRS Cyclic Shift
uint32_t cshift:3;
/// Power Control
uint32_t TPC:2;
/// New Data Indicator
uint32_t ndi:1;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_UL*(N_RB_UL+1)/2)) bits)
uint32_t rballoc:9;
/// Hopping flag
uint32_t hopping:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI0_5MHz_FDD_R10_CA_UEspec_RAT DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t;
#define sizeof_DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t 27
#endif /* Rel10 */
struct DCI1A_5MHz_FDD {
/// padding
uint32_t padding:8;
......@@ -389,7 +422,35 @@ struct DCI1A_5MHz_FDD {
typedef struct DCI1A_5MHz_FDD DCI1A_5MHz_FDD_t;
#define sizeof_DCI1A_5MHz_FDD_t 25
#if Rel10
struct DCI1A_5MHz_FDD_R10_UEspec {
/// padding
uint32_t padding:7;
/// SRS Request
uint32_t srs_req:1;
/// Power Control
uint32_t TPC:2;
/// Redundancy version
uint32_t rv:2;
/// New Data Indicator
uint32_t ndi:1;
/// HARQ Process
uint32_t harq_pid:3;
/// Modulation and Coding Scheme and Redundancy Version
uint32_t mcs:5;
/// RB Assignment (ceil(log2(N_RB_DL(N_RB_DL+1)/2)) bits)
uint32_t rballoc:9;
/// Localized/Distributed VRB
uint32_t vrb_type:1;
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint32_t type:1;
} __attribute__ ((__packed__));
typedef struct DCI1A_5MHz_FDD_R10_UEspec DCI1A_5MHz_FDD_R10_UEspec_t;
#define sizeof_DCI1A_5MHz_FDD_R10_UEspec_t 27
#endif /* Rel10 */
/// DCI Format Type 0 (10 MHz,FDD, 25 bits)
struct DCI0_10MHz_FDD {
......
......@@ -5682,6 +5682,8 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
// hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
// type = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->type;
} else {
printf("%s:%d CROUX abort for debug\n", __FILE__, __LINE__);
abort();
cqi_req = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC;
......@@ -5710,6 +5712,8 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
// hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
// type = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type;
} else {
printf("%s:%d CROUX abort for debug\n", __FILE__, __LINE__);
abort();
cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC;
......@@ -6562,13 +6566,27 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
// hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
// type = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->type;
} else {
cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC;
mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs;
rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
// type = ((DCI0_5MHz_FDD_t *)dci_pdu)->type;
#if Rel10
/* DCI0 for a UE configured with more than 1 DL cell is different, see 36.212 5.3.3.1.1 */
if (phy_vars_eNB->CA_configured[UE_id] == 0) {
#endif
cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC;
mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs;
rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
// type = ((DCI0_5MHz_FDD_t *)dci_pdu)->type;
#if Rel10
} else {
printf("!!new DCI format0!!\n");
cqi_req = ((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)dci_pdu)->cshift;
TPC = ((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)dci_pdu)->TPC;
mcs = ((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)dci_pdu)->mcs;
rballoc = ((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)dci_pdu)->rballoc;
}
#endif /* Rel10 */
}
RIV_max = RIV_max25;
......@@ -6654,7 +6672,7 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
ulsch->harq_processes[harq_pid]->n_DMRS = cshift;
if (cqi_req == 1) {
if (cqi_req != 0) {
ulsch->harq_processes[harq_pid]->O_RI = 1; //we only support 2 antenna ports, so this is always 1 according to 3GPP 36.213 Table
switch(transmission_mode) {
......@@ -6691,7 +6709,16 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
break;
case 25:
ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_5MHz;
#if Rel10
/* set correct size if 2 CCs configured */
if (cqi_req != 3) {
#endif
ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_5MHz;
#if Rel10
} else {
ulsch->harq_processes[harq_pid]->Or1 = sizeof_HLC_subband_cqi_nopmi_2CC_5MHz;
}
#endif
break;
case 50:
......@@ -6999,7 +7026,16 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
int dl_subframe = (subframe<4) ? (subframe+6) : (subframe-4);
if (phy_vars_eNB->dlsch_eNB[UE_id][0]->subframe_tx[dl_subframe]>0) { // we have downlink transmission
ulsch->harq_processes[harq_pid]->O_ACK = 1;
#if Rel10
/* set O_ACK to 2 for decoding 2 bits if 2 CCs configured */
if (1 || phy_vars_eNB->CA_configured[UE_id] == 0) {
#endif
ulsch->harq_processes[harq_pid]->O_ACK = 1;
#if Rel10
} else {
ulsch->harq_processes[harq_pid]->O_ACK = 2;
}
#endif
} else {
ulsch->harq_processes[harq_pid]->O_ACK = 0;
}
......
......@@ -1553,7 +1553,7 @@ uint8_t phich_frame2_pusch_frame(LTE_DL_FRAME_PARMS *frame_parms,frame_t frame,u
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats,uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode);
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats,uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode, int N_CC);
void fill_CQI(LTE_UE_ULSCH_t *ulsch,PHY_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff);
void reset_cba_uci(void *o);
......
......@@ -141,6 +141,17 @@ typedef struct __attribute__((packed))
HLC_subband_cqi_nopmi_5MHz;
#define sizeof_HLC_subband_cqi_nopmi_5MHz 18
typedef struct __attribute__((packed))
{
uint32_t padding:28;
uint32_t diffcqi2:14;
uint32_t cqi2:4;
uint32_t diffcqi1:14;
uint32_t cqi1:4;
}
HLC_subband_cqi_nopmi_2CC_5MHz;
#define sizeof_HLC_subband_cqi_nopmi_2CC_5MHz 36
typedef struct __attribute__((packed))
{
uint32_t padding:12;
......
......@@ -172,7 +172,8 @@ void do_diff_cqi(uint8_t N_RB_DL,
}
}
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode)
//?? ajouter un parametre: CC_count
void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_t N_RB_DL, uint16_t * crnti, uint8_t * access_mode, int N_CC)
{
//unsigned char rank;
......@@ -288,12 +289,26 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
break;
case HLC_subband_cqi_nopmi:
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_5MHz *)o)->cqi1);
if (N_CC == 1) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_5MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_5MHz *)o)->diffcqi1);
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_5MHz *)o)->diffcqi1);
} else if (N_CC == 2) {
stats->DL_cqi[0] = (((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->cqi1);
if (stats->DL_cqi[0] > 24)
stats->DL_cqi[0] = 24;
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[0],stats->DL_cqi[0],((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->diffcqi1);
stats->DL_cqi[1] = (((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->cqi2);
if (stats->DL_cqi[1] > 24)
stats->DL_cqi[1] = 24;
do_diff_cqi(N_RB_DL,stats->DL_subband_cqi[1],stats->DL_cqi[1],((HLC_subband_cqi_nopmi_2CC_5MHz *)o)->diffcqi2);
printf("special CQI!!\n");
}
break;
case HLC_subband_cqi_rank1_2A:
......@@ -581,6 +596,8 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
}
*/
extern int FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX;
printf("cqi %d %d (RX fr/subfr %d %d) (TX fr/subfr %d %d)\n", stats->DL_cqi[0], stats->DL_cqi[1], FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX);
}
......
......@@ -219,6 +219,11 @@ typedef struct PHY_VARS_eNB_s {
LTE_eNB_UE_stats eNB_UE_stats[NUMBER_OF_UE_MAX];
LTE_eNB_UE_stats *eNB_UE_stats_ptr[NUMBER_OF_UE_MAX];
#if Rel10
/// indicator set to 1 if the UE is configured with multiple DL cells
int CA_configured[NUMBER_OF_UE_MAX];
#endif
/// cell-specific reference symbols
uint32_t lte_gold_table[20][2][14];
......
......@@ -466,6 +466,10 @@ typedef struct {
} MBSFN_config_t;
typedef struct {
/// EUTRA Band
int eutra_band;
/// Dowlink frequency
uint32_t downlink_frequency;
/// Number of resource blocks (RB) in DL
uint8_t N_RB_DL;
/// Number of resource blocks (RB) in UL
......
......@@ -346,6 +346,17 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
*/
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
#if Rel10
/** \brief Function to set/unset Carrier Aggregation configuration of an UE.
@param Mod_id Index of eNB
@param rnti RNTI of UE
@param ca_configured pass 1 to activate CA config, 0 to deactivate
*/
void ca_config(uint8_t Mod_id,
uint16_t rnti,
int ca_configured);
#endif
uint8_t phich_subframe_to_harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe);
/* \brief Get PDSCH subframe (n+k) from PDCCH subframe n using relationship from Table 8-2 from 36.213
......
......@@ -789,7 +789,7 @@ LTE_eNB_UE_stats* get_eNB_UE_stats(uint8_t Mod_id, uint8_t CC_id,uint16_t rnti)
UE_id = find_ue(rnti, PHY_vars_eNB_g[Mod_id][CC_id]);
if (UE_id == -1) {
// LOG_E(PHY,"get_eNB_UE_stats: UE with rnti %x not found\n",rnti);
// LOG_E(PHY,"[eNB %d/%d]get_eNB_UE_stats: UE with rnti %x not found\n", Mod_id, CC_id, rnti);
return NULL;
}
......
This diff is collapsed.
......@@ -45,3 +45,4 @@
#include "udp_messages_def.h"
#include "gtpv1_u_messages_def.h"
MESSAGE_DEF(CROUX_HACK, MESSAGE_PRIORITY_MED, croux_struct, croux)
......@@ -53,4 +53,10 @@
#include "udp_messages_types.h"
#include "gtpv1_u_messages_types.h"
#define CROUX_HACK(ptr) (ptr)->ittiMsg.croux
typedef struct {
int x;
} croux_struct;
#endif /* MESSAGES_TYPES_H_ */
......@@ -220,8 +220,8 @@ rrc_mac_config_req(
#ifdef Rel10
if (mac_MainConfig->sr_ProhibitTimer_r9) {
UE_mac_inst[Mod_id].scheduling_info.sr_ProhibitTimer = (uint16_t) *mac_MainConfig->sr_ProhibitTimer_r9;
if (mac_MainConfig->ext1 && mac_MainConfig->ext1->sr_ProhibitTimer_r9) {
UE_mac_inst[Mod_id].scheduling_info.sr_ProhibitTimer = (uint16_t) *mac_MainConfig->ext1->sr_ProhibitTimer_r9;
} else {
UE_mac_inst[Mod_id].scheduling_info.sr_ProhibitTimer = (uint16_t) 0;
}
......@@ -519,6 +519,55 @@ rrc_mac_config_req(
return(0);
}
#ifdef Rel10
//------------------------------------------------------------------------------
void
rrc_mac_config_scell_req(
module_id_t module_id,
rnti_t rnti,
int SCell_CC_id,
int bitmap_bit)
//------------------------------------------------------------------------------
{
int UE_id;
eNB_MAC_INST *eNB=&eNB_mac_inst[module_id];
UE_SCell_config_t *sconf;
int s;
UE_id = find_UE_id(module_id, rnti);
if (UE_id == -1) {
LOG_E(MAC,"[eNB %d][rrc_mac_config_scell_req] UE rnti %x not found\n", module_id, rnti);
return;
}
sconf = &eNB->UE_list.scell_config[UE_id];
if (sconf->scell_count == MAX_NUM_CCs) {
LOG_E(MAC,"[eNB %d][rnti %x][rrc_mac_config_scell_req] cannot configure more than %d SCells\n",
module_id, rnti, MAX_NUM_CCs);
return;
}
/* add the SCell, not active */
s = sconf->scell_count;
sconf->scell[s].CC_id = SCell_CC_id;
sconf->scell[s].bitmap_bit = bitmap_bit;
sconf->scell[s].active = FALSE;
sconf->scell_count++;
/* inform the PHY layer that this UE has scell configured */
mac_xface->ca_config(module_id, rnti, 1);
/* !!TO REMOVE!! */
sconf->to_configure = 1;
sconf->scell[s].active = TRUE;
LOG_E(MAC,"[eNB %d][rrc_mac_config_scell_req] UE rnti %x scell id %d bitmap_bit %d\n", module_id, rnti, SCell_CC_id, bitmap_bit);
}
#endif /* Rel10 */
#ifdef LOCALIZATION
//------------------------------------------------------------------------------
double
......
......@@ -264,28 +264,33 @@ typedef struct {
} __attribute__((__packed__))BCCH_PDU;
#ifdef Rel10
/*! \brief MCCH payload */
typedef struct {
uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))MCCH_PDU;
/*!< \brief MAC control element for activation and deactivation of component carriers */
typedef struct {
uint8_t C7:1;/*!< \brief Component carrier 7 */
uint8_t C6:1;/*!< \brief Component carrier 6 */
uint8_t C5:1;/*!< \brief Component carrier 5 */
uint8_t C4:1;/*!< \brief Component carrier 4 */
uint8_t C3:1;/*!< \brief Component carrier 3 */
uint8_t C2:1;/*!< \brief Component carrier 2 */
uint8_t C1:1;/*!< \brief Component carrier 1 */
uint8_t R:1;/*!< \brief Reserved */
} __attribute__((__packed__))CC_ELEMENT;
uint8_t R:1; /*!< \brief Reserved */
uint8_t C1:1; /*!< \brief Component carrier 1 */
uint8_t C2:1; /*!< \brief Component carrier 2 */
uint8_t C3:1; /*!< \brief Component carrier 3 */
uint8_t C4:1; /*!< \brief Component carrier 4 */
uint8_t C5:1; /*!< \brief Component carrier 5 */
uint8_t C6:1; /*!< \brief Component carrier 6 */
uint8_t C7:1; /*!< \brief Component carrier 7 */
} __attribute__((__packed__)) CC_ELEMENT;
/*! \brief MAC control element: MCH Scheduling Information */
typedef struct {
uint8_t stop_sf_MSB:3; // octet 1 LSB
uint8_t lcid:5; // octet 2 MSB
uint8_t stop_sf_LSB:8;
} __attribute__((__packed__))MSI_ELEMENT;
#endif
#endif /* Rel10 */
/*! \brief Values of CCCH LCID for DLSCH */
#define CCCH_LCHANID 0
/*!\brief Values of BCCH logical channel */
......@@ -319,7 +324,7 @@ typedef struct {
/*!\brief LCID of MCH scheduling info for DL */
#define MCH_SCHDL_INFO 3
/*!\brief LCID of Carrier component activation/deactivation */
#define CC_ACT_DEACT 27
#define CC_ACTIVATE_DEACTIVATE 27
#endif
// ULSCH LCHAN IDs
......@@ -785,6 +790,30 @@ typedef struct {
uint8_t sb_size;
uint8_t nb_active_sb;
} SBMAP_CONF;
#ifdef Rel10
#define NUMBER_OF_SCELL_MAX 4
typedef struct {
int CC_id; /* which CC_id corresponds to this SCell */
int bitmap_bit; /* which bit in the bitmap (see 36321 6.1.3.8)
* corresponds to this SCell
*/
boolean_t active; /* current state of this SCell */
} SCell_config_t;
typedef struct {
SCell_config_t scell[NUMBER_OF_SCELL_MAX];
int scell_count;
boolean_t to_configure; /* set to 1 to indicate that a MAC Control
* Element with the current configuration
* has to be sent to the UE
*/
} UE_SCell_config_t;
#endif /* Rel10 */
/*! \brief UE list used by eNB to order UEs/CC for scheduling*/
typedef struct {
/// DLSCH pdu
......@@ -801,8 +830,10 @@ typedef struct {
int ordered_ULCCids[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// number of uplink active component carrier
int numactiveULCCs[NUMBER_OF_UE_MAX];
/// number of downlink active component carrier
uint8_t dl_CC_bitmap[NUMBER_OF_UE_MAX];
#ifdef Rel10
/// scell configuration
UE_SCell_config_t scell_config[NUMBER_OF_UE_MAX];
#endif
/// eNB to UE statistics
eNB_UE_STATS eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// scheduling control info
......
......@@ -301,6 +301,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
TBsize = 57;
}
printf("Msg4 MCS %d\n", ((DCI1A_5MHz_TDD_1_6_t*)&RA_template[i].RA_alloc_pdu2[0])->mcs);
break;
case 50:
......@@ -380,7 +381,11 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
0, // no timing advance
RA_template[i].cont_res_id, // contention res id
msg4_padding, // no padding
msg4_post_padding);
msg4_post_padding
#ifdef Rel10
, 0, 0 /* no scell config */
#endif
);
memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
&eNB->common_channels[CC_id].CCCH_pdu.payload[0],
......
......@@ -132,6 +132,10 @@ generate_dlsch_header(
unsigned char *ue_cont_res_id,
unsigned char short_padding,
unsigned short post_padding
#ifdef Rel10
, uint8_t scell_bitmap,
int scell_bitmap_cmd
#endif
)
//------------------------------------------------------------------------------
{
......@@ -161,6 +165,33 @@ generate_dlsch_header(
last_size=1;
}
#ifdef Rel10
if (scell_bitmap_cmd != 0) {
if (first_element>0) {
mac_header_ptr->E = 1;
mac_header_ptr++;
} else {
first_element=1;
}
mac_header_ptr->R = 0;
mac_header_ptr->E = 0;
mac_header_ptr->LCID = CC_ACTIVATE_DEACTIVATE;
last_size=1;
((CC_ELEMENT*)ce_ptr)->R = 0;
((CC_ELEMENT*)ce_ptr)->C1 = (scell_bitmap >> 1) & 1;
((CC_ELEMENT*)ce_ptr)->C2 = (scell_bitmap >> 2) & 1;
((CC_ELEMENT*)ce_ptr)->C3 = (scell_bitmap >> 3) & 1;
((CC_ELEMENT*)ce_ptr)->C4 = (scell_bitmap >> 4) & 1;
((CC_ELEMENT*)ce_ptr)->C5 = (scell_bitmap >> 5) & 1;
((CC_ELEMENT*)ce_ptr)->C6 = (scell_bitmap >> 6) & 1;
((CC_ELEMENT*)ce_ptr)->C7 = (scell_bitmap >> 7) & 1;
ce_ptr += sizeof(CC_ELEMENT);
LOG_E(MAC,"MAC CE scell bitmap sent to UE: bitmap is 0x%2.2x\n", scell_bitmap);
}
#endif /* Rel10 */
if (drx_cmd != 255) {
if (first_element>0) {
mac_header_ptr->E = 1;
......@@ -458,6 +489,10 @@ schedule_ue_spec(
int32_t normalized_rx_power, target_rx_power;
int32_t tpc=1;
static int32_t tpc_accumulated=0;
#ifdef Rel10
uint8_t scell_bitmap = 0;
#endif
int scell_activation_len = 0; /* not into #ifdef Rel10 to ease code readability below */
if (UE_list->head==-1) {
......@@ -829,11 +864,40 @@ schedule_ue_spec(
break;
}
#ifdef Rel10
/* check if SCells reconfiguration has to be done */
UE_list->scell_config[UE_id].to_configure=0;
if (UE_list->scell_config[UE_id].to_configure) {
UE_SCell_config_t *sconf = &UE_list->scell_config[UE_id];
int s;
/* compute the scell bitmap */
scell_bitmap = 0;
for (s = 0; s < sconf->scell_count; s++)
if (sconf->scell[s].active)
scell_bitmap |= 1 << sconf->scell[s].bitmap_bit;
scell_activation_len = 2;
/* where and when do that? */
UE_list->scell_config[UE_id].to_configure = 0;
/* !!THE FOLLOWING MUST NOT BE DONE HERE!!
* (secondary cell's scheduling becomes active at subframe x+4
* after receiving ACK for MAC PDU with scell CE at subframe x)
*/
/* add secondary cells for scheduling (should we order them?) */
UE_list->numactiveCCs[UE_id] = 1;
for (s = 0; s < sconf->scell_count; s++)
if (sconf->scell[s].active) {
UE_list->ordered_CCids[UE_list->numactiveCCs[UE_id]][UE_id] = sconf->scell[s].CC_id;
UE_list->numactiveCCs[UE_id]++;
}
} else
scell_activation_len = 0;
#endif /* Rel10 */
ta_len = ((eNB_UE_stats->timing_advance_update/update_TA)!=0) ? 2 : 0;
header_len_dcch = 2; // 2 bytes DCCH SDU subheader
if ( TBS-ta_len-header_len_dcch > 0 ) {
if ( TBS-ta_len-header_len_dcch-scell_activation_len > 0 ) {
rlc_status = mac_rlc_status_ind(
module_idP,
rnti,
......@@ -842,7 +906,7 @@ schedule_ue_spec(
ENB_FLAG_YES,
MBMS_FLAG_NO,
DCCH,
(TBS-ta_len-header_len_dcch)); // transport block set size
(TBS-ta_len-header_len_dcch-scell_activation_len)); // transport block set size
sdu_lengths[0]=0;
......@@ -881,7 +945,7 @@ schedule_ue_spec(
}
// check for DCCH1 and update header information (assume 2 byte sub-header)
if (TBS-ta_len-header_len_dcch-sdu_length_total > 0 ) {
if (TBS-ta_len-header_len_dcch-scell_activation_len-sdu_length_total > 0 ) {
rlc_status = mac_rlc_status_ind(
module_idP,
rnti,
......@@ -890,7 +954,7 @@ schedule_ue_spec(
ENB_FLAG_YES,
MBMS_FLAG_NO,
DCCH+1,
(TBS-ta_len-header_len_dcch-sdu_length_total)); // transport block set size less allocations for timing advance and
(TBS-ta_len-header_len_dcch-scell_activation_len-sdu_length_total)); // transport block set size less allocations for timing advance and
// DCCH SDU
if (rlc_status.bytes_in_buffer > 0) {
......@@ -923,9 +987,9 @@ schedule_ue_spec(
LOG_D(MAC,"[eNB %d], Frame %d, DTCH->DLSCH, CC_id %d, Checking RLC status (rab %d, tbs %d, len %d)\n",
module_idP,frameP,CC_id,DTCH,TBS,
TBS-ta_len-header_len_dcch-sdu_length_total-header_len_dtch);
TBS-ta_len-header_len_dcch-scell_activation_len-sdu_length_total-header_len_dtch);
if (TBS-ta_len-header_len_dcch-sdu_length_total-header_len_dtch > 0 ) {
if (TBS-ta_len-header_len_dcch-scell_activation_len-sdu_length_total-header_len_dtch > 0 ) {
rlc_status = mac_rlc_status_ind(
module_idP,
rnti,
......@@ -934,7 +998,7 @@ schedule_ue_spec(
ENB_FLAG_YES,
MBMS_FLAG_NO,
DTCH,
TBS-ta_len-header_len_dcch-sdu_length_total-header_len_dtch);
TBS-ta_len-header_len_dcch-scell_activation_len-sdu_length_total-header_len_dtch);
if (rlc_status.bytes_in_buffer > 0) {
......@@ -993,7 +1057,7 @@ schedule_ue_spec(
TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
while (TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) {
while (TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len + scell_activation_len)) {
nb_rb += min_rb_unit[CC_id]; //
if (nb_rb>nb_available_rb) { // if we've gone beyond the maximum number of RBs
......@@ -1040,13 +1104,13 @@ schedule_ue_spec(
}
// decrease mcs until TBS falls below required length
while ((TBS > (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && (mcs>0)) {
while ((TBS > (sdu_length_total + header_len_dcch + header_len_dtch + ta_len + scell_activation_len)) && (mcs>0)) {
mcs--;
TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
}
// if we have decreased too much or we don't have enough RBs, increase MCS
while ((TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && ((( dl_pow_off[CC_id][UE_id]>0) && (mcs<28))
while ((TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len + scell_activation_len)) && ((( dl_pow_off[CC_id][UE_id]>0) && (mcs<28))
|| ( (dl_pow_off[CC_id][UE_id]==0) && (mcs<=15)))) {
mcs++;
TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
......@@ -1061,8 +1125,8 @@ schedule_ue_spec(
// TBS, sdu_length_total, offset, TBS-sdu_length_total-offset);
#endif
if ((TBS - header_len_dcch - header_len_dtch - sdu_length_total - ta_len) <= 2) {
padding = (TBS - header_len_dcch - header_len_dtch - sdu_length_total - ta_len);
if ((TBS - header_len_dcch - header_len_dtch - sdu_length_total - ta_len - scell_activation_len) <= 2) {
padding = (TBS - header_len_dcch - header_len_dtch - sdu_length_total - ta_len - scell_activation_len);
post_padding = 0;
} else {
padding = 0;
......@@ -1074,7 +1138,7 @@ schedule_ue_spec(
header_len_dtch = header_len_dtch_tmp;
}
post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len ; // 1 is for the postpadding header
post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len - scell_activation_len; // 1 is for the postpadding header
}
//#ifndef EXMIMO_IOT
......@@ -1092,7 +1156,12 @@ schedule_ue_spec(
ta_update, // timing advance
NULL, // contention res id
padding,
post_padding);
post_padding
#ifdef Rel10
, scell_bitmap,
scell_activation_len
#endif
);
//#ifdef DEBUG_eNB_SCHEDULER
if (ta_update) {
......@@ -2229,6 +2298,13 @@ fill_DLSCH_dci(
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rah = 0;
size_bytes=sizeof(DCI1_5MHz_FDD_t);
size_bits=sizeof_DCI1_5MHz_FDD_t;
/* size does not change on a CC without uplink */
/* for the moment, the UE starts to connect on CC 0, so we test CC_id == 0
* in the future (if things stay here) we have to compare with UE primary CC
* or even better check if the CC has an uplink configured for the UE or not
*/
if (CC_id == 0 && UE_list->scell_config[UE_id].scell_count) size_bits++;
printf("!!!!!!!!!!!!!!!!!!!! %s\n", __FILE__);
break;
case 50:
......
......@@ -604,7 +604,11 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
0, // no timing advance
NULL, // no contention res id
padding,
post_padding);
post_padding
#ifdef Rel10
, 0, 0 /* no scell config */
#endif
);
eNB_mac_inst[module_idP].common_channels[CC_id].MCH_pdu.Pdu_size=TBS;
eNB_mac_inst[module_idP].common_channels[CC_id].MCH_pdu.sync_area=i;
......
......@@ -263,6 +263,10 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP)
UE_list->numactiveCCs[UE_id] = 1;
UE_list->numactiveULCCs[UE_id] = 1;
UE_list->pCC_id[UE_id] = cc_idP;
#ifdef Rel10
UE_list->scell_config[UE_id].scell_count = 0;
UE_list->scell_config[UE_id].to_configure = 0;
#endif
UE_list->ordered_CCids[0][UE_id] = cc_idP;
UE_list->ordered_ULCCids[0][UE_id] = cc_idP;
UE_list->num_UEs++;
......@@ -685,7 +689,31 @@ void add_common_dci(DCI_PDU *DCI_pdu,
void add_ue_spec_dci(DCI_PDU *DCI_pdu,void *pdu,rnti_t rnti,unsigned char dci_size_bytes,unsigned char aggregation,unsigned char dci_size_bits,unsigned char dci_fmt,uint8_t ra_flag)
{
extern int FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX;
static char *ff[] = { "format0", "format1",
"format1A",
"format1B",
"format1C",
"format1D",
"format1E_2A_M10PRB",
"format2",
"format2A",
"format2B",
"format2C",
"format2D",
"format3",
"UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN", "UNKNOWN" };
printf("add_ue_spec_dci rnti %x dci_fmt %s len %d (RX fr/subfr %d %d) (TX fr/subfr %d %d)\n", rnti, ff[dci_fmt], dci_size_bits, FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX);
int i;
char v[64];
unsigned int val = *(unsigned int*)pdu;
for (i = 0; i < dci_size_bits; i++) {
v[i] = val&0x80000000?'1':'0';
val <<= 1;
}
v[i]=0;
printf("%s\n", v);
memcpy(&DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].dci_pdu[0],pdu,dci_size_bytes);
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].dci_length = dci_size_bits;
DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci].L = aggregation;
......@@ -716,6 +744,8 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
(UE_template->bsr_info[LCGID2]>0) ||
(UE_template->bsr_info[LCGID3]>0) ||
(UE_template->ul_SR>0)) { // uplink scheduling request
extern int FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX;
printf("UE_is_to_be_scheduled CCid %d UE_id %d (RX fr/subfr %d %d) (TX fr/subfr %d %d)\n", CC_id, UE_id, FRAME_RX, SUBFRAME_RX, FRAME_TX, SUBFRAME_TX);
return(1);
} else {
return(0);
......
......@@ -972,24 +972,53 @@ void schedule_ulsch_rnti(module_id_t module_idP,
ULSCH_dci = UE_template->ULSCH_DCI[harq_pid];
((DCI0_5MHz_FDD_t *)ULSCH_dci)->type = 0;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->hopping = 0;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->rballoc = rballoc;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->mcs = mcs;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->ndi = ndi;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->TPC = tpc;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cshift = cshift;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->padding = 0;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cqi_req = cqi_req;
add_ue_spec_dci(DCI_pdu,
ULSCH_dci,
rnti,
sizeof(DCI0_5MHz_FDD_t),
aggregation,
sizeof_DCI0_5MHz_FDD_t,
format0,
0);
#if Rel10
/* rel10 UE with configured scells has a different DCI0 format, see 36.212 5.3.3.1.1 */
if (UE_list->scell_config[UE_id].scell_count == 0) {
#endif
((DCI0_5MHz_FDD_t *)ULSCH_dci)->type = 0;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->hopping = 0;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->rballoc = rballoc;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->mcs = mcs;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->ndi = ndi;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->TPC = tpc;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cshift = cshift;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->padding = 0;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cqi_req = cqi_req;
add_ue_spec_dci(DCI_pdu,
ULSCH_dci,
rnti,
sizeof(DCI0_5MHz_FDD_t),
aggregation,
sizeof_DCI0_5MHz_FDD_t,
format0,
0);
#if Rel10
} else {
printf("!! generate DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t with cqi_req != 3 (var cqi_req %d)\n", cqi_req);
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->type = 0;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->hopping = 0;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->rballoc = rballoc;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->mcs = mcs;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->ndi = ndi;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->TPC = tpc;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->cshift = cshift;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->cqi_req = cqi_req ? 1 : 0; //3 : 0;
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->srs_req = 0; /* TBC CROUX */
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->rat = 0; /* TBC CROUX */
((DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t *)ULSCH_dci)->padding = 0;
add_ue_spec_dci(DCI_pdu,
ULSCH_dci,
rnti,
sizeof(DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t),
aggregation,
sizeof_DCI0_5MHz_FDD_R10_CA_UEspec_RAT_t,
format0,
0);
}
#endif /* Rel10 */
break;
case 6:
......@@ -1335,6 +1364,7 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
((DCI0_5MHz_FDD_t *)ULSCH_dci)->TPC = 1;//tpc;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cshift = cba_group;
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cqi_req = 1;
printf("%s:%d abort for debug\n", __FILE__, __LINE__);
//add_ue_spec_dci
add_common_dci(DCI_pdu,
......
......@@ -474,6 +474,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,ui
mac_xface->Msg1_transmitted = Msg1_tx;
mac_xface->ra_failed = ra_failed;
mac_xface->ra_succeeded = ra_succeeded;
mac_xface->ca_config = ca_config;
LOG_I(MAC,"[MAIN] init UE MAC functions \n");
mac_xface->ue_decode_si = ue_decode_si;
......
......@@ -692,6 +692,8 @@ in the DLSCH buffer.
@param ue_cont_res_id Pointer to contention resolution identifier (NULL means not present in payload)
@param short_padding Number of bytes for short padding (0,1,2)
@param post_padding number of bytes for padding at the end of MAC PDU
@param scell_bitmap bitmap of the scell config, valid if scell_bitmap_cmd != 0
@param scell_bitmap_cmd pass a value != 0 to put the scell config in the PDU
@returns Number of bytes used for header
*/
unsigned char generate_dlsch_header(unsigned char *mac_header,
......@@ -702,7 +704,12 @@ unsigned char generate_dlsch_header(unsigned char *mac_header,
short timing_advance_cmd,
unsigned char *ue_cont_res_id,
unsigned char short_padding,
unsigned short post_padding);
unsigned short post_padding
#ifdef Rel10
, uint8_t scell_bitmap,
int scell_bitmap_cmd
#endif
);
/** \brief RRC Configuration primitive for PHY/MAC. Allows configuration of PHY/MAC resources based on System Information (SI), RRCConnectionSetup and RRCConnectionReconfiguration messages.
@param Mod_id Instance ID of eNB
......@@ -764,6 +771,25 @@ int rrc_mac_config_req(module_id_t module_idP,
#endif
);
#ifdef Rel10
/** \brief RRC Secondary cell Configuration.
*
* Allows configuration of a secondary cell for a given UE.
* To be called several times to add more secondary cells (up to 4).
*
* @param module_id Module ID of eNB
* @param rnti id of UE to configure
* @param CC_id Component Carrier to add as a secondary cell
* @param
*/
void
rrc_mac_config_scell_req(
module_id_t module_id,
rnti_t rnti,
int CC_id,
int bitmap_bit);
#endif
/** \brief get the estimated UE distance from the PHY->MAC layer.
@param Mod_id Instance ID of eNB
@param UE_id Index of UE if this is an eNB configuration
......
......@@ -134,6 +134,13 @@ typedef struct {
int16_t (*estimate_ue_tx_power)(uint32_t tbs, uint32_t nb_rb, uint8_t control_only, lte_prefix_type_t ncp, uint8_t use_srs);
#if Rel10
/// set/unset Carrier Aggregation configuration of an UE
void (*ca_config)(uint8_t Mod_id,
uint16_t rnti,
int ca_configured);
#endif
/// UE functions
/// reset the ue phy
......
......@@ -688,10 +688,14 @@ uint8_t do_SIB23(uint8_t Mod_id,
(*sib2)->ac_BarringInfo = NULL;
#ifdef Rel10
#if 0
(*sib2)->ssac_BarringForMMTEL_Voice_r9 = NULL;
(*sib2)->ssac_BarringForMMTEL_Video_r9 = NULL;
(*sib2)->ac_BarringForCSFB_r10 = NULL;
#endif
(*sib2)->ext1 = NULL;
(*sib2)->ext2 = NULL;
#endif
#if defined(ENABLE_ITTI)
......@@ -989,10 +993,13 @@ uint8_t do_SIB23(uint8_t Mod_id,
/// (*SIB3)
#ifdef Rel10
(*sib3)->ext1 = NULL;
#if 0
(*sib3)->s_IntraSearch_v920=NULL;
(*sib3)->s_NonIntraSearch_v920=NULL;
(*sib3)->q_QualMin_r9=NULL;
(*sib3)->threshServingLowQ_r9=NULL;
#endif
#endif
(*sib3)->cellReselectionInfoCommon.q_Hyst=SystemInformationBlockType3__cellReselectionInfoCommon__q_Hyst_dB4;
......@@ -2004,6 +2011,28 @@ do_RRCConnectionReconfiguration(
rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8.dedicatedInfoNASList = dedicatedInfoNASList;
rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8.securityConfigHO = NULL;
if (SCell_config != NULL) {
RRCConnectionReconfiguration_r8_IEs_t *r8;
RRCConnectionReconfiguration_v890_IEs_t *v890;
RRCConnectionReconfiguration_v920_IEs_t *v920;
RRCConnectionReconfiguration_v1020_IEs_t *v1020;
SCellToAddModList_r10_t *addlist;
r8 = &rrcConnectionReconfiguration->criticalExtensions.choice.c1.choice.rrcConnectionReconfiguration_r8;
if (r8->nonCriticalExtension == NULL)
r8->nonCriticalExtension = CALLOC(1, sizeof(RRCConnectionReconfiguration_v890_IEs_t));
v890 = r8->nonCriticalExtension;
if (v890->nonCriticalExtension == NULL)
v890->nonCriticalExtension = CALLOC(1, sizeof(RRCConnectionReconfiguration_v920_IEs_t));
v920 = v890->nonCriticalExtension;
if (v920->nonCriticalExtension == NULL)
v920->nonCriticalExtension = CALLOC(1, sizeof(RRCConnectionReconfiguration_v1020_IEs_t));
v1020 = v920->nonCriticalExtension;
if (v1020->sCellToAddModList_r10 == NULL)
v1020->sCellToAddModList_r10 = CALLOC(1, sizeof(SCellToAddModList_r10_t));
addlist = v1020->sCellToAddModList_r10;
if (ASN_SEQUENCE_ADD(&addlist->list, SCell_config)) abort();
}
enc_rval = uper_encode_to_buffer(&asn_DEF_DL_DCCH_Message,
(void*)&dl_dcch_msg,
buffer,
......
Index: skeletons/per_opentype.c
===================================================================
--- skeletons/per_opentype.c (revision 1516)
+++ skeletons/per_opentype.c (working copy)
@@ -277,7 +306,7 @@
(void)constraints;
(void)sptr;
- while(per_get_few_bits(pd, 24) >= 0);
+ while(per_get_few_bits(pd, 1 /*24*/) >= 0);
rv.code = RC_OK;
rv.consumed = pd->moved;
......@@ -296,10 +296,38 @@ typedef struct HANDOVER_INFO_UE_s {
uint8_t measFlag;
} HANDOVER_INFO_UE;
#ifdef Rel10
typedef struct {
int band;
} ue_ca_band;
typedef struct {
ue_ca_band dl_band[maxSimultaneousBands_r10];
ue_ca_band ul_band[maxSimultaneousBands_r10];
int dl_band_count;
int ul_band_count;
} ue_ca_band_combination;
typedef struct {
int CC_id; /* the CC_id of this secondary cell */
int bitmap_bit; /* the bitmap_bit of this secondary cell (see 36321 6.1.3.8) */
} ue_ca_scell_config;
typedef struct {
ue_ca_band_combination combination[maxBandComb_r10];
int combination_count;
ue_ca_scell_config scell[7]; /* up to 7 secondary cells may be configured for an UE */
int scell_count;
} ue_ca_capabilities;
#endif /* Rel10 */
typedef struct eNB_RRC_UE_s {
uint8_t primaryCC_id;
#ifdef Rel10
SCellToAddMod_r10_t sCell_config[2];
ue_ca_capabilities ca;
#endif
SRB_ToAddModList_t* SRB_configList;
DRB_ToAddModList_t* DRB_configList;
......
......@@ -255,6 +255,9 @@ rrc_eNB_generate_defaultRRCConnectionReconfiguration(
const protocol_ctxt_t* const ctxt_pP,
rrc_eNB_ue_context_t* const ue_context_pP,
const uint8_t ho_state
#ifdef Rel10
, SCellToAddMod_r10_t *scell
#endif
);
#if defined(ENABLE_ITTI)
......
......@@ -2883,33 +2883,33 @@ static void dump_sib2( SystemInformationBlockType2_t *sib2 )
} else
LOG_I( RRC, "lateNonCriticalExtension : not defined\n" );
if (sib2->ssac_BarringForMMTEL_Voice_r9) {
if (sib2->ext1 && sib2->ext1->ssac_BarringForMMTEL_Voice_r9) {
LOG_I( RRC, "ssac_BarringForMMTEL_Voice_r9->ac_BarringFactor : %ld\n",
sib2->ssac_BarringForMMTEL_Voice_r9->ac_BarringFactor );
sib2->ext1->ssac_BarringForMMTEL_Voice_r9->ac_BarringFactor );
LOG_I( RRC, "ssac_BarringForMMTEL_Voice_r9->ac_BarringTime : %ld\n",
sib2->ssac_BarringForMMTEL_Voice_r9->ac_BarringTime );
sib2->ext1->ssac_BarringForMMTEL_Voice_r9->ac_BarringTime );
LOG_I( RRC, "ssac_BarringForMMTEL_Voice_r9->ac_BarringForSpecialAC : %"PRIu32"\n",
BIT_STRING_to_uint32(&sib2->ssac_BarringForMMTEL_Voice_r9->ac_BarringForSpecialAC) );
BIT_STRING_to_uint32(&sib2->ext1->ssac_BarringForMMTEL_Voice_r9->ac_BarringForSpecialAC) );
} else
LOG_I( RRC, "ssac_BarringForMMTEL_Voice_r9 : not defined\n" );
if (sib2->ssac_BarringForMMTEL_Video_r9) {
if (sib2->ext1 && sib2->ext1->ssac_BarringForMMTEL_Video_r9) {
LOG_I( RRC, "ssac_BarringForMMTEL_Video_r9->ac_BarringFactor : %ld\n",
sib2->ssac_BarringForMMTEL_Video_r9->ac_BarringFactor );
sib2->ext1->ssac_BarringForMMTEL_Video_r9->ac_BarringFactor );
LOG_I( RRC, "ssac_BarringForMMTEL_Video_r9->ac_BarringTime : %ld\n",
sib2->ssac_BarringForMMTEL_Video_r9->ac_BarringTime );
sib2->ext1->ssac_BarringForMMTEL_Video_r9->ac_BarringTime );
LOG_I( RRC, "ssac_BarringForMMTEL_Video_r9->ac_BarringForSpecialAC : %"PRIu32"\n",
BIT_STRING_to_uint32(&sib2->ssac_BarringForMMTEL_Video_r9->ac_BarringForSpecialAC) );
BIT_STRING_to_uint32(&sib2->ext1->ssac_BarringForMMTEL_Video_r9->ac_BarringForSpecialAC) );
} else
LOG_I( RRC, "ssac_BarringForMMTEL_Video_r9 : not defined\n" );
if (sib2->ac_BarringForCSFB_r10) {
if (sib2->ext2 && sib2->ext2->ac_BarringForCSFB_r10) {
LOG_I( RRC, "ac_BarringForCSFB_r10->ac_BarringFactor : %ld\n",
sib2->ac_BarringForCSFB_r10->ac_BarringFactor );
sib2->ext2->ac_BarringForCSFB_r10->ac_BarringFactor );
LOG_I( RRC, "ac_BarringForCSFB_r10->ac_BarringTime : %ld\n",
sib2->ac_BarringForCSFB_r10->ac_BarringTime );
sib2->ext2->ac_BarringForCSFB_r10->ac_BarringTime );
LOG_I( RRC, "ac_BarringForCSFB_r10->ac_BarringForSpecialAC : %"PRIu32"\n",
BIT_STRING_to_uint32(&sib2->ac_BarringForCSFB_r10->ac_BarringForSpecialAC) );
BIT_STRING_to_uint32(&sib2->ext2->ac_BarringForCSFB_r10->ac_BarringForSpecialAC) );
} else
LOG_I( RRC, "ac_BarringForCSFB_r10 : not defined\n" );
......@@ -3143,12 +3143,12 @@ static void dump_sib5( SystemInformationBlockType5_t *sib5 )
}
}
#ifdef Rel10
if (ifcfInfo->q_QualMin_r9)
LOG_I(RRC," Q_QualMin_r9 : %d\n",*ifcfInfo->q_QualMin_r9);
if (ifcfInfo->ext1 && ifcfInfo->ext1->q_QualMin_r9)
LOG_I(RRC," Q_QualMin_r9 : %d\n",*ifcfInfo->ext1->q_QualMin_r9);
if (ifcfInfo->threshX_Q_r9) {
LOG_I(RRC," threshX_HighQ_r9 : %d\n",ifcfInfo->threshX_Q_r9->threshX_HighQ_r9);
LOG_I(RRC," threshX_LowQ_r9: %d\n",ifcfInfo->threshX_Q_r9->threshX_LowQ_r9);
if (ifcfInfo->ext1 && ifcfInfo->ext1->threshX_Q_r9) {
LOG_I(RRC," threshX_HighQ_r9 : %d\n",ifcfInfo->ext1->threshX_Q_r9->threshX_HighQ_r9);
LOG_I(RRC," threshX_LowQ_r9: %d\n",ifcfInfo->ext1->threshX_Q_r9->threshX_LowQ_r9);
}
#endif
}
......
This diff is collapsed.
......@@ -99,6 +99,7 @@ rrc_eNB_S1AP_get_ue_ids(
// we assume that a rrc_ue_s1ap_ids_s is initially inserted in initial_id2_s1ap_ids
if (eNB_ue_s1ap_id > 0) {
LOG_E(S1AP, "CROUX: I'm not sure of this...\n");
h_rc = hashtable_get(rrc_instance_pP->s1ap_id2_s1ap_ids, (hash_key_t)eNB_ue_s1ap_id, (void**)&result);
}
if (ue_initial_id != UE_INITIAL_ID_INVALID) {
......@@ -635,7 +636,7 @@ rrc_eNB_send_S1AP_NAS_FIRST_REQ(
rrc_ue_s1ap_ids_p);
if (h_rc != HASH_TABLE_OK) {
LOG_E(S1AP, "[eNB %d] Error while hashtable_insert in initial_id2_s1ap_ids ue_initial_id %u\n",
ctxt_pP->module_id, ue_context_pP->ue_context.ue_initial_id);
ctxt_pP->module_id, ue_context_pP->ue_context.ue_initial_id);
}
/* Assume that cause is coded in the same way in RRC and S1ap, just check that the value is in S1ap range */
......@@ -1023,6 +1024,7 @@ int rrc_eNB_process_S1AP_UE_CTXT_MODIFICATION_REQ(MessageDef *msg_p, const char
/*------------------------------------------------------------------------------*/
int rrc_eNB_process_S1AP_UE_CONTEXT_RELEASE_REQ (MessageDef *msg_p, const char *msg_name, instance_t instance)
{
printf("\n\n\nrrc_eNB_process_S1AP_UE_CONTEXT_RELEASE_REQ\n\n\n");
uint32_t eNB_ue_s1ap_id;
struct rrc_eNB_ue_context_s* ue_context_p = NULL;
......
......@@ -1031,6 +1031,8 @@ static struct {
volatile uint8_t phy_proc_CC_id;
} sync_phy_proc[NUM_ENB_THREADS];
int FRAME_TX;
int SUBFRAME_TX;
/*!
* \brief The transmit thread of eNB.
* \ref NUM_ENB_THREADS threads of this type are active at the same time.
......@@ -1158,6 +1160,8 @@ static void* eNB_thread_tx( void* param )
if (oai_exit)
break;
FRAME_TX = proc->frame_tx;
SUBFRAME_TX = proc->subframe;
phy_procedures_eNB_TX( proc->subframe, PHY_vars_eNB_g[0][proc->CC_id], 0, no_relay, NULL );
/* we're done, let the next one proceed */
......@@ -1222,6 +1226,8 @@ static void* eNB_thread_tx( void* param )
}
int FRAME_RX;
int SUBFRAME_RX;
/*!
* \brief The receive thread of eNB.
* \ref NUM_ENB_THREADS threads of this type are active at the same time.
......@@ -1276,7 +1282,7 @@ static void* eNB_thread_rx( void* param )
/* This creates a 2ms reservation every 10ms period*/
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 1 * 1000000; // each rx thread must finish its job in the worst case in 2ms
attr.sched_runtime = .9 * 1000000; // each rx thread must finish its job in the worst case in 2ms
attr.sched_deadline = 1 * 1000000; // each rx thread will finish within 2ms
attr.sched_period = 1 * 10000000; // each rx thread has a period of 10ms from the starting point
......@@ -1328,6 +1334,8 @@ static void* eNB_thread_rx( void* param )
if ((((PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms.frame_type == TDD )&&(subframe_select(&PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms,proc->subframe_rx)==SF_UL)) ||
(PHY_vars_eNB_g[0][proc->CC_id]->lte_frame_parms.frame_type == FDD)))