Commit f48d10ba authored by knopp's avatar knopp
Browse files

Added DLSCH scheduling for subframes 0 and 5. Changes in MAC scheduling data...

Added DLSCH scheduling for subframes 0 and 5. Changes in MAC scheduling data structure to keep track of VRB allocations from SI,RA when scheduling regular DLSCH
parent f7c67795
...@@ -453,7 +453,7 @@ uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) { ...@@ -453,7 +453,7 @@ uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) {
} }
int get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) { uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
int offset; int offset;
...@@ -926,10 +926,15 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -926,10 +926,15 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB); // printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
} }
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc]; if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->vrb_type = vrb_type; dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB; dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB;
RIV_max = RIV_max6; RIV_max = RIV_max6;
...@@ -960,7 +965,14 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -960,7 +965,14 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rballoc];
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->vrb_type = vrb_type; dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];//NPRB; dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];//NPRB;
RIV_max = RIV_max25; RIV_max = RIV_max25;
...@@ -987,9 +999,16 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -987,9 +999,16 @@ int generate_eNB_dlsch_params_from_dci(int frame,
} }
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rballoc];
dlsch0_harq->vrb_type = vrb_type; dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB; dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB;
RIV_max = RIV_max50; RIV_max = RIV_max50;
...@@ -1017,10 +1036,17 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1017,10 +1036,17 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch0_harq->vrb_type = vrb_type; dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rballoc]; if (vrb_type==LOCALIZED) {
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rballoc]; dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rballoc];
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rballoc]; dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rballoc];
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rballoc]; dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rballoc];
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rballoc];
}
else {
LOG_E(PHY,"Distributed RB allocation not done yet\n");
mac_xface->macphy_exit("exiting");
}
dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB; dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
...@@ -2641,7 +2667,7 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2641,7 +2667,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch1_harq->subframe = subframe; dlsch1_harq->subframe = subframe;
} }
//#ifdef DEBUG_DCI #ifdef DEBUG_DCI
if (dlsch0) { if (dlsch0) {
printf("dlsch0 eNB: dlsch0 %p\n",dlsch0); printf("dlsch0 eNB: dlsch0 %p\n",dlsch0);
...@@ -2657,7 +2683,7 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2657,7 +2683,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode); printf("dlsch0 eNB: mimo_mode %d\n",dlsch0_harq->mimo_mode);
} }
//#endif #endif
// compute DL power control parameters // compute DL power control parameters
computeRhoA_eNB(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off); computeRhoA_eNB(pdsch_config_dedicated, dlsch[0],dlsch0_harq->dl_power_off);
...@@ -5508,7 +5534,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -5508,7 +5534,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
} }
//#ifdef DEBUG_DCI #ifdef DEBUG_DCI
if (dlsch[0]) { if (dlsch[0]) {
printf("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti); printf("PDSCH dlsch0 UE: rnti %x\n",dlsch[0]->rnti);
...@@ -5522,7 +5548,7 @@ int generate_ue_dlsch_params_from_dci(int frame, ...@@ -5522,7 +5548,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off); printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
} }
//#endif #endif
dlsch[0]->active=1; dlsch[0]->active=1;
// compute DL power control parameters // compute DL power control parameters
......
...@@ -1242,11 +1242,20 @@ uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb); ...@@ -1242,11 +1242,20 @@ uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb);
uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb); uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb);
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type /* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
@param N_RB_DL number of PRB on DL
@param indicator for even/odd slot
@param vrb vrb index
@param Ngap Gap indicator
*/
uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap);
/* \brief Return prb for a given vrb index
@param vrb_type VRB type (0=localized,1=distributed) @param vrb_type VRB type (0=localized,1=distributed)
@param rb_alloc_dci rballoc field from DCI @param rb_alloc_dci rballoc field from DCI
*/ */
uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci); uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci);
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type /* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
@returns Transmission mode (1-7) @returns Transmission mode (1-7)
*/ */
......
...@@ -168,7 +168,7 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) ...@@ -168,7 +168,7 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
1, 1,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols, phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
phy_vars_ue->frame_rx,subframe); phy_vars_ue->frame_rx,subframe);
LOG_I(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n", LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
phy_vars_ue->Mod_id, phy_vars_ue->Mod_id,
phy_vars_ue->lte_frame_parms.ofdm_symbol_size, phy_vars_ue->lte_frame_parms.ofdm_symbol_size,
nsymb, nsymb,
...@@ -2062,7 +2062,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2062,7 +2062,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#endif #endif
//#ifdef DEBUG_PHY_PROC //#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt); LOG_D(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",phy_vars_ue->Mod_id,frame_rx,slot_rx,mode_string[phy_vars_ue->UE_mode[eNB_id]],dci_cnt);
//#endif //#endif
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->dci_received += dci_cnt; phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->dci_received += dci_cnt;
...@@ -2102,7 +2102,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst ...@@ -2102,7 +2102,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
// if (subframe_rx == 9) { //( frame_rx % 100 == 0) { // if (subframe_rx == 9) { //( frame_rx % 100 == 0) {
LOG_I(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt); LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
//dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]); //dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
// } // }
...@@ -2444,7 +2444,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac ...@@ -2444,7 +2444,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
else else
openair_daq_vars.use_ia_receiver = (openair_daq_vars.use_ia_receiver+1)%3; openair_daq_vars.use_ia_receiver = (openair_daq_vars.use_ia_receiver+1)%3;
LOG_I(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n", LOG_D(PHY,"[MYEMOS] frame %d, IA receiver %d, MCS %d, bitrate %d\n",
frame_rx, frame_rx,
openair_daq_vars.use_ia_receiver, openair_daq_vars.use_ia_receiver,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->mcs, phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->mcs,
...@@ -2800,7 +2800,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac ...@@ -2800,7 +2800,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
frame_rx,subframe_prev); frame_rx,subframe_prev);
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0], LOG_D(PHY,"Decoding DLSCH_SI : rb_alloc %x : nb_rb %d G %d TBS %d, num_pdcch_sym %d\n",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[0],
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb, phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G, phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->G,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS, phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS,
...@@ -2848,7 +2848,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac ...@@ -2848,7 +2848,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) { if (ret == (1+phy_vars_ue->dlsch_ue_SI[eNB_id]->max_turbo_iterations)) {
phy_vars_ue->dlsch_SI_errors[eNB_id]++; phy_vars_ue->dlsch_SI_errors[eNB_id]++;
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n", LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received SI in error (TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
phy_vars_ue->Mod_id, phy_vars_ue->Mod_id,
frame_rx, frame_rx,
subframe_prev, subframe_prev,
...@@ -3281,7 +3281,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac ...@@ -3281,7 +3281,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
} }
if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&phy_vars_ue->lte_frame_parms)) { if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&phy_vars_ue->lte_frame_parms)) {
LOG_I(PHY,"ue calling pmch subframe ..\n "); LOG_D(PHY,"ue calling pmch subframe ..\n ");
if ((slot_rx%2)==1) { if ((slot_rx%2)==1) {
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n", LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
...@@ -3429,7 +3429,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac ...@@ -3429,7 +3429,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_rn->sync_area[subframe_rx] = sync_area; // this could also go the harq data struct phy_vars_rn->sync_area[subframe_rx] = sync_area; // this could also go the harq data struct
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->TBS; phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->TBS;
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->mcs; phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs = phy_vars_ue->dlsch_ue_MCH[0]->harq_processes[0]->mcs;
LOG_I(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n", LOG_D(PHY,"[RN/UE %d] Frame %d subframe %d: store the MCH PDU for MBSFN sync area %d (MCS %d, TBS %d)\n",
phy_vars_ue->Mod_id, frame_rx,subframe_rx,sync_area, phy_vars_ue->Mod_id, frame_rx,subframe_rx,sync_area,
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs, phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->mcs,
phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3); phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3);
......
...@@ -83,9 +83,7 @@ ...@@ -83,9 +83,7 @@
void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, frame_t frameP, sub_frame_t subframeP) //, int calibration_flag) { void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, frame_t frameP, sub_frame_t subframeP) //, int calibration_flag) {
{ {
unsigned int nprb[MAX_NUM_CCs];
int mbsfn_status[MAX_NUM_CCs]; int mbsfn_status[MAX_NUM_CCs];
uint32_t RBalloc[MAX_NUM_CCs];
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
#ifdef EXMIMO #ifdef EXMIMO
int ret; int ret;
...@@ -110,8 +108,6 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -110,8 +108,6 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
DCI_pdu[CC_id] = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu; DCI_pdu[CC_id] = &eNB_mac_inst[module_idP].common_channels[CC_id].DCI_pdu;
DCI_pdu[CC_id]->nCCE=0; DCI_pdu[CC_id]->nCCE=0;
DCI_pdu[CC_id]->num_pdcch_symbols=1; DCI_pdu[CC_id]->num_pdcch_symbols=1;
nprb[CC_id]=0;
RBalloc[CC_id]=0;
mbsfn_status[CC_id]=0; mbsfn_status[CC_id]=0;
// clear vrb_map // clear vrb_map
memset(eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map,0,100); memset(eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map,0,100);
...@@ -245,19 +241,21 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -245,19 +241,21 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// Schedule ULSCH for FDD or subframeP 4 (TDD config 0,3,6) // Schedule ULSCH for FDD or subframeP 4 (TDD config 0,3,6)
// Schedule Normal DLSCH // Schedule Normal DLSCH
schedule_RA(module_idP,frameP,subframeP,2,nprb); schedule_RA(module_idP,frameP,subframeP,2);
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag); schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
} else if ((mac_xface->lte_frame_parms->tdd_config == TDD) || //TDD } else if ((mac_xface->lte_frame_parms->tdd_config == TDD) || //TDD
(mac_xface->lte_frame_parms->tdd_config == 3) || (mac_xface->lte_frame_parms->tdd_config == 3) ||
(mac_xface->lte_frame_parms->tdd_config == 6)) { (mac_xface->lte_frame_parms->tdd_config == 6)) {
//schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);//,calibration_flag); //schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);//,calibration_flag);
} }
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
...@@ -270,21 +268,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -270,21 +268,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
case 0: case 0:
case 1: case 1:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7); schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
case 6: case 6:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8); schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
default: default:
break; break;
} }
} else { //FDD } else { //FDD
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,1,5); schedule_ulsch(module_idP,frameP,cooperation_flag,1,5);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} }
break; break;
...@@ -294,9 +293,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -294,9 +293,9 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// TDD, nothing // TDD, nothing
// FDD, normal UL/DLSCH // FDD, normal UL/DLSCH
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,2,6); schedule_ulsch(module_idP,frameP,cooperation_flag,2,6);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} }
break; break;
...@@ -313,17 +312,18 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -313,17 +312,18 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// no break here! // no break here!
case 5: case 5:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
default: default:
break; break;
} }
} else { //FDD } else { //FDD
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status);
schedule_ulsch(module_idP,frameP,cooperation_flag,3,7); schedule_ulsch(module_idP,frameP,cooperation_flag,3,7);
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} }
...@@ -337,7 +337,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -337,7 +337,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
if (mac_xface->lte_frame_parms->frame_type == 1) { // TDD if (mac_xface->lte_frame_parms->frame_type == 1) { // TDD
switch (mac_xface->lte_frame_parms->tdd_config) { switch (mac_xface->lte_frame_parms->tdd_config) {
case 1: case 1:
// schedule_RA(module_idP,frameP,subframeP,nprb); // schedule_RA(module_idP,frameP,subframeP);
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8); schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
// no break here! // no break here!
...@@ -348,8 +348,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -348,8 +348,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// no break here! // no break here!
case 5: case 5:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
default: default:
...@@ -357,10 +357,10 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -357,10 +357,10 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
} }
} else { } else {
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
// schedule_RA(module_idP,frameP, subframeP, 0, nprb); // schedule_RA(module_idP,frameP, subframeP, 0);
// schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8); schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8);
schedule_ue_spec(module_idP, frameP, subframeP, nprb, mbsfn_status); schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
fill_DLSCH_dci(module_idP, frameP, subframeP, RBalloc, mbsfn_status); fill_DLSCH_dci(module_idP, frameP, subframeP, mbsfn_status);
} }
} }
...@@ -372,21 +372,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -372,21 +372,22 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// TDD Config 0,6 ULSCH for subframes 9,3 resp. // TDD Config 0,6 ULSCH for subframes 9,3 resp.
// TDD normal DLSCH // TDD normal DLSCH
// FDD normal UL/DLSCH // FDD normal UL/DLSCH
schedule_SI(module_idP,frameP,subframeP,nprb); schedule_SI(module_idP,frameP,subframeP);
//schedule_RA(module_idP,frameP,subframeP,5,nprb); //schedule_RA(module_idP,frameP,subframeP,5);
if (mac_xface->lte_frame_parms->frame_type == FDD) { if (mac_xface->lte_frame_parms->frame_type == FDD) {
schedule_RA(module_idP,frameP,subframeP,1,nprb); schedule_RA(module_idP,frameP,subframeP,1);
// schedule_ulsch(module_idP,frameP,cooperation_flag,5,9); schedule_ulsch(module_idP,frameP,cooperation_flag,5,9);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0 } else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
(mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6 (mac_xface->lte_frame_parms->tdd_config == 6)) { // TDD Config 6
//schedule_ulsch(module_idP,cooperation_flag,subframeP); //schedule_ulsch(module_idP,cooperation_flag,subframeP);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} else { } else {
//schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
} }
break; break;
...@@ -403,26 +404,26 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -403,26 +404,26 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
case 1: case 1:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2); schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,2);
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); // schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
case 6: case 6:
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3); schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
// schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); // schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
case 5: case 5:
schedule_RA(module_idP,frameP,subframeP,2,nprb); schedule_RA(module_idP,frameP,subframeP,2);
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
case 3: case 3:
case 4: case 4:
schedule_ue_spec(module_idP,frameP,subframeP,nprb,mbsfn_status); schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
fill_DLSCH_dci(module_idP,frameP,subframeP,RBalloc,mbsfn_status); fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
break; break;
default: default:
...@@ -430,8 +431,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -430,8 +431,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
} }
} else { //FDD } else { //FDD
// schedule_ulsch(module_idP,frameP,cooperation_flag,6,0); // schedule_ulsch(module_idP,frameP,cooperation_flag,6,0);