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  21. 01 Dec, 2016 1 commit
    • ROBERT Benoit's avatar
      - Problem in DCI NDI : the implementation use 5 HARQ processes, but process 0... · f22e56ee
      ROBERT Benoit authored
       - Problem in DCI NDI : the implementation use 5 HARQ processes, but process 0 NDI never toggled because it was reused on subframe 5 that is not carrying format 1 DCI. Fix -> use 8 harq processes instead of 5.
       - SI scheduled on every subframe 5 (even and odd frames) instead of only on even frames
       - Add DLSCH scheduling on subframe 5 for odd frames
       - change default rballoc from 0x7FFF to 0x1FFFF to support maximum 10MHz throughput
      f22e56ee
  22. 30 Nov, 2016 1 commit
    • Cedric Roux's avatar
      T: update traces · 7adc4703
      Cedric Roux authored
      - add mcs to ENB_PHY_DLSCH_UE_DCI
      - add mcs, round, first_rb, nb_rb, TBS to ENB_PHY_ULSCH_UE_DCI
      7adc4703