dci_tools.c 313 KB
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/*******************************************************************************
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    OpenAirInterface
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    Copyright(c) 1999 - 2014 Eurecom
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    OpenAirInterface is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
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    OpenAirInterface is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with OpenAirInterface.The full GNU General Public License is
   included in this distribution in the file called "COPYING". If not,
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   see <http://www.gnu.org/licenses/>.
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  Contact Information
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  OpenAirInterface Admin: openair_admin@eurecom.fr
  OpenAirInterface Tech : openair_tech@eurecom.fr
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  OpenAirInterface Dev  : openair4g-devel@lists.eurecom.fr
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  Address      : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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 *******************************************************************************/
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/*! \file PHY/LTE_TRANSPORT/dci_tools.c
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 * \brief PHY Support routines (eNB/UE) for filling PDSCH/PUSCH/DLSCH/ULSCH data structures based on DCI PDUs generated by eNB MAC scheduler.
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 * \author R. Knopp
 * \date 2011
 * \version 0.1
 * \company Eurecom
 * \email: knopp@eurecom.fr
 * \note
 * \warning
 */
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SCHED/defs.h"
#include "MAC_INTERFACE/defs.h"
#include "MAC_INTERFACE/extern.h"
#ifdef DEBUG_DCI_TOOLS
#include "PHY/vars.h"
#endif
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#include "assertions.h"
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//#define DEBUG_DCI

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uint32_t localRIV2alloc_LUT6[32];
uint32_t distRIV2alloc_even_LUT6[32];
uint32_t distRIV2alloc_odd_LUT6[32];
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uint16_t RIV2nb_rb_LUT6[32];
uint16_t RIV2first_rb_LUT6[32];
uint16_t RIV_max6=0;

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uint32_t localRIV2alloc_LUT25[512];
uint32_t distRIV2alloc_even_LUT25[512];
uint32_t distRIV2alloc_odd_LUT25[512];
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uint16_t RIV2nb_rb_LUT25[512];
uint16_t RIV2first_rb_LUT25[512];
uint16_t RIV_max25=0;


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uint32_t localRIV2alloc_LUT50_0[1600];
uint32_t localRIV2alloc_LUT50_1[1600];
uint32_t distRIV2alloc_gap0_even_LUT50_0[1600];
uint32_t distRIV2alloc_gap0_odd_LUT50_0[1600];
uint32_t distRIV2alloc_gap0_even_LUT50_1[1600];
uint32_t distRIV2alloc_gap0_odd_LUT50_1[1600];
uint32_t distRIV2alloc_gap1_even_LUT50_0[1600];
uint32_t distRIV2alloc_gap1_odd_LUT50_0[1600];
uint32_t distRIV2alloc_gap1_even_LUT50_1[1600];
uint32_t distRIV2alloc_gap1_odd_LUT50_1[1600];
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uint16_t RIV2nb_rb_LUT50[1600];
uint16_t RIV2first_rb_LUT50[1600];
uint16_t RIV_max50=0;

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uint32_t localRIV2alloc_LUT100_0[6000];
uint32_t localRIV2alloc_LUT100_1[6000];
uint32_t localRIV2alloc_LUT100_2[6000];
uint32_t localRIV2alloc_LUT100_3[6000];
uint32_t distRIV2alloc_gap0_even_LUT100_0[6000];
uint32_t distRIV2alloc_gap0_odd_LUT100_0[6000];
uint32_t distRIV2alloc_gap0_even_LUT100_1[6000];
uint32_t distRIV2alloc_gap0_odd_LUT100_1[6000];
uint32_t distRIV2alloc_gap0_even_LUT100_2[6000];
uint32_t distRIV2alloc_gap0_odd_LUT100_2[6000];
uint32_t distRIV2alloc_gap0_even_LUT100_3[6000];
uint32_t distRIV2alloc_gap0_odd_LUT100_3[6000];
uint32_t distRIV2alloc_gap1_even_LUT100_0[6000];
uint32_t distRIV2alloc_gap1_odd_LUT100_0[6000];
uint32_t distRIV2alloc_gap1_even_LUT100_1[6000];
uint32_t distRIV2alloc_gap1_odd_LUT100_1[6000];
uint32_t distRIV2alloc_gap1_even_LUT100_2[6000];
uint32_t distRIV2alloc_gap1_odd_LUT100_2[6000];
uint32_t distRIV2alloc_gap1_even_LUT100_3[6000];
uint32_t distRIV2alloc_gap1_odd_LUT100_3[6000];
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uint16_t RIV2nb_rb_LUT100[6000];
uint16_t RIV2first_rb_LUT100[6000];
uint16_t RIV_max100=0;


extern uint32_t current_dlsch_cqi;

// Table 8.6.3-3 36.213
uint16_t beta_cqi[16] = {0,   //reserved
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                         0,   //reserved
                         9,   //1.125
                         10,  //1.250
                         11,  //1.375
                         13,  //1.625
                         14,  //1.750
                         16,  //2.000
                         18,  //2.250
                         20,  //2.500
                         23,  //2.875
                         25,  //3.125
                         28,  //3.500
                         32,  //4.000
                         40,  //5.000
                         50
                        }; //6.250
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// Table 8.6.3-2 36.213
uint16_t beta_ri[16] = {10,   //1.250
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                        13,   //1.625
                        16,   //2.000
                        20,   //2.500
                        25,   //3.125
                        32,   //4.000
                        40,   //5.000
                        50,   //6.250
                        64,   //8.000
                        80,   //10.000
                        101,  //12.625
                        127,  //15.875
                        160,  //20.000
                        0,    //reserved
                        0,    //reserved
                        0
                       };   //reserved
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// Table 8.6.3-2 36.213
uint16_t beta_ack[16] = {16,  //2.000
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                         20,  //2.500
                         25,  //3.125
                         32,  //4.000
                         40,  //5.000
                         50,  //6.250
                         64,  //8.000
                         80,  //10.000
                         101, //12.625
                         127, //15.875
                         160, //20.000
                         248, //31.000
                         400, //50.000
                         640, //80.000
                         808
                        };//126.00
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int8_t delta_PUSCH_abs[4] = {-4,-1,1,4};
int8_t delta_PUSCH_acc[4] = {-1,0,1,3};

int8_t *delta_PUCCH_lut = delta_PUSCH_acc;
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void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t *rb_alloc2)
{
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  uint32_t i,shift,subset;
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  rb_alloc2[0] = 0;
  rb_alloc2[1] = 0;
  rb_alloc2[2] = 0;
  rb_alloc2[3] = 0;
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  //  printf("N_RB_DL %d, ra_header %d, rb_alloc %x\n",N_RB_DL,ra_header,rb_alloc);

  switch (N_RB_DL) {

  case 6:
    rb_alloc2[0] = rb_alloc&0x3f;
    break;

  case 25:
    if (ra_header == 0) {// Type 0 Allocation
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      for (i=12; i>0; i--) {
        if ((rb_alloc&(1<<i)) != 0)
          rb_alloc2[0] |= (3<<((2*(12-i))));

        //      printf("rb_alloc2 (type 0) %x\n",rb_alloc2);
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      }
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      if ((rb_alloc&1) != 0)
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        rb_alloc2[0] |= (1<<24);
    } else {
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      subset = rb_alloc&1;
      shift  = (rb_alloc>>1)&1;
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      for (i=0; i<11; i++) {
        if ((rb_alloc&(1<<(i+2))) != 0)
          rb_alloc2[0] |= (1<<(2*i));

        //printf("rb_alloc2 (type 1) %x\n",rb_alloc2);
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      }
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      if ((shift == 0) && (subset == 1))
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        rb_alloc2[0]<<=1;
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      else if ((shift == 1) && (subset == 0))
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        rb_alloc2[0]<<=4;
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      else if ((shift == 1) && (subset == 1))
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        rb_alloc2[0]<<=3;
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    }
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    break;
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  case 50:
    if (ra_header == 0) {// Type 0 Allocation

      for (i=16; i>0; i--) {
        if ((rb_alloc&(1<<i)) != 0)
          rb_alloc2[(3*(16-i))>>5] |= (7<<((3*(16-i))%32));
      }
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      /*
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      for (i=1;i<=16;i++) {
        if ((rb_alloc&(1<<(16-i))) != 0)
      rb_alloc2[(3*i)>>5] |= (7<<((3*i)%32));
      }
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      */
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      // bit mask across
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      if ((rb_alloc2[0]>>31)==1)
        rb_alloc2[1] |= 1;
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      if ((rb_alloc&1) != 0)
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        rb_alloc2[1] |= (3<<16);

      /*
        for (i=0;i<16;i++) {
        if (((rb_alloc>>(16-i))&1) != 0)
        rb_alloc2[(3*i)>>5] |= (7<<((3*i)%32));
        if ((i==10)&&((rb_alloc&(1<<6))!=0))
        rb_alloc2[1] = 1;
        //  printf("rb_alloc2[%d] (type 0) %x ((%x>>%d)&1=%d)\n",(3*i)>>5,rb_alloc2[(3*i)>>5],rb_alloc,i,(rb_alloc>>i)&1);

        }
        // fill in 2 from last bit instead of 3
        if ((rb_alloc&1) != 0)
        rb_alloc2[1] |= (3<<i);
        //    printf("rb_alloc2[%d] (type 0) %x ((%x>>%d)&1=%d)\n",(3*i)>>5,rb_alloc2[(3*i)>>5],rb_alloc,i,(rb_alloc>>i)&1);
        */
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      //      printf("rb_alloc[1]=%x,rb_alloc[0]=%x\n",rb_alloc2[1],rb_alloc2[0]);
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    } else {
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      LOG_E(PHY,"resource type 1 not supported for  N_RB_DL=100\n");
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      mac_xface->macphy_exit("resource type 1 not supported for  N_RB_DL=100\n");
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      /*
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      subset = rb_alloc&1;
      shift  = (rb_alloc>>1)&1;
      for (i=0;i<11;i++) {
      if ((rb_alloc&(1<<(i+2))) != 0)
      rb_alloc2 |= (1<<(2*i));
      //      printf("rb_alloc2 (type 1) %x\n",rb_alloc2);
      }
      if ((shift == 0) && (subset == 1))
      rb_alloc2<<=1;
      else if ((shift == 1) && (subset == 0))
      rb_alloc2<<=4;
      else if ((shift == 1) && (subset == 1))
      rb_alloc2<<=3;
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      */
    }
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    break;

  case 100:
    if (ra_header == 0) {// Type 0 Allocation
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      for (i=0; i<25; i++) {
        if ((rb_alloc&(1<<(24-i))) != 0)
          rb_alloc2[(4*i)>>5] |= (0xf<<((4*i)%32));

        //  printf("rb_alloc2[%d] (type 0) %x (%d)\n",(4*i)>>5,rb_alloc2[(4*i)>>5],rb_alloc&(1<<i));
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      }
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    } else {
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      LOG_E(PHY,"resource type 1 not supported for  N_RB_DL=100\n");
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      mac_xface->macphy_exit("resource type 1 not supported for  N_RB_DL=100\n");
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      /*
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      subset = rb_alloc&1;
      shift  = (rb_alloc>>1)&1;
      for (i=0;i<11;i++) {
      if ((rb_alloc&(1<<(i+2))) != 0)
      rb_alloc2 |= (1<<(2*i));
      //      printf("rb_alloc2 (type 1) %x\n",rb_alloc2);
      }
      if ((shift == 0) && (subset == 1))
      rb_alloc2<<=1;
      else if ((shift == 1) && (subset == 0))
      rb_alloc2<<=4;
      else if ((shift == 1) && (subset == 1))
      rb_alloc2<<=3;
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      */
    }
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    break;

  default:
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    LOG_E(PHY,"Invalid N_RB_DL %d\n", N_RB_DL);
    DevParam (N_RB_DL, 0, 0);
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    break;
  }

}



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uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL)
{
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  uint32_t nprb=0,i;

  switch (N_RB_DL) {
  case 6:
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    for (i=0; i<6; i++) {
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      if ((rb_alloc&(1<<i)) != 0)
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        nprb += 1;
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    }
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    break;
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  case 25:
    if (ra_header == 0) {// Type 0 Allocation
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      for (i=12; i>0; i--) {
        if ((rb_alloc&(1<<i)) != 0)
          nprb += 2;
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      }
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      if ((rb_alloc&1) != 0)
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        nprb += 1;
    } else {
      for (i=0; i<11; i++) {
        if ((rb_alloc&(1<<(i+2))) != 0)
          nprb += 1;
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      }
    }
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    break;
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  case 50:
    if (ra_header == 0) {// Type 0 Allocation
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      for (i=0; i<16; i++) {
        if ((rb_alloc&(1<<(16-i))) != 0)
          nprb += 3;
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      }
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      if ((rb_alloc&1) != 0)
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        nprb += 2;
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    } else {
      for (i=0; i<17; i++) {
        if ((rb_alloc&(1<<(i+2))) != 0)
          nprb += 1;
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      }
    }
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    break;
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  case 100:
    if (ra_header == 0) {// Type 0 Allocation
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      for (i=0; i<25; i++) {
        if ((rb_alloc&(1<<(24-i))) != 0)
          nprb += 4;
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      }
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    } else {
      for (i=0; i<25; i++) {
        if ((rb_alloc&(1<<(i+2))) != 0)
          nprb += 1;
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      }
    }
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    break;
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  default:
    LOG_E(PHY,"Invalide N_RB_DL %d\n", N_RB_DL);
    DevParam (N_RB_DL, 0, 0);
    break;
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  }

  return(nprb);
}

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uint16_t computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs)
{
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  uint16_t RIV;
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  if (Lcrbs<=(1+(N_RB_DL>>1)))
    RIV = (N_RB_DL*(Lcrbs-1)) + RBstart;
  else
    RIV = (N_RB_DL*(N_RB_DL+1-Lcrbs)) + (N_RB_DL-1-RBstart);
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  return(RIV);
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}

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// Convert a DCI Format 1C RIV to a Format 1A RIV
// This extracts the start and length in PRBs from the 1C rballoc and 
// recomputes the RIV as if it were the 1A rballoc

uint32_t conv_1C_RIV(int32_t rballoc,uint32_t N_RB_DL) {

  int NpDLVRB,N_RB_step,LpCRBsm1,RBpstart;

  switch (N_RB_DL) {

  case 6: // N_RB_step = 2, NDLVRB = 6, NpDLVRB = 3
    NpDLVRB   = 3;
    N_RB_step = 2;
    break;
  case 25: // N_RB_step = 2, NDLVRB = 24, NpDLVRB = 12
    NpDLVRB   = 12;
    N_RB_step = 2;
    break;
  case 50: // N_RB_step = 4, NDLVRB = 46, NpDLVRB = 11
    NpDLVRB   = 11;
    N_RB_step = 4;
    break;
  case 100: // N_RB_step = 4, NDLVRB = 96, NpDLVRB = 24
    NpDLVRB   = 24;
    N_RB_step = 4;
    break;
  default:
    NpDLVRB   = 24;
    N_RB_step = 4;
    break;
  }

  // This is the 1C part from 7.1.6.3 in 36.213
  LpCRBsm1 = rballoc/NpDLVRB;
  //  printf("LpCRBs = %d\n",LpCRBsm1+1);

  if (LpCRBsm1 <= (NpDLVRB/2)) {
    RBpstart = rballoc % NpDLVRB;
  }
  else {
    LpCRBsm1 = NpDLVRB-LpCRBsm1;
    RBpstart = NpDLVRB-(rballoc%NpDLVRB);
  }
  //  printf("RBpstart %d\n",RBpstart);
  return(computeRIV(N_RB_DL,N_RB_step*RBpstart,N_RB_step*(LpCRBsm1+1)));
   
}

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uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
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  int offset;

  switch (N_RB_DL) {
    
  case 6:
  // N_RB_DL = tildeN_RB_DL = 6
  // Ngap = 4 , P=1, Nrow = 2, Nnull = 2
  
    switch (vrb) {
    case 0:  // even: 0->0, 1->2, odd: 0->3, 1->5
    case 1:
      return ((3*odd_slot) + 2*(vrb&3))%6;
      break;
    case 2:  // even: 2->3, 3->5, odd: 2->0, 3->2
    case 3:
      return ((3*odd_slot) + 2*(vrb&3) + 5)%6;
      break;
    case 4:  // even: 4->1, odd: 4->4
      return ((3*odd_slot) + 1)%6; 
    case 5:  // even: 5->4, odd: 5->1
      return ((3*odd_slot) + 4)%6;
      break;
    }
    break;
    
  case 15:
    if (vrb<12) {
      if ((vrb&3) < 2)     // even: 0->0, 1->4, 4->1, 5->5, 8->2, 9->6 odd: 0->7, 1->11
	return(((7*odd_slot) + 4*(vrb&3) + (vrb>>2))%14) + 14*(vrb/14);
      else if (vrb < 12) // even: 2->7, 3->11, 6->8, 7->12, 10->9, 11->13
	return (((7*odd_slot) + 4*(vrb&3) + (vrb>>2) +13 )%14) + 14*(vrb/14);
    }
    if (vrb==12)
      return (3+(7*odd_slot)) % 14;
    if (vrb==13)
      return (10+(7*odd_slot)) % 14;
    return 14;
    break;
    
  case 25:
    return (((12*odd_slot) + 6*(vrb&3) + (vrb>>2))%24) + 24*(vrb/24);
    break;
    
  case 50: // P=3
    if (Ngap==0) {
      // Nrow=12,Nnull=2,NVRBDL=46,Ngap1= 27
      if (vrb>=23)
	offset=4;
      else
	offset=0;
      if (vrb<44) {
	if ((vrb&3)>=2)
	  return offset+((23*odd_slot) + 12*(vrb&3) + (vrb>>2) + 45)%46;
	else
	  return offset+((23*odd_slot) + 12*(vrb&3) + (vrb>>2))%46;
      }
      if (vrb==44)  // even: 44->11, odd: 45->34
	return offset+((23*odd_slot) + 22-12+1);
      if (vrb==45)  // even: 45->10, odd: 45->33
	return offset+((23*odd_slot) + 22+12);
      if (vrb==46)
	return offset+46+((23*odd_slot) + 23-12+1) % 46;
      if (vrb==47)
	return offset+46+((23*odd_slot) + 23+12) % 46;
      if (vrb==48)
	return offset+46+((23*odd_slot) + 23-12+1) % 46;
      if (vrb==49)
	return offset+46+((23*odd_slot) + 23+12) % 46;
    }
    else {
      // Nrow=6,Nnull=6,NVRBDL=18,Ngap1= 27
      if (vrb>=9)
	offset=18;
      else
	offset=0;
      
      if (vrb<12) {
	if ((vrb&3)>=2)
	  return offset+((9*odd_slot) + 6*(vrb&3) + (vrb>>2) + 17)%18;
	else
	  return offset+((9*odd_slot) + 6*(vrb&3) + (vrb>>2))%18;
      }
      else {
	return offset+((9*odd_slot) + 12*(vrb&1)+(vrb>>1) )%18 + 18*(vrb/18);
      }
    }
    break;
  case 75:
    // Ngap1 = 32, NVRBRL=64, P=4, Nrow= 16, Nnull=0
    if (Ngap ==0) {
      return ((32*odd_slot) + 16*(vrb&3) + (vrb>>2))%64 + (vrb/64); 
    } else {
      // Ngap2 = 16, NVRBDL=32, Nrow=8, Nnull=0
      return ((16*odd_slot) + 8*(vrb&3) + (vrb>>2))%32 + (vrb/32); 
    }
    break;
  case 100:
    // Ngap1 = 48, NVRBDL=96, Nrow=24, Nnull=0
    if (Ngap ==0) {
      return ((48*odd_slot) + 24*(vrb&3) + (vrb>>2))%96 + (vrb/96); 
    } else {
      // Ngap2 = 16, NVRBDL=32, Nrow=8, Nnull=0
      return ((16*odd_slot) + 8*(vrb&3) + (vrb>>2))%32 + (vrb/32); 
    }
    break;
  default:
    LOG_E(PHY,"Unknown N_RB_DL %d\n",N_RB_DL);
    return 0;
  }
  return 0;
  
}

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void generate_RIV_tables()
{
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  // 6RBs localized RIV
  uint8_t Lcrbs,RBstart;
  uint16_t RIV;
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  uint32_t alloc0,allocdist0_0_even,allocdist0_0_odd,allocdist0_1_even,allocdist0_1_odd;
  uint32_t alloc1,allocdist1_0_even,allocdist1_0_odd,allocdist1_1_even,allocdist1_1_odd;
  uint32_t alloc2,allocdist2_0_even,allocdist2_0_odd,allocdist2_1_even,allocdist2_1_odd;
  uint32_t alloc3,allocdist3_0_even,allocdist3_0_odd,allocdist3_1_even,allocdist3_1_odd;
  uint32_t nVRB,nVRB_even_dist,nVRB_odd_dist;
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  for (RBstart=0; RBstart<6; RBstart++) {
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    alloc0 = 0;
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    allocdist0_0_even = 0;
    allocdist0_0_odd  = 0;
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    for (Lcrbs=1; Lcrbs<=(6-RBstart); Lcrbs++) {
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      //printf("RBstart %d, len %d --> ",RBstart,Lcrbs);
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      nVRB             = Lcrbs-1+RBstart;
      alloc0          |= (1<<nVRB);
      allocdist0_0_even |= (1<<get_prb(6,0,nVRB,0));
      allocdist0_0_odd  |= (1<<get_prb(6,1,nVRB,0));
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      RIV=computeRIV(6,RBstart,Lcrbs);
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      if (RIV>RIV_max6)
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        RIV_max6 = RIV;
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      //      printf("RIV %d (%d) : first_rb %d NBRB %d\n",RIV,localRIV2alloc_LUT25[RIV],RBstart,Lcrbs);
      localRIV2alloc_LUT6[RIV] = alloc0;
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      distRIV2alloc_even_LUT6[RIV]  = allocdist0_0_even;
      distRIV2alloc_odd_LUT6[RIV]  = allocdist0_0_odd;
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      RIV2nb_rb_LUT6[RIV]      = Lcrbs;
      RIV2first_rb_LUT6[RIV]   = RBstart;
    }
  }


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  for (RBstart=0; RBstart<25; RBstart++) {
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    alloc0 = 0;
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    allocdist0_0_even = 0;
    allocdist0_0_odd  = 0;
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    for (Lcrbs=1; Lcrbs<=(25-RBstart); Lcrbs++) {
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      nVRB = Lcrbs-1+RBstart;
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      //printf("RBstart %d, len %d --> ",RBstart,Lcrbs);
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      alloc0     |= (1<<nVRB);
      allocdist0_0_even |= (1<<get_prb(25,0,nVRB,0));
      allocdist0_0_odd  |= (1<<get_prb(25,1,nVRB,0));
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      //printf("alloc 0 %x, allocdist0_even %x, allocdist0_odd %x\n",alloc0,allocdist0_0_even,allocdist0_0_odd);
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      RIV=computeRIV(25,RBstart,Lcrbs);
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      if (RIV>RIV_max25)
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        RIV_max25 = RIV;;
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      localRIV2alloc_LUT25[RIV]      = alloc0;
      distRIV2alloc_even_LUT25[RIV]  = allocdist0_0_even;
      distRIV2alloc_odd_LUT25[RIV]   = allocdist0_0_odd;
      RIV2nb_rb_LUT25[RIV]           = Lcrbs;
      RIV2first_rb_LUT25[RIV]        = RBstart;
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    }
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  }


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  for (RBstart=0; RBstart<50; RBstart++) {
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    alloc0 = 0;
    alloc1 = 0;
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    allocdist0_0_even=0;
    allocdist1_0_even=0;
    allocdist0_0_odd=0;
    allocdist1_0_odd=0;
    allocdist0_1_even=0;
    allocdist1_1_even=0;
    allocdist0_1_odd=0;
    allocdist1_1_odd=0;
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    for (Lcrbs=1; Lcrbs<=(50-RBstart); Lcrbs++) {
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      nVRB = Lcrbs-1+RBstart;


      if (nVRB<32)
        alloc0 |= (1<<nVRB);
      else
        alloc1 |= (1<<(nVRB-32));

      // Distributed Gap1, even slot
      nVRB_even_dist = get_prb(50,0,nVRB,0);
      if (nVRB_even_dist<32)
        allocdist0_0_even |= (1<<nVRB_even_dist);
      else
        allocdist1_0_even |= (1<<(nVRB_even_dist-32));

      // Distributed Gap1, odd slot
      nVRB_odd_dist = get_prb(50,1,nVRB,0);
      if (nVRB_odd_dist<32)
        allocdist0_0_odd |= (1<<nVRB_odd_dist);
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      else
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        allocdist1_0_odd |= (1<<(nVRB_odd_dist-32));
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      // Distributed Gap2, even slot
      nVRB_even_dist = get_prb(50,0,nVRB,1);
      if (nVRB_even_dist<32)
        allocdist0_1_even |= (1<<nVRB_even_dist);
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      else
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        allocdist1_1_even |= (1<<(nVRB_even_dist-32));

      // Distributed Gap2, odd slot
      nVRB_odd_dist = get_prb(50,1,nVRB,1);
      if (nVRB_odd_dist<32)
        allocdist0_1_odd |= (1<<nVRB_odd_dist);
      else
        allocdist1_1_odd |= (1<<(nVRB_odd_dist-32));
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      RIV=computeRIV(50,RBstart,Lcrbs);
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      if (RIV>RIV_max50)
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        RIV_max50 = RIV;
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      //      printf("RIV %d : first_rb %d NBRB %d\n",RIV,RBstart,Lcrbs);
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      localRIV2alloc_LUT50_0[RIV]      = alloc0;
      localRIV2alloc_LUT50_1[RIV]      = alloc1;
      distRIV2alloc_gap0_even_LUT50_0[RIV]  = allocdist0_0_even;
      distRIV2alloc_gap0_even_LUT50_1[RIV]  = allocdist1_0_even;
      distRIV2alloc_gap0_odd_LUT50_0[RIV]   = allocdist0_0_odd;
      distRIV2alloc_gap0_odd_LUT50_1[RIV]   = allocdist1_0_odd;
      distRIV2alloc_gap1_even_LUT50_0[RIV]  = allocdist0_1_even;
      distRIV2alloc_gap1_even_LUT50_1[RIV]  = allocdist1_1_even;
      distRIV2alloc_gap1_odd_LUT50_0[RIV]   = allocdist0_1_odd;
      distRIV2alloc_gap1_odd_LUT50_1[RIV]   = allocdist1_1_odd;
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      RIV2nb_rb_LUT50[RIV]        = Lcrbs;
      RIV2first_rb_LUT50[RIV]     = RBstart;
    }
  }


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  for (RBstart=0; RBstart<100; RBstart++) {
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    alloc0 = 0;
    alloc1 = 0;
    alloc2 = 0;
    alloc3 = 0;
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    allocdist0_0_even=0;
    allocdist1_0_even=0;
    allocdist2_0_even=0;
    allocdist3_0_even=0;
    allocdist0_0_odd=0;
    allocdist1_0_odd=0;
    allocdist2_0_odd=0;
    allocdist3_0_odd=0;
    allocdist0_1_even=0;
    allocdist1_1_even=0;
    allocdist2_1_even=0;
    allocdist3_1_even=0;
    allocdist0_1_odd=0;
    allocdist1_1_odd=0;
    allocdist2_1_odd=0;
    allocdist3_1_odd=0;
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    for (Lcrbs=1; Lcrbs<=(100-RBstart); Lcrbs++) {
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      nVRB = Lcrbs-1+RBstart;

      if (nVRB<32)
        alloc0 |= (1<<nVRB);
      else if (nVRB<64)
        alloc1 |= (1<<(nVRB-33));
      else if (nVRB<96)
        alloc2 |= (1<<(nVRB-65));
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      else
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        alloc3 |= (1<<(nVRB-97));

      // Distributed Gap1, even slot
      nVRB_even_dist = get_prb(100,0,nVRB,0);

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//      if ((RBstart==0) && (Lcrbs<=8))
//	printf("nVRB %d => nVRB_even_dist %d\n",nVRB,nVRB_even_dist);
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      if (nVRB_even_dist<32)
        allocdist0_0_even |= (1<<nVRB_even_dist);
      else if (nVRB_even_dist<64)
        allocdist1_0_even |= (1<<(nVRB_even_dist-32));
      else if (nVRB_even_dist<96)
	allocdist2_0_even |= (1<<(nVRB_even_dist-64));
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      else
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	allocdist3_0_even |= (1<<(nVRB_even_dist-96));
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/*      if ((RBstart==0) && (Lcrbs<=8))
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	printf("rballoc =>(%08x.%08x.%08x.%08x)\n",
	       allocdist0_0_even,
	       allocdist1_0_even,
	       allocdist2_0_even,
	       allocdist3_0_even
	       );
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*/
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      // Distributed Gap1, odd slot
      nVRB_odd_dist = get_prb(100,1,nVRB,0);
      if (nVRB_odd_dist<32)
        allocdist0_0_odd |= (1<<nVRB_odd_dist);
      else if (nVRB_odd_dist<64)
        allocdist1_0_odd |= (1<<(nVRB_odd_dist-32));
      else if (nVRB_odd_dist<96)
	allocdist2_0_odd |= (1<<(nVRB_odd_dist-65));
      else
	allocdist3_0_odd |= (1<<(nVRB_odd_dist-97));


      // Distributed Gap2, even slot
      nVRB_even_dist = get_prb(100,0,nVRB,1);
      if (nVRB_even_dist<32)
        allocdist0_1_even |= (1<<nVRB_even_dist);
      else if (nVRB_even_dist<64)
        allocdist1_1_even |= (1<<(nVRB_even_dist-32));
      else if (nVRB_even_dist<96)
	allocdist2_1_even |= (1<<(nVRB_even_dist-64));
      else
	allocdist3_1_even |= (1<<(nVRB_even_dist-96));


      // Distributed Gap2, odd slot
      nVRB_odd_dist = get_prb(100,1,nVRB,1);
      if (nVRB_odd_dist<32)
        allocdist0_1_odd |= (1<<nVRB_odd_dist);
      else if (nVRB_odd_dist<64)
        allocdist1_1_odd |= (1<<(nVRB_odd_dist-32));
      else if (nVRB_odd_dist<96)
	allocdist2_1_odd |= (1<<(nVRB_odd_dist-64));
      else
	allocdist3_1_odd |= (1<<(nVRB_odd_dist-96));

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      RIV=computeRIV(100,RBstart,Lcrbs);
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      if (RIV>RIV_max100)
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        RIV_max100 = RIV;
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      //      printf("RIV %d : first_rb %d NBRB %d\n",RIV,RBstart,Lcrbs);
      localRIV2alloc_LUT100_0[RIV] = alloc0;
      localRIV2alloc_LUT100_1[RIV] = alloc1;
      localRIV2alloc_LUT100_2[RIV] = alloc2;
      localRIV2alloc_LUT100_3[RIV] = alloc3;
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      distRIV2alloc_gap0_even_LUT100_0[RIV]  = allocdist0_0_even;
      distRIV2alloc_gap0_even_LUT100_1[RIV]  = allocdist1_0_even;
      distRIV2alloc_gap0_even_LUT100_2[RIV]  = allocdist2_0_even;
      distRIV2alloc_gap0_even_LUT100_3[RIV]  = allocdist3_0_even;
      distRIV2alloc_gap0_odd_LUT100_0[RIV]   = allocdist0_0_odd;
      distRIV2alloc_gap0_odd_LUT100_1[RIV]   = allocdist1_0_odd;
      distRIV2alloc_gap0_odd_LUT100_2[RIV]   = allocdist2_0_odd;
      distRIV2alloc_gap0_odd_LUT100_3[RIV]   = allocdist3_0_odd;
      distRIV2alloc_gap1_even_LUT100_0[RIV]  = allocdist0_1_even;
      distRIV2alloc_gap1_even_LUT100_1[RIV]  = allocdist1_1_even;
      distRIV2alloc_gap1_even_LUT100_2[RIV]  = allocdist2_1_even;
      distRIV2alloc_gap1_even_LUT100_3[RIV]  = allocdist3_1_even;
      distRIV2alloc_gap1_odd_LUT100_0[RIV]   = allocdist0_1_odd;
      distRIV2alloc_gap1_odd_LUT100_1[RIV]   = allocdist1_1_odd;
      distRIV2alloc_gap1_odd_LUT100_2[RIV]   = allocdist2_1_odd;
      distRIV2alloc_gap1_odd_LUT100_3[RIV]   = allocdist3_1_odd;

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      RIV2nb_rb_LUT100[RIV]      = Lcrbs;
      RIV2first_rb_LUT100[RIV]   = RBstart;
    }
  }
}

// Ngap = 3, N_VRB_DL=6, P=1, N_row=2, N_null=4*2-6=2
// permutation for even slots :
//    n_PRB'(0,2,4) = (0,1,2), n_PRB'(1,3,5) = (4,5,6)
//    n_PRB''(0,1,2,3) = (0,2,4,6)
//    => n_tilde_PRB(5) = (4)
//       n_tilde_PRB(4) = (1)
//       n_tilde_PRB(2,3) = (3,5)
//       n_tilde_PRB(0,1) = (0,2)


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uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci)
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{
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  return(localRIV2alloc_LUT25[rb_alloc_dci]);
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}

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uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti)
{
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  unsigned char UE_id;

  // find the UE_index corresponding to rnti
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  UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
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  DevAssert( UE_id != (unsigned char)-1 );
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  return(PHY_vars_eNB_g[Mod_id][CC_id]->transmission_mode[UE_id]);
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}

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int generate_eNB_dlsch_params_from_dci(int frame,
				       uint8_t subframe,
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                                       void *dci_pdu,
                                       uint16_t rnti,
                                       DCI_format_t dci_format,
                                       LTE_eNB_DLSCH_t **dlsch,
                                       LTE_DL_FRAME_PARMS *frame_parms,
                                       PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
                                       uint16_t si_rnti,
                                       uint16_t ra_rnti,
                                       uint16_t p_rnti,
                                       uint16_t DL_pmi_single)
{
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  uint8_t harq_pid = UINT8_MAX;
  uint32_t rballoc = UINT32_MAX;
  uint32_t RIV_max = 0;
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  uint8_t NPRB,tbswap,tpmi=0;
  LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1;
  uint8_t frame_type=frame_parms->frame_type;
  uint8_t vrb_type=0;
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  uint8_t mcs=0,mcs1=0,mcs2=0;
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  uint8_t I_mcs = 0;
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  uint8_t rv=0,rv1=0,rv2=0;
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  uint8_t rah=0;
  uint8_t TPC=0;
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  LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
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  //   printf("Generate eNB DCI, format %d, rnti %x (pdu %p)\n",dci_format,rnti,dci_pdu);

  switch (dci_format) {

  case format0:
    return(-1);
    break;
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  case format1A:  // This is DLSCH allocation for control traffic

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    dlsch[0]->subframe_tx[subframe] = 1;

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    switch (frame_parms->N_RB_DL) {
    case 6:
      if (frame_type == TDD) {
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        vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;

        //        printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
      } else {
        vrb_type = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid;

        //      printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
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      }
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      dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
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      if (vrb_type==LOCALIZED) {
	dlsch0_harq->rb_alloc[0]    = localRIV2alloc_LUT6[rballoc];
      }
      else {
	LOG_E(PHY,"Distributed RB allocation not done yet\n");
	mac_xface->macphy_exit("exiting");
      }
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      dlsch0_harq->vrb_type       = vrb_type;
      dlsch0_harq->nb_rb          = RIV2nb_rb_LUT6[rballoc];//NPRB;
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      RIV_max = RIV_max6;

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      break;
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    case 25:
      if (frame_type == TDD) {
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        vrb_type = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;

        //      printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
      } else {
        vrb_type = ((DCI1A_5MHz_FDD_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_5MHz_FDD_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_5MHz_FDD_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_5MHz_FDD_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_5MHz_FDD_t *)dci_pdu)->harq_pid;

        //      printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
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      }

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      dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
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      if (vrb_type==LOCALIZED) {
	dlsch0_harq->rb_alloc[0]    = localRIV2alloc_LUT25[rballoc];
      }
      else {
	LOG_E(PHY,"Distributed RB allocation not done yet\n");
	mac_xface->macphy_exit("exiting");
      }
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      dlsch0_harq->vrb_type       = vrb_type;
      dlsch0_harq->nb_rb          = RIV2nb_rb_LUT25[rballoc];//NPRB;
      RIV_max                     = RIV_max25;
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      break;
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    case 50:
      if (frame_type == TDD) {
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        vrb_type = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_10MHz_TDD_1_6_t *)dci_pdu)->harq_pid;

        //      printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
      } else {
        vrb_type = ((DCI1A_10MHz_FDD_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_10MHz_FDD_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_10MHz_FDD_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_10MHz_FDD_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid;
        //printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
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      }

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      dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
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      if (vrb_type==LOCALIZED) {
	dlsch0_harq->rb_alloc[0]     = localRIV2alloc_LUT50_0[rballoc];
	dlsch0_harq->rb_alloc[1]     = localRIV2alloc_LUT50_1[rballoc];
      }
      else {
	LOG_E(PHY,"Distributed RB allocation not done yet\n");
	mac_xface->macphy_exit("exiting");
      }

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1012
      dlsch0_harq->vrb_type        = vrb_type;
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      dlsch0_harq->nb_rb                               = RIV2nb_rb_LUT50[rballoc];//NPRB;
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      RIV_max = RIV_max50;
      break;
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    case 100:
      if (frame_type == TDD) {
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        vrb_type = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_20MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
        //      printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
      } else {
        vrb_type = ((DCI1A_20MHz_FDD_t *)dci_pdu)->vrb_type;
        mcs      = ((DCI1A_20MHz_FDD_t *)dci_pdu)->mcs;
        rballoc  = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1A_20MHz_FDD_t *)dci_pdu)->rv;
        TPC      = ((DCI1A_20MHz_FDD_t *)dci_pdu)->TPC;
        harq_pid = ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid;
        //      printf("FDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
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      }

1036
      dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
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1038
      dlsch0_harq->vrb_type         = vrb_type;
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      if (vrb_type==LOCALIZED) {
	dlsch0_harq->rb_alloc[0]      = localRIV2alloc_LUT100_0[rballoc];
	dlsch0_harq->rb_alloc[1]      = localRIV2alloc_LUT100_1[rballoc];
	dlsch0_harq->rb_alloc[2]      = localRIV2alloc_LUT100_2[rballoc];
	dlsch0_harq->rb_alloc[3]      = localRIV2alloc_LUT100_3[rballoc];
      }
      else {
	LOG_E(PHY,"Distributed RB allocation not done yet\n");
	mac_xface->macphy_exit("exiting");
      }

1050

1051

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      dlsch0_harq->nb_rb                               = RIV2nb_rb_LUT100[rballoc];//NPRB;
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      RIV_max = RIV_max100;
      break;
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1055

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    default:
      LOG_E(PHY,"Invalid N_RB_D %dL\n", frame_parms->N_RB_DL);
      DevParam (frame_parms->N_RB_DL, 0, 0);
      break;
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    }

    // harq_pid field is reserved
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    if ((rnti==si_rnti) || (rnti==ra_rnti) || (rnti==p_rnti)) { //
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      harq_pid=0;
      // see 36-212 V8.6.0 p. 45
      NPRB      = (TPC&1)+2;
      // 36-213 sec.7.1.7.2 p.26
      I_mcs     = mcs;
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    } else {
1070
      if (harq_pid>1) {
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        LOG_E(PHY,"ERROR: Format 1A: harq_pid > 1\n");
        return(-1);
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      }
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1075
      if (rballoc>RIV_max) {
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        LOG_E(PHY,"ERROR: Format 1A: rb_alloc (%x) > RIV_max (%x)\n",rballoc,RIV_max);
        return(-1);
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      }
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1080
      NPRB      = dlsch0_harq->nb_rb;
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      I_mcs     = get_I_TBS(mcs);
    }

    if (NPRB==0)
      return(-1);

1087
    //printf("NPRB %d, nb_rb %d, ndi %d\n",NPRB,dlsch0_harq->nb_rb,ndi);
1088
    dlsch0_harq->rvidx     = rv;
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    dlsch0_harq->Nl          = 1;
    //dlsch0_harq->layer_index = 0;
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1093
    dlsch0_harq->mimo_mode   = (frame_parms->mode1_flag == 1) ? SISO : ALAMOUTI;
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    /*
    if ((rnti!=si_rnti)&&(rnti!=ra_rnti)&&(rnti!=p_rnti)) {  //handle toggling for C-RNTI
    if (dlsch0_harq->first_tx == 1) {
    LOG_D(PHY,"First TX for TC-RNTI %x, clearing first_tx flag\n",rnti);
    dlsch0_harq->first_tx=0;
    dlsch0_harq->Ndi = 1;
    }
    else {
    if (ndi == dlsch0_harq->DCINdi)
    dlsch0_harq->Ndi         = 0;
    else
    dlsch0_harq->Ndi         = 1;
    }

    dlsch0_harq->DCINdi=ndi;
    }
    else {
    dlsch0_harq->Ndi         = 1;
    }
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    */
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    dlsch0_harq->dl_power_off = 1;
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    dlsch0_harq->mcs           = mcs;
    dlsch0_harq->TBS           = TBStable[I_mcs][NPRB-1];
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1121
    dlsch[0]->current_harq_pid   = harq_pid;
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    dlsch[0]->harq_ids[subframe] = harq_pid;

    dlsch[0]->active = 1;
    dlsch0 = dlsch[0];

    dlsch[0]->rnti = rnti;

    dlsch[0]->harq_ids[subframe] = harq_pid;
1130

1131 1132 1133
    if (dlsch0_harq->round == 0) {
      /* necessary test? */
      if (dlsch0_harq->status == SCH_IDLE)
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1134
        remove_harq_pid_from_freelist(dlsch[0], harq_pid);
1135
      dlsch0_harq->status = ACTIVE;
1136
    }
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    break;
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  case format1:

    switch (frame_parms->N_RB_DL) {

    case 6:
      if (frame_type == TDD) {
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        mcs       = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs;
        rballoc   = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc;
        rah       = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah;
        rv        = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv;
        harq_pid  = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid;
      } else {
        mcs      = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs;
        rah      = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah;
        rballoc  = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv;
        harq_pid = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
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      }
1158

1159
      break;
1160

1161
    case 25:
1162

1163
      if (frame_type == TDD) {
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        mcs       = ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs;
        rballoc   = ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc;
        rah       = ((DCI1_5MHz_TDD_t *)dci_pdu)->rah;
        rv        = ((DCI1_5MHz_TDD_t *)dci_pdu)->rv;
        harq_pid  = ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid;
        LOG_D(PHY,"eNB: subframe %d UE %x, Format1 DCI: ndi %d, harq_pid %d\n",subframe,rnti,((DCI1_5MHz_TDD_t *)dci_pdu)->ndi,harq_pid);
      } else {
        mcs      = ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs;
        rah      = ((DCI1_5MHz_FDD_t *)dci_pdu)->rah;
        rballoc  = ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1_5MHz_FDD_t *)dci_pdu)->rv;
        harq_pid = ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid;
        LOG_D(PHY,"eNB: subframe %d UE %x, Format1 DCI: ndi %d, harq_pid %d\n",subframe,rnti,((DCI1_5MHz_FDD_t *)dci_pdu)->ndi,harq_pid);
1177

1178
      }
1179

1180
      break;
1181

1182 1183
    case 50:
      if (frame_type == TDD) {
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        mcs       = ((DCI1_10MHz_TDD_t *)dci_pdu)->mcs;
        rballoc   = ((DCI1_10MHz_TDD_t *)dci_pdu)->rballoc;
        rah       = ((DCI1_10MHz_TDD_t *)dci_pdu)->rah;
        rv        = ((DCI1_10MHz_TDD_t *)dci_pdu)->rv;
        harq_pid  = ((DCI1_10MHz_TDD_t *)dci_pdu)->harq_pid;
      } else {
        mcs      = ((DCI1_10MHz_FDD_t *)dci_pdu)->mcs;
        rah      = ((DCI1_10MHz_FDD_t *)dci_pdu)->rah;
        rballoc  = ((DCI1_10MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1_10MHz_FDD_t *)dci_pdu)->rv;
        harq_pid = ((DCI1_10MHz_FDD_t *)dci_pdu)->harq_pid;
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      }
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      break;

    case 100:
      if (frame_type == TDD) {
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        mcs       = ((DCI1_20MHz_TDD_t *)dci_pdu)->mcs;
        rballoc   = ((DCI1_20MHz_TDD_t *)dci_pdu)->rballoc;
        rah       = ((DCI1_20MHz_TDD_t *)dci_pdu)->rah;
        rv        = ((DCI1_20MHz_TDD_t *)dci_pdu)->rv;
        harq_pid  = ((DCI1_20MHz_TDD_t *)dci_pdu)->harq_pid;
      } else {
        mcs      = ((DCI1_20MHz_FDD_t *)dci_pdu)->mcs;
        rah      = ((DCI1_20MHz_FDD_t *)dci_pdu)->rah;
        rballoc  = ((DCI1_20MHz_FDD_t *)dci_pdu)->rballoc;
        rv       = ((DCI1_20MHz_FDD_t *)dci_pdu)->rv;
        harq_pid = ((DCI1_20MHz_FDD_t *)dci_pdu)->harq_pid;
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      }
1213

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      break;

    }

    if (harq_pid>=8) {
      LOG_E(PHY,"ERROR: Format 1: harq_pid >= 8\n");
      return(-1);
    }

1223 1224
    dlsch0_harq = dlsch[0]->harq_processes[harq_pid];

1225 1226 1227 1228
    // msg("DCI: Setting subframe_tx for subframe %d\n",subframe);
    dlsch[0]->subframe_tx[subframe] = 1;

    conv_rballoc(rah,
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                 rballoc,frame_parms->N_RB_DL,
                 dlsch0_harq->rb_alloc);
1231

1232
    dlsch0_harq->nb_rb = conv_nprb(rah,
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                                   rballoc,
                                   frame_parms->N_RB_DL);
1235

1236
    NPRB      = dlsch0_harq->nb_rb;
1237 1238 1239 1240 1241 1242


    if (NPRB==0)
      return(-1);


1243
    dlsch0_harq->rvidx       = rv;
1244

1245 1246 1247 1248
    dlsch0_harq->Nl          = 1;
    //    dlsch[0]->layer_index = 0;
    dlsch0_harq->mimo_mode   = (frame_parms->mode1_flag == 1) ? SISO : ALAMOUTI;
    dlsch0_harq->dl_power_off = 1;
1249 1250 1251 1252 1253
    /*
      if (dlsch[0]->harq_processes[harq_pid]->first_tx == 1) {
      LOG_D(PHY,"First TX for C-RNTI %x, clearing first_tx flag, shouldn't happen!\n",rnti);
      dlsch[0]->harq_processes[harq_pid]->first_tx=0;
      dlsch[0]->harq_processes[harq_pid]->Ndi = 1;
1254
      }
1255 1256 1257 1258 1259 1260 1261 1262 1263
      else {
      LOG_D(PHY,"Checking for Toggled Ndi for C-RNTI %x, old value %d, DCINdi %d\n",rnti,dlsch[0]->harq_processes[harq_pid]->DCINdi,ndi);
      if (ndi == dlsch[0]->harq_processes[harq_pid]->DCINdi)
      dlsch[0]->harq_processes[harq_pid]->Ndi         = 0;
      else
      dlsch[0]->harq_processes[harq_pid]->Ndi         = 1;
      }
      dlsch[0]->harq_processes[harq_pid]->DCINdi=ndi;
    */
1264 1265 1266

    dlsch[0]->active = 1;

1267 1268


1269
    if (dlsch0_harq->round == 0) {
1270 1271
      /* necessary test? */
      if (dlsch0_harq->status == SCH_IDLE)
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1272
        remove_harq_pid_from_freelist(dlsch[0], harq_pid);
1273
      dlsch0_harq->status = ACTIVE;
1274 1275
      //            printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
      // MCS and TBS don't change across HARQ rounds
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      dlsch0_harq->mcs         = mcs;
      dlsch0_harq->TBS         = TBStable[get_I_TBS(dlsch0_harq->mcs)][NPRB-1];
1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293

    }


    dlsch[0]->current_harq_pid = harq_pid;
    dlsch[0]->harq_ids[subframe] = harq_pid;



    dlsch0 = dlsch[0];

    dlsch[0]->rnti = rnti;


    break;

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  case format2:

    switch (frame_parms->N_RB_DL) {

    case 6:
      if (frame_parms->nb_antennas_tx == 2) {
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        if (frame_type == TDD) {
          mcs1      = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
          rv1       = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
          rv1       = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
        }
      } else if (frame_parms->nb_antennas_tx == 4) {
        if (frame_type == TDD) {
          mcs1      = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
          rv1       = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
          rv1       = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
        }
      } else {
        LOG_E(PHY,"eNB: subframe %d UE %x, Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antennas_tx);
1341
      }
1342

1343
      break;
1344

1345 1346
    case 25:
      if (frame_parms->nb_antennas_tx == 2) {
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        if (frame_type == TDD) {
          mcs1      = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
        }
      } else if (frame_parms->nb_antennas_tx == 4) {
        if (frame_type == TDD) {
          mcs1      = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
        }
      } else {
        LOG_E(PHY,"eNB: subframe %d UE %x, Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antennas_tx);
1392
      }
1393

1394
      break;
1395

1396 1397
    case 50:
      if (frame_parms->nb_antennas_tx == 2) {
1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442
        if (frame_type == TDD) {
          mcs1      = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tpmi;
        }
      } else if (frame_parms->nb_antennas_tx == 4) {
        if (frame_type == TDD) {
          mcs1      = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
        }
      } else {
        LOG_E(PHY,"eNB: subframe %d UE %x, Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antennas_tx);
1443
      }
1444

1445 1446 1447 1448
      break;

    case 100:
      if (frame_parms->nb_antennas_tx == 2) {
1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493
        if (frame_type == TDD) {
          mcs1      = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tpmi;
        }
      } else if (frame_parms->nb_antennas_tx == 4) {
        if (frame_type == TDD) {
          mcs1      = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
        } else {
          mcs1      = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
          mcs2      = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
          rballoc   = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
          rah       = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rah;
          rv1       = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv1;
          rv2       = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv2;
          harq_pid  = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
          tbswap    = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
          tpmi      = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
        }
      } else {
        LOG_E(PHY,"eNB: subframe %d UE %x, Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antennas_tx);
1494
      }
1495

1496 1497 1498
      break;
    }

1499 1500

    if (harq_pid>=8) {
1501
      LOG_E(PHY,"ERROR: Format 2_2A: harq_pid >= 8\n");
1502 1503 1504 1505
      return(-1);
    }


1506 1507
    // Flip the TB to codeword mapping as described in 5.3.3.1.5 of 36-212 V11.3.0
    // note that we must set tbswap=0 in eNB scheduler if one TB is deactivated
1508 1509 1510
    if (tbswap == 0) {
      dlsch0 = dlsch[0];
      dlsch1 = dlsch[1];
1511
    } else {
1512 1513 1514 1515
      dlsch0 = dlsch[1];
      dlsch1 = dlsch[0];
    }

1516 1517 1518
    dlsch0_harq = dlsch0->harq_processes[harq_pid];
    dlsch1_harq = dlsch1->harq_processes[harq_pid];

1519 1520 1521 1522 1523 1524