Commit 622b919b authored by Cedric Roux's avatar Cedric Roux

improve multi-UEs scenario

This commits contains several fixes to improve a multi-UE scenario.

This is not the end of the story.

Summary of work:
================

1 - improve SR (scheduling requests):

    We configured n1pucch == 3 for scheduling requests, for all
    UEs. We now use 71 - UE_id/10.

    For it to work, it is vital that pucch_nRB_CQI in the configuration
    file is set to 0, otherwise the SR will go to an RB used for
    PUSCH and uplink decoding will fail whenever an UE does SR.

    Note that we will have problems with 20MHz when we use a CCE that
    let the UE send the ACK/NACK using a n1pucch allocated for SR,
    because when the PDCCH is of size 3, we can have 87 CCEs
    and it may lead to an n1pucch colliding with one for SR.

    The work done in this patch is a quick solution, seems to work
    with 10MHz.

    The real solution is to disable the use of those CCEs that would
    lead an UE to use a n1pucch colliding with an SR n1pucch. Then
    we can use whatever n1pucch we want for SR, as long as the
    scheduler protects them.

    Impacted files: configuration files
                    openair2/RRC/LITE/MESSAGES/asn1_msg.c

2 - some fixes for uplink scheduling:

    - Do not use PRACH for PUSCH, that leads to too many false
    PRACH detection. Plus the PUSCH receiving may fail if one
    UE uses the PRACH at the same time.

    - Take care of retransmissions. That was not done at all, so
    we could allocate one RB to several UEs. The current design
    of the code makes it hard to do it properly, so we chose a
    quick and dirty solution, which is to increase "first_rb"
    to skip any RB used for retransmission. In this process we
    may skip a lot of free RBs. A proper solution is needed here.

    - Do not allocate the last RB. This one is used for PUCCH.
    It was sometimes allocated to PUSCH.

    - In the pre-processor we didn't pre-allocate RBs to UEs
    with an empty buffer status. We didn't check if the UE
    sent an SR. For example in a three UEs scenario, we
    could have the third UE never scheduled in the uplink.

    - rb_table_index was not decreased properly, so we allocated
    too much RBs to some UEs and thus not enough to others.

    Impacted files: openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
                    openair2/LAYER2/MAC/pre_processor.c
                    openair1/SCHED/phy_procedures_lte_eNb.c

3 - some fixes for downlink scheduling:

    - The check on CCE allocation was not correct. We did something
    like:

        if (cce allocation is possible) {
          prepare
        }

    We should have done:

        save current cce allocation
        if (cce allocation is possible) {
          allocate cce
          prepare
        }
        reset current cce allocation

    Basically, when we scheduled several UEs, they were checked
    separately, and the totality of them was not checked.

    Impacted file: openair2/LAYER2/MAC/eNB_scheduler_dlsch.c

    - The retransmissions are probably not handled correctly.
    Check in openair2/LAYER2/MAC/pre_processor.c, near
    the comment "// control channel or retransmission",
    the case "round > 0" was added. It's probably not enough,
    even maybe not correct.

    - Change SF05_LIMIT with SF0_LIMIT. We accept to use
    central blocks in SF 5. The code was also not correct,
    vrb_map was not set properly because the loop on j
    was wrong for the last RBG (which can have one less
    RB than the others).

    This is not satisfying. The real solution is to use the
    central RBs and check that the MCS used is compatible
    with the numbers of resource elements allocated (we don't
    want to put too more data bits than what fits).

4 - some fixes in PUCCH decoding:

    See: openair1/PHY/LTE_TRANSPORT/pucch.c

    Probably not enough. Some more work and analysis is
    required for a proper use of the PUCCH. What we see
    is that the PUCCH constellation gets wrong when there
    are several UEs, meaning the received ACK/NACK is
    not properly decoded (this, or something else...).

5 - several fixes/checks added here and there:

    - The final allocate_CCEs in eNB_dlsch_ulsch_scheduler
      is checked and we brutally exit if it fails.

    - We exit in get_num_pdcch_symbols in case of failure
      (this should never happen anyway, no big deal normally).

    - Some logs added or changed to error/warning instead
      of debug.

    - In dlsch_scheduler_pre_processor an abort() was added.
      The code here looks suspicious.

    - In assign_max_mcs_min_rb, rb_table_index was not set
      to 2, the value 0 was used. This was not correct.

What remains to be done:
========================

    - Correct CCE allocation (take into account SR n1pucch,
      check that all the n1pucch that will be used are "compatible").

    - Take into account the PHICH when scheduling uplink. As of
      today it is very possible to have two UEs use the same PHICH
      group and PHICH sequence index. We can use n_DMRS in the DCI
      to have uniqueness (see 36.213 table 9.1.2-2). We can drop an
      allocation if there is no free PHICH group/sequence index for
      a given UE.

    - When there is an uplink retransmission in the PRACH, we have
      to disable PRACH detection. It is possible that one UE does
      PRACH at the same time, but then what to do? We could use
      DCI0-based retransmission in this specific case maybe...

    - Handle free RBs in uplink in a much better way in case of
      a retransmission. We may have a lot of free unused RBs with
      the current code.

    - Check downlink retransmissions. Not much has been done there.

    - Surely more stuff not clear yet. In some situations we don't
      have a good behavior of the system. Hard to describe more
      precisely at this point.
parent 17b9a9e9
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24; pdsch_referenceSignalPower = -24;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24; pdsch_referenceSignalPower = -24;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24; pdsch_referenceSignalPower = -24;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24; pdsch_referenceSignalPower = -24;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24; pdsch_referenceSignalPower = -24;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24; pdsch_referenceSignalPower = -24;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29; pdsch_referenceSignalPower = -29;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29; pdsch_referenceSignalPower = -29;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29; pdsch_referenceSignalPower = -29;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29; pdsch_referenceSignalPower = -29;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29; pdsch_referenceSignalPower = -29;
......
...@@ -47,7 +47,7 @@ eNBs = ...@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1; prach_zero_correlation = 1;
prach_freq_offset = 2; prach_freq_offset = 2;
pucch_delta_shift = 1; pucch_delta_shift = 1;
pucch_nRB_CQI = 1; pucch_nRB_CQI = 0;
pucch_nCS_AN = 0; pucch_nCS_AN = 0;
pucch_n1_AN = 32; pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29; pdsch_referenceSignalPower = -29;
......
...@@ -2176,6 +2176,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci, ...@@ -2176,6 +2176,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
// printf("dci_alloc[%d].L = %d\n",i,dci_alloc[i].L); // printf("dci_alloc[%d].L = %d\n",i,dci_alloc[i].L);
//} //}
//exit(-1); //exit(-1);
exit(1);
return(0); return(0);
} }
......
...@@ -2074,12 +2074,12 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, ...@@ -2074,12 +2074,12 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
rxptr = (int16_t *)&common_vars->rxdataF[0][aa][symbol_offset]; rxptr = (int16_t *)&common_vars->rxdataF[0][aa][symbol_offset];
for (i=0; i<12; i++,j+=2,re_offset++) { for (i=0; i<12; i++,j+=2,re_offset++) {
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
if (re_offset==frame_parms->ofdm_symbol_size) if (re_offset==frame_parms->ofdm_symbol_size)
re_offset = 0; re_offset = 0;
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
#ifdef DEBUG_PUCCH_RX #ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d (%d,%d,%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,i,re_offset,m,j, printf("[eNB] PUCCH subframe %d (%d,%d,%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,i,re_offset,m,j,
rxptr[re_offset<<1],rxptr[1+(re_offset<<1)], rxptr[re_offset<<1],rxptr[1+(re_offset<<1)],
...@@ -2153,8 +2153,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, ...@@ -2153,8 +2153,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
} //phase } //phase
stat_max *= nsymb; // normalize to energy per symbol // stat_max *= nsymb; // normalize to energy per symbol
stat_max /= (frame_parms->N_RB_UL*12); // // stat_max /= (frame_parms->N_RB_UL*12); //
stat_max /= (nsymb*12);
#ifdef DEBUG_PUCCH_RX #ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max); printf("[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
#endif #endif
...@@ -2202,7 +2203,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, ...@@ -2202,7 +2203,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n"); LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n");
#endif #endif
for (phase=3;phase<4;phase++){ //phase=0; phase<7; phase++) { for (phase=0; phase<7; phase++) {
stat=0; stat=0;
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) { for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
...@@ -2339,8 +2340,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, ...@@ -2339,8 +2340,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
off=(re<<1) + (24*l); off=(re<<1) + (24*l);
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15); tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15); tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15)/4); stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15))/4;
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15)/4); stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15))/4;
off+=2; off+=2;
#ifdef DEBUG_PUCCH_RX #ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re, printf("[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
......
...@@ -290,6 +290,30 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16 ...@@ -290,6 +290,30 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
return(0); return(0);
} }
int get_ue_rbs(int Mod_id, int CC_id, int rnti, int frame, int subframe, int *start_rb, int *nb_rb)
{
LTE_eNB_ULSCH_t *ULSCH_ptr;
uint8_t ulsch_subframe,ulsch_frame;
int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
int harq_pid;
if (UE_id==-1) {
LOG_E(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
return(-1);
}
ULSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->ulsch[(uint32_t)UE_id];
ulsch_subframe = pdcch_alloc2ul_subframe(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,subframe);
ulsch_frame = pdcch_alloc2ul_frame(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,frame,subframe);
harq_pid = subframe2harq_pid(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,
ulsch_frame,
ulsch_subframe);
*nb_rb = ULSCH_ptr->harq_processes[harq_pid]->nb_rb;
*start_rb = ULSCH_ptr->harq_processes[harq_pid]->first_rb;
return(0);
}
int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id) int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
{ {
return PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUSCH; return PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUSCH;
......
...@@ -1087,7 +1087,13 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag, ...@@ -1087,7 +1087,13 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++)
allocate_CCEs(module_idP,CC_id,subframeP,0); if (allocate_CCEs(module_idP,CC_id,subframeP,0)) {
LOG_D(MAC, "eNB %d CC_id %d frame %d subframe %d: CCE allocation failed\n",
module_idP, CC_id, frameP, subframeP);
printf("eNB %d CC_id %d frame %d subframe %d: CCE allocation failed\n",
module_idP, CC_id, frameP, subframeP);
abort();
}
#if defined(FLEXRAN_AGENT_SB_IF) #if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_CONT_STATS #ifndef DISABLE_CONT_STATS
......
...@@ -452,6 +452,7 @@ schedule_ue_spec( ...@@ -452,6 +452,7 @@ schedule_ue_spec(
static int32_t tpc_accumulated=0; static int32_t tpc_accumulated=0;
UE_sched_ctrl *ue_sched_ctl; UE_sched_ctrl *ue_sched_ctl;
int i; int i;
DCI_PDU saved_DCI_pdu[MAX_NUM_CCs];
#if 0 #if 0
if (UE_list->head==-1) { if (UE_list->head==-1) {
...@@ -462,6 +463,10 @@ schedule_ue_spec( ...@@ -462,6 +463,10 @@ schedule_ue_spec(
start_meas(&eNB->schedule_dlsch); start_meas(&eNB->schedule_dlsch);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_IN);
/* save DCI_pdu size */
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
saved_DCI_pdu[CC_id].Num_dci = eNB->common_channels[CC_id].DCI_pdu.Num_dci;
//weight = get_ue_weight(module_idP,UE_id); //weight = get_ue_weight(module_idP,UE_id);
aggregation = 2; aggregation = 2;
...@@ -496,7 +501,6 @@ schedule_ue_spec( ...@@ -496,7 +501,6 @@ schedule_ue_spec(
stop_meas(&eNB->schedule_dlsch_preprocessor); stop_meas(&eNB->schedule_dlsch_preprocessor);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id); LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
...@@ -571,6 +575,18 @@ schedule_ue_spec( ...@@ -571,6 +575,18 @@ schedule_ue_spec(
continue; continue;
} }
/* add "fake" DCI to have CCE_allocation_infeasible work properly for next allocations */
/* if we don't add it, next allocations may succeed but overall allocations may fail */
/* will be removed at the end of this function */
add_ue_spec_dci(&eNB->common_channels[CC_id].DCI_pdu,
&(char[]){0},
rnti,
1,
aggregation,
1,
format1,
0);
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id]; nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id]; harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id]; round = ue_sched_ctl->round[CC_id];
...@@ -632,6 +648,7 @@ schedule_ue_spec( ...@@ -632,6 +648,7 @@ schedule_ue_spec(
while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) { while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) {
if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) { if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
if (UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j]) printf("WARN: rballoc_subband not free for retrans?\n");
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j]; UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
if((j == frame_parms[CC_id]->N_RBG-1) && if((j == frame_parms[CC_id]->N_RBG-1) &&
...@@ -798,7 +815,7 @@ schedule_ue_spec( ...@@ -798,7 +815,7 @@ schedule_ue_spec(
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1; UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1; UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1;
} else { } else {
LOG_D(MAC,"[eNB %d] Frame %d CC_id %d : don't schedule UE %d, its retransmission takes more resources than we have\n", LOG_E(MAC,"[eNB %d] Frame %d CC_id %d : don't schedule UE %d, its retransmission takes more resources than we have\n",
module_idP, frameP, CC_id, UE_id); module_idP, frameP, CC_id, UE_id);
} }
} else { /* This is a potentially new SDU opportunity */ } else { /* This is a potentially new SDU opportunity */
...@@ -1645,6 +1662,10 @@ schedule_ue_spec( ...@@ -1645,6 +1662,10 @@ schedule_ue_spec(
} // UE_id loop } // UE_id loop
} // CC_id loop } // CC_id loop
/* restore DCI_pdu size */
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
eNB->common_channels[CC_id].DCI_pdu.Num_dci = saved_DCI_pdu[CC_id].Num_dci;
stop_meas(&eNB->schedule_dlsch); stop_meas(&eNB->schedule_dlsch);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_OUT);
......
...@@ -670,6 +670,16 @@ void schedule_ulsch(module_id_t module_idP, ...@@ -670,6 +670,16 @@ void schedule_ulsch(module_id_t module_idP,
} }
} }
/* TODO: this is a hack to disable scheduling in the PRACH.
* We need to get the information from config/phy/wherever
* as done in the commented code below.
* For the moment, we hardcode for the config used by default.
* Only tested with FDD.
*/
int frame_ul = (frameP + (subframeP >= 6)) & 1023;
int subframe_ul = (subframeP + 4) % 10;
if ((frame_ul & 1) == 0 && subframe_ul == 1) first_rb[CC_id] = 8;
/* /*
if (mac_xface->is_prach_subframe(&(mac_xface->lte_frame_parms),frameP,subframeP)) { if (mac_xface->is_prach_subframe(&(mac_xface->lte_frame_parms),frameP,subframeP)) {
first_rb[CC_id] = (mac_xface->get_prach_prb_offset(&(mac_xface->lte_frame_parms), first_rb[CC_id] = (mac_xface->get_prach_prb_offset(&(mac_xface->lte_frame_parms),
...@@ -677,6 +687,65 @@ void schedule_ulsch(module_id_t module_idP, ...@@ -677,6 +687,65 @@ void schedule_ulsch(module_id_t module_idP,
} }
/* TODO: remove this hack which is to avoid scheduling new uplink where there is a
* retransmission. It increases first_rb to move after the retransmission RBs,
* which can skip a lot of free RBs (say the UE 2 has a retransmission
* in RBs 45..47, we would skip RBs 1..47, but RBs 1..44 are free and
* won't be used for scheduling)
*/
int UE_id;
int rnti;
UE_list_t *UE_list=&eNB->UE_list;
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
int drop_ue=0;
uint8_t harq_pid = 0;
uint8_t round = 0;
int n;
// loop over all UEs
for (UE_id=0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
rnti = UE_RNTI(module_idP,UE_id);
if (rnti==NOT_A_RNTI) continue;
if (UE_list->UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured==FALSE) continue;
drop_ue = 0;
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
CC_id = UE_list->ordered_ULCCids[n][UE_id];
if (mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti) == NULL) {
drop_ue = 1;
break;
}
}
if (drop_ue == 1) continue;
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
// This is the actual CC_id in the list
CC_id = UE_list->ordered_ULCCids[n][UE_id];
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
int start_rb;
int nb_rb;
//DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
//UE_template = &UE_list->UE_template[CC_id][UE_id];
//UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
if (mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL) == -1 ) continue;
int get_ue_rbs(int module_idP, int CC_id, int rnti, int frameP, int subframeP, int *start_rb, int *nb_rb);
if (get_ue_rbs(module_idP,CC_id,rnti,frameP,subframeP,&start_rb,&nb_rb) == -1 ) continue;
if (round > 0)
{
if (start_rb < first_rb[CC_id]) {
LOG_E(MAC, "scheduled retransmission in forbidden RBs\n");
// printf("scheduled retransmission in forbidden RBs\n");
}
if (first_rb[CC_id] < start_rb + nb_rb)
first_rb[CC_id] = start_rb + nb_rb;
}
} // UE is in PUSCH
} // loop over CC
} // loop over UE
schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe,first_rb); schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe,first_rb);
#ifdef CBA #ifdef CBA
...@@ -802,6 +871,13 @@ abort(); ...@@ -802,6 +871,13 @@ abort();
module_idP,frameP,subframeP,UE_id,rnti,CC_id, mode_string[eNB_UE_stats->mode], 1<<aggregation); module_idP,frameP,subframeP,UE_id,rnti,CC_id, mode_string[eNB_UE_stats->mode], 1<<aggregation);
} }
/* be sure that there are some free RBs */
if (first_rb[CC_id] >= frame_parms->N_RB_UL-1) {
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d mode %s: dropping, not enough RBs\n",
module_idP,frameP,subframeP,UE_id,rnti,CC_id, mode_string[eNB_UE_stats->mode]);
continue;
}
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
...@@ -891,9 +967,11 @@ abort(); ...@@ -891,9 +967,11 @@ abort();
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=mcs; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=mcs;
// buffer_occupancy = UE_template->ul_total_buffer; // buffer_occupancy = UE_template->ul_total_buffer;
while (((rb_table[rb_table_index]>(frame_parms->N_RB_UL-1-first_rb[CC_id])) || while (rb_table_index > 0 &&
(rb_table[rb_table_index]>45)) && (rb_table[rb_table_index] > frame_parms->N_RB_UL-1-first_rb[CC_id] ||
(rb_table_index>0)) { rb_table[rb_table_index]>45 ||
(UE_template->pre_allocated_rb_table_index_ul >= 0 &&
rb_table[rb_table_index] > UE_template->pre_allocated_nb_rb_ul))) {
rb_table_index--; rb_table_index--;
} }
......
...@@ -672,9 +672,12 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id, ...@@ -672,9 +672,12 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,i); ii++) { for (ii=0; ii<UE_num_active_CC(UE_list,i); ii++) {
CC_id = UE_list->ordered_CCids[ii][i]; CC_id = UE_list->ordered_CCids[ii][i];
ue_sched_ctl = &UE_list->UE_sched_ctrl[i];
round = ue_sched_ctl->round[CC_id];
// control channel // control channel or retransmission
if (mac_eNB_get_rrc_status(Mod_id,rnti) < RRC_RECONFIGURED) { /* TODO: do we have to check for retransmission? */
if (mac_eNB_get_rrc_status(Mod_id,rnti) < RRC_RECONFIGURED || round > 0) {
nb_rbs_required_remaining_1[CC_id][i] = nb_rbs_required[CC_id][i]; nb_rbs_required_remaining_1[CC_id][i] = nb_rbs_required[CC_id][i];
} else { } else {
nb_rbs_required_remaining_1[CC_id][i] = cmin(average_rbs_per_user[CC_id],nb_rbs_required[CC_id][i]); nb_rbs_required_remaining_1[CC_id][i] = cmin(average_rbs_per_user[CC_id],nb_rbs_required[CC_id][i]);
...@@ -696,6 +699,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id, ...@@ -696,6 +699,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
nb_rbs_required_remaining[CC_id][i] = nb_rbs_required_remaining_1[CC_id][i]; nb_rbs_required_remaining[CC_id][i] = nb_rbs_required_remaining_1[CC_id][i];
} else { // rb required based only on the buffer - rb allloctaed in the 1st round + extra reaming rb form the 1st round } else { // rb required based only on the buffer - rb allloctaed in the 1st round + extra reaming rb form the 1st round
nb_rbs_required_remaining[CC_id][i] = nb_rbs_required[CC_id][i]-nb_rbs_required_remaining_1[CC_id][i]+nb_rbs_required_remaining[CC_id][i]; nb_rbs_required_remaining[CC_id][i] = nb_rbs_required[CC_id][i]-nb_rbs_required_remaining_1[CC_id][i]+nb_rbs_required_remaining[CC_id][i];
if (nb_rbs_required_remaining[CC_id][i]<0) abort();
} }
if (nb_rbs_required[CC_id][i]> 0 ) if (nb_rbs_required[CC_id][i]> 0 )
...@@ -901,7 +905,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id, ...@@ -901,7 +905,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
} }
} }
#define SF05_LIMIT 1 #define SF0_LIMIT 1
void dlsch_scheduler_pre_processor_reset (int module_idP, void dlsch_scheduler_pre_processor_reset (int module_idP,
int UE_id, int UE_id,
...@@ -920,10 +924,10 @@ void dlsch_scheduler_pre_processor_reset (int module_idP, ...@@ -920,10 +924,10 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id]; UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
rnti_t rnti = UE_RNTI(module_idP,UE_id); rnti_t rnti = UE_RNTI(module_idP,UE_id);
uint8_t *vrb_map = eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map; uint8_t *vrb_map = eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map;
int RBGsize = PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL/N_RBG; int RBGsize;
#ifdef SF05_LIMIT int RBGsize_last;
//int subframe05_limit=0; #ifdef SF0_LIMIT
int sf05_upper=-1,sf05_lower=-1; int sf0_upper=-1,sf0_lower=-1;
#endif #endif
LTE_eNB_UE_stats *eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti); LTE_eNB_UE_stats *eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
if (eNB_UE_stats == NULL) return; if (eNB_UE_stats == NULL) return;
...@@ -986,44 +990,60 @@ void dlsch_scheduler_pre_processor_reset (int module_idP, ...@@ -986,44 +990,60 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
ue_sched_ctl->dl_pow_off[CC_id] = 2; ue_sched_ctl->dl_pow_off[CC_id] = 2;
nb_rbs_required_remaining[CC_id][UE_id] = 0; nb_rbs_required_remaining[CC_id][UE_id] = 0;
#ifdef SF05_LIMIT switch (PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL) {
case 6: RBGsize = 1; RBGsize_last = 1; break;
case 15: RBGsize = 2; RBGsize_last = 1; break;
case 25: RBGsize = 2; RBGsize_last = 1; break;
case 50: RBGsize = 3; RBGsize_last = 2; break;
case 75: RBGsize = 4; RBGsize_last = 3; break;
case 100: RBGsize = 4; RBGsize_last = 4; break;
default: printf("unsupported RBs (%d)\n", PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL); fflush(stdout); abort();
}
#ifdef SF0_LIMIT
switch (N_RBG) { switch (N_RBG) {
case 6: case 6:
sf05_lower=0; sf0_lower=0;
sf05_upper=5; sf0_upper=5;
break; break;
case 8: case 8:
sf05_lower=2; sf0_lower=2;
sf05_upper=5; sf0_upper=5;
break; break;
case 13: case 13:
sf05_lower=4; sf0_lower=4;
sf05_upper=7; sf0_upper=7;
break; break;
case 17: case 17:
sf05_lower=7; sf0_lower=7;
sf05_upper=9; sf0_upper=9;
break; break;
case 25: case 25:
sf05_lower=11; sf0_lower=11;
sf05_upper=13; sf0_upper=13;
break; break;
default: printf("unsupported RBs (%d)\n", PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL); fflush(stdout); abort();
} }
#endif #endif
// Initialize Subbands according to VRB map // Initialize Subbands according to VRB map
for (i=0; i<N_RBG; i++) { for (i=0; i<N_RBG; i++) {
int rb_size = i==N_RBG-1 ? RBGsize_last : RBGsize;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0; ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
rballoc_sub[CC_id][i] = 0; rballoc_sub[CC_id][i] = 0;
#ifdef SF05_LIMIT #ifdef SF0_LIMIT