Commit 767606f9 authored by Bilel's avatar Bilel

- fix init prach struct + fix TO compensation for 20MHz case

parent a64bcb14
......@@ -1089,6 +1089,7 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
LTE_UE_COMMON* const common_vars = &ue->common_vars;
LTE_UE_PDSCH** const pdsch_vars_SI = ue->pdsch_vars_SI;
LTE_UE_PDSCH** const pdsch_vars_ra = ue->pdsch_vars_ra;
LTE_UE_PDSCH** const pdsch_vars_p = ue->pdsch_vars_p;
LTE_UE_PDSCH** const pdsch_vars_mch = ue->pdsch_vars_MCH;
LTE_UE_PDSCH* (*pdsch_vars_th)[][NUMBER_OF_CONNECTED_eNB_MAX+1] = &ue->pdsch_vars;
LTE_UE_PDCCH* (*pdcch_vars_th)[][NUMBER_OF_CONNECTED_eNB_MAX] = &ue->pdcch_vars;
......@@ -1184,6 +1185,7 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
pdsch_vars_SI[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear(sizeof(LTE_UE_PDSCH));
pdsch_vars_ra[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear(sizeof(LTE_UE_PDSCH));
pdsch_vars_p[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear(sizeof(LTE_UE_PDSCH));
pdsch_vars_mch[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear(sizeof(LTE_UE_PDSCH));
prach_vars[eNB_id] = (LTE_UE_PRACH *)malloc16_clear(sizeof(LTE_UE_PRACH));
pbch_vars[eNB_id] = (LTE_UE_PBCH *)malloc16_clear(sizeof(LTE_UE_PBCH));
......@@ -1247,6 +1249,7 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
}
phy_init_lte_ue__PDSCH( pdsch_vars_SI[eNB_id], fp );
phy_init_lte_ue__PDSCH( pdsch_vars_ra[eNB_id], fp );
phy_init_lte_ue__PDSCH( pdsch_vars_p[eNB_id], fp );
phy_init_lte_ue__PDSCH( pdsch_vars_mch[eNB_id], fp );
// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
......@@ -1311,6 +1314,7 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
pdsch_vars_SI[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear( sizeof(LTE_UE_PDSCH) );
pdsch_vars_ra[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear( sizeof(LTE_UE_PDSCH) );
pdsch_vars_p[eNB_id] = (LTE_UE_PDSCH *)malloc16_clear( sizeof(LTE_UE_PDSCH) );
if (abstraction_flag == 0) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
......
......@@ -40,6 +40,8 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
{
static int max_pos_fil = 0;
static int count_max_pos_ok = 0;
static int first_time = 1;
int temp = 0, i, aa, max_val = 0, max_pos = 0;
int diff;
short Re,Im,ncoef;
......@@ -76,8 +78,10 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
max_pos_fil = ((max_pos_fil * coef) + (max_pos * ncoef)) >> 15;
// do not filter to have proactive timing adjustment
max_pos_fil = max_pos;
//max_pos_fil = max_pos;
if(subframe == 6)
{
diff = max_pos_fil - (frame_parms->nb_prefix_samples>>3);
if ( abs(diff) < SYNCH_HYST )
......@@ -85,6 +89,26 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
else
ue->rx_offset = diff;
if(abs(diff)<5)
count_max_pos_ok ++;
else
count_max_pos_ok = 0;
if(count_max_pos_ok > 10 && first_time == 1)
{
first_time = 0;
ue->time_sync_cell = 1;
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
mac_xface->dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
}
else {
ue->UE_mode[0] = PUSCH;
}
}
if ( ue->rx_offset < 0 )
ue->rx_offset += FRAME_LENGTH_COMPLEX_SAMPLES;
......@@ -93,13 +117,21 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d.%d: rx_offset (after) = %d : max_pos = %d,max_pos_fil = %d (peak %d) target_pos %d \n",
ue->proc.proc_rxtx[0].frame_rx,subframe,ue->rx_offset,max_pos,max_pos_fil,temp,(frame_parms->nb_prefix_samples>>3));
#endif //DEBUG_PHY
#ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d.%d: diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
ue->proc.proc_rxtx[subframe%RX_NB_TH].frame_rx,
subframe,
diff,
ue->rx_offset,
clear,
max_pos,
max_pos_fil,
temp,max_val,
(frame_parms->nb_prefix_samples>>3));
#endif //DEBUG_PHY
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT);
}
}
......
......@@ -215,7 +215,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
}
else
{
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[(subframe+1)%RX_NB_TH].rxdataF[aarx][(13*ue->frame_parms.ofdm_symbol_size)];
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[(subframe-1)%RX_NB_TH].rxdataF[aarx][(13*ue->frame_parms.ofdm_symbol_size)];
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF[aarx][(2*ue->frame_parms.ofdm_symbol_size)];
}
//-ve spectrum from SSS
......@@ -239,7 +239,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
}
else
{
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[(subframe+1)%RX_NB_TH].rxdataF[aarx][(14*ue->frame_parms.ofdm_symbol_size)];
rxF_sss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[(subframe-1)%RX_NB_TH].rxdataF[aarx][(14*ue->frame_parms.ofdm_symbol_size)];
rxF_pss = (int16_t *)&ue->common_vars.common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF[aarx][(3*ue->frame_parms.ofdm_symbol_size)];
}
// ue->measurements.n0_power[aarx] += (((int32_t)rxF_pss[-72]*rxF_pss[-72])+((int32_t)rxF_pss[-71]*rxF_pss[-71]));
......@@ -278,7 +278,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[(subframe%RX_NB_TH)].rxdataF;
rxF_pss = (int16_t *) &rxdataF[aarx][((pss_symb*(ue->frame_parms.ofdm_symbol_size)))];
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[(subframe+1)%RX_NB_TH].rxdataF;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[(subframe-1)%RX_NB_TH].rxdataF;
rxF_sss = (int16_t *) &rxdataF[aarx][((sss_symb*(ue->frame_parms.ofdm_symbol_size)))];
//-ve spectrum from SSS
......
......@@ -5291,9 +5291,7 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
pdlsch0_harq->first_tx = 0;
pdlsch0_harq->status = ACTIVE;
}
else if (rv1 != 0 )
}else if (rv1 != 0 )
//NDI has not been toggled but rv was increased by eNB: retransmission
{
if (pdlsch0_harq->status == SCH_IDLE)
......@@ -5315,6 +5313,10 @@ void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
// nothing special to do
}
}
else
{
pdlsch0_harq->status = ACTIVE;
}
}
pdlsch0_harq->DCINdi = ndi1;
......
......@@ -493,6 +493,8 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
ue->common_vars.freq_offset );
#endif
// send sync status to higher layers later when timing offset converge to target timing
#if 0
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
......@@ -502,6 +504,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
else {
ue->UE_mode[0] = PUSCH;
}
#endif
generate_pcfich_reg_mapping(frame_parms);
generate_phich_reg_mapping(frame_parms);
......
......@@ -838,6 +838,7 @@ typedef struct {
uint8_t decode_MIB;
int rx_offset; /// Timing offset
int rx_offset_diff; /// Timing adjustment for ofdm symbol0 on HW USRP
int time_sync_cell;
int timing_advance; ///timing advance signalled from eNB
int hw_timing_advance;
int N_TA_offset; ///timing offset used in TDD
......
......@@ -271,7 +271,7 @@ void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
//[NUMBER_OF_RX_THREAD=2][NUMBER_OF_CONNECTED_eNB_MAX][2];
for(int l=0; l<2; l++) {
for(int l=0; l<RX_NB_TH; l++) {
for(i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
for(j=0; j<2; j++) {
//DL HARQ
......@@ -336,6 +336,7 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->harq_processes[i]->status=IDLE;
PHY_vars_UE_g[Mod_id][CC_id]->dlsch[0][eNB_index][0]->harq_processes[i]->round=0;
PHY_vars_UE_g[Mod_id][CC_id]->dlsch[1][eNB_index][0]->harq_processes[i]->round=0;
PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->harq_processes[i]->subframe_scheduling_flag=0;
}
}
......@@ -2662,7 +2663,8 @@ void ue_measurement_procedures(
}
if ((subframe_rx==0) && (slot == 0) && (l==(4-frame_parms->Ncp))) {
// accumulate and filter timing offset estimation every subframe (instead of every frame)
if (( (slot%2) == 0) && (l==(4-frame_parms->Ncp))) {
// AGC
......@@ -5636,6 +5638,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,u
if (ue->mac_enabled==1) {
if (slot==0) {
//LOG_I(PHY,"[UE %d] Frame %d, subframe %d, star ue_scheduler\n", ue->Mod_id,frame_rx,subframe_tx);
ret = mac_xface->ue_scheduler(ue->Mod_id,
frame_rx,
subframe_rx,
......
......@@ -725,6 +725,7 @@ void *UE_thread(void *arg) {
UE->frame_parms.nb_antennas_rx),"");
}
UE->rx_offset=0;
UE->time_sync_cell=0;
//UE->proc.proc_rxtx[0].frame_rx++;
//UE->proc.proc_rxtx[1].frame_rx++;
for (th_id=0; th_id < RX_NB_TH; th_id++) {
......
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