Commit 7e2a3973 authored by knopp's avatar knopp

modifications for oaisim. oaisim_noS1 compiles at this point.

parent d9501248
......@@ -2390,14 +2390,14 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
if (dci_alloc[n_dci].format > 0) { // exclude the uplink dci
if (dci_alloc[n_dci].rnti == SI_RNTI) {
dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_eNB_SI;
dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_SI;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 0;//SI;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = 0;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[0]->TBS>>3;
LOG_D(PHY,"[DCI][EMUL]SI tbs is %d and dci index %d harq pid is %d \n",eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl],n_dci_dl,
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl]);
} else if (dci_alloc[n_dci_dl].ra_flag == 1) {
dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_eNB_ra;
dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_ra;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 1;//RA;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = 0;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[0]->TBS>>3;
......@@ -2406,7 +2406,7 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
} else {
ue_id = find_ue(dci_alloc[n_dci_dl].rnti,PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]);
DevAssert( ue_id != (uint8_t)-1 );
dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_eNB[ue_id][0];
dlsch_eNB = PHY_vars_eNB_g[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch[ue_id][0];
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 2;//TB0;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = dlsch_eNB->current_harq_pid;
......
......@@ -832,7 +832,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
// may not be necessary for PMCH??
for (eNB_id2=0; eNB_id2<NB_eNB_INST; eNB_id2++) {
if (PHY_vars_eNB_g[eNB_id2][CC_id]->lte_frame_parms.Nid_cell == phy_vars_ue->lte_frame_parms.Nid_cell)
if (PHY_vars_eNB_g[eNB_id2][CC_id]->frame_parms.Nid_cell == phy_vars_ue->frame_parms.Nid_cell)
break;
}
......@@ -847,9 +847,9 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
switch (dlsch_id) {
case PDSCH_SI: // SI
dlsch_ue = phy_vars_ue->dlsch_ue_SI[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB_SI;
case SI_PDSCH: // SI
dlsch_ue = phy_vars_ue->dlsch_SI[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_SI;
// printf("Doing SI: TBS %d\n",dlsch_ue->harq_processes[0]->TBS>>3);
memcpy(dlsch_ue->harq_processes[0]->b,dlsch_eNB->harq_processes[0]->b,dlsch_ue->harq_processes[0]->TBS>>3);
#ifdef DEBUG_DLSCH_DECODING
......@@ -863,9 +863,9 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
return(1);
break;
case PDSCH_RA: // RA
dlsch_ue = phy_vars_ue->dlsch_ue_ra[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB_ra;
case RA_PDSCH: // RA
dlsch_ue = phy_vars_ue->dlsch_ra[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_ra;
memcpy(dlsch_ue->harq_processes[0]->b,dlsch_eNB->harq_processes[0]->b,dlsch_ue->harq_processes[0]->TBS>>3);
#ifdef DEBUG_DLSCH_DECODING
LOG_D(PHY,"RA Decoded\n");
......@@ -879,11 +879,11 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
break;
case PDSCH: // TB0
dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][0];
dlsch_ue = phy_vars_ue->dlsch[eNB_id][0];
harq_pid = dlsch_ue->current_harq_pid;
ue_id= (uint32_t)find_ue((int16_t)phy_vars_ue->lte_ue_pdcch_vars[(uint32_t)eNB_id]->crnti,PHY_vars_eNB_g[eNB_id2][CC_id]);
ue_id= (uint32_t)find_ue((int16_t)phy_vars_ue->pdcch_vars[(uint32_t)eNB_id]->crnti,PHY_vars_eNB_g[eNB_id2][CC_id]);
DevAssert( ue_id != (uint32_t)-1 );
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB[ue_id][0];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch[ue_id][0];
#ifdef DEBUG_DLSCH_DECODING
......@@ -918,18 +918,18 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
dlsch_ue->harq_ack[subframe].ack = 0;
dlsch_ue->harq_ack[subframe].harq_id = harq_pid;
dlsch_ue->harq_ack[subframe].send_harq_status = 1;
dlsch->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
dlsch_ue->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
return(1+dlsch_ue->max_turbo_iterations);
}
break;
case 3: { // TB1
dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][1];
case PDSCH1: { // TB1
dlsch_ue = phy_vars_ue->dlsch[eNB_id][1];
harq_pid = dlsch_ue->current_harq_pid;
int8_t UE_id = find_ue( phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti, PHY_vars_eNB_g[eNB_id2][CC_id] );
int8_t UE_id = find_ue( phy_vars_ue->pdcch_vars[eNB_id]->crnti, PHY_vars_eNB_g[eNB_id2][CC_id] );
DevAssert( UE_id != -1 );
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB[UE_id][1];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch[UE_id][1];
// reset HARQ
dlsch_ue->harq_processes[harq_pid]->status = SCH_IDLE;
dlsch_ue->harq_processes[harq_pid]->round = 0;
......@@ -945,8 +945,8 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
case PMCH: // PMCH
dlsch_ue = phy_vars_ue->dlsch_ue_MCH[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_eNB_MCH;
dlsch_ue = phy_vars_ue->dlsch_MCH[eNB_id];
dlsch_eNB = PHY_vars_eNB_g[eNB_id2][CC_id]->dlsch_MCH;
LOG_D(PHY,"decoding pmch emul (size is %d, enb %d %d)\n", dlsch_ue->harq_processes[0]->TBS>>3, eNB_id, eNB_id2);
#ifdef DEBUG_DLSCH_DECODING
......@@ -968,20 +968,20 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
memcpy(dlsch_ue->harq_processes[0]->b,
dlsch_eNB->harq_processes[0]->b,
dlsch_ue->harq_processes[0]->TBS>>3);
dlsch->last_iteration_cnt = 1;
dlsch_ue->last_iteration_cnt = 1;
return(1);
} else {
// retransmission
dlsch->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
dlsch_ue->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
return(1+dlsch_ue->max_turbo_iterations);
}
break;
default:
dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id][0];
dlsch_ue = phy_vars_ue->dlsch[eNB_id][0];
LOG_E(PHY,"dlsch_decoding_emul: FATAL, unknown DLSCH_id %d\n",dlsch_id);
dlsch->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
dlsch_ue->last_iteration_cnt = 1+dlsch_ue->max_turbo_iterations;
return(1+dlsch_ue->max_turbo_iterations);
}
......
......@@ -516,12 +516,13 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
phich_string[ue->frame_parms.phich_config_common.phich_resource],
ue->frame_parms.nb_antennas_tx_eNB);
#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
LOG_I(PHY,"[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id,
ue->proc.proc_rxtx[0].frame_rx,
openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
ue->common_vars.freq_offset);
#endif
} else {
#ifdef DEBUG_INITIAL_SYNC
LOG_I(PHY,"[UE%d] Initial sync : PBCH not ok\n",ue->Mod_id);
......
......@@ -1053,9 +1053,10 @@ uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
double bler=0.0;//, x=0.0;
double sinr=0.0;
uint16_t nb_rb = phy_vars_ue->lte_frame_parms.N_RB_DL;
uint16_t nb_rb = phy_vars_ue->frame_parms.N_RB_DL;
int16_t f;
uint8_t CC_id=phy_vars_ue->CC_id;
int frame_rx = phy_vars_ue->proc.proc_rxtx[0].frame_rx;
// compute effective sinr
// TODO: adapt this to varible bandwidth
......@@ -1074,10 +1075,10 @@ uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
sinr,
bler);
if (pbch_phase == (phy_vars_ue->frame_rx % 4)) {
if (pbch_phase == (frame_rx % 4)) {
if (uniformrandom() >= bler) {
memcpy(phy_vars_ue->lte_ue_pbch_vars[eNB_id]->decoded_output,PHY_vars_eNB_g[eNB_id][CC_id]->pbch_pdu,PBCH_PDU_SIZE);
return(PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.nb_antennas_tx_eNB);
memcpy(phy_vars_ue->pbch_vars[eNB_id]->decoded_output,PHY_vars_eNB_g[eNB_id][CC_id]->pbch_pdu,PBCH_PDU_SIZE);
return(PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.nb_antennas_tx_eNB);
} else
return(-1);
} else
......
......@@ -1039,7 +1039,7 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
uint8_t subframe,
uint8_t dlsch_id,
PDSCH_t dlsch_id,
uint8_t eNB_id);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
......@@ -1539,6 +1539,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
uint8_t llr8_flag);
uint32_t ulsch_decoding_emul(PHY_VARS_eNB *phy_vars_eNB,
eNB_rxtx_proc_t *proc,
uint8_t UE_index,
uint16_t *crnti);
......
......@@ -1520,16 +1520,9 @@ uint32_t ulsch_decoding_emul(PHY_VARS_eNB *eNB, eNB_rxtx_proc_t *proc,
#endif
for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {
if (rnti == PHY_vars_UE_g[UE_id][CC_id]->lte_ue_pdcch_vars[0]->crnti)
if (rnti == PHY_vars_UE_g[UE_id][CC_id]->pdcch_vars[0]->crnti)
break;
/*
msg("[PHY] EMUL eNB %d ulsch_decoding_emul : subframe ue id %d crnti %x nb ue %d\n",
eNB->Mod_id,
UE_id,
PHY_vars_UE_g[UE_id]->lte_ue_pdcch_vars[0]->crnti,
NB_UE_INST);
*/
}
if (UE_id==NB_UE_INST) {
......
......@@ -2119,6 +2119,7 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
#ifdef PHY_ABSTRACTION
else {
metric0_SR = rx_pucch_emul(eNB,
proc,
UE_id,
pucch_format1,
0,
......@@ -2192,11 +2193,12 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
}
else {
#ifdef PHY_ABSTRACTION
metric0 = rx_pucch_emul(eNB,UE_id,
metric0 = rx_pucch_emul(eNB,
proc,
UE_id,
pucch_format1a,
0,
pucch_payload0,
subframe);
pucch_payload0);
#endif
}
......@@ -2251,11 +2253,11 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
PUCCH1a_THRES);
else {
#ifdef PHY_ABSTRACTION
metric0 = rx_pucch_emul(eNB,UE_id,
metric0 = rx_pucch_emul(eNB,proc,
UE_id,
format,
0,
pucch_payload0,
subframe);
pucch_payload0);
#endif
}
} else { //using n1_pucch0/n1_pucch1 resources
......@@ -2283,11 +2285,12 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
PUCCH1a_THRES);
else {
#ifdef PHY_ABSTRACTION
metric0 = rx_pucch_emul(eNB,UE_id,
metric0 = rx_pucch_emul(eNB,
proc,
UE_id,
format,
0,
pucch_payload0,
subframe);
pucch_payload0);
#endif
}
}
......@@ -2307,13 +2310,12 @@ void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq
PUCCH1a_THRES);
else {
#ifdef PHY_ABSTRACTION
metric1 = rx_pucch_emul(eNB,UE_id,
metric1 = rx_pucch_emul(eNB,
proc,
UE_id,
format,
1,
pucch_payload1,
subframe);
pucch_payload1);
#endif
}
}
......@@ -2389,7 +2391,6 @@ void cba_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_p
#ifdef PHY_ABSTRACTION
else {
rx_ulsch_emul(eNB,proc,
subframe,
eNB->UE_stats[UE_id].sector, // this is the effective sector id
UE_id);
}
......@@ -2407,6 +2408,7 @@ void cba_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_p
#ifdef PHY_ABSTRACTION
else {
ret = ulsch_decoding_emul(eNB,
proc,
UE_id,
&rnti);
}
......@@ -2909,7 +2911,6 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
#ifdef PHY_ABSTRACTION
else {
rx_ulsch_emul(eNB,proc,
subframe,
eNB->UE_stats[i].sector, // this is the effective sector id
i);
}
......@@ -2930,7 +2931,8 @@ void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const
#ifdef PHY_ABSTRACTION
else {
ret = ulsch_decoding_emul(eNB,proc,
ret = ulsch_decoding_emul(eNB,
proc,
i,
&rnti);
}
......
......@@ -1209,8 +1209,7 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
format,
ue->frame_parms.pucch_config_common.nCS_AN,
pucch_ack_payload,
SR_payload,
subframe_tx);
SR_payload);
#endif
}
} else if (SR_payload==1) { // no ACK/NAK but SR is triggered by MAC
......@@ -2503,7 +2502,7 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
#ifdef PHY_ABSTRACTION
ret = dlsch_decoding_emul(ue,
subframe_rx,
dlsch,
pdsch,
eNB_id);
#endif
}
......
......@@ -348,7 +348,7 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
switch (eNB_transport_info[enb_id][CC_id].dlsch_type[n_dci_dl]) {
case 0: //SI:
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB_SI->harq_processes[0]->b,
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_SI->harq_processes[0]->b,
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
eNB_transport_info[enb_id][CC_id].tbs[n_dci_dl]);
#ifdef DEBUG_EMU
......@@ -358,7 +358,7 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
break;
case 1: //RA:
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB_ra->harq_processes[0]->b,
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_ra->harq_processes[0]->b,
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
eNB_transport_info[enb_id][CC_id].tbs[n_dci_dl]);
#ifdef DEBUG_EMU
......@@ -370,9 +370,9 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
case 2://TB0:
harq_pid = eNB_transport_info[enb_id][CC_id].harq_pid[n_dci_dl];
ue_id = eNB_transport_info[enb_id][CC_id].ue_id[n_dci_dl];
PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][0]->rnti=
PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][0]->rnti=
eNB_transport_info[enb_id][CC_id].dci_alloc[n_dci_dl].rnti;
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][0];
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][0];
#ifdef DEBUG_EMU
LOG_D(EMU,
" enb_id %d ue id is %d rnti is %x dci index %d, harq_pid %d tbs %d \n",
......@@ -393,9 +393,9 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
case 3://TB1:
harq_pid = eNB_transport_info[enb_id][CC_id].harq_pid[n_dci_dl];
ue_id = eNB_transport_info[enb_id][CC_id].ue_id[n_dci_dl];
PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][1]->rnti=
PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][1]->rnti=
eNB_transport_info[enb_id][CC_id].dci_alloc[n_dci_dl].rnti;
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB[ue_id][1];
dlsch_eNB = PHY_vars_eNB_g[enb_id][CC_id]->dlsch[ue_id][1];
memcpy(dlsch_eNB->harq_processes[harq_pid]->b,
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
......@@ -403,7 +403,7 @@ void fill_phy_enb_vars(unsigned int enb_id, uint8_t CC_id,unsigned int next_slot
break;
case 5:
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_eNB_MCH->harq_processes[0]->b,
memcpy(PHY_vars_eNB_g[enb_id][CC_id]->dlsch_MCH->harq_processes[0]->b,
&eNB_transport_info[enb_id][CC_id].transport_blocks[payload_offset],
eNB_transport_info[enb_id][CC_id].tbs[n_dci_dl]);
#ifdef DEBUG_EMU
......@@ -491,52 +491,45 @@ void fill_phy_ue_vars(unsigned int ue_id, uint8_t CC_id,unsigned int last_slot)
#endif
for (n_enb = 0; n_enb < UE_transport_info[ue_id][CC_id].num_eNB; n_enb++) {
#ifdef DEBUG_EMU
/* LOG_D(EMU,"Setting ulsch vars for ue %d rnti %x harq pid is %d \n",
ue_id, UE_transport_info[ue_id][CC_id].rnti[n_enb],
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]);
*/
#endif
rnti = UE_transport_info[ue_id][CC_id].rnti[n_enb];
enb_id = UE_transport_info[ue_id][CC_id].eNB_id[n_enb];
PHY_vars_UE_g[ue_id][CC_id]->lte_ue_pdcch_vars[enb_id]->crnti=rnti;
PHY_vars_UE_g[ue_id][CC_id]->pdcch_vars[enb_id]->crnti=rnti;
harq_pid = UE_transport_info[ue_id][CC_id].harq_pid[n_enb];
//ulsch = PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id];
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_RI[0] =
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_RI[0] =
ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ri & 0x1;
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_RI[1] =
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_RI[1] =
(ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ri>>1) & 0x1;
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_ACK[0]=
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_ACK[0]=
ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ack & 0x1;
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o_ACK[1]=
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o_ACK[1]=
(ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_ack>>1) & 0x1;
//*(uint32_t *)ulsch->o = ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_uci;
if ((last_slot % 2) == 1) {
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->O =
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->O =
ue_cntl_delay[ue_id][CC_id][last_slot%2].length_uci;
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->uci_format =
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->uci_format =
ue_cntl_delay[ue_id][CC_id][last_slot%2].uci_format;
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->o,
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->o,
ue_cntl_delay[ue_id][CC_id][last_slot%2].pusch_uci,
MAX_CQI_BYTES);
ulsch = PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id];
ulsch = PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id];
// if (((HLC_subband_cqi_rank1_2A_5MHz *)ulsch->o)->cqi1)
LOG_D(EMU,
"[UE %d] subframe %d last slot %d copy the payload from eNB %d to UE %d with harq id %d cqi (val %d, length %d) \n",
ue_id, subframe, last_slot, enb_id, ue_id, harq_pid,
((HLC_subband_cqi_rank1_2A_5MHz *)ulsch->o)->cqi1,
PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->O);
PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->O);
}
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch_ue[enb_id]->harq_processes[harq_pid]->b,
memcpy(PHY_vars_UE_g[ue_id][CC_id]->ulsch[enb_id]->harq_processes[harq_pid]->b,
UE_transport_info[ue_id][CC_id].transport_blocks,
UE_transport_info[ue_id][CC_id].tbs[enb_id]);
......
......@@ -130,7 +130,7 @@ void do_DL_sig(double **r_re0,double **r_im0,
// find out which eNB the UE is attached to
for (eNB_id=0; eNB_id<NB_eNB_INST; eNB_id++) {
if (find_ue(PHY_vars_UE_g[UE_id][CC_id]->lte_ue_pdcch_vars[0]->crnti,PHY_vars_eNB_g[eNB_id][CC_id])>=0) {
if (find_ue(PHY_vars_UE_g[UE_id][CC_id]->pdcch_vars[0]->crnti,PHY_vars_eNB_g[eNB_id][CC_id])>=0) {
// UE with UE_id is connected to eNb with eNB_id
att_eNB_id=eNB_id;
LOG_D(OCM,"A: UE attached to eNB (UE%d->eNB%d)\n",UE_id,eNB_id);
......@@ -165,7 +165,7 @@ void do_DL_sig(double **r_re0,double **r_im0,
//dlsch_abstraction(PHY_vars_UE_g[UE_id]->sinr_dB, rb_alloc, 8);
// fill in perfect channel estimates
channel_desc_t *desc1 = eNB2UE[att_eNB_id][UE_id][CC_id];
int32_t **dl_channel_est = PHY_vars_UE_g[UE_id][CC_id]->lte_ue_common_vars.dl_ch_estimates[0];
int32_t **dl_channel_est = PHY_vars_UE_g[UE_id][CC_id]->common_vars.dl_ch_estimates[0];
// double scale = pow(10.0,(enb_data[att_eNB_id]->tx_power_dBm + eNB2UE[att_eNB_id][UE_id]->path_loss_dB + (double) PHY_vars_UE_g[UE_id]->rx_total_gain_dB)/20.0);
double scale = pow(10.0,(frame_parms->pdsch_config_common.referenceSignalPower+eNB2UE[att_eNB_id][UE_id][CC_id]->path_loss_dB + (double) PHY_vars_UE_g[UE_id][CC_id]->rx_total_gain_dB)/20.0);
LOG_D(OCM,"scale =%lf (%d dB)\n",scale,(int) (20*log10(scale)));
......@@ -201,13 +201,13 @@ void do_DL_sig(double **r_re0,double **r_im0,
// calculate the SNR for the attached eNB (this assumes eNB always uses PMI stored in eNB_UE_stats; to be improved)
init_snr(eNB2UE[att_eNB_id][UE_id][CC_id], enb_data[att_eNB_id], ue_data[UE_id], PHY_vars_UE_g[UE_id][CC_id]->sinr_dB, &PHY_vars_UE_g[UE_id][CC_id]->N0,
PHY_vars_UE_g[UE_id][CC_id]->transmission_mode[att_eNB_id], PHY_vars_eNB_g[att_eNB_id][CC_id]->eNB_UE_stats[UE_id].DL_pmi_single,
PHY_vars_eNB_g[att_eNB_id][CC_id]->mu_mimo_mode[UE_id].dl_pow_off,PHY_vars_eNB_g[att_eNB_id][CC_id]->lte_frame_parms.N_RB_DL);
PHY_vars_UE_g[UE_id][CC_id]->transmission_mode[att_eNB_id], PHY_vars_eNB_g[att_eNB_id][CC_id]->UE_stats[UE_id].DL_pmi_single,
PHY_vars_eNB_g[att_eNB_id][CC_id]->mu_mimo_mode[UE_id].dl_pow_off,PHY_vars_eNB_g[att_eNB_id][CC_id]->frame_parms.N_RB_DL);
// calculate sinr here
for (eNB_id = 0; eNB_id < NB_eNB_INST; eNB_id++) {
if (att_eNB_id != eNB_id) {
calculate_sinr(eNB2UE[eNB_id][UE_id][CC_id], enb_data[eNB_id], ue_data[UE_id], PHY_vars_UE_g[UE_id][CC_id]->sinr_dB,PHY_vars_eNB_g[att_eNB_id][CC_id]->lte_frame_parms.N_RB_DL);
calculate_sinr(eNB2UE[eNB_id][UE_id][CC_id], enb_data[eNB_id], ue_data[UE_id], PHY_vars_UE_g[UE_id][CC_id]->sinr_dB,PHY_vars_eNB_g[att_eNB_id][CC_id]->frame_parms.N_RB_DL);
}
}
} // hold channel
......@@ -233,7 +233,7 @@ void do_DL_sig(double **r_re0,double **r_im0,
// eNB2UE[eNB_id][UE_id]->path_loss_dB) <= -107.0)
// break;
txdata = PHY_vars_eNB_g[eNB_id][CC_id]->lte_eNB_common_vars.txdata[0];
txdata = PHY_vars_eNB_g[eNB_id][CC_id]->common_vars.txdata[0];
slot_offset = (next_slot)*(frame_parms->samples_per_tti>>1);
slot_offset_meas = ((next_slot&1)==0) ? slot_offset : (slot_offset-(frame_parms->samples_per_tti>>1));
tx_pwr = dac_fixed_gain(s_re,
......@@ -355,7 +355,7 @@ void do_DL_sig(double **r_re0,double **r_im0,
LOG_D(OCM,"[SIM][DL] UE %d : ADC in %f dBm for slot %d (subframe %d)\n",UE_id,10*log10(rx_pwr),next_slot,next_slot>>1);
#endif
rxdata = PHY_vars_UE_g[UE_id][CC_id]->lte_ue_common_vars.rxdata;
rxdata = PHY_vars_UE_g[UE_id][CC_id]->common_vars.rxdata;
slot_offset = (next_slot)*(frame_parms->samples_per_tti>>1);
adc(r_re,
......@@ -463,12 +463,6 @@ void do_UL_sig(double **r_re0,double **r_im0,double **r_re,double **r_im,double
#endif
} else { //without abstraction
/*
for (UE_id=0;UE_id<NB_UE_INST;UE_id++) {
do_OFDM_mod(PHY_vars_UE_g[UE_id]->lte_ue_common_vars.txdataF,PHY_vars_UE_g[UE_id]->lte_ue_common_vars.txdata,next_slot,&PHY_vars_UE_g[UE_id]->lte_frame_parms);
}
*/
for (eNB_id=0; eNB_id<NB_eNB_INST; eNB_id++) {
// Clear RX signal for eNB = eNB_id
for (i=0; i<(frame_parms->samples_per_tti>>1); i++) {
......@@ -481,7 +475,7 @@ void do_UL_sig(double **r_re0,double **r_im0,double **r_re,double **r_im,double
// Compute RX signal for eNB = eNB_id
for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {
txdata = PHY_vars_UE_g[UE_id][CC_id]->lte_ue_common_vars.txdata;
txdata = PHY_vars_UE_g[UE_id][CC_id]->common_vars.txdata;
slot_offset = (next_slot)*(frame_parms->samples_per_tti>>1);
slot_offset_meas = ((next_slot&1)==0) ? slot_offset : (slot_offset-(frame_parms->samples_per_tti>>1));
......@@ -571,14 +565,14 @@ void do_UL_sig(double **r_re0,double **r_im0,double **r_re,double **r_im,double
nb_antennas_rx,
frame_parms->samples_per_tti>>1,
1e3/UE2eNB[0][eNB_id][CC_id]->sampling_rate, // sampling time (ns)
(double)PHY_vars_eNB_g[eNB_id][CC_id]->rx_total_gain_eNB_dB - 66.227); // rx_gain (dB) (66.227 = 20*log10(pow2(11)) = gain from the adc that will be applied later)
(double)PHY_vars_eNB_g[eNB_id][CC_id]->rx_total_gain_dB - 66.227); // rx_gain (dB) (66.227 = 20*log10(pow2(11)) = gain from the adc that will be applied later)
#ifdef DEBUG_SIM
rx_pwr = signal_energy_fp(r_re,r_im,nb_antennas_rx,frame_parms->samples_per_tti>>1,0)*(double)frame_parms->ofdm_symbol_size/(12.0*frame_parms->N_RB_DL);
LOG_D(OCM,"[SIM][UL] rx_pwr (ADC in) %f dB for slot %d (subframe %d)\n",10*log10(rx_pwr),next_slot,next_slot>>1);
#endif
rxdata = PHY_vars_eNB_g[eNB_id][CC_id]->lte_eNB_common_vars.rxdata[0];
rxdata = PHY_vars_eNB_g[eNB_id][CC_id]->common_vars.rxdata[0];
slot_offset = (next_slot)*(frame_parms->samples_per_tti>>1);
adc(r_re,
......
......@@ -25,17 +25,17 @@
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/
*******************************************************************************/
/*! \file oaisim.c
* \brief oaisim top level
* \author Navid Nikaein
* \date 2013-2015
* \version 1.0
* \company Eurecom
* \email: openair_tech@eurecom.fr
* \note
* \warning
*/
* \brief oaisim top level
* \author Navid Nikaein
* \date 2013-2015
* \version 1.0
* \company Eurecom
* \email: openair_tech@eurecom.fr
* \note
* \warning
*/
#include <string.h>
#include <math.h>
......@@ -120,7 +120,7 @@ char smbv_ip[16];
DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
DCI2_5MHz_2A_L10PRB_TDD_t DLSCH_alloc_pdu1;
DCI2_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu2;
*/
*/
#define UL_RB_ALLOC computeRIV(lte_frame_parms->N_RB_UL,0,24)
#define CCCH_RB_ALLOC computeRIV(lte_frame_parms->N_RB_UL,0,3)
......@@ -441,16 +441,14 @@ l2l1_task (void *args_p)
int CC_id;
// Framing variables
int32_t slot, last_slot, next_slot;
int32_t sf;
#ifdef Rel10
relaying_type_t r_type = no_relay; // no relaying
#endif
lte_subframe_t direction;
char fname[64], vname[64];
int sf;
protocol_ctxt_t ctxt;
//#ifdef XFORMS
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
......@@ -478,22 +476,7 @@ l2l1_task (void *args_p)
char eNB_stats_th_filename[255];
#endif
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
for (eNB_inst = 0; eNB_inst < NB_eNB_INST; eNB_inst++) {
for (sf = 0; sf < 10; sf++) {
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[sf].frame_tx = 0;
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[sf].frame_rx = 0;
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[sf].subframe_tx = (sf + 1)
% 10;
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[sf].subframe_rx = (sf + 9)
% 10;
}
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[0].frame_rx = 1023;
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[9].frame_tx = 1;
}
//#ifdef XFORMS
if (xforms==1) {
xargv[0] = xname;
fl_initialize (&xargc, xargv, NULL, 0, 0);
......@@ -520,7 +503,7 @@ l2l1_task (void *args_p)
}
}
//#endif
#ifdef PRINT_STATS
......@@ -689,54 +672,33 @@ l2l1_task (void *args_p)
omv_write (pfd[1], enb_node_list, ue_node_list, omv_data);
}
#endif
#ifdef DEBUG_OMG
/*
if ((((int) oai_emulation.info.time_s) % 100) == 0) {
for (UE_inst = oai_emulation.info.first_ue_local; UE_inst < (oai_emulation.info.first_ue_local + oai_emulation.info.nb_ue_local); UE_inst++) {
get_node_position (UE, UE_inst);
}
}
*/
#endif
update_ocm ();
for (slot = 0; slot < 20; slot++) {
if (slot % 2 == 0)
for (sf = 0; sf < 10; sf++) {
start_meas (&oaisim_stats_f);
wait_for_slot_isr ();
#if defined(ENABLE_ITTI)
itti_update_lte_time(frame % MAX_FRAME_NUMBER, slot);
itti_update_lte_time(frame % MAX_FRAME_NUMBER, sf<<1);
#endif
last_slot = (slot - 1) % 20;
if (last_slot < 0)
last_slot += 20;
next_slot = (slot + 1) % 20;
oai_emulation.info.time_ms = frame * 10 + (slot >> 1);
direction = subframe_select (frame_parms[0], next_slot >> 1);
oai_emulation.info.time_ms = frame * 10 + sf;
#ifdef PROC
if(Channel_Flag==1)
Channel_Func(s_re2,s_im2,r_re2,r_im2,r_re02,r_im02,r_re0_d,r_im0_d,r_re0_u,r_im0_u,eNB2UE,UE2eNB,enb_data,ue_data,abstraction_flag,frame_parms,slot);
Channel_Func(s_re2,s_im2,r_re2,r_im2,r_re02,r_im02,r_re0_d,r_im0_d,r_re0_u,r_im0_u,eNB2UE,UE2eNB,enb_data,ue_data,abstraction_flag,frame_parms,sf<<1);
if(Channel_Flag==0)
#endif
{
{ // SUBFRAME INNER PART
#if defined(ENABLE_ITTI)
log_set_instance_type (LOG_INSTANCE_ENB);
#endif
// if ((next_slot % 2) == 0)
if ((slot & 1) == 0)
clear_eNB_transport_info (oai_emulation.info.nb_enb_local);
for (eNB_inst = oai_emulation.info.first_enb_local;
......@@ -745,19 +707,17 @@ l2l1_task (void *args_p)
+ oai_emulation.info.nb_enb_local));
eNB_inst++) {
if (oai_emulation.info.cli_start_enb[eNB_inst] != 0) {
if ((slot & 1) == 0) {
T(T_ENB_MASTER_TICK, T_INT(eNB_inst), T_INT(frame % 1024), T_INT(slot/2));
T(T_ENB_MASTER_TICK, T_INT(eNB_inst), T_INT(frame % 1024), T_INT(sf));
LOG_D(EMU,
"PHY procedures eNB %d for frame %d, slot %d (subframe TX %d, RX %d) TDD %d/%d Nid_cell %d\n",
"PHY procedures eNB %d for frame %d, subframe %d TDD %d/%d Nid_cell %d\n",
eNB_inst,