Commit 71fc1b68 authored by Florian Kaltenberger's avatar Florian Kaltenberger
Browse files

makeing pdsch parameters dependent on DCI

parent e85cd9b7
......@@ -3596,22 +3596,26 @@ void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t
memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
}*/
void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1) {
void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1) {
int nr_tti_rx = proc->nr_tti_rx;
int m;
int harq_pid;
int i_mod,eNB_id_i,dual_stream_UE;
int first_symbol_flag=0;
uint16_t pdsch_start_rb = 0;
uint16_t pdsch_nb_rb = 50;
if (dlsch0->active == 0)
return;
for (m=s0;m<=s1;m++) {
if (dlsch0 && (!dlsch1)) {
int harq_pid = dlsch0->current_harq_pid;
uint16_t pdsch_start_rb = dlsch0->harq_processes[harq_pid]->start_rb;
uint16_t pdsch_nb_rb = dlsch0->harq_processes[harq_pid]->nb_rb;
uint16_t s0 = dlsch0->harq_processes[harq_pid]->start_symbol;
uint16_t s1 = dlsch0->harq_processes[harq_pid]->nb_symbols;
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_tti_rx %d, harq_pid %d, rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d\n",ue->Mod_id,pdsch,nr_tti_rx,harq_pid,pdsch_start_rb,pdsch_nb_rb,s0,s1);
if (dlsch0 && (!dlsch1)) {
for (m=s0;m<=s1;m++) {
if (m==s0)
nr_pdsch_channel_estimation(ue,
......@@ -3622,8 +3626,6 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
ue->frame_parms.first_carrier_offset+pdsch_start_rb*12,
pdsch_nb_rb);
harq_pid = dlsch0->current_harq_pid;
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_tti_rx %d, harq_pid %d Symbol %d\n",ue->Mod_id,pdsch,nr_tti_rx,harq_pid,m);
dual_stream_UE = 0;
eNB_id_i = eNB_id+1;
......@@ -4440,9 +4442,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
eNB_id,
PDSCH,
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
NULL,
nb_symb_pdcch, //ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
(nb_symb_sch+nb_symb_pdcch-1)); //ue->frame_parms.symbols_per_tti>>1,
NULL);
/*
write_output("rxF.m","rxF",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0],ue->frame_parms.ofdm_symbol_size*14,1,1);
......@@ -4464,9 +4464,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
ue->frame_parms.symbols_per_tti>>1);
NULL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
}
......@@ -4478,9 +4477,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
ue->frame_parms.symbols_per_tti>>1);
NULL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
}
......@@ -4492,9 +4490,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
ue->frame_parms.symbols_per_tti>>1);
NULL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
}
......@@ -4592,9 +4589,7 @@ start_meas(&ue->generic_stat);
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
1+(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1);
NULL);
/*ue_dlsch_procedures(ue,
proc,
......@@ -4615,9 +4610,7 @@ start_meas(&ue->generic_stat);
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
1+(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1);
NULL);
/*ue_dlsch_procedures(ue,
......@@ -4638,9 +4631,7 @@ start_meas(&ue->generic_stat);
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
1+(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1);
NULL);
/*ue_dlsch_procedures(ue,
proc,
......
......@@ -90,7 +90,7 @@ const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
/*
#define mu_pusch 1
// definition table j Table 6.1.2.1.1-4
#define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1)
......@@ -131,4 +131,5 @@ const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
};
\ No newline at end of file
};
*/
......@@ -235,12 +235,12 @@ int8_t nr_ue_decode_mib(
#ifdef DEBUG_MIB
printf("system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]);
printf("system frame number(with LSB): %d\n", (int)frame);
printf("subcarrier spacing: %d\n", (int)mac->mib->subCarrierSpacingCommon);
printf("subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
printf("ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", (int)mac->mib->dmrs_TypeA_Position);
printf("dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
printf("pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1);
printf("cell barred: %d\n", (int)mac->mib->cellBarred);
printf("intra frequency reselection: %d\n", (int)mac->mib->intraFreqReselection);
printf("cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
printf("intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
printf("half frame bit(extra bits): %d\n", (int)half_frame_bit);
printf("ssb index(extra bits): %d\n", (int)ssb_index);
#endif
......@@ -1122,19 +1122,19 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint8_t time_domain_ind,
long dmrs_typeA_pos
long dmrs_typeA_pos //0=pos2,1=pos3
){
uint8_t k_offset=0;
uint8_t sliv_S=0;
uint8_t sliv_L=0;
uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 2)?9:10,(dmrs_typeA_pos == 2)?4:4}, // row index 6
{0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 0)?9:10,(dmrs_typeA_pos == 0)?4:4}, // row index 6
{0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4}, // row index 7
{0,5,7}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
......@@ -1146,13 +1146,13 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
{0,8,4} // row index 16
};
uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?6:5}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 2)?6:8, (dmrs_typeA_pos == 2)?4:2}, // row index 6
{0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?6:5}, // row index 1
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 0)?6:8, (dmrs_typeA_pos == 0)?4:2}, // row index 6
{0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4}, // row index 7
{0,5,6}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
......@@ -1177,7 +1177,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,(dmrs_typeA_pos == 2)?2:3,(dmrs_typeA_pos == 2)?12:11}, // row index 14
{0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11}, // row index 14
{1,2,4}, // row index 15
{0,0,0} // row index 16
};
......@@ -1195,7 +1195,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
{0,8,4}, // row index 11
{0,10,4}, // row index 12
{0,2,7}, // row index 13
{0,(dmrs_typeA_pos == 2)?2:3,(dmrs_typeA_pos == 2)?12:11}, // row index 14
{0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11}, // row index 14
{0,0,6}, // row index 15
{0,2,6} // row index 16
};
......@@ -1243,9 +1243,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
* TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink)
*/
if(dlsch_config_pdu != NULL){
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][0];
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2];
// k_offset = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
......@@ -1262,9 +1262,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
* TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink)
*/
if(ulsch_config_pdu != NULL){
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2];
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
......
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