eNB_scheduler_ulsch_NB_IoT.c 16.2 KB
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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.0  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */
 /*! \file eNB_scheduler_ulsch_NB_IoT.c
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 * \brief handle UL UE-specific scheduling
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 * \author  NTUST BMW Lab./Nick HO
 * \date 2017 - 2018
 * \email: nick133371@gmail.com
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 * \version 1.0
 *
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 */

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#include "defs_NB_IoT.h"
#include "proto_NB_IoT.h"
#include "extern_NB_IoT.h"
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#include "RRC/LITE/proto.h"
#include "RRC/LITE/extern.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
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unsigned char str20[] = "DCI_uss";
unsigned char str21[] = "DATA_uss";
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// scheduling UL
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int schedule_UL_NB_IoT(eNB_MAC_INST_NB_IoT *mac_inst,UE_TEMPLATE_NB_IoT *UE_info,uint32_t subframe, uint32_t frame, uint32_t H_SFN, UE_SCHED_CTRL_NB_IoT_t *UE_sched_ctrl_info){
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	int i,ndi = 0,check_DCI_result = 0,check_UL_result = 0,candidate;
	uint32_t DL_end;
    //Scheduling resource temp buffer
    sched_temp_DL_NB_IoT_t *NPDCCH_info = (sched_temp_DL_NB_IoT_t*)malloc(sizeof(sched_temp_DL_NB_IoT_t));
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	  candidate = UE_info->R_max/UE_sched_ctrl_info->R_dci;
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    uint32_t mcs = max_mcs[UE_info->multi_tone];
    uint32_t mappedMcsIndex=UE_info->PHR+(4 * UE_info->multi_tone);
    int TBS = 0;
    int Iru = 0, Nru, I_rep,N_rep,total_ru;
    int dly = 0,uplink_time = 0;

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    if(UE_info->ul_total_buffer<=0)
    {
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        LOG_D(MAC,"[%04d][ULSchedulerUSS][UE:%05d] No UL data in buffer\n", mac_inst->current_subframe, UE_info->rnti);
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        return -1;
    }

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    TBS=get_TBS_UL_NB_IoT(mcs,UE_info->multi_tone,Iru);
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    LOG_I(MAC,"Initial TBS : %d UL_buffer: %d\n", TBS, UE_info->ul_total_buffer);
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    sched_temp_UL_NB_IoT_t *NPUSCH_info = (sched_temp_UL_NB_IoT_t*)malloc(sizeof(sched_temp_UL_NB_IoT_t));

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    //DCIFormatN0_t *DCI_N0 = (DCIFormatN0_t*)malloc(sizeof(DCIFormatN0_t));
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    //available_resource_DL_t *node;
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    // setting of the NDI
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    /*
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    if(UE_info->HARQ_round == 0)
    {
        ndi = 1-UE_info->oldNDI_UL;
        UE_info->oldNDI_UL=ndi;
    }
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    */
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    ndi = 1;

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    for (i = 0; i < candidate; i++)
	{
		/*step 1 : Check DL resource is available for DCI N0 or not*/
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		check_DCI_result = check_resource_NPDCCH_NB_IoT(mac_inst,H_SFN, frame, subframe, NPDCCH_info, i, UE_sched_ctrl_info->R_dci);
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        //node = check_resource_DL(mac_inst,);

        //just use to check when there is no DL function
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        //NPDCCH_info->sf_start = H_SFN*10240+frame*10 +subframe + i * UE_sched_ctrl_info->R_dci;
        //NPDCCH_info->sf_end = NPDCCH_info->sf_start + (i+1) * UE_sched_ctrl_info->R_dci;
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        //LOG_D(MAC,"UE : %5d, NPDCCH result: %d ,NPDCCH start: %d,NPDCCH end : %d\n",UE_info->rnti,check_DCI_result,NPDCCH_info->sf_start,NPDCCH_info->sf_end);
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        if( check_DCI_result != -1)
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		    {
			     /*step 2 : Determine MCS / TBS / REP / RU number*/
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            /*while((mapped_mcs[UE_info->CE_level][mappedMcsIndex]< mcs)||((TBS>UE_info->ul_total_buffer)&&(mcs>=0)))
                {
                    --mcs;
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                    TBS=get_TBS_UL_NB_IoT(mcs,UE_info->multi_tone,Iru);
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                }*/

            mcs = mapped_mcs[UE_info->CE_level][mappedMcsIndex];

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            //mcs = 2;
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            while((TBS<UE_info->ul_total_buffer)&&(Iru<=7))
                {
                    Iru++;
                    TBS=get_TBS_UL_NB_IoT(mcs,UE_info->multi_tone,Iru);
                }
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            //LOG_D(MAC,"TBS : %d MCS %d I_RU %d\n", TBS, UE_info->ul_total_buffer, mcs, Iru);
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            Nru = RU_table[Iru];
            DL_end = NPDCCH_info->sf_end;
            N_rep = get_N_REP(UE_info->CE_level);
            I_rep = get_I_REP(N_rep);
            total_ru = Nru * N_rep;

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            LOG_D(MAC,"[%04d][ULSchedulerUSS][UE:%05d] Multi-tone:%d,MCS:%d,TBS:%d,UL_buffer:%d,DL_start:%d,DL_end:%d,N_rep:%d,N_ru:%d,Total_ru:%d,Iru:%d\n", mac_inst->current_subframe,UE_info->rnti,UE_info->multi_tone,mcs,TBS,UE_info->ul_total_buffer,NPDCCH_info->sf_start,DL_end,N_rep,Nru,total_ru,Iru);
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            /*step 3 Check UL resource for Uplink data*/
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      			// we will loop the scheduling delay here
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            for(dly=0;dly<4;dly++)
            {
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                uplink_time = DL_end +scheduling_delay[dly]+1;
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                check_UL_result = Check_UL_resource(uplink_time,total_ru, NPUSCH_info, UE_info->multi_tone, 0);
                if (check_UL_result != -1)
                {
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                //LOG_D(MAC,"[%04d][UL scheduler][UE:%05d] DCI content = scind : %d ResAssign : %d mcs : %d ndi : %d scheddly : %d RepNum : %d rv : %d DCIRep : %d\n", mac_inst->current_subframe,UE_info->rnti,DCI_N0->scind,DCI_N0->ResAssign,DCI_N0->mcs,DCI_N0->ndi,DCI_N0->Scheddly,DCI_N0->RepNum,DCI_N0->rv,DCI_N0->DCIRep);
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                LOG_D(MAC,"[%04d][ULSchedulerUSS][%d][Success] complete scheduling with data size %d\n", mac_inst->current_subframe, UE_info->rnti, UE_info->ul_total_buffer);
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                LOG_I(MAC,"[%04d][ULSchedulerUSS][%d] Multi-tone:%d,MCS:%d,TBS:%d,UL_buffer:%d,DL_start:%d,DL_end:%d,N_rep:%d,N_ru:%d,Total_ru:%d\n", mac_inst->current_subframe,UE_info->rnti,UE_info->multi_tone,mcs,TBS,UE_info->ul_total_buffer,NPDCCH_info->sf_start,DL_end,N_rep,Nru,total_ru);
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                //LOG_D(MAC,"[%04d][ULSchedulerUSS][%d][Success] DCI content = scind : %d ResAssign : %d mcs : %d ndi : %d scheddly : %d RepNum : %d rv : %d DCIRep : %d\n", mac_inst->current_subframe, UE_info->rnti, DCI_N0->scind,DCI_N0->ResAssign,DCI_N0->mcs,DCI_N0->ndi,DCI_N0->Scheddly,DCI_N0->RepNum,DCI_N0->rv,DCI_N0->DCIRep);

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                // step 5 resource allocation and generate scheduling result
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                LOG_D(MAC,"[%04d][ULSchedulerUSS][UE:%05d] Generate result\n", mac_inst->current_subframe, UE_info->rnti);
                //generate_scheduling_result_UL(NPDCCH_info->sf_start, NPDCCH_info->sf_end,NPUSCH_info->sf_start, NPUSCH_info->sf_end,DCI_N0,UE_info->rnti, str20, str21);
                LOG_D(MAC,"[%04d][ULSchedulerUSS][UE:%05d] Maintain resource\n", mac_inst->current_subframe, UE_info->rnti);
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                //fill_resource_DL();
                maintain_resource_DL(mac_inst,NPDCCH_info,NULL);

                adjust_UL_resource_list(NPUSCH_info);
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                /*
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                //Change the UE state to idle
                UE_info->direction = -1;
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                return 0;
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                */
                //Fill result to Output structure

                    UE_sched_ctrl_info->NPDCCH_sf_end=NPDCCH_info->sf_end;
                    UE_sched_ctrl_info->NPDCCH_sf_start=NPDCCH_info->sf_start;
                    UE_sched_ctrl_info->NPUSCH_sf_end=NPUSCH_info->sf_end;
                    UE_sched_ctrl_info->NPUSCH_sf_start=NPUSCH_info->sf_start;
                    UE_sched_ctrl_info->TBS=TBS;
                    UE_sched_ctrl_info->dci_n0_index_mcs=mcs;
                    UE_sched_ctrl_info->index_tbs=mcs;
                    UE_sched_ctrl_info->dci_n0_index_ru=Iru;
                    UE_sched_ctrl_info->dci_n0_n_ru=Nru;
                    UE_sched_ctrl_info->dci_n0_index_delay=dly;
                    UE_sched_ctrl_info->dci_n0_index_subcarrier=NPUSCH_info->subcarrier_indication;
                    UE_sched_ctrl_info->dci_n0_index_ndi=ndi;
                    //UE_sched_ctrl_info->dci_n0_index_R_dci=get_DCI_REP(UE_sched_ctrl_info->R_dci->R_dci,UE_info->R_max);
                    UE_sched_ctrl_info->dci_n0_index_R_data=I_rep;
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                    LOG_D(MAC,"[%04d][ULSchedulerUSS][%d][Success] Finish UL USS scheduling \n", mac_inst->current_subframe, UE_info->rnti);
                    return 0;
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                }
            }

		}
        /*break now, we only loop one candidiate*/
        //break;
	}
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  //----Daniel
  UE_sched_ctrl_info->flag_schedule_success=0;
  //----Daniel
  LOG_D(MAC,"[%04d][ULSchedulerUSS][%d][Fail] UL scheduling USS fail\n", mac_inst->current_subframe, UE_info->rnti);
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	LOG_D(MAC,"[%04d][UL scheduler][UE:%05d] there is no available UL resource\n", mac_inst->current_subframe, UE_info->rnti);
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	return -1;
}

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void rx_sdu_NB_IoT(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t subframe, uint16_t rnti, uint8_t *sdu, uint16_t  length)
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{
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    unsigned char  rx_ces[5], num_ce = 0, num_sdu = 0, *payload_ptr, i; // MAX Control element
    unsigned char  rx_lcids[5];//for NB_IoT-IoT, NB_IoT_RB_MAX should be fixed to 5 (2 DRB+ 3SRB) 
  unsigned short rx_lengths[5];
  //int UE_id = 0;
  int BSR_index=0;
  int DVI_index = 0;
  int PHR = 0;
  int ul_total_buffer = 0;
  //mac_NB_IoT_t *mac_inst;
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  UE_TEMPLATE_NB_IoT *UE_info = NULL;
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  uint8_t* msg4_rrc_pdu = NULL;
  LOG_D(MAC,"RX_SDU_IN\n");
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  uint8_t* first_6 = (uint8_t*) malloc(6*sizeof(uint8_t));
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  for(int a = 0; a<6;a++)
    first_6[a]=sdu[a+2];
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  // note: if lcid < 25 this is sdu, otherwise this is CE
  payload_ptr = parse_ulsch_header_NB_IoT(sdu, &num_ce, &num_sdu,rx_ces, rx_lcids, rx_lengths, length);
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  LOG_I(MAC,"num_CE= %d, num_sdu= %d, rx_ces[0] = %d, rx_lcids =  %d, rx_lengths[0] = %d, length = %d\n",num_ce,num_sdu,rx_ces[0],rx_lcids[0],rx_lengths[0],length);
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  for (i = 0; i < num_ce; i++)
  {
    switch(rx_ces[i])
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    {
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        case CRNTI:
          // find UE id again, confirm the UE, intial some ue specific parameters
          payload_ptr+=2;
            break;
        case SHORT_BSR:
            // update BSR here
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        LOG_I(MAC,"Update BSR, rnti : %d\n",rnti);
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        UE_info = get_ue_from_rnti(mac_inst, rnti);
        BSR_index = payload_ptr[0] & 0x3f;
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        if(UE_info != NULL)
        {          
          LOG_I(MAC,"Find UE in CE 2 list, update ul_total_buffer to %d bytes\n",BSR_table[BSR_index]);
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          UE_info->ul_total_buffer = BSR_table[BSR_index];
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        }
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        else
          LOG_E(MAC,"UE info empty\n"); 
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            payload_ptr+=1;
            break;
        default:
        LOG_D(MAC,"Received unknown MAC header (0x%02x)\n", rx_ces[i]);
                break;
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        }
    }
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    for (i = 0; i < num_sdu; i++)
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    {
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        switch(rx_lcids[i])
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        {
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            case CCCH_NB_IoT:
                
                // MSG3 content: |R|R|PHR|PHR|DVI|DVI|DVI|DVI|CCCH payload
                PHR = ((payload_ptr[0] >> 5) & 0x01)*2+((payload_ptr[0]>>4) & 0x01);
                DVI_index = (payload_ptr[0] >>3 & 0x01)*8+ (payload_ptr[0] >>2 & 0x01)*4 + (payload_ptr[0] >>1 & 0x01)*2 +(payload_ptr[0] >>0 & 0x01);
                ul_total_buffer = DV_table[DVI_index];
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                LOG_D(MAC,"PHR = %d, ul_total_buffer = %d\n",PHR,ul_total_buffer);
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                // go to payload
                payload_ptr+=1; 
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		            // Note that the first 6 byte (48 bits) of this CCCH SDU should be encoded in the MSG4 for contention resolution 
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                /*printf("CCCH SDU content: ");
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                  for(int a = 0; a<9;a++)
                    printf("%02x ",payload_ptr[a]);
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                  printf("\n");*/
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                rx_lengths[i]-=1;
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                mac_rrc_data_ind(
                  module_id,
                  CC_id,
                  frame,subframe,
                  rnti,
                  CCCH,
                  (uint8_t*)payload_ptr,
                  rx_lengths[i],
                  1,
                  module_id,
                  0);
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                LOG_D(MAC,"rx_lengths : %d\n", rx_lengths[i]);
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                msg4_rrc_pdu = mac_rrc_msg3_ind_NB_IoT(payload_ptr,rnti,rx_lengths[i]);
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                receive_msg3_NB_IoT(mac_inst,rnti,PHR,ul_total_buffer,first_6,msg4_rrc_pdu);
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                LOG_I(MAC,"Contention resolution ID = %02x %02x %02x %02x %02x %02x\n",first_6[0],first_6[1],first_6[2],first_6[3],first_6[4],first_6[5]);
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          break;
            case DCCH0_NB_IoT:
            case DCCH1_NB_IoT:
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                LOG_I(MAC,"DCCH PDU Here\n");
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                mac_rlc_data_ind(
                  module_id,
                  rnti,
                  module_id,
                  frame,
                  1,
                  0,
                  rx_lcids[i],
                  //1,/* change channel_id equals 1 (SRB) */
                  (char *)payload_ptr,
                  rx_lengths[i],
                  1,
                  NULL);//(unsigned int*)crc_status);
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                    // trigger DL scheduler
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                if (UE_info != NULL)
                {
                  UE_info->direction = 1; //1 for DL scheduler
                  LOG_I(MAC,"After receive Msg5, change the UE scheduling direction to DL\n");
                }

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          break;
            // all the DRBS
            case DTCH0_NB_IoT:
            default:
                //NB_IoT_mac_rlc_data_ind(payload_ptr,mac_inst,rnti);
          break;
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        }
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        payload_ptr+=rx_lengths[i];
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    }

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}

uint8_t *parse_ulsch_header_NB_IoT( uint8_t *mac_header,
                             uint8_t *num_ce,
                             uint8_t *num_sdu,
                             uint8_t *rx_ces,
                             uint8_t *rx_lcids,
                             uint16_t *rx_lengths,
                             uint16_t tb_length ){

uint8_t not_done=1, num_ces=0, num_sdus=0, lcid,num_sdu_cnt;
uint8_t *mac_header_ptr = mac_header;
uint16_t length, ce_len=0;

  while(not_done==1){

    if(((SCH_SUBHEADER_FIXED_NB_IoT*)mac_header_ptr)->E == 0){
      not_done = 0;
    }

    lcid = ((SCH_SUBHEADER_FIXED_NB_IoT*)mac_header_ptr)->LCID;

    if(lcid < EXTENDED_POWER_HEADROOM){
      if (not_done==0) { // last MAC SDU, length is implicit
        mac_header_ptr++;
        length = tb_length-(mac_header_ptr-mac_header)-ce_len;

        for(num_sdu_cnt=0; num_sdu_cnt < num_sdus ; num_sdu_cnt++){
          length -= rx_lengths[num_sdu_cnt];
        }
      }else{
        if(((SCH_SUBHEADER_SHORT_NB_IoT *)mac_header_ptr)->F == 0){
          length = ((SCH_SUBHEADER_SHORT_NB_IoT *)mac_header_ptr)->L;
          mac_header_ptr += 2;//sizeof(SCH_SUBHEADER_SHORT);
        }else{ // F = 1
          length = ((((SCH_SUBHEADER_LONG_NB_IoT *)mac_header_ptr)->L_MSB & 0x7f ) << 8 ) | (((SCH_SUBHEADER_LONG_NB_IoT *)mac_header_ptr)->L_LSB & 0xff);
          mac_header_ptr += 3;//sizeof(SCH_SUBHEADER_LONG);
        }
      }

      rx_lcids[num_sdus] = lcid;
      rx_lengths[num_sdus] = length;
      num_sdus++;
    }else{ // This is a control element subheader POWER_HEADROOM, BSR and CRNTI
      if(lcid == SHORT_PADDING){
        mac_header_ptr++;
      }else{
        rx_ces[num_ces] = lcid;
        num_ces++;
        mac_header_ptr++;

        if(lcid==LONG_BSR){
          ce_len+=3;
        }else if(lcid==CRNTI){
          ce_len+=2;
        }else if((lcid==POWER_HEADROOM) || (lcid==TRUNCATED_BSR)|| (lcid== SHORT_BSR)) {
          ce_len++;
        }else{
          // wrong lcid
        }
      }
    }
  }

  *num_ce = num_ces;
  *num_sdu = num_sdus;

  return(mac_header_ptr);
}

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void fill_DCI_N0(DCIFormatN0_t *DCI_N0, UE_TEMPLATE_NB_IoT *UE_info, UE_SCHED_CTRL_NB_IoT_t *UE_sched_ctrl_info)
{
    DCI_N0->type = 0;
    DCI_N0->scind = UE_sched_ctrl_info->dci_n0_index_subcarrier;
    DCI_N0->ResAssign = UE_sched_ctrl_info->dci_n0_index_ru;
    DCI_N0->mcs = UE_sched_ctrl_info->dci_n0_index_mcs;
    DCI_N0->ndi = UE_sched_ctrl_info->dci_n0_index_ndi;
    DCI_N0->Scheddly = UE_sched_ctrl_info->dci_n0_index_delay;
    DCI_N0->RepNum = UE_sched_ctrl_info->dci_n0_index_R_data;
    DCI_N0->rv = (UE_info->HARQ_round%2==0)?0:1; // rv will loop 0 & 2
    DCI_N0->DCIRep = get_DCI_REP(UE_sched_ctrl_info->R_dci,UE_info->R_max);
    //DCI_N0->DCIRep = UE_sched_ctrl_info->dci_n0_index_R_dci;
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    LOG_I(MAC,"[fill_DCI_N0] Type %d scind %d I_ru %d I_mcs %d ndi %d I_delay %d I_rep %d RV %d I_dci %d\n", DCI_N0->type, DCI_N0->scind, DCI_N0->ResAssign, DCI_N0->mcs, DCI_N0->ndi, DCI_N0->Scheddly, DCI_N0->RepNum, DCI_N0->rv, DCI_N0->DCIRep);
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}