Commit 99e41d97 authored by knopp's avatar knopp

DL and UL DCI separation in MAC, initial handling of UL DCI in L1.

parent 094d1f5a
......@@ -31,7 +31,7 @@
#include <netinet/in.h>
#include <arpa/inet.h>
#include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "nfapi_vnf_interface.h"
#include "nfapi.h"
#include "vendor_ext.h"
......
......@@ -16,26 +16,7 @@
#define NFAPI_NR_MAX_NB_CORESETS 12
#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40
// Extension to the generic structures for single tlv values
typedef struct {
nfapi_tl_t tl;
int32_t value;
} nfapi_int32_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint32_t value;
} nfapi_uint32_tlv_t;
/*typedef struct {
nfapi_tl_t tl;
int64_t value;
} nfapi_int64_tlv_t;*/
typedef struct {
nfapi_tl_t tl;
uint64_t value;
} nfapi_uint64_tlv_t;
// nFAPI enums
......@@ -413,11 +394,6 @@ typedef enum {
NFAPI_NR_MCS_TABLE_QAM256
} nfapi_nr_pdsch_mcs_table_e;
typedef enum {
NFAPI_NR_DMRS_TYPE1=0,
NFAPI_NR_DMRS_TYPE2
} nfapi_nr_dmrs_type_e;
// P7 Sub Structures
/*
......
......@@ -22,6 +22,33 @@
#define NFAPI_MAX_NUM_GROUPS 8
#define NFAPI_MAX_NUM_CB 8
// Extension to the generic structures for single tlv values
typedef struct {
nfapi_tl_t tl;
int32_t value;
} nfapi_int32_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint32_t value;
} nfapi_uint32_tlv_t;
typedef struct {
nfapi_tl_t tl;
int64_t value;
} nfapi_int64_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint64_t value;
} nfapi_uint64_tlv_t;
typedef enum {
NFAPI_NR_DMRS_TYPE1=0,
NFAPI_NR_DMRS_TYPE2
} nfapi_nr_dmrs_type_e;
typedef struct {
/// Value: 0 -> 1, 0: Payload is carried directly in the value field, 1: Pointer to payload is in the value field
uint16_t tag;
......
......@@ -238,49 +238,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
gNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration
return (0);
}
/*
void phy_config_request(PHY_Config_t *phy_config) {
uint8_t Mod_id = phy_config->Mod_id;
int CC_id = phy_config->CC_id;
nfapi_nr_config_request_t *cfg = phy_config->cfg;
NR_DL_FRAME_PARMS *fp;
PHICH_RESOURCE_t phich_resource_table[4]={oneSixth,half,one,two};
int eutra_band = cfg->nfapi_config.rf_bands.rf_band[0];
int dl_Bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
int ul_Bandwidth = cfg->rf_config.ul_carrier_bandwidth.value;
int Nid_cell = cfg->sch_config.physical_cell_id.value;
int Ncp = cfg->subframe_config.dl_cyclic_prefix_type.value;
int p_eNB = cfg->rf_config.tx_antenna_ports.value;
uint32_t dl_CarrierFreq = cfg->nfapi_config.earfcn.value;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,Ncp %d,DL freq %u)\n",
Mod_id, CC_id, eutra_band, dl_Bandwidth, ul_Bandwidth, Nid_cell, p_eNB,Ncp,dl_CarrierFreq );
AssertFatal(RC.gNB != NULL, "PHY instance pointer doesn't exist\n");
AssertFatal(RC.gNB[Mod_id] != NULL, "PHY instance %d doesn't exist\n",Mod_id);
AssertFatal(RC.gNB[Mod_id][CC_id] != NULL, "PHY instance %d, CCid %d doesn't exist\n",Mod_id,CC_id);
if (RC.gNB[Mod_id][CC_id]->configured == 1)
{
LOG_E(PHY,"Already eNB already configured, do nothing\n");
return;
}
RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
fp = &RC.gNB[Mod_id][CC_id]->frame_parms;
fp->threequarter_fs = 0;
nr_init_frame_parms(fp,1);
RC.gNB[Mod_id][CC_id]->configured = 1;
LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);
}*/
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
......
......@@ -155,6 +155,7 @@ void nr_pdcch_scrambling(uint32_t *in,
}
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
......@@ -169,14 +170,19 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nr_reg_t reg_mapping_list[NR_MAX_PDCCH_AGG_LEVEL*NR_NB_REG_PER_CCE];
/*First iteration: single DCI*/
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &pdcch_pdu->pdcch_pdu_rel15;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15;
// find coreset descriptor
int rb_offset;
int n_rb;
AssertFatal(pdcch_pdu==NULL || ul_dci_pdu==NULL,"Can't handle both DL and UL DCI in same slot\n");
if (pdcch_pdu) pdcch_pdu_rel15 = &pdcch_pdu->pdcch_pdu_rel15;
else if (ul_dci_pdu) pdcch_pdu_rel15 = &ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15;
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
// compute rb_offset and n_prb based on frequency allocation
......
......@@ -29,7 +29,8 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB);
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_vars,
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
......
......@@ -234,7 +234,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->Payload[i];
memset((void*)dci_pdu,0,2*sizeof(uint64_t));
int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->RNTI[i],gNB,SEARCH_EXIST_OR_FREE);
if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
......@@ -262,3 +262,24 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
}
}
void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
int frame,
int slot) {
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15;
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->Payload[i];
// if there's no DL DCI then generate CCE list
if (gNB->pdcch_pdu) nr_fill_cce_list(gNB,0);
/*
LOG_D(PHY, "DCI PDU: [0]->0x%lx \t [1]->0x%lx \n",dci_pdu[0], dci_pdu[1]);
LOG_D(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
*/
}
}
......@@ -623,8 +623,9 @@ typedef struct PHY_VARS_gNB_s {
//Sched_Rsp_t Sched_INFO;
nfapi_nr_ul_tti_request_t UL_tti_req;
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu;
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu;
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu;
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
nfapi_nr_dl_tti_ssb_pdu *ssb_pdu;
int num_pdsch_rnti;
NR_gNB_PBCH pbch;
......
......@@ -35,7 +35,6 @@
#include "PHY/impl_defs_top.h"
#include "defs_common.h"
#include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "impl_defs_nr.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
......@@ -227,10 +226,10 @@ typedef struct {
typedef struct NR_DL_FRAME_PARMS {
/// frequency range
nr_frequency_range_e freq_range;
/// Placeholder to replace overlapping fields below
nfapi_nr_rf_config_t rf_config;
// /// Placeholder to replace overlapping fields below
// nfapi_nr_rf_config_t rf_config;
/// Placeholder to replace SSB overlapping fields below
nfapi_nr_sch_config_t sch_config;
// nfapi_nr_sch_config_t sch_config;
/// Number of resource blocks (RB) in DL
int N_RB_DL;
/// Number of resource blocks (RB) in UL
......
......@@ -102,6 +102,20 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
}
void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
int frame, int slot,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu) {
LOG_D(PHY,"Frame %d, Slot %d: UL DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci);
// copy dci configuration into gNB structure
gNB->ul_dci_pdu = ul_dci_request_pdu;
nr_fill_ul_dci(gNB,frame,slot);
}
void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
......@@ -122,6 +136,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
nfapi_nr_dl_tti_request_t *DL_req = Sched_INFO->DL_req;
nfapi_nr_tx_data_request_t *TX_req = Sched_INFO->TX_req;
nfapi_nr_ul_tti_request_t *UL_tti_req = Sched_INFO->UL_tti_req;
nfapi_nr_ul_dci_request_t *UL_dci_req = Sched_INFO->UL_dci_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
......@@ -132,6 +147,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
uint8_t number_dl_pdu = DL_req->dl_tti_request_body.nPDUs;
uint8_t number_ul_pdu = UL_tti_req->n_pdus;
uint8_t number_ul_dci_pdu = UL_dci_req->numPdus;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d%d DL_req:SFN/SLO:%04d%d:dl_pdu:%d tx_req:SFN/SLOT:%04d%d:pdus:%d \n",
......@@ -186,17 +202,11 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
memcpy(&gNB->UL_tti_req,UL_tti_req,sizeof(nfapi_nr_ul_tti_request_t));
/*
// this is done in phy_procedures_gNB_uespec_RX now
for (i=0;i<number_ul_pdu;i++) {
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,UL_tti_req->pdus_list[i].PDUType);
switch (UL_tti_req->pdus_list[i].PDUType) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
{
nfapi_nr_pusch_pdu_t *pusch_pdu = &UL_tti_req->pdus_list[0].pusch_pdu;
nr_fill_ulsch(gNB,frame,slot,pusch_pdu);
}
}
for (int i=0;i<number_ul_dci_pdu;i++) {
handle_nfapi_nr_ul_dci_pdu(gNB,
frame, slot,
&UL_dci_req->ul_dci_pdu_list[i]);
}
*/
}
......@@ -33,7 +33,7 @@
#include "PHY/defs_eNB.h"
#include "PHY/phy_extern.h"
#include "SCHED/sched_eNB.h"
#include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "fapi_nr_l1.h"
#include "nfapi_pnf.h"
#include "common/utils/LOG/log.h"
......
......@@ -112,35 +112,35 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
if(rel_slot<10 && rel_slot>=0) {
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + 2*rel_slot; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + 2*rel_slot; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
txdataF[0],
AMP,
ssb_start_symbol,
n_hf,fp->Lmax,ssb_index,
frame, cfg, fp);
}
}
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
if (fp->Lmax == 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
gNB->ssb_pdu,
gNB->nr_pbch_interleaver,
txdataF[0],
AMP,
ssb_start_symbol,
n_hf,fp->Lmax,ssb_index,
frame, cfg, fp);
}
}
}
}
......@@ -172,7 +172,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,1);
if (nfapi_mode == 0 || nfapi_mode == 1) {
if (!(frame%ssb_frame_periodicity)) // generate SSB only for given frames according to SSB periodicity
if ((!(frame%ssb_frame_periodicity)) && (gNB->ssb_pdu)) // generate SSB only for given frames according to SSB periodicity
nr_common_signal_procedures(gNB,frame, slot);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX,0);
......@@ -183,10 +183,12 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
if (gNB->pdcch_pdu) nr_generate_dci_top(gNB->pdcch_pdu,
gNB->nr_gold_pdcch_dmrs[slot],
gNB->common_vars.txdataF[0],
AMP, *fp);
if (gNB->pdcch_pdu || gNB->ul_dci_pdu) nr_generate_dci_top(gNB->pdcch_pdu,
gNB->ul_dci_pdu,
gNB->nr_gold_pdcch_dmrs[slot],
gNB->common_vars.txdataF[0],
AMP, *fp);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
LOG_D(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti);
......
......@@ -77,7 +77,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0];
nfapi_nr_ul_tti_request_t *UL_tti_req = &gNB->UL_tti_req[0];
nfapi_nr_ul_dci_request_t *ul_dci_req = &gNB->ul_dci_req[0];
nfapi_nr_ul_dci_request_t *UL_dci_req = &gNB->UL_dci_req[0];
nfapi_nr_tx_data_request_t *TX_req = &gNB->TX_req[0];
gNB->pdu_index[CC_idP] = 0;
......@@ -90,9 +90,9 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req[CC_idP].dl_tti_request_body.nGroup = 0;
//DL_req[CC_idP].dl_tti_request_body.transmission_power_pcfich = 6000;
ul_dci_req[CC_idP].SFN = frameP;
ul_dci_req[CC_idP].Slot = slotP;
ul_dci_req[CC_idP].numPdus = 0;
UL_dci_req[CC_idP].SFN = frameP;
UL_dci_req[CC_idP].Slot = slotP;
UL_dci_req[CC_idP].numPdus = 0;
UL_tti_req[CC_idP].SFN = frameP;
UL_tti_req[CC_idP].Slot = slotP;
......@@ -368,7 +368,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Phytest scheduling
if (slot_rxP==2){
nr_schedule_uss_ulsch_phytest(&RC.nrmac[module_idP]->UL_tti_req[0], frame_rxP, slot_rxP);
nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
}
if (slot_txP==1){
......
......@@ -85,10 +85,10 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
if (mib_sdu_length > 0) {
LOG_D(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->nPDUs, mib_sdu_length);
LOG_I(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->nPDUs, mib_sdu_length);
if ((frameP & 1023) < 80){
LOG_D(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
LOG_I(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
}
dl_config_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
......@@ -103,7 +103,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon!=NULL,"scc->downlinkConfigCommonL is null\n");
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL is null\n");
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB!=NULL,"scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB is null\n");
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count!=1,"Frequency Band list does not have 1 element (%d)\n",cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count);
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count==1,"Frequency Band list does not have 1 element (%d)\n",cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.count);
AssertFatal(cc->ServingCellConfigCommon->ssbSubcarrierSpacing,"ssbSubcarrierSpacing is null\n");
AssertFatal(cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],"band is null\n");
long band = *cc->ServingCellConfigCommon->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
......
......@@ -335,60 +335,61 @@ int configure_fapi_dl_Tx(int Mod_idP,
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
scc->dmrs_TypeA_Position,
pdsch_pdu_rel15->NrOfSymbols);
dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
dci_pdu_rel15[0].frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbStart,
pdsch_pdu_rel15->rbSize,
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
dci_pdu_rel15[0].time_domain_assignment = time_domain_assignment; // row index used here instead of SLIV;
dci_pdu_rel15[0].vrb_to_prb_mapping = 1;
dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
dci_pdu_rel15[0].tb_scaling = 1;
dci_pdu_rel15[0].ra_preamble_index = 25;
dci_pdu_rel15[0].format_indicator = 1;
dci_pdu_rel15[0].ndi = 1;
dci_pdu_rel15[0].rv = 0;
dci_pdu_rel15[0].harq_pid = 0;
dci_pdu_rel15[0].dai = 2;
dci_pdu_rel15[0].tpc = 2;
dci_pdu_rel15[0].pucch_resource_indicator = 7;
dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = 7;
LOG_I(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
dci_pdu_rel15[0].frequency_domain_assignment,
dci_pdu_rel15[0].time_domain_assignment,
dci_pdu_rel15[0].vrb_to_prb_mapping,
dci_pdu_rel15[0].mcs,
dci_pdu_rel15[0].tb_scaling,
dci_pdu_rel15[0].ndi,
dci_pdu_rel15[0].rv);
nr_configure_pdcch(pdcch_pdu_rel15,
1, // ue-specific
scc,
bwp);
pdcch_pdu_rel15->numDlDci = 1;
pdcch_pdu_rel15->AggregationLevel[0] = 4;
pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0];
pdcch_pdu_rel15->CceIndex[0] = 0;
pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0;
pdcch_pdu_rel15->powerControlOffsetSS[0]=1;
int dci_formats[pdcch_pdu_rel15->numDlDci];
int rnti_types[pdcch_pdu_rel15->numDlDci];
dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
rnti_types[0] = NR_RNTI_C;
config_uldci(pdcch_pdu_rel15, &dci_pdu_rel15[pdcch_pdu_rel15->numDlDci], dci_formats, rnti_types);
for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
pdcch_pdu_rel15->PayloadSizeBits[i]=nr_dci_size(dci_formats[i],rnti_types[i],pdsch_pdu_rel15->BWPSize);
fill_dci_pdu_rel15(pdcch_pdu_rel15,&dci_pdu_rel15[i],dci_formats,rnti_types);
}
LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \
dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
dci_pdu_rel15[0].frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbStart,
pdsch_pdu_rel15->rbSize,
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
dci_pdu_rel15[0].time_domain_assignment = time_domain_assignment; // row index used here instead of SLIV;
dci_pdu_rel15[0].vrb_to_prb_mapping = 1;
dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
dci_pdu_rel15[0].tb_scaling = 1;
dci_pdu_rel15[0].ra_preamble_index = 25;
dci_pdu_rel15[0].format_indicator = 1;
dci_pdu_rel15[0].ndi = 1;
dci_pdu_rel15[0].rv = 0;
dci_pdu_rel15[0].harq_pid = 0;
dci_pdu_rel15[0].dai = 2;
dci_pdu_rel15[0].tpc = 2;
dci_pdu_rel15[0].pucch_resource_indicator = 7;
dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = 7;
LOG_I(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
dci_pdu_rel15[0].frequency_domain_assignment,
dci_pdu_rel15[0].time_domain_assignment,
dci_pdu_rel15[0].vrb_to_prb_mapping,
dci_pdu_rel15[0].mcs,
dci_pdu_rel15[0].tb_scaling,
dci_pdu_rel15[0].ndi,
dci_pdu_rel15[0].rv);
nr_configure_pdcch(pdcch_pdu_rel15,
1, // ue-specific
scc,
bwp);
pdcch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pdcch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
pdcch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
pdcch_pdu_rel15->numDlDci = 1;
pdcch_pdu_rel15->AggregationLevel[0] = 4;
pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0];
pdcch_pdu_rel15->CceIndex[0] = 0;
pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0;
pdcch_pdu_rel15->powerControlOffsetSS[0]=1;
int dci_formats[2];
int rnti_types[2];
dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
rnti_types[0] = NR_RNTI_C;
pdcch_pdu_rel15->PayloadSizeBits[0]=nr_dci_size(dci_formats[0],rnti_types[0],pdcch_pdu_rel15->BWPSize);
LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \
coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n",
pdcch_pdu_rel15->RNTI[0],
rnti_types[0],
......@@ -426,7 +427,7 @@ int configure_fapi_dl_Tx(int Mod_idP,
return TBS/8; //Return TBS in bytes
}
void config_uldci(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, int *rnti_types) {
void config_uldci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, int *rnti_types) {
dci_pdu_rel15->frequency_domain_assignment = 0; // PRBalloc_to_locationandbandwidth0(0,50,NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275)); // to be changed with UL bwp
dci_pdu_rel15->time_domain_assignment = 2; // row index used here instead of SLIV;
......@@ -672,12 +673,32 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
}
void nr_schedule_uss_ulsch_phytest(nfapi_nr_ul_tti_request_t *UL_tti_req,
void nr_schedule_uss_ulsch_phytest(int Mod_idP,
frame_t frameP,
sub_frame_t slotP) {
//gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
//nfapi_nr_ul_tti_request_t *UL_tti_req;
uint16_t rnti = 0x1234;
gNB_MAC_INST *nr_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = nr_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int bwp_id=1;
int UE_id = 0;
NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id];
AssertFatal(secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
"downlinkBWP_ToAddModList has %d BWP!\n",
secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
uint16_t rnti = UE_list->rnti[UE_id];
nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu;
for (uint8_t CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_D(MAC, "Scheduling UE specific PUSCH for CC_id %d\n",CC_id);
......@@ -758,4 +779,29 @@ void nr_schedule_uss_ulsch_phytest(nfapi_nr_ul_tti_request_t *UL_tti_req,
//beamforming
//pusch_pdu->beamforming; //not used for now
}
ul_dci_request_pdu = &UL_dci_req->ul_dci_pdu_list[UL_dci_req->numPdus];
memset((void*)ul_dci_request_pdu,0,sizeof(nfapi_nr_ul_dci_request_pdus_t));
ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
int dci_formats[2];
int rnti_types[2];
dci_formats[0] = NR_UL_DCI_FORMAT_0_0;
rnti_types[0] = NR_RNTI_C;
nr_configure_pdcch(pdcch_pdu_rel15,
1, // ue-specific,
scc,
bwp);
dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
config_uldci(pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types);
pdcch_pdu_rel15->PayloadSizeBits[0]=nr_dci_size(dci_formats[0],rnti_types[0],pdcch_pdu_rel15->BWPSize);
fill_dci_pdu_rel15(pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types);
}
......@@ -69,7 +69,7 @@ int configure_fapi_dl_Tx(int Mod_id,
nfapi_nr_dl_tti_request_body_t *dl_req,
nfapi_nr_pdu_t *TX_req);
void config_uldci(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
void config_uldci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
dci_pdu_rel15_t *dci_pdu_rel15,
int *dci_formats,
int *rnti_types);
......@@ -79,7 +79,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
sub_frame_t slotP,
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_config);
void nr_schedule_uss_ulsch_phytest(nfapi_nr_ul_tti_request_t *UL_tti_req,
void nr_schedule_uss_ulsch_phytest(int Mod_idP,
frame_t frameP,
sub_frame_t slotP);
......
......@@ -47,7 +47,6 @@
#include "NR_ServingCellConfigCommon.h"
#include "NR_MeasConfig.h"
#include "nfapi_nr_interface.h"
#include "nfapi_nr_interface_scf.h"
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
......@@ -145,7 +144,7 @@ typedef struct gNB_MAC_INST_s {
/// NFAPI UL TTI Request Structure (this is from the new SCF specs)
nfapi_nr_ul_tti_request_t UL_tti_req[NFAPI_CC_MAX];
/// NFAPI HI/DCI0 Config Request Structure
nfapi_nr_ul_dci_request_t ul_dci_req[NFAPI_CC_MAX];
nfapi_nr_ul_dci_request_t UL_dci_req[NFAPI_CC_MAX];
/// NFAPI DL PDU structure
nfapi_nr_tx_data_request_t TX_req[NFAPI_CC_MAX];
NR_UE_list_t UE_list;
......
......@@ -273,7 +273,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
handle_nr_cqi(UL_info);
handle_nr_harq(UL_info);
// clear HI prior to handling ULSCH
mac->ul_dci_req[CC_id].numPdus = 0;
mac->UL_dci_req[CC_id].numPdus = 0;