Commit cfbe18c9 authored by Guido Casati's avatar Guido Casati 🇮🇹 Committed by Guido Casati

Adaptation of MAC TA procedures to the design of handle_dlsch

- introduced new parameter in nr_ue_dl_indication for UL time alignment
- moved TA timer logic one level up so that now is executed every slot
- set timer value to 80 slots to cope with the sl_ahead design
- introduced new TA-related members to gNB MAC instance struct
parent a0cd4494
......@@ -614,7 +614,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
rx_ind.number_pdus = 1; //rx_ind.number_pdus++;
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication);
ue->if_inst->dl_indication(&dl_indication, NULL);
return 0;
}
......@@ -871,12 +871,12 @@ typedef struct UE_NR_SCAN_INFO_s {
int32_t freq_offset_Hz[3][10];
} UE_NR_SCAN_INFO_t;
typedef struct {
typedef struct NR_UL_TIME_ALIGNMENT {
/// flag used by MAC to inform PHY about a TA to be applied
unsigned char apply_ta;
/// frame and slot when to apply the TA as stated in TS 38.213 setion 4.2
int16_t ta_frame;
char ta_slot;
int16_t ta_frame;
char ta_slot;
/// TA command and TAGID received from the gNB
uint8_t ta_command;
uint8_t tag_id;
......
......@@ -3161,7 +3161,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,
dl_indication.dci_ind = &dci_ind;
// send to mac
ue->if_inst->dl_indication(&dl_indication);
ue->if_inst->dl_indication(&dl_indication, NULL);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_rx_pdcch_stats);
......@@ -3368,7 +3368,7 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
uint16_t s0 = dlsch0->harq_processes[harq_pid]->start_symbol;
uint16_t s1 = dlsch0->harq_processes[harq_pid]->nb_symbols;
LOG_I(PHY,"[UE %d] PDSCH type %d active in nr_tti_rx %d, harq_pid %d, rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d\n",ue->Mod_id,pdsch,nr_tti_rx,harq_pid,pdsch_start_rb,pdsch_nb_rb,s0,s1);
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_tti_rx %d, harq_pid %d, rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d\n",ue->Mod_id,pdsch,nr_tti_rx,harq_pid,pdsch_start_rb,pdsch_nb_rb,s0,s1);
for (m = s0; m < (s1 + s0); m++) {
......@@ -3535,7 +3535,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
int ret=0, ret1=0;
uint8_t CC_id = ue->CC_id;
NR_UE_PDSCH *pdsch_vars;
uint8_t is_cw0_active = 0;
uint8_t is_cw1_active = 0;
......@@ -3548,7 +3547,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
fapi_nr_rx_indication_t rx_ind;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[eNB_id];
unsigned char *apply_ta = &ul_time_alignment->apply_ta;
uint16_t slots_per_frame = ue->frame_parms.slots_per_frame;
uint16_t slots_per_subframe = ue->frame_parms.slots_per_subframe;
uint8_t numerology = ue->frame_parms.numerology_index, mapping_type_ul, mapping_type_dl;
......@@ -3821,7 +3819,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
dl_indication.dci_ind = NULL; //&ue->dci_ind;
// send to mac
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication);
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
}
// TODO CRC check for CW0
......@@ -3858,46 +3856,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}*/
if (ue->mac_enabled == 1) {
switch (pdsch) {
case PDSCH:
printf("PDSCH procedures\n");
nr_ue_send_sdu(ue->Mod_id,
CC_id,
frame_rx,
nr_tti_rx,
dlsch0->harq_processes[harq_pid]->b,
dlsch0->harq_processes[harq_pid]->TBS>>3,
eNB_id,
ul_time_alignment);
break;
case SI_PDSCH:
/*ue_decode_si(ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
ue->dlsch_SI[eNB_id]->harq_processes[0]->b,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);*/
break;
case P_PDSCH:
/*ue_decode_p(ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
ue->dlsch_SI[eNB_id]->harq_processes[0]->b,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);*/
break;
case RA_PDSCH:
/*process_rar(ue,proc,eNB_id,mode,abstraction_flag);*/
break;
case PDSCH1:
/*LOG_E(PHY,"Shouldn't have PDSCH1 yet, come back later\n");
AssertFatal(1==0,"exiting");*/
break;
case PMCH:
/*LOG_E(PHY,"Shouldn't have PMCH here\n");
AssertFatal(1==0,"exiting");*/
break;
}
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
switch (ue->frame_parms.N_RB_DL) {
......
......@@ -137,7 +137,7 @@ uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t
@returns void
*/
void nr_ue_send_sdu(module_id_t module_idP,uint8_t CC_id, frame_t frameP, uint8_t ttiP,
uint8_t * pdu, uint16_t pdu_len, uint8_t eNB_index, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment);
uint8_t * pdu, uint16_t pdu_len, uint8_t gNB_index, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment);
void nr_ue_process_mac_pdu(
module_id_t module_idP,
......
......@@ -2047,9 +2047,10 @@ void nr_ue_send_sdu(module_id_t module_idP,
uint8_t CC_id,
frame_t frameP,
uint8_t ttiP,
uint8_t * pdu, uint16_t pdu_len, uint8_t eNB_index, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
uint8_t * pdu, uint16_t pdu_len, uint8_t gNB_index,
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
printf("nr_ue_send_sdu frame %d\n", frameP);
LOG_D(MAC, "Handling PDU frame %d slot %d\n", frameP, ttiP);
// Changes wrt LTE: replaced subframeP with ttiP
// TODO double check this and eventually create a type for TTI (tti_t)
......@@ -2077,8 +2078,8 @@ void nr_ue_send_sdu(module_id_t module_idP,
/*
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE %d] ue_send_sdu : Frame %d eNB_index %d : num_ce %d num_sdu %d\n",
module_idP, frameP, eNB_index, num_ce, num_sdu);
LOG_D(MAC, "[UE %d] ue_send_sdu : Frame %d gNB_index %d : num_ce %d num_sdu %d\n",
module_idP, frameP, gNB_index, num_ce, num_sdu);
#endif
*/
......@@ -2094,7 +2095,7 @@ void nr_ue_send_sdu(module_id_t module_idP,
// Processing MAC PDU
// it parses MAC CEs subheaders, MAC CEs, SDU subheaderds and SDUs
nr_ue_process_mac_pdu(module_idP, CC_id, pduP, pdu_len, eNB_index, ul_time_alignment);
nr_ue_process_mac_pdu(module_idP, CC_id, pduP, pdu_len, gNB_index, ul_time_alignment);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_OUT);
......@@ -2110,7 +2111,7 @@ void nr_ue_process_mac_pdu(
uint8_t CC_id,
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index,
uint8_t gNB_index,
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
// This function is adapting code from the old
......@@ -2411,213 +2412,3 @@ void nr_ue_process_mac_pdu(
AssertFatal(pdu_len >= 0, "[MAC] nr_ue_process_mac_pdu, residual mac pdu length < 0!\n");
}
}
//---------------------------------------------------------------------------------
unsigned char *parse_header(unsigned char *mac_header,
unsigned char *num_ce,
unsigned char *num_sdu,
unsigned char *rx_ces,
unsigned char *rx_lcids,
unsigned short *rx_lengths,
unsigned short tb_length)
{
unsigned char not_done = 1, num_ces = 0, num_cont_res =
0, num_padding = 0, num_sdus = 0, lcid, num_sdu_cnt;
unsigned char *mac_header_ptr = mac_header;
unsigned short length, ce_len = 0;
while (not_done == 1) {
if (((SCH_SUBHEADER_FIXED *) mac_header_ptr)->E == 0) {
// printf("E=0\n");
not_done = 0;
}
lcid = ((SCH_SUBHEADER_FIXED *) mac_header_ptr)->LCID;
if (lcid < UE_CONT_RES) {
//printf("[MAC][UE] header %x.%x.%x\n",mac_header_ptr[0],mac_header_ptr[1],mac_header_ptr[2]);
if (not_done == 0) { // last MAC SDU, length is implicit
mac_header_ptr++;
length =
tb_length - (mac_header_ptr - mac_header) - ce_len;
for (num_sdu_cnt = 0; num_sdu_cnt < num_sdus;
num_sdu_cnt++) {
length -= rx_lengths[num_sdu_cnt];
}
} else {
if (((SCH_SUBHEADER_LONG *) mac_header_ptr)->F == 1) {
length =
((((SCH_SUBHEADER_LONG *) mac_header_ptr)->
L_MSB & 0x7f)
<< 8) | (((SCH_SUBHEADER_LONG *) mac_header_ptr)->
L_LSB & 0xff);
mac_header_ptr += 3;
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] parse long sdu, size %x \n", length);
#endif
} else { //if (((SCH_SUBHEADER_SHORT *)mac_header_ptr)->F == 0) {
length = ((SCH_SUBHEADER_SHORT *) mac_header_ptr)->L;
mac_header_ptr += 2;
}
}
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] sdu %d lcid %d length %d (offset now %ld)\n",
num_sdus, lcid, length, mac_header_ptr - mac_header);
#endif
rx_lcids[num_sdus] = lcid;
rx_lengths[num_sdus] = length;
num_sdus++;
} else { // This is a control element subheader
if (lcid == SHORT_PADDING) {
num_padding++;
mac_header_ptr++;
} else {
rx_ces[num_ces] = lcid;
num_ces++;
mac_header_ptr++;
if (lcid == TIMING_ADV_CMD) {
ce_len++;
} else if (lcid == UE_CONT_RES) {
// FNA: check MAC Header is one of thoses defined in Annex B of 36.321
// Check there is only 1 Contention Resolution
if (num_cont_res) {
LOG_W(MAC,
"[UE] Msg4 Wrong received format: More than 1 Contention Resolution\n");
// exit parsing
return NULL;
}
// UE_CONT_RES shall never be the last subheader unless this is the only MAC subheader
if ((not_done == 0)
&& ((num_sdus) || (num_ces > 1) || (num_padding))) {
LOG_W(MAC,
"[UE] Msg4 Wrong received format: Contention Resolution after num_ces=%d num_sdus=%d num_padding=%d\n",
num_ces, num_sdus, num_padding);
// exit parsing
return NULL;
}
num_cont_res++;
ce_len += 6;
}
}
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] ce %d lcid %d (offset now %ld)\n", num_ces,
lcid, mac_header_ptr - mac_header);
#endif
}
}
*num_ce = num_ces;
*num_sdu = num_sdus;
return (mac_header_ptr);
}
//------------------------------------------------------------------------------
void
nr_ue_send_sdu(module_id_t module_idP,
uint8_t CC_id,
frame_t frameP,
sub_frame_t subframeP,
uint8_t * sdu, uint16_t sdu_len, uint8_t eNB_index)
//------------------------------------------------------------------------------
{
unsigned char rx_ces[MAX_NUM_CE], num_ce, num_sdu, i, *payload_ptr;
unsigned char rx_lcids[NB_RB_MAX];
unsigned short rx_lengths[NB_RB_MAX];
//LOG_D(MAC,"sdu: %x.%x.%x\n",sdu[0],sdu[1],sdu[2]);
payload_ptr =
parse_header(sdu, &num_ce, &num_sdu, rx_ces, rx_lcids, rx_lengths,
sdu_len);
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC,
"[UE %d] ue_send_sdu : Frame %d eNB_index %d : num_ce %d num_sdu %d\n",
module_idP, frameP, eNB_index, num_ce, num_sdu);
#endif
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_T(MAC, "[UE %d] First 32 bytes of DLSCH : \n", module_idP);
for (i = 0; i < 32; i++) {
LOG_T(MAC, "%x.", sdu[i]);
}
LOG_T(MAC, "\n");
#endif
if (payload_ptr != NULL) {
for (i = 0; i < num_ce; i++) {
// printf("ce %d : %d\n",i,rx_ces[i]);
switch (rx_ces[i]) {
case UE_CONT_RES:
break;
case TIMING_ADV_CMD:
break;
case DRX_CMD:
break;
}
}
for (i = 0; i < num_sdu; i++) {
#ifdef DEBUG_HEADER_PARSING
LOG_I(MAC, "[UE] SDU %d : LCID %d, length %d\n", i,
rx_lcids[i], rx_lengths[i]);
#endif
if ((rx_lcids[i] < NB_RB_MAX) && (rx_lcids[i] > DCCH1)) {
LOG_D(MAC,
"[UE %d] Frame %d : DLSCH -> DL-DTCH%d (eNB %d, %d bytes)\n",
module_idP, frameP, rx_lcids[i], eNB_index,
rx_lengths[i]);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I(MAC, "Printing MAC PDU contents at slot: %d \n", subframeP);
int j;
for (j = 0; j < 20; j++) //rx_lengths[i]
LOG_I(MAC, "%x.", (unsigned char) payload_ptr[j]);
LOG_I(MAC, "\n");
#endif
mac_rlc_data_ind(module_idP,
4660, //UE_mac_inst[module_idP].crnti //hardcode value corresponding to the one from the eNB
eNB_index,
frameP,
ENB_FLAG_NO,
MBMS_FLAG_NO,
rx_lcids[i],
(char *) payload_ptr, rx_lengths[i], 1,
NULL);
} else {
LOG_E(MAC, "[UE %d] Frame %d : unknown LCID %d (eNB %d)\n",
module_idP, frameP, rx_lcids[i], eNB_index);
}
payload_ptr += rx_lengths[i];
}
} // end if (payload_ptr != NULL)
}
......@@ -299,12 +299,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
protocol_ctxt_t ctxt;
int CC_id, i = -1;
UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list;
rnti_t rnti;
NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels;
//nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL;
int CC_id, i = -1, UE_id = 0, ta_update;
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list;
rnti_t rnti;
UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
NR_COMMON_channels_t *cc = gNB->common_channels;
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
......@@ -372,6 +372,20 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Phytest scheduling
// TODO once RACH is available, start ta_timer when UE is connected
if (ue_sched_ctl->ta_timer) ue_sched_ctl->ta_timer--;
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 4 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 80;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
gNB->ta_len = 2;
}
if (slot_rxP == NR_UPLINK_SLOT){
nr_schedule_uss_ulsch_phytest(&RC.nrmac[module_idP]->UL_tti_req[0], frame_rxP, slot_rxP);
}
......
......@@ -45,22 +45,22 @@
#include "NR_TAG-Id.h"
int nr_generate_dlsch_pdu(unsigned char *sdus_payload,
unsigned char *mac_pdu,
int nr_generate_dlsch_pdu(module_id_t module_idP,
unsigned char *sdus_payload,
unsigned char *mac_pdu,
unsigned char num_sdus,
unsigned short *sdu_lengths,
unsigned char *sdu_lcids,
unsigned char drx_cmd,
unsigned short timing_advance_cmd,
NR_TAG_Id_t tag_id,
int ta_length,
unsigned char *ue_cont_res_id,
unsigned short post_padding){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_MAC_SUBHEADER_FIXED *mac_pdu_ptr = (NR_MAC_SUBHEADER_FIXED *) mac_pdu;
unsigned char * dlsch_buffer_ptr = sdus_payload;
uint8_t last_size = 0;
int offset = 0, mac_ce_size, i;
int offset = 0, mac_ce_size, i, timing_advance_cmd, tag_id = 0;
// MAC CEs
uint8_t mac_header_control_elements[16], *ce_ptr;
......@@ -81,24 +81,31 @@ int nr_generate_dlsch_pdu(unsigned char *sdus_payload,
// now TA is always send when ta_timer resets regardless of its value
// this is done to avoid issues with the timeAlignmentTimer which is
// supposed to monitor if the UE received TA or not */
if (ta_length){
if (gNB->ta_len){
mac_pdu_ptr->R = 0;
mac_pdu_ptr->LCID = DL_SCH_LCID_TA_COMMAND;
//last_size = 1;
mac_pdu_ptr++;
// TA MAC CE (1 octet)
timing_advance_cmd = gNB->ta_command;
AssertFatal(timing_advance_cmd < 64,"timing_advance_cmd %d > 63\n", timing_advance_cmd);
((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND = timing_advance_cmd; //(timing_advance_cmd+31)&0x3f;
((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id;
if (gNB->tag->tag_Id != NULL){
tag_id = gNB->tag->tag_Id;
((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id;
}
LOG_D(MAC, "NR MAC CE timing advance command =%d (%d) TAG ID =%d\n", timing_advance_cmd, ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND, tag_id);
LOG_D(MAC, "NR MAC CE timing advance command = %d (%d) TAG ID = %d\n", timing_advance_cmd, ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND, tag_id);
mac_ce_size = sizeof(NR_MAC_CE_TA);
// Copying bytes for MAC CEs to the mac pdu pointer
memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size);
ce_ptr += mac_ce_size;
mac_pdu_ptr += (unsigned char) mac_ce_size;
// resetting ta flag
gNB->ta_len = 0;
}
......@@ -191,7 +198,7 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
uint16_t sdu_lengths[NR_MAX_NB_RB] = {0};
int padding = 0, post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0, ta_update;
int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0, ta_command;
// hardcoded parameters
// for DMRS configuration type 1
......@@ -201,45 +208,27 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
uint16_t R = 697;
uint16_t nb_rb = 50 ;
uint32_t TBS = nr_compute_tbs(Qm, R, nb_rb, 12, 6, 0, 1)/8; // this is in bits TODO use nr_get_tbs
NR_TAG_Id_t tag_id = 0;
int UE_id = 0; // UE_list->head is -1 !
UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
//ta_update = ue_sched_ctl->ta_update;
for (CC_id = 0; CC_id < RC.nb_nr_mac_CC[module_idP]; CC_id++) {
LOG_D(MAC, "doing nr_schedule_ue_spec for UE_id %d CC_id %d frame %d slot %d\n",
UE_id, CC_id, frameP, slotP);
LOG_D(MAC, "doing nr_schedule_ue_spec for UE_id %d CC_id %d frame %d slot %d\n", UE_id, CC_id, frameP, slotP);
dl_req = &gNB->DL_req[CC_id].dl_config_request_body;
//for (UE_id = UE_list->head; UE_id >= -1; UE_id = UE_list->next[UE_id]) {
// this was taken from the preprocessor
if (ue_sched_ctl->ta_timer) ue_sched_ctl->ta_timer--;
/*
//process retransmission
if (round != 8) {
} else { // This is a potentially new SDU opportunity */
if (ue_sched_ctl->ta_timer == 0) {
ta_update = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 20 NR_DOWNLINK_SLOT (20 frames)
// regardless of the TA value */
ue_sched_ctl->ta_timer = 2; //set to 20 when transmission will be in every slot
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
ta_len = 2;
} // else ta_update = 31;
//ta_len = (ta_update != 31) ? 2 : 0;
// retrieve TAG ID
if(gNB->tag->tag_Id != NULL ){
tag_id = gNB->tag->tag_Id;
}
// fill dlsch_buffer with random data
for (i = 0; i < MAX_NR_DLSCH_PAYLOAD_BYTES; i++){
dlsch_buffer[i] = (unsigned char) rand();
......@@ -305,17 +294,15 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
}
offset = nr_generate_dlsch_pdu((unsigned char *) dlsch_buffer,
(unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
num_sdus, //num_sdus
sdu_lengths,
sdu_lcids,
255, // no drx
ta_update, // timing advance
tag_id,
ta_len,
NULL, // contention res id
post_padding);
offset = nr_generate_dlsch_pdu(module_idP,
(unsigned char *) dlsch_buffer,
(unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
num_sdus, //num_sdus
sdu_lengths,
sdu_lcids,
255, // no drx
NULL, // contention res id
post_padding);
// Padding: fill remainder of DLSCH with 0
if (post_padding > 0){
for (int j = 0; j < (TBS - offset); j++)
......
......@@ -390,25 +390,6 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
post_padding = 1;
}
offset = generate_dlsch_header((unsigned char *)nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0], //DLSCH_pdu.payload[0],
num_sdus, //num_sdus
sdu_lengths, //
sdu_lcids, 255, // no drx
ta_update, // timing advance
NULL, // contention res id
padding, post_padding);
LOG_D(MAC, "Offset bits: %d \n", offset);
// Probably there should be other actions done before that
// cycle through SDUs and place in dlsch_buffer
//memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset], dlsch_buffer, sdu_length_total);
memcpy(&nr_mac->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0][offset], dlsch_buffer, sdu_length_total);
// fill remainder of DLSCH with 0
for (int j = 0; j < (TBS - sdu_length_total - offset); j++) {
//UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset + sdu_length_total + j] = 0;
nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0][offset + sdu_length_total + j] = 0;
}
TBS_bytes = configure_fapi_dl_Tx(dl_req, TX_req, cfg, &nr_mac->coreset[CC_id][1], &nr_mac->search_space[CC_id][1], nr_mac->pdu_index[CC_id], dlsch_config);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, , TBS size: %d \n \n", frameP, slotP, TBS_bytes);
......@@ -432,11 +413,6 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
else {
TBS_bytes = configure_fapi_dl_Tx(dl_req, TX_req, cfg, &nr_mac->coreset[CC_id][1], &nr_mac->search_space[CC_id][1], nr_mac->pdu_index[CC_id], dlsch_config);
for(int i = 0; i < TBS_bytes; i++) { //
((uint8_t *)nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0])[i] = (unsigned char) rand();
//LOG_I(MAC, "%x. ", ((uint8_t *)nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0])[i]);
}
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
if (frameP%100 == 0) {
......@@ -451,11 +427,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
//TX_req->segments[0].segment_length = 8;
TX_req->segments[0].segment_length = TBS_bytes +2;
TX_req->segments[0].segment_data = nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0];
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
}
} //for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
}
......
......@@ -71,15 +71,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frame_txP, sub_frame_t slot_txP,
frame_t frame_rxP, sub_frame_t slot_rxP);
int nr_generate_dlsch_pdu(unsigned char *sdus_payload,
int nr_generate_dlsch_pdu(module_id_t Mod_idP,
unsigned char *sdus_payload,
unsigned char *mac_pdu,
unsigned char num_sdus,
unsigned short *sdu_lengths,
unsigned char *sdu_lcids,
unsigned char drx_cmd,
unsigned short timing_advance_cmd,
NR_TAG_Id_t tag_id,
int ta_length,
unsigned char *ue_cont_res_id,
unsigned short post_padding);
......
......@@ -114,6 +114,10 @@ typedef struct gNB_MAC_INST_s {
NR_TAG_t *tag;
/// Pointer to IF module instance for PHY
NR_IF_Module_t *if_inst;
/// TA command
int ta_command;
/// MAC CE flag indicating TA length
int ta_len;
/// Common cell resources
NR_COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,DLSCH)
......
......@@ -30,6 +30,7 @@
* \warning
*/
#include "PHY/defs_nr_UE.h"
#include "NR_IF_Module.h"
#include "mac_proto.h"
#include "assertions.h"
......@@ -71,22 +72,23 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr
}
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len, frame_t frame, int slot){
LOG_I(MAC, "handle_dlsch at MAC layer \n");
if (IS_SOFTMODEM_NOS1)
nr_ue_send_sdu(module_id, 0, frame, slot,
pduP,
pdu_len,
0);
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len, frame_t frame, int slot, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
if (IS_SOFTMODEM_NOS1 || IS_SOFTMODEM_RFSIM)
nr_ue_send_sdu(module_id, cc_id, frame, slot,
pduP,
pdu_len,
gNB_index,
ul_time_alignment);
return 0;
/*
return nr_ue_process_dlsch( module_id,
cc_id,
gNB_index,
dci_ind,
pduP,
pdu_len);
return nr_ue_process_dlsch(module_id,
cc_id,
gNB_index,
dci_ind,