phy_procedures_lte_ue.c 154 KB
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/*******************************************************************************
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    OpenAirInterface
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    Copyright(c) 1999 - 2014 Eurecom
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    OpenAirInterface is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
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    OpenAirInterface is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with OpenAirInterface.The full GNU General Public License is
    included in this distribution in the file called "COPYING". If not,
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    see <http://www.gnu.org/licenses/>.
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  Contact Information
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  OpenAirInterface Admin: openair_admin@eurecom.fr
  OpenAirInterface Tech : openair_tech@eurecom.fr
  OpenAirInterface Dev  : openair4g-devel@eurecom.fr
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  Address      : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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 *******************************************************************************/
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/*! \file phy_procedures_lte_ue.c
 * \brief Implementation of UE procedures from 36.213 LTE specifications
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 * \author R. Knopp, F. Kaltenberger, N. Nikaein
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 * \date 2011
 * \version 0.1
 * \company Eurecom
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 * \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr, navid.nikaein@eurecom.fr
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 * \note
 * \warning
 */

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#include "assertions.h"
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#include "defs.h"
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "MAC_INTERFACE/defs.h"
#include "MAC_INTERFACE/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"

#ifdef EMOS
#include "SCHED/phy_procedures_emos.h"
#endif

#ifdef EXMIMO
#ifdef DRIVER2013
#include "openair0_lib.h"
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#include "gain_control.h"
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extern int card;
#endif
#endif

#define DEBUG_PHY_PROC
#define UE_TX_POWER (-10)

//#ifdef OPENAIR2
#ifndef PUCCH
#define PUCCH
#endif
//#endif

//#ifdef OPENAIR2
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
#include "UTIL/LOG/log.h"
//#endif

#ifdef EMOS
fifo_dump_emos_UE emos_dump_UE;
#endif

#include "UTIL/LOG/vcd_signal_dumper.h"

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#if defined(ENABLE_ITTI)
# include "intertask_interface.h"
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#   if defined(ENABLE_RAL)
#     include "timer.h"
#   endif
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#endif

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#ifndef OPENAIR2
//#define DIAG_PHY
#endif

#define DLSCH_RB_ALLOC 0x1fbf  // skip DC RB (total 23/25 RBs)
#define DLSCH_RB_ALLOC_12 0x0aaa  // skip DC RB (total 23/25 RBs)

#define NS_PER_SLOT 500000

extern int oai_exit;

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uint8_t ulsch_input_buffer[2700] __attribute__ ((aligned(16)));
uint8_t access_mode;
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#ifdef DLSCH_THREAD
extern int dlsch_instance_cnt[8];
extern int dlsch_subframe[8];
extern pthread_mutex_t dlsch_mutex[8];
/// Condition variable for dlsch thread
extern pthread_cond_t dlsch_cond[8];
extern int rx_pdsch_instance_cnt;
extern int rx_pdsch_slot;
extern pthread_mutex_t rx_pdsch_mutex;
/// Condition variable for rx_pdsch thread
extern pthread_cond_t rx_pdsch_cond;
#endif

DCI_ALLOC_t dci_alloc_rx[8];

#ifdef DIAG_PHY
extern int rx_sig_fifo;
#endif


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#if defined(EXMIMO) || defined(OAI_USRP)
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extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
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#endif

#ifdef USER_MODE

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void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid)
{
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  unsigned int coded_bits_per_codeword;
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  uint8_t nsymb = (phy_vars_ue->lte_frame_parms.Ncp == 0) ? 14 : 12;
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  coded_bits_per_codeword = get_G(&phy_vars_ue->lte_frame_parms,
                                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->nb_rb,
                                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rb_alloc,
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                                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->Qm,
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                                  phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->Nl,
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                                  phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
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                                  phy_vars_ue->frame_rx,subframe);
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  write_output("rxsigF0.m","rxsF0", phy_vars_ue->lte_ue_common_vars.rxdataF[0],2*nsymb*phy_vars_ue->lte_frame_parms.ofdm_symbol_size,2,1);
  write_output("rxsigF0_ext.m","rxsF0_ext", phy_vars_ue->lte_ue_pdsch_vars[0]->rxdataF_ext[0],2*nsymb*phy_vars_ue->lte_frame_parms.ofdm_symbol_size,1,1);
  write_output("dlsch00_ch0_ext.m","dl00_ch0_ext", phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[0],300*nsymb,1,1);
  /*
    write_output("dlsch01_ch0_ext.m","dl01_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[1],300*12,1,1);
    write_output("dlsch10_ch0_ext.m","dl10_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[2],300*12,1,1);
    write_output("dlsch11_ch0_ext.m","dl11_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[3],300*12,1,1);
    write_output("dlsch_rho.m","dl_rho",lte_ue_pdsch_vars[0]->rho[0],300*12,1,1);
  */
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  write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars[0]->rxdataF_comp0[0],300*12,1,1);
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  write_output("dlsch_rxF_llr.m","dlsch_llr", phy_vars_ue->lte_ue_pdsch_vars[0]->llr[0],coded_bits_per_codeword,1,0);
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  write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_mag0,300*12,1,1);
  write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_magb0,300*12,1,1);
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}

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void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
{
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  unsigned int coded_bits_per_codeword;
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  uint8_t nsymb = ((phy_vars_ue->lte_frame_parms.Ncp == 0) ? 14 : 12);
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  coded_bits_per_codeword = get_G(&phy_vars_ue->lte_frame_parms,
                                  phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
                                  phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc,
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                                  2,
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                                  1,
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                                  phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
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                                  phy_vars_ue->frame_rx,subframe);
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  LOG_D(PHY,"[UE %d] Dumping dlsch_SI : nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
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        phy_vars_ue->Mod_id,
        phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
        phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->mcs,
        phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->nb_rb,
        phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
        coded_bits_per_codeword);
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  write_output("rxsigF0.m","rxsF0", phy_vars_ue->lte_ue_common_vars.rxdataF[0],2*nsymb*phy_vars_ue->lte_frame_parms.ofdm_symbol_size,2,1);
  write_output("rxsigF0_ext.m","rxsF0_ext", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->rxdataF_ext[0],2*nsymb*phy_vars_ue->lte_frame_parms.ofdm_symbol_size,1,1);
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  write_output("dlsch00_ch0_ext.m","dl00_ch0_ext", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_estimates_ext[0],phy_vars_ue->lte_frame_parms.N_RB_DL*12*nsymb,1,1);
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  /*
    write_output("dlsch01_ch0_ext.m","dl01_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[1],300*12,1,1);
    write_output("dlsch10_ch0_ext.m","dl10_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[2],300*12,1,1);
    write_output("dlsch11_ch0_ext.m","dl11_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[3],300*12,1,1);
    write_output("dlsch_rho.m","dl_rho",lte_ue_pdsch_vars[0]->rho[0],300*12,1,1);
  */
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  write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->rxdataF_comp0[0],phy_vars_ue->lte_frame_parms.N_RB_DL*12*nsymb,1,1);
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  write_output("dlsch_rxF_llr.m","dlsch_llr", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->llr[0],coded_bits_per_codeword,1,0);
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  write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_mag0,300*nsymb,1,1);
  write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_magb0,300*nsymb,1,1);
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  exit(-1);
}

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#if defined(EXMIMO) || defined(OAI_USRP)
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//unsigned int gain_table[31] = {100,112,126,141,158,178,200,224,251,282,316,359,398,447,501,562,631,708,794,891,1000,1122,1258,1412,1585,1778,1995,2239,2512,2818,3162};
/*
unsigned int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL)
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{
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  int gain_dB = power_dBm - power_max_dBm;
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  int amp_x_100;

  switch (N_RB_UL) {
  case 6:
    amp_x_100 = AMP;      // PRACH is 6 PRBS so no scale
    break;
  case 15:
    amp_x_100 = 158*AMP;  // 158 = 100*sqrt(15/6)
    break;
  case 25:
    amp_x_100 = 204*AMP;  // 204 = 100*sqrt(25/6)
    break;
  case 50:
    amp_x_100 = 286*AMP;  // 286 = 100*sqrt(50/6)
    break;
  case 75:
    amp_x_100 = 354*AMP;  // 354 = 100*sqrt(75/6)
    break;
  case 100:
    amp_x_100 = 408*AMP;  // 408 = 100*sqrt(100/6)
    break;
  default:
    LOG_E(PHY,"Unknown PRB size %d\n",N_RB_UL);
    mac_xface->macphy_exit("");
    break;
  }
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  if (gain_dB < -30) {
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    return(amp_x_100/3162);
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  } else if (gain_dB>0)
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    return(amp_x_100);
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  else
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    return(amp_x_100/gain_table[-gain_dB]);  // 245 corresponds to the factor sqrt(25/6)
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}
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*/

unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb)
{

  int gain_dB = power_dBm - power_max_dBm;
  double gain_lin;

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  if (gain_dB < -20)
    return(AMP/10);
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  gain_lin = pow(10,.1*gain_dB);
  if ((nb_rb >0) && (nb_rb <= N_RB_UL)) {
    return((int)(AMP*sqrt(gain_lin*N_RB_UL/(double)nb_rb)));
  }
  else {
    LOG_E(PHY,"Illegal nb_rb/N_RB_UL combination (%d/%d)\n",nb_rb,N_RB_UL);
    mac_xface->macphy_exit("");
  }
  return(0);
}

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#endif

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void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
{
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  unsigned int coded_bits_per_codeword;
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  uint8_t nsymb = ((phy_vars_ue->lte_frame_parms.Ncp == 0) ? 14 : 12);
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  coded_bits_per_codeword = get_G(&phy_vars_ue->lte_frame_parms,
                                  phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->nb_rb,
                                  phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->rb_alloc,
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                                  2,
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                                  1,
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                                  phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
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                                  phy_vars_ue->frame_rx,subframe);
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  LOG_D(PHY,"[UE %d] Dumping dlsch_ra : nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
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        phy_vars_ue->Mod_id,
        phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->nb_rb,
        phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->mcs,
        phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->nb_rb,
        phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->num_pdcch_symbols,
        coded_bits_per_codeword);
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  write_output("rxsigF0.m","rxsF0", phy_vars_ue->lte_ue_common_vars.rxdataF[0],2*12*phy_vars_ue->lte_frame_parms.ofdm_symbol_size,2,1);
  write_output("rxsigF0_ext.m","rxsF0_ext", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->rxdataF_ext[0],2*12*phy_vars_ue->lte_frame_parms.ofdm_symbol_size,1,1);
  write_output("dlsch00_ch0_ext.m","dl00_ch0_ext", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_estimates_ext[0],300*nsymb,1,1);
  /*
    write_output("dlsch01_ch0_ext.m","dl01_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[1],300*12,1,1);
    write_output("dlsch10_ch0_ext.m","dl10_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[2],300*12,1,1);
    write_output("dlsch11_ch0_ext.m","dl11_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[3],300*12,1,1);
    write_output("dlsch_rho.m","dl_rho",lte_ue_pdsch_vars[0]->rho[0],300*12,1,1);
  */
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  write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->rxdataF_comp0[0],300*nsymb,1,1);
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  write_output("dlsch_rxF_llr.m","dlsch_llr", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->llr[0],coded_bits_per_codeword,1,0);
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  write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_mag0,300*nsymb,1,1);
  write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
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}
#endif

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void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
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  // This flushes ALL DLSCH and ULSCH harq buffers of ALL connected eNBs...add the eNB_index later
  // for more flexibility
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  uint8_t i,j,k;
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  PHY_VARS_UE *phy_vars_ue = PHY_vars_UE_g[Mod_id][CC_id];
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  //[NUMBER_OF_CONNECTED_eNB_MAX][2];
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  for(i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
    for(j=0; j<2; j++) {
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      //DL HARQ
      if(phy_vars_ue->dlsch_ue[i][j]) {
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        for(k=0; k<NUMBER_OF_HARQ_PID_MAX && phy_vars_ue->dlsch_ue[i][j]->harq_processes[k]; k++) {
          phy_vars_ue->dlsch_ue[i][j]->harq_processes[k]->status = SCH_IDLE;
        }
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      }
    }
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    //UL HARQ
    if(phy_vars_ue->ulsch_ue[i]) {
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      for(k=0; k<NUMBER_OF_HARQ_PID_MAX && phy_vars_ue->ulsch_ue[i]->harq_processes[k]; k++) {
        phy_vars_ue->ulsch_ue[i]->harq_processes[k]->status = SCH_IDLE;
        //Set NDIs for all UL HARQs to 0
        //  phy_vars_ue->ulsch_ue[i]->harq_processes[k]->Ndi = 0;

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      }
    }
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    // flush Msg3 buffer
    phy_vars_ue->ulsch_ue_Msg3_active[i] = 0;
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  }
}

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void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
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  // if contention resolution fails, go back to PRACH
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  PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PRACH;
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  LOG_E(PHY,"[UE %d] Frame %d Random-access procedure fails, going back to PRACH, setting SIStatus = 0 and State RRC_IDLE\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx);
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  //mac_xface->macphy_exit("");
}

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void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
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  int i;

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  LOG_I(PHY,"[UE %d][RAPROC] Frame %d Random-access procedure succeeded\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx);
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  PHY_vars_UE_g[Mod_id][CC_id]->ulsch_ue_Msg3_active[eNB_index] = 0;
  PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PUSCH;
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  for (i=0; i<8; i++) {
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    if (PHY_vars_UE_g[Mod_id][CC_id]->ulsch_ue[eNB_index]->harq_processes[i]) {
      PHY_vars_UE_g[Mod_id][CC_id]->ulsch_ue[eNB_index]->harq_processes[i]->status=IDLE;
      PHY_vars_UE_g[Mod_id][CC_id]->dlsch_ue[eNB_index][0]->harq_processes[i]->round=0;
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    }
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  }


}

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UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
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  return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index]);
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}
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void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,uint16_t timing_advance)
{
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  /*
  if ((timing_advance>>10) & 1) //it is negative
    timing_advance = timing_advance - (1<<11);
  */

  if (openair_daq_vars.manual_timing_advance == 0) {
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    phy_vars_ue->timing_advance = timing_advance*4;
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  }

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#ifdef DEBUG_PHY_PROC
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  LOG_I(PHY,"[UE %d] Frame %d, received (rar) timing_advance %d, HW timing advance %d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame_rx, phy_vars_ue->timing_advance,openair_daq_vars.timing_advance);
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#endif

}

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void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
{
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  //  uint32_t frame = PHY_vars_UE_g[Mod_id]->frame;
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  // timing advance has Q1.5 format
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  timing_advance = timing_advance - 31;
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  if (openair_daq_vars.manual_timing_advance == 0) {
    //if ( (frame % 100) == 0) {
    //if ((timing_advance > 3) || (timing_advance < -3) )
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    PHY_vars_UE_g[Mod_id][CC_id]->timing_advance = PHY_vars_UE_g[Mod_id][CC_id]->timing_advance+timing_advance*4; //this is for 25RB only!!!
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  }

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  LOG_I(PHY,"[UE %d] Got timing advance %d from MAC, new value %d\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
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}

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uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
{

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  LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d Checking for SR TXOp (sr_ConfigIndex %d)\n",
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        phy_vars_ue->Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,phy_vars_ue->frame_tx,subframe,
        phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex);

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  if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 4) {        // 5 ms SR period
    if ((subframe%5) == phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex)
      return(1);
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  } else if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 14) { // 10 ms SR period
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    if (subframe==(phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex-5))
      return(1);
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  } else if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 34) { // 20 ms SR period
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    if ((10*(phy_vars_ue->frame_tx&1)+subframe) == (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex-15))
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      return(1);
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  } else if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 74) { // 40 ms SR period
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    if ((10*(phy_vars_ue->frame_tx&3)+subframe) == (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex-35))
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      return(1);
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  } else if (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 154) { // 80 ms SR period
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    if ((10*(phy_vars_ue->frame_tx&7)+subframe) == (phy_vars_ue->scheduling_request_config[eNB_id].sr_ConfigIndex-75))
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      return(1);
  }

  return(0);
}

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uint16_t get_n1_pucch(PHY_VARS_UE *phy_vars_ue,
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                      uint8_t eNB_id,
                      uint8_t subframe,
                      uint8_t *b,
                      uint8_t SR)
{
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  LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_ue->lte_frame_parms;
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  uint8_t nCCE0,nCCE1,harq_ack1,harq_ack0;
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  ANFBmode_t bundling_flag;
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  uint16_t n1_pucch0=0,n1_pucch1=0;
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  int subframe_offset;
  int sf;
  int M;
  // clear this, important for case where n1_pucch selection is not used

  phy_vars_ue->pucch_sel[subframe] = 0;

  if (frame_parms->frame_type == FDD ) { // FDD
    sf = (subframe<4)? subframe+6 : subframe-4;
    printf("n1_pucch_UE: subframe %d, nCCE %d\n",sf,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
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    if (SR == 0)
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      return(frame_parms->pucch_config_common.n1PUCCH_AN + phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
    else
      return(phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
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  } else {
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    bundling_flag = phy_vars_ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode;
#ifdef DEBUG_PHY_PROC
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    if (bundling_flag==bundling) {
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      LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, bundling, SR %d/%d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame_tx,subframe,SR,
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            phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
    } else {
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      LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, multiplexing, SR %d/%d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame_tx,subframe,SR,
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            phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
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    }
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#endif
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    switch (frame_parms->tdd_config) {
    case 1:  // DL:S:UL:UL:DL:DL:S:UL:UL:DL

      harq_ack0 = 2; // DTX
      M=1;
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      // This is the offset for a particular subframe (2,3,4) => (0,2,4)
      if (subframe == 2) {  // ACK subframes 5 (forget 6)
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        subframe_offset = 5;
        M=2;
      } else if (subframe == 3) { // ACK subframe 9
        subframe_offset = 9;
      } else if (subframe == 7) { // ACK subframes 0 (forget 1)
        subframe_offset = 0;
        M=2;
      } else if (subframe == 8) { // ACK subframes 4
        subframe_offset = 4;
      } else {
        LOG_E(PHY,"[UE%d] : Frame %d phy_procedures_lte.c: get_n1pucch, illegal subframe %d for tdd_config %d\n",
              phy_vars_ue->Mod_id,phy_vars_ue->frame_tx,subframe,frame_parms->tdd_config);
        return(0);
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      }


      // i=0
      nCCE0 = phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[subframe_offset];
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      n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
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      // set ACK/NAK to values if not DTX
      if (phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack[subframe_offset].send_harq_status>0)  // n-6 // subframe 5 is to be ACK/NAKed
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        harq_ack0 = phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack[subframe_offset].ack;

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      if (harq_ack0!=2) {  // DTX
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        if (SR == 0) {  // last paragraph pg 68 from 36.213 (v8.6), m=0
          b[0]=(M==2) ? 1-harq_ack0 : harq_ack0;
          b[1]=harq_ack0;   // in case we use pucch format 1b (subframes 2,7)
          phy_vars_ue->pucch_sel[subframe] = 0;
          return(n1_pucch0);
        } else { // SR and only 0 or 1 ACKs (first 2 entries in Table 7.3-1 of 36.213)
          b[0]=harq_ack0;
          return(phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
        }
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      }


      break;
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    case 3:  // DL:S:UL:UL:UL:DL:DL:DL:DL:DL
      // in this configuration we have M=2 from pg 68 of 36.213 (v8.6)
      // Note: this doesn't allow using subframe 1 for PDSCH transmission!!! (i.e. SF 1 cannot be acked in SF 2)
      // set ACK/NAKs to DTX
      harq_ack1 = 2; // DTX
      harq_ack0 = 2; // DTX
      // This is the offset for a particular subframe (2,3,4) => (0,2,4)
      subframe_offset = (subframe-2)<<1;
      // i=0
      nCCE0 = phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[5+subframe_offset];
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      n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
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      // i=1
      nCCE1 = phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[(6+subframe_offset)%10];
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      n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
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      // set ACK/NAK to values if not DTX
      if (phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack[(6+subframe_offset)%10].send_harq_status>0)  // n-6 // subframe 6 is to be ACK/NAKed
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        harq_ack1 = phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack[(6+subframe_offset)%10].ack;

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      if (phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack[5+subframe_offset].send_harq_status>0)  // n-6 // subframe 5 is to be ACK/NAKed
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        harq_ack0 = phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack[5+subframe_offset].ack;

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      if (harq_ack1!=2) { // n-6 // subframe 6,8,0 and maybe 5,7,9 is to be ACK/NAKed
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        if ((bundling_flag==bundling)&&(SR == 0)) {  // This is for bundling without SR,
          // n1_pucch index takes value of smallest element in set {0,1}
          // i.e. 0 if harq_ack0 is not DTX, otherwise 1
          b[0] = harq_ack1;

          if (harq_ack0!=2)
            b[0]=b[0]&harq_ack0;

          phy_vars_ue->pucch_sel[subframe] = 1;
          return(n1_pucch1);

        } else if ((bundling_flag==multiplexing)&&(SR==0)) { // Table 10.1
          if (harq_ack0 == 2)
            harq_ack0 = 0;

          b[1] = harq_ack0;
          b[0] = (harq_ack0!=harq_ack1)?0:1;

          if ((harq_ack0 == 1) && (harq_ack1 == 0)) {
            phy_vars_ue->pucch_sel[subframe] = 0;
            return(n1_pucch0);
          } else {
            phy_vars_ue->pucch_sel[subframe] = 1;
            return(n1_pucch1);
          }
        } else if (SR==1) { // SR and 0,1,or 2 ACKS, (first 3 entries in Table 7.3-1 of 36.213)
          // this should be number of ACKs (including
          if (harq_ack0 == 2)
            harq_ack0 = 0;

          b[0]= harq_ack1 | harq_ack0;
          b[1]= harq_ack1 ^ harq_ack0;
          return(phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
        }
      } else if (harq_ack0!=2) { // n-7  // subframe 5,7,9 only is to be ACK/NAKed
        if ((bundling_flag==bundling)&&(SR == 0)) {  // last paragraph pg 68 from 36.213 (v8.6), m=0
          b[0]=harq_ack0;
          phy_vars_ue->pucch_sel[subframe] = 0;
          return(n1_pucch0);
        } else if ((bundling_flag==multiplexing)&&(SR==0)) { // Table 10.1 with i=1 set to DTX
          b[0] = harq_ack0;
          b[1] = 1-b[0];
          phy_vars_ue->pucch_sel[subframe] = 0;
          return(n1_pucch0);
        } else if (SR==1) { // SR and only 0 or 1 ACKs (first 2 entries in Table 7.3-1 of 36.213)
          b[0]=harq_ack0;
          b[1]=b[0];
          return(phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
        }
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      }
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      break;

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    }  // switch tdd_config
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  }
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  LOG_E(PHY,"[UE%d] : Frame %d phy_procedures_lte.c: get_n1pucch, exit without proper return\n",phy_vars_ue->frame_tx);
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  return(-1);
}


#ifdef EMOS
/*
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void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
  uint8_t harq_pid;
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  if (next_slot%2==0) {
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    // get harq_pid from subframe relationship
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    harq_pid = subframe2harq_pid(&phy_vars_ue->lte_frame_parms,phy_vars_ue->frame,(next_slot>>1));
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    if (harq_pid==255) {
      LOG_E(PHY,"[UE%d] Frame %d : FATAL ERROR: illegal harq_pid, returning\n",
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    0,phy_vars_ue->frame);
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      return;
    }

    if (ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
      emos_dump_UE.uci_cnt[next_slot>>1] = 1;
      memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o,ulsch_ue[eNB_id]->o,MAX_CQI_BITS*sizeof(char));
      emos_dump_UE.UCI_data[0][next_slot>>1].O = ulsch_ue[eNB_id]->O;
      memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_RI,ulsch_ue[eNB_id]->o_RI,2*sizeof(char));
      emos_dump_UE.UCI_data[0][next_slot>>1].O_RI = ulsch_ue[eNB_id]->O_RI;
      memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_ACK,ulsch_ue[eNB_id]->o_ACK,4*sizeof(char));
      emos_dump_UE.UCI_data[0][next_slot>>1].O_ACK = ulsch_ue[eNB_id]->harq_processes[harq_pid]->O_ACK;
    }
    else {
      emos_dump_UE.uci_cnt[next_slot>>1] = 0;
    }
  }
}
*/
#endif

int dummy_tx_buffer[3840*4] __attribute__((aligned(16)));
#ifndef OPENAIR2
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PRACH_RESOURCES_t prach_resources_local;
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#endif

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void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type)
{

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  //  int i_d;
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  uint16_t first_rb, nb_rb;
  uint8_t harq_pid;
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  unsigned int input_buffer_length;
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  unsigned int aa;
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  uint8_t Msg3_flag=0;
  uint8_t pucch_ack_payload[2];
  uint8_t n1_pucch;
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  ANFBmode_t bundling_flag;
  PUCCH_FMT_t format;
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  uint8_t SR_payload;
  int32_t prach_power;
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  uint8_t nsymb;
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  LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_ue->lte_frame_parms;
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  uint8_t generate_ul_signal = 0;
  uint8_t ack_status=0;
  int8_t Po_PUCCH;
  int32_t ulsch_start=0;
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#if defined(EXMIMO) || defined(OAI_USRP)
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  int overflow=0;
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  int k,l;
#endif
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  int slot_tx = phy_vars_ue->slot_tx;
  int subframe_tx = phy_vars_ue->slot_tx>>1;
  int frame_tx = phy_vars_ue->frame_tx;
  int Mod_id = phy_vars_ue->Mod_id;
  int CC_id = phy_vars_ue->CC_id;
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#ifndef OPENAIR2
  int i;
#endif
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  int tx_amp;
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
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  start_meas(&phy_vars_ue->phy_proc_tx);
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#ifdef EMOS
  //phy_procedures_emos_UE_TX(next_slot);
#endif

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  if ((slot_tx%2)==0) {
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    phy_vars_ue->tx_power_dBm=-127;

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    if (abstraction_flag==0) {
      for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
        memset(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],
               0,
               frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
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      }
    }

    if (phy_vars_ue->UE_mode[eNB_id] != PRACH) {
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      /*
      #ifdef DEBUG_PHY_PROC
        LOG_D(PHY,"[UE  %d] Frame %d, slot %d: Generating SRS\n",Mod_id,phy_vars_ue->frame,slot_tx);
      #endif
        if (abstraction_flag == 0) {
      #ifdef OFDMA_ULSCH
      generate_srs_tx(phy_vars_ue,eNB_id,AMP,subframe_tx);
      #else
      generate_srs_tx(phy_vars_ue,eNB_id,AMP,subframe_tx);
      #endif
        }

      #ifdef PHY_ABSTRACTION
        else {
      generate_srs_tx_emul(phy_vars_ue,subframe_tx);
        }
      #endif
      */
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      // get harq_pid from subframe relationship
      harq_pid = subframe2harq_pid(&phy_vars_ue->lte_frame_parms,
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                                   frame_tx,
                                   subframe_tx);

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#ifdef OPENAIR2
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      if ((phy_vars_ue->ulsch_ue_Msg3_active[eNB_id] == 1) &&
          (phy_vars_ue->ulsch_ue_Msg3_frame[eNB_id] == frame_tx) &&
          (phy_vars_ue->ulsch_ue_Msg3_subframe[eNB_id] == subframe_tx)) { // Initial Transmission of Msg3

        phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;

        if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round==0)
          generate_ue_ulsch_params_from_rar(phy_vars_ue,
                                            eNB_id);

        phy_vars_ue->ulsch_ue[eNB_id]->power_offset = 14;
        LOG_D(PHY,"[UE  %d][RAPROC] Frame %d: Setting Msg3_flag in subframe %d, for harq_pid %d\n",
              Mod_id,
              frame_tx,
              subframe_tx,
              harq_pid);
        Msg3_flag = 1;
      } else {

        if (harq_pid==255) {
          LOG_E(PHY,"[UE%d] Frame %d ulsch_decoding.c: FATAL ERROR: illegal harq_pid, returning\n",
                Mod_id,frame_tx);
          mac_xface->macphy_exit("Error in ulsch_decoding");
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          VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
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          stop_meas(&phy_vars_ue->phy_proc_tx);
          return;
        }

        Msg3_flag=0;
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      }
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#endif
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      if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
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        generate_ul_signal = 1;

        // deactivate service request
        phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 0;

        ack_status = get_ack(&phy_vars_ue->lte_frame_parms,
                             phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack,
                             subframe_tx,
                             phy_vars_ue->ulsch_ue[eNB_id]->o_ACK);

        first_rb = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->first_rb;
        nb_rb = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->nb_rb;


        //frame_parms->pusch_config_c ommon.ul_ReferenceSignalsPUSCH.cyclicShift = 0;

        //frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[20] = 0;



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#ifdef DEBUG_PHY_PROC
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        LOG_D(PHY,
              "[UE  %d][PUSCH %d] Frame %d subframe %d Generating PUSCH : first_rb %d, nb_rb %d, round %d, mcs %d, rv %d, cyclic_shift %d (cyclic_shift_common %d,n_DMRS2 %d,n_PRS %d), ACK (%d,%d), O_ACK %d\n",
              Mod_id,harq_pid,frame_tx,subframe_tx,
              first_rb,nb_rb,
              phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round,
              phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->mcs,
              phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->rvidx,
              (frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift+
               phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->n_DMRS2+
               frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[slot_tx])%12,
              frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
              phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->n_DMRS2,
              frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[slot_tx],
              phy_vars_ue->ulsch_ue[eNB_id]->o_ACK[0],phy_vars_ue->ulsch_ue[eNB_id]->o_ACK[1],
              phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->O_ACK);

        if (ack_status > 0) {
          LOG_D(PHY,"[UE  %d][PDSCH %x] Frame %d subframe %d Generating ACK (%d,%d) for %d bits on PUSCH\n",
                Mod_id,
                phy_vars_ue->ulsch_ue[eNB_id]->rnti,
                frame_tx,subframe_tx,
                phy_vars_ue->ulsch_ue[eNB_id]->o_ACK[0],phy_vars_ue->ulsch_ue[eNB_id]->o_ACK[1],
                phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->O_ACK);
        }

#endif


        //#ifdef DEBUG_PHY_PROC
        //  debug_LOG_D(PHY,"[UE  %d] Frame %d, Subframe %d ulsch harq_pid %d : O %d, O_ACK %d, O_RI %d, TBS %d\n",Mod_id,phy_vars_ue->frame,subframe_tx,harq_pid,phy_vars_ue->ulsch_ue[eNB_id]->O,phy_vars_ue->ulsch_ue[eNB_id]->O_ACK,phy_vars_ue->ulsch_ue[eNB_id]->O_RI,phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS);
        //#endif
        if (Msg3_flag == 1) {
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          LOG_I(PHY,"[UE  %d][RAPROC] Frame %d, Subframe %d next slot %d Generating (RRCConnectionRequest) Msg3 (nb_rb %d, first_rb %d, round %d, rvidx %d) Msg3: %x.%x.%x|%x.%x.%x.%x.%x.%x\n",Mod_id,frame_tx,
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                subframe_tx, slot_tx,
                phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->nb_rb,
                phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->first_rb,
                phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round,
                phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->rvidx,
                phy_vars_ue->prach_resources[eNB_id]->Msg3[0],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[1],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[2],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[3],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[4],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[5],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[6],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[7],
                phy_vars_ue->prach_resources[eNB_id]->Msg3[8]);

          start_meas(&phy_vars_ue->ulsch_encoding_stats);

          if (abstraction_flag==0) {
            if (ulsch_encoding(phy_vars_ue->prach_resources[eNB_id]->Msg3,
                               phy_vars_ue,
                               harq_pid,
                               eNB_id,
                               phy_vars_ue->transmission_mode[eNB_id],0,0)!=0) {
              LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
              mac_xface->macphy_exit("Error in ulsch_coding");
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              VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
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              stop_meas(&phy_vars_ue->phy_proc_tx);
              return;
            }
          }

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#ifdef PHY_ABSTRACTION
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          else {
            ulsch_encoding_emul(phy_vars_ue->prach_resources[eNB_id]->Msg3,phy_vars_ue,eNB_id,harq_pid,0);
          }

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#endif
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          stop_meas(&phy_vars_ue->ulsch_encoding_stats);
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          // signal MAC that Msg3 was sent
          mac_xface->Msg3_transmitted(Mod_id,
                                      CC_id,
                                      frame_tx,
                                      eNB_id);
#endif
        } else {
          input_buffer_length = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS/8;

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#ifdef OPENAIR2
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          //  LOG_D(PHY,"[UE  %d] ULSCH : Searching for MAC SDUs\n",Mod_id);
          if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round==0) {
            //if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
            access_mode=SCHEDULED_ACCESS;
            mac_xface->ue_get_sdu(Mod_id,
                                  CC_id,
                                  frame_tx,
                                  subframe_tx,
                                  eNB_id,
                                  ulsch_input_buffer,
                                  input_buffer_length,
                                  &access_mode);

            //}
            /*
            else {
              // Get calibration information from TDD procedures
              LOG_D(PHY,"[UE %d] Frame %d, subframe %d : ULSCH: Getting TDD Auto-Calibration information\n",
              Mod_id,phy_vars_ue->frame,subframe_tx);
              for (i=0;i<input_buffer_length;i++)
            ulsch_input_buffer[i]= i;

            }
            */
          }

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#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_ULSCH
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          LOG_D(PHY,"[UE] Frame %d, subframe %d : ULSCH SDU (TX harq_pid %d)  (%d bytes) : \n",frame_tx,subframe_tx,harq_pid, phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS>>3);

          for (i=0; i<phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS>>3; i++)
            LOG_T(PHY,"%x.",ulsch_input_buffer[i]);

          LOG_T(PHY,"\n");
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#endif
#endif
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#else //OPENAIR2
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          // the following lines were necessary for the calibration in CROWN
          /*
          if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
              for (i=0;i<input_buffer_length;i++)
                  ulsch_input_buffer[i]= (uint8_t)(taus()&0xff);
          }
          else {
              // Get calibration information from TDD procedures
          }
          */
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          for (i=0; i<input_buffer_length; i++)
            ulsch_input_buffer[i]= (uint8_t)(taus()&0xff);

          // the following lines were necessary for the collaborative UL in PUCCO
          /*
          memset(phy_vars_ue->ulsch_ue[eNB_id]->o    ,0,MAX_CQI_BYTES*sizeof(uint8_t));
          memset(phy_vars_ue->ulsch_ue[eNB_id]->o_RI ,0,2*sizeof(uint8_t));
          memset(phy_vars_ue->ulsch_ue[eNB_id]->o_ACK,0,4*sizeof(uint8_t));
          for (i=0;i<input_buffer_length;i++)
            ulsch_input_buffer[i]= i;
          */
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#endif //OPENAIR2
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          start_meas(&phy_vars_ue->ulsch_encoding_stats);

          if (abstraction_flag==0) {
            /*
            if (phy_vars_ue->frame%100==0) {
              LOG_I(PHY,"Encoding ulsch\n");
            }
            */
            if (ulsch_encoding(ulsch_input_buffer,
                               phy_vars_ue,
                               harq_pid,
                               eNB_id,
                               phy_vars_ue->transmission_mode[eNB_id],0,
                               0)!=0) {  //  Nbundled, to be updated!!!!
              LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
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              VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
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              stop_meas(&phy_vars_ue->phy_proc_tx);
              return;
            }
          }

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#ifdef PHY_ABSTRACTION
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          else {
            ulsch_encoding_emul(ulsch_input_buffer,phy_vars_ue,eNB_id,harq_pid,0);
          }

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#endif
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          stop_meas(&phy_vars_ue->ulsch_encoding_stats);
        }

        if (abstraction_flag == 0) {
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#ifdef OPENAIR2
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          pusch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,1, abstraction_flag);
          phy_vars_ue->tx_power_dBm = phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH;
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#else
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          phy_vars_ue->tx_power_dBm = UE_TX_POWER;
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#endif
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          phy_vars_ue->tx_total_RE = nb_rb*12;
	  
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#if defined(EXMIMO) || defined(OAI_USRP)
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	  tx_amp = get_tx_amp(phy_vars_ue->tx_power_dBm,
			      phy_vars_ue->tx_power_max_dBm,
			      phy_vars_ue->lte_frame_parms.N_RB_UL,
			      nb_rb);
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#else
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          tx_amp = AMP;
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#endif
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	  LOG_D(PHY,"[UE  %d][PUSCH %d] Frame %d subframe %d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
		Mod_id,harq_pid,frame_tx,subframe_tx,phy_vars_ue->tx_power_dBm,phy_vars_ue->tx_power_max_dBm, tx_amp);
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          start_meas(&phy_vars_ue->ulsch_modulation_stats);
          ulsch_modulation(phy_vars_ue->lte_ue_common_vars.txdataF,
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			   tx_amp,
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                           frame_tx,
                           subframe_tx,
                           &phy_vars_ue->lte_frame_parms,
                           phy_vars_ue->ulsch_ue[eNB_id]);
          for (aa=0; aa<1/*frame_parms->nb_antennas_tx*/; aa++)
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            generate_drs_pusch(phy_vars_ue,
			       eNB_id,
			       tx_amp,
			       subframe_tx,
			       first_rb,
			       nb_rb,
			       aa);
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          stop_meas(&phy_vars_ue->ulsch_modulation_stats);
        }
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        if (abstraction_flag==1) {
          // clear SR
          phy_vars_ue->sr[subframe_tx]=0;
        }
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      } // ULSCH is active
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#ifdef PUCCH
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      else if (phy_vars_ue->UE_mode[eNB_id] == PUSCH) { // check if we need to use PUCCH 1a/1b
        //      debug_LOG_D(PHY,"[UE%d] Frame %d, subframe %d: Checking for PUCCH 1a/1b\n",Mod_id,frame_tx,subframe_tx);
        bundling_flag = phy_vars_ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode;

        if ((frame_parms->frame_type==FDD) ||
            (bundling_flag==bundling)    ||
            ((frame_parms->frame_type==TDD)&&(frame_parms->tdd_config==1)&&((slot_tx!=4)||(slot_tx!=14)))) {
          format = pucch_format1a;
          LOG_D(PHY,"[UE] PUCCH 1a\n");
        } else {
          format = pucch_format1b;
          LOG_D(PHY,"[UE] PUCCH 1b\n");
        }

        // Check for SR and do ACK/NACK accordingly
        if (is_SR_TXOp(phy_vars_ue,eNB_id,subframe_tx)==1) {
          LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d: got SR_TXOp, Checking for SR for PUSCH from MAC\n",
                Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,frame_tx,subframe_tx);
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#ifdef OPENAIR2
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          SR_payload = mac_xface->ue_get_SR(Mod_id,
                                            CC_id,
                                            frame_tx,
                                            eNB_id,
                                            phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
                                            subframe_tx); // subframe used for meas gap
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#else
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          SR_payload = 1;
#endif

          if (SR_payload>0) {
            generate_ul_signal = 1;
            LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d got the SR for PUSCH is %d\n",
                  Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,frame_tx,subframe_tx,SR_payload);
          } else {
            phy_vars_ue->sr[subframe_tx]=0;
          }
        } else
          SR_payload=0;

        if (get_ack(&phy_vars_ue->lte_frame_parms,
                    phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack,
                    subframe_tx,pucch_ack_payload) > 0) {
          // we need to transmit ACK/NAK in this subframe

          generate_ul_signal = 1;

          n1_pucch = get_n1_pucch(phy_vars_ue,
                                  eNB_id,
                                  subframe_tx,
                                  pucch_ack_payload,
                                  SR_payload);
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#ifdef OPENAIR2
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          Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,format);
          phy_vars_ue->tx_power_dBm = Po_PUCCH;
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#else
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          phy_vars_ue->tx_power_dBm = UE_TX_POWER;
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#endif
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          phy_vars_ue->tx_total_RE = 12;
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#if defined(EXMIMO) || defined(OAI_USRP)
	  tx_amp = get_tx_amp(Po_PUCCH,
			      phy_vars_ue->tx_power_max_dBm,
			      phy_vars_ue->lte_frame_parms.N_RB_UL,
			      1);
#else
	  tx_amp = AMP;
#endif
	  
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          if (SR_payload>0) {
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	     LOG_D(PHY,"[UE  %d][SR %x] Frame %d subframe %d Generating PUCCH 1a/1b payload %d,%d (with SR for PUSCH), n1_pucch %d, Po_PUCCH, amp %d\n",
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                  Mod_id,
                  phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
                  frame_tx, subframe_tx,
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		  pucch_ack_payload[0],pucch_ack_payload[1],
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                  phy_vars_ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex,
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	          Po_PUCCH,
		  tx_amp);
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          } else {
            LOG_D(PHY,"[UE  %d][PDSCH %x] Frame %d subframe %d Generating PUCCH 1a/1b, n1_pucch %d, b[0]=%d,b[1]=%d (SR_Payload %d), Po_PUCCH %d, amp %d\n",
                  Mod_id,
                  phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
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	    frame_tx, subframe_tx,
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		  n1_pucch,pucch_ack_payload[0],pucch_ack_payload[1],SR_payload,
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                  Po_PUCCH,
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		  tx_amp);
	  }
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          if (abstraction_flag == 0) {

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	  generate_pucch(phy_vars_ue->lte_ue_common_vars.txdataF,
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                           &phy_vars_ue->lte_frame_parms,
                           phy_vars_ue->ncs_cell,
                           format,
                           &phy_vars_ue->pucch_config_dedicated[eNB_id],
                           n1_pucch,
                           0,  // n2_pucch
                           1,  // shortened format
                           pucch_ack_payload,
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	                   tx_amp,
	                   subframe_tx);
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          } else {
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#ifdef PHY_ABSTRACTION
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            LOG_D(PHY,"Calling generate_pucch_emul ... (ACK %d %d, SR %d)\n",pucch_ack_payload[0],pucch_ack_payload[1],SR_payload);
            generate_pucch_emul(phy_vars_ue,
                                format,
                                phy_vars_ue->lte_frame_parms.pucch_config_common.nCS_AN,
                                pucch_ack_payload,
                                SR_payload,
                                subframe_tx);
#endif
          }
        } else if (SR_payload==1) { // no ACK/NAK but SR is triggered by MAC
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#ifdef OPENAIR2