ODROID-XU3 : poweroff control modified.(delay & debug message added)

Change-Id: Id2a9043fe71253d08f65f633a640303b58715d2c

arch/arm/mach-exynos/pmu-exynos5422.c

@@ -679,7 +679,7 @@ static void odroid_power_off(void)
 {
 	unsigned int value, off_retry = 0;
 	
-	printk("%s : set PS_HOLD low\n", __func__);
+	printk(KERN_EMERG "%s : Set PS_HOLD_CONTROL (PS_HOLD_LOW)\n", __func__);
 
 	local_irq_disable();
 
@@ -696,18 +696,19 @@ static void odroid_power_off(void)
     	*/
     	value = __raw_readl(EXYNOS5422_PS_HOLD_CONTROL);
     	value |= EXYNOS_PS_HOLD_EN;
-    	__raw_writel(value, EXYNOS_PS_HOLD_CONTROL);
+    	__raw_writel(value, EXYNOS5422_PS_HOLD_CONTROL);
     
-    	mdelay(1000);
+    	mdelay(3000);
+
     	if(off_retry++ > 5) {
 			flush_cache_all();
 			outer_flush_all();
 			exynos5_restart(0, 0);
 
-			pr_emerg("%s: waiting for reboot\n", __func__);
+			printk(KERN_EMERG "%s: waiting for reboot\n", __func__);
 			while(1);
     	}
-    	printk("%s : Power OFF error count = %d !!!\n", __func__, off_retry);
+    	printk(KERN_EMERG "%s : Power OFF Error! PS_HOLD = 0x%08X, error retry = %d !!!\n", __func__, value, off_retry);
     }
 }
 #endif

drivers/regulator/s2mps11.c

@@ -423,10 +423,30 @@ static int s2mps11_pmic_remove(struct platform_device *pdev)
 static void s2mps11_pmic_shutdown(struct platform_device *pdev)
 {
     struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
-
-	/* PWR_HOLD bit-clear when power off */
-	sec_reg_update(iodev, S2MPS11_REG_CTRL1, 0x00, 0xff);
-	dev_info(&pdev->dev, "%s : PWR_HOLD Clear Bit.\n",__func__);
+    unsigned int reg_ctrl1 = 0, retry = 0;
+
+    for(retry = 0; retry < 5; retry++)  {
+    	/* PWR_HOLD bit-clear when power off */
+        if(sec_reg_update(iodev, S2MPS11_REG_CTRL1, 0x00, 0xff))    {
+            printk(KERN_EMERG "%s : S2MPS11 REG CTRL1 Update error! retry %d", __func__, retry);
+            continue;
+        }
+
+        if(sec_reg_read(iodev, S2MPS11_REG_CTRL1, &reg_ctrl1))  {
+            printk(KERN_EMERG "%s : S2MPS11 REG CTRL1 read error! retry %d", __func__, retry);
+            continue;
+        }
+        
+        // PWR_HOLD not clear.
+        if(reg_ctrl1 & 0x10)    {
+            printk(KERN_EMERG "%s : S2MPS11 REG CTRL1 value error!, value = 0x%08X, retry %d", __func__, reg_ctrl1, retry);
+            continue;
+        }
+        else    {
+        	printk(KERN_EMERG "%s : PWR_HOLD Clear Bit. (retry %d)\n", __func__, retry);
+            break;
+        }
+   }
 }
 #endif