1. 07 Apr, 2013 2 commits
  2. 12 Mar, 2013 1 commit
    • Chris Boot's avatar
      spi: add driver for BCM2835 · f8043872
      Chris Boot authored
      The BCM2835 contains two forms of SPI master controller (one known
      simply as SPI0, and the other known as the "Universal SPI Master", in
      the auxilliary block) and one form of SPI slave controller. This patch
      adds support for the SPI0 controller.
      
      This driver is taken from Chris Boot's repository at
      git://github.com/bootc/linux.git rpi-linear
      as of commit 6de2905 "spi-bcm2708: fix printf with spurious %s".
      In the first SPI-related commit there, Chris wrote:
      
      Thanks to csoutreach / A Robinson for his driver which I used as an
      inspiration. You can find his version here:
      http://piface.openlx.org.uk/raspberry-pi-spi-kernel-driver-available-for
      
      Changes made during upstreaming:
      * Renamed bcm2708 to bcm2835 as per upstream naming for this SoC.
      * Removed support for brcm,realtime property.
      * Increased transfer timeout to 30 seconds.
      * Return IRQ_NONE from the IRQ handler if no interrupt was handled.
      * Disable TA (Transfer Active) and clear FIFOs on a transfer timeout.
      * Wrote device tree binding documentation.
      * Request unnamed clock rather than "sys_pclk"; the DT will provide the
        correct clock.
      * Assume that tfr->speed_hz and tfr->bits_per_word are always set in
        bcm2835_spi_start_transfer(), bcm2835_spi_transfer_one(), so no need
        to check spi->speed_hz or tft->bits_per_word.
      * Re-ordered probe() to remove the need for temporary variables.
      * Call clk_disable_unprepare() rather than just clk_unprepare() on probe()
        failure.
      * Don't use devm_request_irq(), to ensure that the IRQ doesn't fire after
        we've torn down the device, but not unhooked the IRQ.
      * Moved probe()'s call to clk_prepare_enable() so we can be sure the clock
        is enabled if the IRQ handler fires immediately.
      * Remove redundant checks from bcm2835_spi_check_transfer() and
        bcm2835_spi_setup().
      * Re-ordered IRQ handler to check for RXR before DONE. Added comments to
        ISR.
      * Removed empty prepare/unprepare implementations.
      * Removed use of devinit/devexit.
      * Added BCM2835_ prefix to defines.
      Signed-off-by: default avatarChris Boot <bootc@bootc.net>
      Signed-off-by: default avatarStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      f8043872
  3. 08 Feb, 2013 2 commits
  4. 06 Dec, 2012 1 commit
  5. 05 Dec, 2012 1 commit
  6. 14 Nov, 2012 1 commit
  7. 30 Oct, 2012 1 commit
  8. 01 Oct, 2012 1 commit
    • Stephen Warren's avatar
      spi: remove completely broken Tegra driver · 536a53a3
      Stephen Warren authored
      The current SPI driver has many issues. Examples are:
      
      * Segfaulting on most transfers due to expecting all transfers to have
        both RX and TX buffers.
      * Hanging on TX transfers since the whole driver flow is driven by RX
        DMA completion, but the HW is only told to enable RX for RX transfers.
      * Use of clk_disable_unprepare() from atomic context.
      * Once those and other minor issues are fixed, the driver still doesn't
        actually work.
      * The driver also implements a deprecated API to the SPI core.
      
      For this reason, simply remove the driver completely. This has two
      advantages:
      
      1) This will remove the last use of Tegra's <mach/dma.h>, which will
         allow that file to be removed, which is required for single zImage
         work.
      
      2) The downstream driver is significaly different from the current
         code. I believe a patch to re-add the downstream driver (with
         appropriate cleanup) will be much simpler to review if it's a new
         file rather than randomly interspered with essentially unrelated
         existing code.
      Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      536a53a3
  9. 22 Aug, 2012 2 commits
  10. 17 Aug, 2012 1 commit
  11. 23 Jul, 2012 1 commit
  12. 20 Jul, 2012 1 commit
  13. 27 Apr, 2012 1 commit
  14. 09 Mar, 2012 3 commits
  15. 08 Mar, 2012 1 commit
  16. 04 Jul, 2011 1 commit
  17. 06 Jun, 2011 1 commit
  18. 27 May, 2011 1 commit
  19. 15 Mar, 2011 1 commit
  20. 22 Feb, 2011 3 commits
  21. 18 Jan, 2011 1 commit
  22. 24 Dec, 2010 1 commit
  23. 01 Dec, 2010 1 commit
  24. 10 Nov, 2010 2 commits
  25. 22 Oct, 2010 1 commit
    • Erik Gilling's avatar
      spi: add spi_tegra driver · 0c03a1dd
      Erik Gilling authored
      v2 changes:
        from Thierry Reding:
          * add "select TEGRA_SYSTEM_DMA" to Kconfig
        from Grant Likely:
          * add oneline description to header
          * inline references to DRIVER_NAME
          * inline references to BUSY_TIMEOUT
          * open coded bytes_per_word()
          * spi_readl/writel -> spi_tegra_readl/writel
          * move transfer validation to spi_tegra_transfer
          * don't request_mem_region iomem as platform bus does that for us
          * __exit -> __devexit
      
      v3 changes:
        from Russell King:
          * put request_mem_region back int
        from Grant Likely:
          * remove #undef DEBUG
          * add SLINK_ to register bit defines
          * remove unused bytes_per_word
          * make spi_tegra_readl/writel static linine
          * various refactoring for clarity
          * mark err if BSY bit is not cleared after 1000 retries
          * move spinlock to protect setting of RDY bit
          * subsys_initcall -> module_init
      
      v3 changes:
        from Grant Likely:
          * update spi_tegra to use PTR_ERRless dma API
      
      v4 changes:
        from Grant Likely:
          * remove empty spi_tegra_cleanup fucntion
          * allow device ids of -1
      Signed-off-by: default avatarErik Gilling <konkers@android.com>
      Acked-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Thierry Reding <thierry.reding@avionic-design.de>
      Cc: Russell King <linux@arm.linux.org.uk>
      
      spi: tegra: cleanups from upstream review
      
      Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25
      Signed-off-by: default avatarErik Gilling <konkers@android.com>
      0c03a1dd
  26. 13 Oct, 2010 4 commits
    • Mingkai Hu's avatar
      spi/fsl_spi: add eSPI controller support · 8b60d6c2
      Mingkai Hu authored
      Add eSPI controller support based on the library code spi_fsl_lib.c.
      
      The eSPI controller is newer controller 85xx/Pxxx devices supported.
      There're some differences comparing to the SPI controller:
      
      1. Has different register map and different bit definition
         So leave the code operated the register to the driver code, not
         the common code.
      
      2. Support 4 dedicated chip selects
         The software can't controll the chip selects directly, The SPCOM[CS]
         field is used to select which chip selects is used, and the
         SPCOM[TRANLEN] field is set to tell the controller how long the CS
         signal need to be asserted. So the driver doesn't need the chipselect
         related function when transfering data, just set corresponding register
         fields to controll the chipseclect.
      
      3. Different Transmit/Receive FIFO access register behavior
         For SPI controller, the Tx/Rx FIFO access register can hold only
         one character regardless of the character length, but for eSPI
         controller, the register can hold 4 or 2 characters according to
         the character lengths. Access the Tx/Rx FIFO access register of the
         eSPI controller will shift out/in 4/2 characters one time. For SPI
         subsystem, the command and data are put into different transfers, so
         we need to combine all the transfers to one transfer in order to pass
         the transfer to eSPI controller.
      
      4. The max transaction length limitation
         The max transaction length one time is limitted by the SPCOM[TRANSLEN]
         field which is 0xFFFF. When used mkfs.ext2 command to create ext2
         filesystem on the flash, the read length will exceed the max value of
         the SPCOM[TRANSLEN] field.
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      8b60d6c2
    • Mingkai Hu's avatar
      spi/mpc8xxx: refactor the common code for SPI/eSPI controller · b36ece83
      Mingkai Hu authored
      Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used
      by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI
      controller code in the SPI controller driver spi_fsl_spi.c.
      
      Because the register map of the SPI controller and eSPI controller
      is so different, also leave the code operated the register to the
      driver code, not the common code.
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      b36ece83
    • Mingkai Hu's avatar
      spi/mpc8xxx: rename spi_mpc8xxx.c to spi_fsl_spi.c · 3272029f
      Mingkai Hu authored
      This will pave the way to refactor out the common code which can be used
      by the eSPI controller driver, and rename the SPI controller dirver to the
      file spi_fsl_spi.c.
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      3272029f
    • matt mooney's avatar
      spi: change to new flag variable · fadcf49b
      matt mooney authored
      Replace EXTRA_CFLAGS with ccflags-y.
      Signed-off-by: default avatarmatt mooney <mfm@muteddisk.com>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      fadcf49b
  27. 08 Oct, 2010 1 commit
  28. 25 May, 2010 2 commits