pata_it8213.c 7.9 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
/*
 *    pata_it8213.c - iTE Tech. Inc.  IT8213 PATA driver
 *
 *    The IT8213 is a very Intel ICH like device for timing purposes, having
 *    a similar register layout and the same split clock arrangement. Cable
 *    detection is different, and it does not have slave channels or all the
 *    clutter of later ICH/SATA setups.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/ata.h>

#define DRV_NAME	"pata_it8213"
Jeff Garzik's avatar
Jeff Garzik committed
22
#define DRV_VERSION	"0.0.3"
23 24

/**
25
 *	it8213_pre_reset	-	probe begin
Tejun Heo's avatar
Tejun Heo committed
26
 *	@link: link
27
 *	@deadline: deadline jiffies for the operation
28
 *
Alan Cox's avatar
Alan Cox committed
29 30
 *	Filter out ports by the enable bits before doing the normal reset
 *	and probe.
31 32
 */

Tejun Heo's avatar
Tejun Heo committed
33
static int it8213_pre_reset(struct ata_link *link, unsigned long deadline)
34 35 36 37
{
	static const struct pci_bits it8213_enable_bits[] = {
		{ 0x41U, 1U, 0x80UL, 0x80UL },	/* port 0 */
	};
Tejun Heo's avatar
Tejun Heo committed
38
	struct ata_port *ap = link->ap;
39 40 41
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no]))
		return -ENOENT;
42

Tejun Heo's avatar
Tejun Heo committed
43
	return ata_sff_prereset(link, deadline);
44 45
}

Alan Cox's avatar
Alan Cox committed
46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
/**
 *	it8213_cable_detect	-	check for 40/80 pin
 *	@ap: Port
 *
 *	Perform cable detection for the 8213 ATA interface. This is
 *	different to the PIIX arrangement
 */

static int it8213_cable_detect(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u8 tmp;
	pci_read_config_byte(pdev, 0x42, &tmp);
	if (tmp & 2)	/* The initial docs are incorrect */
		return ATA_CBL_PATA40;
	return ATA_CBL_PATA80;
}

64 65 66
/**
 *	it8213_set_piomode - Initialize host controller PATA PIO timings
 *	@ap: Port whose timings we are configuring
Alan Cox's avatar
Alan Cox committed
67
 *	@adev: Device whose timings we are configuring
68 69 70 71 72 73 74 75 76 77 78
 *
 *	Set PIO mode for device, in host controller PCI config space.
 *
 *	LOCKING:
 *	None (inherited from caller).
 */

static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
{
	unsigned int pio	= adev->pio_mode - XFER_PIO_0;
	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
79 80
	unsigned int master_port = ap->port_no ? 0x42 : 0x40;
	u16 master_data;
81 82 83 84 85 86 87 88 89 90 91 92 93 94
	int control = 0;

	/*
	 *	See Intel Document 298600-004 for the timing programing rules
	 *	for PIIX/ICH. The 8213 is a clone so very similar
	 */

	static const	 /* ISP  RTC */
	u8 timings[][2]	= { { 0, 0 },
			    { 0, 0 },
			    { 1, 0 },
			    { 2, 1 },
			    { 2, 3 }, };

95 96
	if (pio > 1)
		control |= 1;	/* TIME */
97
	if (ata_pio_need_iordy(adev))	/* PIO 3/4 require IORDY */
98
		control |= 2;	/* IE */
99 100
	/* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
	if (adev->class != ATA_DEV_ATA)
101
		control |= 4;	/* PPE */
102

103
	pci_read_config_word(dev, master_port, &master_data);
104

105
	/* Set PPE, IE, and TIME as appropriate */
106
	if (adev->devno == 0) {
107 108 109
		master_data &= 0xCCF0;
		master_data |= control;
		master_data |= (timings[pio][0] << 12) |
110 111 112 113
			(timings[pio][1] << 8);
	} else {
		u8 slave_data;

114 115
		master_data &= 0xFF0F;
		master_data |= (control << 4);
116

117
		/* Slave timing in separate register */
118 119
		pci_read_config_byte(dev, 0x44, &slave_data);
		slave_data &= 0xF0;
120
		slave_data |= (timings[pio][0] << 2) | timings[pio][1];
121 122 123
		pci_write_config_byte(dev, 0x44, slave_data);
	}

124 125
	master_data |= 0x4000;	/* Ensure SITRE is set */
	pci_write_config_word(dev, master_port, master_data);
126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165
}

/**
 *	it8213_set_dmamode - Initialize host controller PATA DMA timings
 *	@ap: Port whose timings we are configuring
 *	@adev: Device to program
 *
 *	Set UDMA/MWDMA mode for device, in host controller PCI config space.
 *	This device is basically an ICH alike.
 *
 *	LOCKING:
 *	None (inherited from caller).
 */

static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
	u16 master_data;
	u8 speed		= adev->dma_mode;
	int devid		= adev->devno;
	u8 udma_enable;

	static const	 /* ISP  RTC */
	u8 timings[][2]	= { { 0, 0 },
			    { 0, 0 },
			    { 1, 0 },
			    { 2, 1 },
			    { 2, 3 }, };

	pci_read_config_word(dev, 0x40, &master_data);
	pci_read_config_byte(dev, 0x48, &udma_enable);

	if (speed >= XFER_UDMA_0) {
		unsigned int udma = adev->dma_mode - XFER_UDMA_0;
		u16 udma_timing;
		u16 ideconf;
		int u_clock, u_speed;

		/* Clocks follow the PIIX style */
		u_speed = min(2 - (udma & 1), udma);
166
		if (udma > 4)
167 168 169 170 171 172 173 174
			u_clock = 0x1000;	/* 100Mhz */
		else if (udma > 2)
			u_clock = 1;		/* 66Mhz */
		else
			u_clock = 0;		/* 33Mhz */

		udma_enable |= (1 << devid);

175
		/* Load the UDMA cycle time */
176 177
		pci_read_config_word(dev, 0x4A, &udma_timing);
		udma_timing &= ~(3 << (4 * devid));
178
		udma_timing |= u_speed << (4 * devid);
179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212
		pci_write_config_word(dev, 0x4A, udma_timing);

		/* Load the clock selection */
		pci_read_config_word(dev, 0x54, &ideconf);
		ideconf &= ~(0x1001 << devid);
		ideconf |= u_clock << devid;
		pci_write_config_word(dev, 0x54, ideconf);
	} else {
		/*
		 * MWDMA is driven by the PIO timings. We must also enable
		 * IORDY unconditionally along with TIME1. PPE has already
		 * been set when the PIO timing was set.
		 */
		unsigned int mwdma	= adev->dma_mode - XFER_MW_DMA_0;
		unsigned int control;
		u8 slave_data;
		static const unsigned int needed_pio[3] = {
			XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
		};
		int pio = needed_pio[mwdma] - XFER_PIO_0;

		control = 3;	/* IORDY|TIME1 */

		/* If the drive MWDMA is faster than it can do PIO then
		   we must force PIO into PIO0 */

		if (adev->pio_mode < needed_pio[mwdma])
			/* Enable DMA timing only */
			control |= 8;	/* PIO cycles in PIO0 */

		if (devid) {	/* Slave */
			master_data &= 0xFF4F;  /* Mask out IORDY|TIME1|DMAONLY */
			master_data |= control << 4;
			pci_read_config_byte(dev, 0x44, &slave_data);
213
			slave_data &= 0xF0;
214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231
			/* Load the matching timing */
			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
			pci_write_config_byte(dev, 0x44, slave_data);
		} else { 	/* Master */
			master_data &= 0xCCF4;	/* Mask out IORDY|TIME1|DMAONLY
						   and master timing bits */
			master_data |= control;
			master_data |=
				(timings[pio][0] << 12) |
				(timings[pio][1] << 8);
		}
		udma_enable &= ~(1 << devid);
		pci_write_config_word(dev, 0x40, master_data);
	}
	pci_write_config_byte(dev, 0x48, udma_enable);
}

static struct scsi_host_template it8213_sht = {
232
	ATA_BMDMA_SHT(DRV_NAME),
233 234
};

235 236 237 238

static struct ata_port_operations it8213_ops = {
	.inherits		= &ata_bmdma_port_ops,
	.cable_detect		= it8213_cable_detect,
239 240
	.set_piomode		= it8213_set_piomode,
	.set_dmamode		= it8213_set_dmamode,
241
	.prereset		= it8213_pre_reset,
242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260
};


/**
 *	it8213_init_one - Register 8213 ATA PCI device with kernel services
 *	@pdev: PCI device to register
 *	@ent: Entry in it8213_pci_tbl matching with @pdev
 *
 *	Called from kernel PCI layer.
 *
 *	LOCKING:
 *	Inherited from PCI layer (may sleep).
 *
 *	RETURNS:
 *	Zero on success, or -ERRNO value.
 */

static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
261
	static const struct ata_port_info info = {
262
		.flags		= ATA_FLAG_SLAVE_POSS,
263
		.pio_mask	= ATA_PIO4,
264
		.mwdma_mask	= ATA_MWDMA12_ONLY,
265
		.udma_mask	= ATA_UDMA6,
266 267
		.port_ops	= &it8213_ops,
	};
268 269
	/* Current IT8213 stuff is single port */
	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
270

271
	ata_print_version_once(&pdev->dev, DRV_VERSION);
272

273
	return ata_pci_bmdma_init_one(pdev, ppi, &it8213_sht, NULL, 0);
274 275 276 277 278 279 280 281 282 283 284 285 286
}

static const struct pci_device_id it8213_pci_tbl[] = {
	{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), },

	{ }	/* terminate list */
};

static struct pci_driver it8213_pci_driver = {
	.name			= DRV_NAME,
	.id_table		= it8213_pci_tbl,
	.probe			= it8213_init_one,
	.remove			= ata_pci_remove_one,
287
#ifdef CONFIG_PM
288 289
	.suspend		= ata_pci_device_suspend,
	.resume			= ata_pci_device_resume,
290
#endif
291 292
};

Axel Lin's avatar
Axel Lin committed
293
module_pci_driver(it8213_pci_driver);
294 295 296 297 298 299

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
MODULE_VERSION(DRV_VERSION);