The XOR channels on Marvell SoCs have a Window Override Control
register that allow to do some fancy things with addresses. Those
features are not used by the driver, but some U-Boot versions anyway
modify those registers.

For some reason, the U-Boot on OpenBlocks AX3-4 was setting an invalid
value in those registers when the addition 2 GB DRAM chip was plugged
into the board, causing the XOR driver to fail in using the XOR
engines.

By setting those registers to 0 during the driver initialization, we
ensure that the registers are configured according with the driver
operation model.

Thanks to Lior Amsalem <alior@marvell.com> for his help in debugging
this problem.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>