Commit 22fa159d authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

bnx2: Update firmware to 6.0.x.

- Improved flow control and simplified interface
- Use hardware RSS indirection table instead of the slower firmware-
  based table
- Lower latency interrupt on 5709
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Reviewed-by: default avatarBenjamin Li <benli@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e37ef961
......@@ -61,11 +61,11 @@
#define DRV_MODULE_NAME "bnx2"
#define DRV_MODULE_VERSION "2.0.17"
#define DRV_MODULE_RELDATE "July 18, 2010"
#define FW_MIPS_FILE_06 "bnx2/bnx2-mips-06-5.0.0.j6.fw"
#define FW_RV2P_FILE_06 "bnx2/bnx2-rv2p-06-5.0.0.j3.fw"
#define FW_MIPS_FILE_09 "bnx2/bnx2-mips-09-5.0.0.j15.fw"
#define FW_RV2P_FILE_09_Ax "bnx2/bnx2-rv2p-09ax-5.0.0.j10.fw"
#define FW_RV2P_FILE_09 "bnx2/bnx2-rv2p-09-5.0.0.j10.fw"
#define FW_MIPS_FILE_06 "bnx2/bnx2-mips-06-6.0.15.fw"
#define FW_RV2P_FILE_06 "bnx2/bnx2-rv2p-06-6.0.15.fw"
#define FW_MIPS_FILE_09 "bnx2/bnx2-mips-09-6.0.17.fw"
#define FW_RV2P_FILE_09_Ax "bnx2/bnx2-rv2p-09ax-6.0.17.fw"
#define FW_RV2P_FILE_09 "bnx2/bnx2-rv2p-09-6.0.17.fw"
#define RUN_AT(x) (jiffies + (x))
......@@ -1269,30 +1269,9 @@ bnx2_init_rx_context(struct bnx2 *bp, u32 cid)
val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2;
val |= 0x02 << 8;
if (CHIP_NUM(bp) == CHIP_NUM_5709) {
u32 lo_water, hi_water;
if (bp->flow_ctrl & FLOW_CTRL_TX)
lo_water = BNX2_L2CTX_LO_WATER_MARK_DEFAULT;
else
lo_water = BNX2_L2CTX_LO_WATER_MARK_DIS;
if (lo_water >= bp->rx_ring_size)
lo_water = 0;
hi_water = min_t(int, bp->rx_ring_size / 4, lo_water + 16);
if (hi_water <= lo_water)
lo_water = 0;
hi_water /= BNX2_L2CTX_HI_WATER_MARK_SCALE;
lo_water /= BNX2_L2CTX_LO_WATER_MARK_SCALE;
if (bp->flow_ctrl & FLOW_CTRL_TX)
val |= BNX2_L2CTX_FLOW_CTRL_ENABLE;
if (hi_water > 0xf)
hi_water = 0xf;
else if (hi_water == 0)
lo_water = 0;
val |= lo_water | (hi_water << BNX2_L2CTX_HI_WATER_MARK_SHIFT);
}
bnx2_ctx_wr(bp, rx_cid_addr, BNX2_L2CTX_CTX_TYPE, val);
}
......@@ -1373,8 +1352,7 @@ bnx2_set_mac_link(struct bnx2 *bp)
/* Acknowledge the interrupt. */
REG_WR(bp, BNX2_EMAC_STATUS, BNX2_EMAC_STATUS_LINK_CHANGE);
if (CHIP_NUM(bp) == CHIP_NUM_5709)
bnx2_init_all_rx_contexts(bp);
bnx2_init_all_rx_contexts(bp);
}
static void
......@@ -4974,6 +4952,11 @@ bnx2_init_chip(struct bnx2 *bp)
REG_WR(bp, BNX2_HC_CONFIG, val);
if (bp->rx_ticks < 25)
bnx2_reg_wr_ind(bp, BNX2_FW_RX_LOW_LATENCY, 1);
else
bnx2_reg_wr_ind(bp, BNX2_FW_RX_LOW_LATENCY, 0);
for (i = 1; i < bp->irq_nvecs; i++) {
u32 base = ((i - 1) * BNX2_HC_SB_CONFIG_SIZE) +
BNX2_HC_SB_CONFIG_1;
......@@ -5242,18 +5225,20 @@ bnx2_init_all_rings(struct bnx2 *bp)
bnx2_init_rx_ring(bp, i);
if (bp->num_rx_rings > 1) {
u32 tbl_32;
u8 *tbl = (u8 *) &tbl_32;
bnx2_reg_wr_ind(bp, BNX2_RXP_SCRATCH_RSS_TBL_SZ,
BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES);
u32 tbl_32 = 0;
for (i = 0; i < BNX2_RXP_SCRATCH_RSS_TBL_MAX_ENTRIES; i++) {
tbl[i % 4] = i % (bp->num_rx_rings - 1);
if ((i % 4) == 3)
bnx2_reg_wr_ind(bp,
BNX2_RXP_SCRATCH_RSS_TBL + i,
cpu_to_be32(tbl_32));
int shift = (i % 8) << 2;
tbl_32 |= (i % (bp->num_rx_rings - 1)) << shift;
if ((i % 8) == 7) {
REG_WR(bp, BNX2_RLUP_RSS_DATA, tbl_32);
REG_WR(bp, BNX2_RLUP_RSS_COMMAND, (i >> 3) |
BNX2_RLUP_RSS_COMMAND_RSS_WRITE_MASK |
BNX2_RLUP_RSS_COMMAND_WRITE |
BNX2_RLUP_RSS_COMMAND_HASH_MASK);
tbl_32 = 0;
}
}
val = BNX2_RLUP_RSS_CONFIG_IPV4_RSS_TYPE_ALL_XI |
......
......@@ -352,12 +352,7 @@ struct l2_fhdr {
#define BNX2_L2CTX_BD_PRE_READ 0x00000000
#define BNX2_L2CTX_CTX_SIZE 0x00000000
#define BNX2_L2CTX_CTX_TYPE 0x00000000
#define BNX2_L2CTX_LO_WATER_MARK_DEFAULT 4
#define BNX2_L2CTX_LO_WATER_MARK_SCALE 4
#define BNX2_L2CTX_LO_WATER_MARK_DIS 0
#define BNX2_L2CTX_HI_WATER_MARK_SHIFT 4
#define BNX2_L2CTX_HI_WATER_MARK_SCALE 16
#define BNX2_L2CTX_WATER_MARKS_MSK 0x000000ff
#define BNX2_L2CTX_FLOW_CTRL_ENABLE 0x000000ff
#define BNX2_L2CTX_CTX_TYPE_SIZE_L2 ((0x20/20)<<16)
#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE (0xf<<28)
#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED (0<<28)
......@@ -4185,6 +4180,15 @@ struct l2_fhdr {
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_IP_ONLY_XI (2L<<2)
#define BNX2_RLUP_RSS_CONFIG_IPV6_RSS_TYPE_RES_XI (3L<<2)
#define BNX2_RLUP_RSS_COMMAND 0x00002048
#define BNX2_RLUP_RSS_COMMAND_RSS_IND_TABLE_ADDR (0xfUL<<0)
#define BNX2_RLUP_RSS_COMMAND_RSS_WRITE_MASK (0xffUL<<4)
#define BNX2_RLUP_RSS_COMMAND_WRITE (1UL<<12)
#define BNX2_RLUP_RSS_COMMAND_READ (1UL<<13)
#define BNX2_RLUP_RSS_COMMAND_HASH_MASK (0x7UL<<14)
#define BNX2_RLUP_RSS_DATA 0x0000204c
/*
* rbuf_reg definition
......@@ -6077,6 +6081,7 @@ struct l2_fhdr {
#define BNX2_COM_SCRATCH 0x00120000
#define BNX2_FW_RX_LOW_LATENCY 0x00120058
#define BNX2_FW_RX_DROP_COUNT 0x00120084
......
......@@ -35,11 +35,11 @@ fw-shipped-$(CONFIG_ATM_AMBASSADOR) += atmsar11.fw
fw-shipped-$(CONFIG_BNX2X) += bnx2x/bnx2x-e1-6.0.34.0.fw \
bnx2x/bnx2x-e1h-6.0.34.0.fw \
bnx2x/bnx2x-e2-6.0.34.0.fw
fw-shipped-$(CONFIG_BNX2) += bnx2/bnx2-mips-09-5.0.0.j15.fw \
bnx2/bnx2-rv2p-09-5.0.0.j10.fw \
bnx2/bnx2-rv2p-09ax-5.0.0.j10.fw \
bnx2/bnx2-mips-06-5.0.0.j6.fw \
bnx2/bnx2-rv2p-06-5.0.0.j3.fw
fw-shipped-$(CONFIG_BNX2) += bnx2/bnx2-mips-09-6.0.17.fw \
bnx2/bnx2-rv2p-09-6.0.17.fw \
bnx2/bnx2-rv2p-09ax-6.0.17.fw \
bnx2/bnx2-mips-06-6.0.15.fw \
bnx2/bnx2-rv2p-06-6.0.15.fw
fw-shipped-$(CONFIG_CASSINI) += sun/cassini.bin
fw-shipped-$(CONFIG_COMPUTONE) += intelliport2.bin
fw-shipped-$(CONFIG_CHELSIO_T3) += cxgb3/t3b_psram-1.1.0.bin \
......
......@@ -699,15 +699,16 @@ Found in hex form in kernel source.
Driver: BNX2 - Broadcom NetXtremeII
File: bnx2/bnx2-mips-06-4.6.16.fw
File: bnx2/bnx2-rv2p-06-4.6.16.fw
File: bnx2/bnx2-mips-09-4.6.17.fw
File: bnx2/bnx2-rv2p-09-4.6.15.fw
File: bnx2/bnx2-mips-06-6.0.15.fw
File: bnx2/bnx2-rv2p-06-6.0.15.fw
File: bnx2/bnx2-mips-09-6.0.17.fw
File: bnx2/bnx2-rv2p-09-6.0.17.fw
File: bnx2/bnx2-rv2p-09ax-6.0.17.fw
Licence:
This file contains firmware data derived from proprietary unpublished
source code, Copyright (c) 2004 - 2009 Broadcom Corporation.
source code, Copyright (c) 2004 - 2010 Broadcom Corporation.
Permission is hereby granted for the distribution of this firmware data
in hexadecimal or equivalent format, provided this copyright notice is
......
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