Commit 4e4628aa authored by Mauro Ribeiro's avatar Mauro Ribeiro

Merge branch 'odroidxu3-3.10.y' of 192.168.2.249:root/linux into odroidxu3-3.10.y

Conflicts:
	drivers/gpu/drm/exynos/exynos_hdmi.c

Change-Id: I1e5d087b8bfb0056c1194b25189e25d867adfab2
parents 8101aec8 fae1fa05
......@@ -91,5 +91,5 @@ mpp61 61 gpo, dev(wen1), uart1(txd), audio(rclk)
mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
audio(mclk), uart0(cts)
mpp63 63 gpo, spi0(sck), tclk
mpp64 64 gpio, spi0(miso), spi0-1(cs1)
mpp65 65 gpio, spi0(mosi), spi0-1(cs2)
mpp64 64 gpio, spi0(miso), spi0(cs1)
mpp65 65 gpio, spi0(mosi), spi0(cs2)
......@@ -41,15 +41,15 @@ mpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
mpp21 21 gpio, ge0(rxd5), ge1(rxd3), lcd(d21), mem(bat)
mpp22 22 gpio, ge0(rxd6), ge1(rxctl), lcd(d22), sata0(prsnt)
mpp23 23 gpio, ge0(rxd7), ge1(rxclk), lcd(d23), sata1(prsnt)
mpp24 24 gpio, lcd(hsync), sata1(prsnt), nf(bootcs-re), tdm(rst)
mpp25 25 gpio, lcd(vsync), sata0(prsnt), nf(bootcs-we), tdm(pclk)
mpp26 26 gpio, lcd(clk), tdm(fsync), vdd(cpu1-pd)
mpp24 24 gpio, lcd(hsync), sata1(prsnt), tdm(rst)
mpp25 25 gpio, lcd(vsync), sata0(prsnt), tdm(pclk)
mpp26 26 gpio, lcd(clk), tdm(fsync)
mpp27 27 gpio, lcd(e), tdm(dtx), ptp(trig)
mpp28 28 gpio, lcd(pwm), tdm(drx), ptp(evreq)
mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk), vdd(cpu0-pd)
mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk)
mpp30 30 gpio, tdm(int1), sd0(clk)
mpp31 31 gpio, tdm(int2), sd0(cmd), vdd(cpu0-pd)
mpp32 32 gpio, tdm(int3), sd0(d0), vdd(cpu1-pd)
mpp31 31 gpio, tdm(int2), sd0(cmd)
mpp32 32 gpio, tdm(int3), sd0(d0)
mpp33 33 gpio, tdm(int4), sd0(d1), mem(bat)
mpp34 34 gpio, tdm(int5), sd0(d2), sata0(prsnt)
mpp35 35 gpio, tdm(int6), sd0(d3), sata1(prsnt)
......@@ -57,21 +57,18 @@ mpp36 36 gpio, spi(mosi)
mpp37 37 gpio, spi(miso)
mpp38 38 gpio, spi(sck)
mpp39 39 gpio, spi(cs0)
mpp40 40 gpio, spi(cs1), uart2(cts), lcd(vga-hsync), vdd(cpu1-pd),
pcie(clkreq0)
mpp40 40 gpio, spi(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0)
mpp41 41 gpio, spi(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),
pcie(clkreq1)
mpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer),
vdd(cpu0-pd)
mpp43 43 gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout),
vdd(cpu2-3-pd){1}
mpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer)
mpp43 43 gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout)
mpp44 44 gpio, uart2(cts), uart3(rxd), spi(cs4), pcie(clkreq2),
mem(bat)
mpp45 45 gpio, uart2(rts), uart3(txd), spi(cs5), sata1(prsnt)
mpp46 46 gpio, uart3(rts), uart1(rts), spi(cs6), sata0(prsnt)
mpp47 47 gpio, uart3(cts), uart1(cts), spi(cs7), pcie(clkreq3),
ref(clkout)
mpp48 48 gpio, tclk, dev(burst/last)
mpp48 48 gpio, dev(clkout), dev(burst/last)
* Marvell Armada XP (mv78260 and mv78460 only)
......@@ -83,9 +80,9 @@ mpp51 51 gpio, dev(ad16)
mpp52 52 gpio, dev(ad17)
mpp53 53 gpio, dev(ad18)
mpp54 54 gpio, dev(ad19)
mpp55 55 gpio, dev(ad20), vdd(cpu0-pd)
mpp56 56 gpio, dev(ad21), vdd(cpu1-pd)
mpp57 57 gpio, dev(ad22), vdd(cpu2-3-pd){1}
mpp55 55 gpio, dev(ad20)
mpp56 56 gpio, dev(ad21)
mpp57 57 gpio, dev(ad22)
mpp58 58 gpio, dev(ad23)
mpp59 59 gpio, dev(ad24)
mpp60 60 gpio, dev(ad25)
......@@ -95,6 +92,3 @@ mpp63 63 gpio, dev(ad28)
mpp64 64 gpio, dev(ad29)
mpp65 65 gpio, dev(ad30)
mpp66 66 gpio, dev(ad31)
Notes:
* {1} vdd(cpu2-3-pd) only available on mv78460.
......@@ -4,9 +4,9 @@ Required properties:
- compatible : "arm,pl022", "arm,primecell"
- reg : Offset and length of the register set for the device
- interrupts : Should contain SPI controller interrupt
- num-cs : total number of chipselects
Optional properties:
- num-cs : total number of chipselects
- cs-gpios : should specify GPIOs used for chipselects.
The gpios will be referred to as reg = <index> in the SPI child nodes.
If unspecified, a single SPI device without a chip select can be used.
......
VERSION = 3
PATCHLEVEL = 10
SUBLEVEL = 82
SUBLEVEL = 92
EXTRAVERSION =
NAME = TOSSUG Baby Fish
......
......@@ -25,10 +25,11 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
" scond %3, [%1] \n"
" bnz 1b \n"
"2: \n"
: "=&r"(prev)
: "r"(ptr), "ir"(expected),
"r"(new) /* can't be "ir". scond can't take limm for "b" */
: "cc");
: "=&r"(prev) /* Early clobber, to prevent reg reuse */
: "r"(ptr), /* Not "m": llock only supports reg direct addr mode */
"ir"(expected),
"r"(new) /* can't be "ir". scond can't take LIMM for "b" */
: "cc", "memory"); /* so that gcc knows memory is being written here */
return prev;
}
......
......@@ -83,7 +83,7 @@ struct callee_regs {
long r13;
};
#define instruction_pointer(regs) ((regs)->ret)
#define instruction_pointer(regs) (unsigned long)((regs)->ret)
#define profile_pc(regs) instruction_pointer(regs)
/* return 1 if user mode or 0 if kernel mode */
......
......@@ -55,6 +55,14 @@ endif
comma = ,
#
# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and
# later may result in code being generated that handles signed short and signed
# char struct members incorrectly. So disable it.
# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932)
#
KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
# This selects which instruction set is used.
# Note that GCC does not numerically define an architecture version
# macro, but instead defines a whole series of macros which makes
......
......@@ -318,6 +318,7 @@
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
regulator-ramp-delay = <12000>;
regulator-initial-mode = <1>;
};
......@@ -418,7 +419,7 @@
pinctrl-names = "default";
pinctrl-0 = <&audio_irq>;
};
};
};
pinctrl@13400000 {
b_sess0_irq: b-sess0-irq {
......@@ -459,6 +460,8 @@
usb@12000000 {
dwc3-vbus-supply = <&dwc3_vbus>;
vdd33-supply = <&ldo9_reg>;
vdd10-supply = <&ldo11_reg>;
samsung,bsess-gpio = <&gpx3 5 0xf>;
pinctrl-names = "default";
pinctrl-0 = <&b_sess0_irq>;
......@@ -475,6 +478,8 @@
usb@12400000 {
dwc3-vbus-supply = <&dwc3_vbus>;
vdd33-supply = <&ldo9_reg>;
vdd10-supply = <&ldo11_reg>;
samsung,bsess-gpio = <&gpx3 4 0xf>;
pinctrl-names = "default";
pinctrl-0 = <&b_sess1_irq>;
......@@ -504,9 +509,9 @@
};
spi_1: spi@12d30000 {
status = "okay";
cs-gpios = <&gpa2 5 0>;
};
status = "okay";
cs-gpios = <&gpa2 5 0>;
};
spi_2: spi@12d40000 {
status = "disabled";
......@@ -535,22 +540,22 @@
status = "okay";
};
i2s_dummy: dummy-i2s {
compatible = "samsung,dummy-i2s";
status = "okay";
};
i2s_dummy: dummy-i2s {
compatible = "samsung,dummy-i2s";
status = "okay";
};
sound {
compatible = "hardkernel,odroid-max98090";
clocks = <&clock 6>; /* fout_epll */
clock-names = "fout_epll";
samsung,audio-cpu = <&i2s0 /* primary */
&i2s0>; /* secondary */
&i2s0>; /* secondary */
samsung,audio-cpu-spdif = <&spdif>; /* spdif */
samsung,audio-codec = <&audio_codec
&audio_codec>;
&audio_codec>;
samsung,audio-dummy = <&audio_codec_dummy
&audio_codec_dummy>;
&audio_codec_dummy>;
status = "okay";
};
......@@ -570,7 +575,7 @@
compatible = "odroid-fan";
pinctrl-names = "default";
pinctrl-0 = <&pwm0_out>;
pwm_id = <0>;
pwm_periode_ns = <20972>; /* 22kHz */
pwm_duty = <200>; /* initial value : 0 to 255 */
......@@ -587,86 +592,87 @@
fan_speed_3 = <91>;
};
leds {
compatible = "gpio-leds";
/* Blue LED */
hearbeat {
label = "blue:heartbeart";
gpios = <&gpb2 2 0>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
/* Green LED */
eMMC {
label = "green:activity";
gpios = <&gpb2 1 0>;
default-state = "off";
linux,default-trigger = "mmc0";
};
/* Red LED */
microSD {
label = "red:activity";
gpios = <&gpx2 3 0>;
default-state = "off";
linux,default-trigger = "mmc1";
};
};
/* i2c0 INA231 Sensors */
/*
- include/linux/platform_data/ina231.h
config = INA231_CONFIG(VSH_CT(eVSH_CT_8244uS) | \
leds {
compatible = "gpio-leds";
/* Blue LED */
hearbeat {
label = "blue:heartbeart";
gpios = <&gpb2 2 0>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
/* Green LED */
eMMC {
label = "green:activity";
gpios = <&gpb2 1 0>;
default-state = "off";
linux,default-trigger = "mmc0";
};
/* Red LED */
microSD {
label = "red:activity";
gpios = <&gpx2 3 0>;
default-state = "off";
linux,default-trigger = "mmc1";
};
};
/* i2c0 INA231 Sensors */
/*
- include/linux/platform_data/ina231.h
config = INA231_CONFIG(VSH_CT(eVSH_CT_8244uS) | \
VBUS_CT(eVBUS_CT_8244uS) | \
AVG_BIT(eAVG_16) | \
eSHUNT_BUS_VOLT_CONTINUOUS),
update_period = CONVERSION_DELAY(eVSH_CON_8244uS, eVBUS_CON_8244uS, eAVG_CON_16), // unit = usec
*/
*/
i2c@12C60000 {
status = "okay";
clock-frequency = <400000>;
ina231@40 {
clock-frequency = <400000>;
ina231@40 {
compatible = "hardkernel,INA231";
reg = <0x40>;
sensor-name = "sensor_arm";
enable = <0>;
max_A = <9>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
ina231@41 {
sensor-name = "sensor_arm";
enable = <0>;
max_A = <9>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
ina231@41 {
compatible = "hardkernel,INA231";
reg = <0x41>;
sensor-name = "sensor_mem";
enable = <0>;
max_A = <3>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
ina231@44 {
sensor-name = "sensor_mem";
enable = <0>;
max_A = <3>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
ina231@44 {
compatible = "hardkernel,INA231";
reg = <0x44>;
sensor-name = "sensor_g3d";
enable = <0>;
max_A = <5>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
ina231@45 {
sensor-name = "sensor_g3d";
enable = <0>;
max_A = <5>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
ina231@45 {
compatible = "hardkernel,INA231";
reg = <0x45>;
sensor-name = "sensor_kfc";
enable = <0>;
max_A = <2>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
sensor-name = "sensor_kfc";
enable = <0>;
max_A = <2>;
shunt_R_mohm = <10>;
config = <0x45FF>;
update_period = <263808>;
};
};
regulators {
......@@ -697,46 +703,46 @@
vdd-supply = <&ldo8_reg>;
hdmi-en-supply = <&reg_hdmi_en>;
};
/* AOC 22" DP Config */
dp-controller@145B0000 {
status = "disabled";
samsung,hpd-gpio = <&gpx0 7 3>;
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd_gpio>;
samsung,hpd-gpio = <&gpx0 7 3>;
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd_gpio>;
hsync-active-high = <0>;
vsync-active-high = <0>;
interlaced = <0>;
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;