ulsim.c 67.6 KB
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/*
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 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */
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/*! \file ulsim.c
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  \brief Top-level UL simulator
  \author R. Knopp
  \date 2011 - 2014
  \version 0.1
  \company Eurecom
  \email: knopp@eurecom.fr
  \note
  \warning
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*/

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#include <string.h>
#include <math.h>
#include <unistd.h>
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#include "SIMULATION/TOOLS/sim.h"
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#include "PHY/types.h"
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#include "PHY/defs_common.h"
#include "PHY/defs_eNB.h"
#include "PHY/defs_UE.h"
#include "PHY/phy_vars.h"
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#include "SCHED/sched_common_vars.h"
#include "SCHED/sched_eNB.h"
#include "SCHED_UE/sched_UE.h"
#include "LAYER2/MAC/mac_vars.h"
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#include "OCG_vars.h"
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#include "PHY/LTE_TRANSPORT/transport_proto.h"
#include "PHY/LTE_UE_TRANSPORT/transport_proto_ue.h"
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#include "PHY/INIT/phy_init.h"
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#include "unitary_defs.h"

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#include "PHY/TOOLS/lte_phy_scope.h"
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#include "dummy_functions.c"
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#include "common/config/config_load_configmodule.h"
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double cpuf;
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#define inMicroS(a) (((double)(a))/(cpu_freq_GHz*1000.0))
//#define MCS_COUNT 23//added for PHY abstraction
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#include <openair1/SIMULATION/LTE_PHY/common_sim.h>
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channel_desc_t *eNB2UE[NUMBER_OF_eNB_MAX][NUMBER_OF_UE_MAX];
channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX];
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//Added for PHY abstractionopenair1/PHY/TOOLS/lte_phy_scope.h
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node_desc_t *enb_data[NUMBER_OF_eNB_MAX];
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node_desc_t *ue_data[NUMBER_OF_UE_MAX];
//double sinr_bler_map[MCS_COUNT][2][16];

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extern uint16_t beta_ack[16],beta_ri[16],beta_cqi[16];
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//extern  char* namepointer_chMag ;
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int xforms=0;
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FD_lte_phy_scope_enb *form_enb;
char title[255];

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/*the following parameters are used to control the processing times*/
double t_tx_max = -1000000000; /*!< \brief initial max process time for tx */
double t_rx_max = -1000000000; /*!< \brief initial max process time for rx */
double t_tx_min = 1000000000; /*!< \brief initial min process time for tx */
double t_rx_min = 1000000000; /*!< \brief initial min process time for tx */
int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
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int nfapi_mode = 0;

extern void fep_full(RU_t *ru);
extern void ru_fep_full_2thread(RU_t *ru);
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extern void eNB_fep_full(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
extern void eNB_fep_full_2thread(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
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nfapi_dl_config_request_t DL_req;
nfapi_ul_config_request_t UL_req;
nfapi_hi_dci0_request_t HI_DCI0_req;
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nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_DL_PDU];
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nfapi_tx_request_pdu_t tx_pdu_list[MAX_NUM_TX_REQUEST_PDU];
nfapi_tx_request_t TX_req;
Sched_Rsp_t sched_resp;

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THREAD_STRUCT thread_struct;
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void
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fill_nfapi_ulsch_config_request(nfapi_ul_config_request_pdu_t *ul_config_pdu,
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                                uint8_t                        cqi_req,
                                uint8_t                        p_eNB,
                                uint8_t                        cqi_ReportModeAperiodic,
                                uint8_t                        betaOffset_CQI_Index,
                                uint8_t                        betaOffset_RI_Index,
                                uint8_t                        dl_cqi_pmi_size,
                                uint8_t                        tmode,
                                uint32_t                       handle,
                                uint16_t                       rnti,
                                uint8_t                        resource_block_start,
                                uint8_t                        number_of_resource_blocks,
                                uint8_t                        modulation_type,
                                uint8_t                        cyclic_shift_2_for_drms,
                                uint8_t                        frequency_hopping_enabled_flag,
                                uint8_t                        frequency_hopping_bits,
                                uint8_t                        new_data_indication,
                                uint8_t                        redundancy_version,
                                uint8_t                        harq_process_number,
                                uint8_t                        ul_tx_mode,
                                uint8_t                        current_tx_nb,
                                uint8_t                        n_srs,
                                uint16_t                       size) {
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  memset((void *) ul_config_pdu, 0, sizeof(nfapi_ul_config_request_pdu_t));
  ul_config_pdu->pdu_type                                                    = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
  ul_config_pdu->pdu_size                                                    = (uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_pdu));
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.tl.tag                             = NFAPI_UL_CONFIG_REQUEST_ULSCH_PDU_REL8_TAG;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle                             = handle;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti                               = rnti;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start               = resource_block_start;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks          = number_of_resource_blocks;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type                    = modulation_type;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms            = cyclic_shift_2_for_drms;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag     = frequency_hopping_enabled_flag;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits             = frequency_hopping_bits;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication                = new_data_indication;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version                 = redundancy_version;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number                = harq_process_number;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode                         = ul_tx_mode;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb                      = current_tx_nb;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs                              = n_srs;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size                               = size;

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  //printf("Filling ul_config_pdu : Q %d, TBS %d, rv %d, ndi %d\n", modulation_type,size,redundancy_version,new_data_indication);

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  if (cqi_req == 1) {
    // Add CQI portion
    ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
    ul_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.tl.tag = NFAPI_UL_CONFIG_REQUEST_CQI_RI_INFORMATION_REL9_TAG;
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
    LOG_D(MAC, "report_type %d\n",ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type);

    if (p_eNB <= 2
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        && (tmode == 3 || tmode == 4 || tmode == 8 || tmode == 9 || tmode == 10))
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      ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
    else if (p_eNB <= 2) ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
    else if (p_eNB == 4) ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;

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    for (int ri = 0;
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         ri <  (1 << ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);
         ri++)
      ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =  dl_cqi_pmi_size;
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    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = betaOffset_CQI_Index;
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri  = betaOffset_RI_Index;
  }
}
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void fill_ulsch_dci(PHY_VARS_eNB *eNB,
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                    int frame,
                    int subframe,
                    Sched_Rsp_t *sched_resp,
                    uint16_t rnti,
                    void *UL_dci,
                    int first_rb,
                    int nb_rb,
                    int mcs,
                    int modulation_type,
                    int ndi,
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                    int TBS,
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                    int cqi_flag,
                    uint8_t beta_CQI,
                    uint8_t beta_RI,
                    uint8_t cqi_size) {
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  nfapi_ul_config_request_body_t *ul_req=&sched_resp->UL_req->ul_config_request_body;
  int harq_pid = ((frame*10)+subframe)&7;

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  //printf("ulsch in frame %d, subframe %d => harq_pid %d, mcs %d, ndi %d\n",frame,subframe,harq_pid,mcs,ndi);
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  switch (eNB->frame_parms.N_RB_UL) {
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    case 6:
      break;
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    case 25:
      if (eNB->frame_parms.frame_type == TDD) {
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->type    = 0;
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
        //printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_5MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->mcs     = mcs;
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->ndi     = ndi;
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->TPC     = 0;
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->cqi_req = cqi_flag&1;
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->cshift  = 0;
        ((DCI0_5MHz_TDD_1_6_t *)UL_dci)->dai     = 1;
      } else {
        ((DCI0_5MHz_FDD_t *)UL_dci)->type    = 0;
        ((DCI0_5MHz_FDD_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
        //      printf("nb_rb %d/%d, rballoc %d (dci %x) (dcip %p)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_5MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci,UL_dci);
        ((DCI0_5MHz_FDD_t *)UL_dci)->mcs     = mcs;
        ((DCI0_5MHz_FDD_t *)UL_dci)->ndi     = ndi;
        ((DCI0_5MHz_FDD_t *)UL_dci)->TPC     = 0;
        ((DCI0_5MHz_FDD_t *)UL_dci)->cqi_req = cqi_flag&1;
        ((DCI0_5MHz_FDD_t *)UL_dci)->cshift  = 0;
      }
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      break;

    case 50:
      if (eNB->frame_parms.frame_type == TDD) {
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->type    = 0;
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
        //      printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_10MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->mcs     = mcs;
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->ndi     = ndi;
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->TPC     = 0;
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->cqi_req = cqi_flag&1;
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->cshift  = 0;
        ((DCI0_10MHz_TDD_1_6_t *)UL_dci)->dai     = 1;
      } else {
        ((DCI0_10MHz_FDD_t *)UL_dci)->type    = 0;
        ((DCI0_10MHz_FDD_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
        //printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_10MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
        ((DCI0_10MHz_FDD_t *)UL_dci)->mcs     = mcs;
        ((DCI0_10MHz_FDD_t *)UL_dci)->ndi     = ndi;
        ((DCI0_10MHz_FDD_t *)UL_dci)->TPC     = 0;
        ((DCI0_10MHz_FDD_t *)UL_dci)->cqi_req = cqi_flag&1;
        ((DCI0_10MHz_FDD_t *)UL_dci)->cshift  = 0;
      }

      break;

    case 100:
      if (eNB->frame_parms.frame_type == TDD) {
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->type    = 0;
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
        //      printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_20MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->mcs     = mcs;
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->ndi     = ndi;
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->TPC     = 0;
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->cqi_req = cqi_flag&1;
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->cshift  = 0;
        ((DCI0_20MHz_TDD_1_6_t *)UL_dci)->dai     = 1;
      } else {
        ((DCI0_20MHz_FDD_t *)UL_dci)->type    = 0;
        ((DCI0_20MHz_FDD_t *)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb); // 12 RBs from position 8
        //   printf("nb_rb %d/%d, rballoc %d (dci %x) (UL_dci %p)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_20MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci,(void*)UL_dci);
        ((DCI0_20MHz_FDD_t *)UL_dci)->mcs     = mcs;
        ((DCI0_20MHz_FDD_t *)UL_dci)->ndi     = ndi;
        ((DCI0_20MHz_FDD_t *)UL_dci)->TPC     = 0;
        ((DCI0_20MHz_FDD_t *)UL_dci)->cqi_req = cqi_flag&1;
        ((DCI0_20MHz_FDD_t *)UL_dci)->cshift  = 0;
      }
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      break;
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    default:
      break;
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  }

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  fill_nfapi_ulsch_config_request(&ul_req->ul_config_pdu_list[0],
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                                  cqi_flag&1,
                                  1,  // p_eNB
                                  0,  // reportmode Aperiodic
                                  beta_CQI,
                                  beta_RI,
                                  cqi_size,
                                  //cc,
                                  //UE_template->physicalConfigDedicated,
                                  1,
                                  0,
                                  14,     // rnti
                                  first_rb, // resource_block_start
                                  nb_rb,  // number_of_resource_blocks
                                  modulation_type,
                                  0,  // cyclic_shift_2_for_drms
                                  0,  // frequency_hopping_enabled_flag
                                  0,  // frequency_hopping_bits
                                  ndi,  // new_data_indication
                                  mcs>28?(mcs-28):0,  // redundancy_version
                                  harq_pid, // harq_process_number
                                  0,  // ul_tx_mode
                                  0,  // current_tx_nb
                                  0,  // n_srs
                                  TBS);
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  sched_resp->UL_req->header.message_id = NFAPI_UL_CONFIG_REQUEST;
  ul_req->number_of_pdus=1;
  ul_req->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
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}
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enum eTypes { eBool, eInt, eFloat, eText };
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static int verbose,help,disable_bundling=0,cqi_flag=0, extended_prefix_flag=0, test_perf=0, subframe=3, transmission_m=1,n_rx=1;
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int main(int argc, char **argv) {
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  int i,j,aa,u;
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  PHY_VARS_eNB *eNB;
  PHY_VARS_UE *UE;
  RU_t *ru;
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  int aarx,aatx;
  double channelx,channely;
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  static double sigma2, sigma2_dB=10,SNR,SNR2=0,snr0=-2.0,snr1,SNRmeas,rate,saving_bler=0;
  static double input_snr_step=.2,snr_int=30;
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  double blerr;
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  int rvidx[8]= {0,2,3,1,0,2,3,1};
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  int **txdata;
  LTE_DL_FRAME_PARMS *frame_parms;
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  double s_re0[30720],s_im0[30720],r_re0[30720],r_im0[30720];
  double s_re1[30720],s_im1[30720],r_re1[30720],r_im1[30720];
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  double r_re2[30720],r_im2[30720];
  double r_re3[30720],r_im3[30720];
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  double *s_re[2]= {s_re0,s_re1};
  double *s_im[2]= {s_im0,s_im1};
  double *r_re[4]= {r_re0,r_re1,r_re2,r_re3};
  double *r_im[4]= {r_im0,r_im1,r_im2,r_im3};
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  double forgetting_factor=0.0; //in [0,1] 0 means a new channel every time, 1 means keep the same channel
  double iqim=0.0;
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  int cqi_error,cqi_errors,ack_errors,cqi_crc_falsepositives,cqi_crc_falsenegatives;
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  int ch_realization;
  int eNB_id = 0;
  int chMod = 0 ;
  int UE_id = 0;
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  static int nb_rb=25,first_rb=0,mcs=0,round=0;
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  //unsigned char l;
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  static int awgn_flag = 0 ;
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  SCM_t channel_model=Rice1;
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  unsigned char *input_buffer=0,harq_pid;
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  unsigned short input_buffer_length;
  unsigned int ret;
  unsigned int coded_bits_per_codeword,nsymb;
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  unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
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  FILE *bler_fd=NULL;
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  char bler_fname[512];
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  FILE *time_meas_fd=NULL;
  char time_meas_fname[256];
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  FILE *input_fdUL=NULL,*trch_out_fdUL=NULL;
  //  unsigned char input_file=0;
  char input_val_str[50],input_val_str2[50];
  //  FILE *rx_frame_file;
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  FILE *csv_fdUL=NULL;
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  /*
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    FILE *fperen=NULL;
    char fperen_name[512];
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    FILE *fmageren=NULL;
    char fmageren_name[512];
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    FILE *flogeren=NULL;
    char flogeren_name[512];
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  */
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  /* FILE *ftxlev;
     char ftxlev_name[512];
  */
  char csv_fname[512];
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  static int n_frames=5000;
  static int n_ch_rlz = 1;
  static int abstx = 0;
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  int hold_channel=0;
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  channel_desc_t *UE2eNB;
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  //uint8_t control_only_flag = 0;
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  static int delay = 0;
  static double maxDoppler = 0.0;
  static int srs_flag = 0;
  static int N_RB_DL=25,osf=1;
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  //uint8_t cyclic_shift = 0;
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  static uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2,cqi_size=11;
  static uint8_t tdd_config=3,frame_type=FDD;
  static int N0=30;
  static double tx_gain=1.0;
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  double cpu_freq_GHz;
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  int iter_trials;
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  uint32_t UL_alloc_pdu;
  int s,Kr,Kr_bytes;
  int dump_perf=0;
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  static int dump_table =0;
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  double effective_rate=0.0;
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  char channel_model_input[10]= {0};
  static int max_turbo_iterations=4;
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  int nb_rb_set = 0;
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  int sf;
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  static int threequarter_fs=0;
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  int ndi;
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  opp_enabled=1; // to enable the time meas
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  sched_resp.DL_req = &DL_req;
  sched_resp.UL_req = &UL_req;
  sched_resp.HI_DCI0_req = &HI_DCI0_req;
  sched_resp.TX_req = &TX_req;
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  memset((void *)&DL_req,0,sizeof(DL_req));
  memset((void *)&UL_req,0,sizeof(UL_req));
  memset((void *)&HI_DCI0_req,0,sizeof(HI_DCI0_req));
  memset((void *)&TX_req,0,sizeof(TX_req));
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  UL_req.ul_config_request_body.ul_config_pdu_list = ul_config_pdu_list;
  TX_req.tx_request_body.tx_pdu_list = tx_pdu_list;
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  cpu_freq_GHz = (double)get_cpu_freq_GHz();
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  cpuf = cpu_freq_GHz;
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  set_parallel_conf("PARALLEL_SINGLE_THREAD");

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  printf("Detected cpu_freq %f GHz\n",cpu_freq_GHz);
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  AssertFatal(load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) != NULL,
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              "cannot load configuration module, exiting\n");
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  logInit();
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  // enable these lines if you need debug info
  // however itti will catch all signals, so ctrl-c won't work anymore
  // alternatively you can disable ITTI completely in CMakeLists.txt
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  //itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, NULL);
  //set_comp_log(PHY,LOG_DEBUG,LOG_MED,1);
  //set_glog(LOG_DEBUG,LOG_MED);
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  //hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF
  static paramdef_t options[] = {
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    { "awgn", "Use AWGN channel and not multipath", PARAMFLAG_BOOL, strptr:NULL, defintval:0, TYPE_INT, 0, NULL, NULL },
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    { "BnbRBs", "The LTE bandwith in RBs (100 is 20MHz)",0, iptr:&N_RB_DL,  defintval:25, TYPE_INT, 0 },
    { "mcs", "The MCS to use", 0, iptr:&mcs,  defintval:10, TYPE_INT, 0 },
    { "nb_frame", "number of frame in a test",0, iptr:&n_frames,  defintval:1, TYPE_INT, 0 },
    { "snr", "starting snr", 0, dblptr:&snr0,  defdblval:-2.9, TYPE_DOUBLE, 0 },
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    { "wsnrInterrupt", "snr int ?", 0, dblptr:&snr_int,  defdblval:30, TYPE_DOUBLE, 0 },
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    { "e_snr_step", "step increasing snr",0, dblptr:&input_snr_step,  defdblval:0.2, TYPE_DOUBLE, 0 },
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    { "rb_dynamic", "number of rb in dynamic allocation",0, iptr:NULL,  defintval:0, TYPE_INT, 0 },
    { "first_rb", "first rb used in dynamic allocation",0, iptr:&first_rb,  defintval:0, TYPE_INT, 0 },
    { "osrs", "enable srs generation",PARAMFLAG_BOOL, iptr:&srs_flag,  defintval:0, TYPE_INT, 0 },
    { "gchannel", "[A:M] Use 3GPP 25.814 SCM-A/B/C/D('A','B','C','D') or 36-101 EPA('E'), EVA ('F'),ETU('G') models (ignores delay spread and Ricean factor), Rayghleigh8 ('H'), Rayleigh1('I'), Rayleigh1_corr('J'), Rayleigh1_anticorr ('K'),  Rice8('L'), Rice1('M')",0, strptr:NULL,  defstrval:NULL, TYPE_STRING, 0 },
    { "delay_chan", "Channel delay",0, iptr:&delay,  defintval:0, TYPE_INT, 0 },
    { "Doppler", "Maximum doppler shift",0, dblptr:&maxDoppler,  defdblval:0.0, TYPE_DOUBLE, 0 },
    { "Zdump", "dump table",PARAMFLAG_BOOL,  iptr:&dump_table, defintval:0, TYPE_INT, 0 },
    { "Forms", "Display the soft scope", PARAMFLAG_BOOL, iptr:&xforms,  defintval:0, TYPE_INT, 0 },
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    { "Lparallel", "Enable parallel execution",0, strptr:NULL,  defstrval:NULL, TYPE_STRING,  0 },
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    { "Iterations", "Number of iterations of turbo decoder", 0, iptr:&max_turbo_iterations,  defintval:4, TYPE_INT, 0 },
    { "Performance", "Display CPU perfomance of each L1 piece", PARAMFLAG_BOOL,  iptr:NULL,  defintval:0, TYPE_INT, 0 },
    { "Q_cqi", "Enable CQI", PARAMFLAG_BOOL, iptr:&cqi_flag,  defintval:0, TYPE_INT, 0 },
    { "prefix_extended","Extended prefix", PARAMFLAG_BOOL, iptr:&extended_prefix_flag,  defintval:0, TYPE_INT, 0 },
    { "RI_beta", "TBD", 0, iptr:NULL,  defintval:0, TYPE_INT, 0 },
    { "CQI_beta", "TBD",0, iptr:NULL,  defintval:0, TYPE_INT, 0 },
    { "ACK_beta", "TBD",0, iptr:NULL,  defintval:0, TYPE_INT, 0 },
    { "input_file", "input IQ data file",0, iptr:NULL,  defintval:0, TYPE_INT, 0 },
    { "N0", "N0",0, iptr:&N0,  defintval:30, TYPE_INT, 0 },
    { "EsubSampling","three quarters sub-sampling",PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0 },
    { "TDD", "Enable TDD and set the tdd configuration mode",0, iptr:NULL,  defintval:25, TYPE_INT, 0 },
    { "Subframe", "subframe to use",0, iptr:&subframe,  defintval:3, TYPE_INT, 0 },
    { "xTransmission","transmission mode (1 or 2 are supported)",0, iptr:NULL,  defintval:25, TYPE_INT, 0 },
    { "yN_rx", "TBD: n_rx",0, iptr:&n_rx,  defintval:1, TYPE_INT, 0 },
    { "bundling_disable", "bundling disable",PARAMFLAG_BOOL,  iptr:&disable_bundling, defintval:0, TYPE_INT, 0 },
    { "Y",  "n_ch_rlz",0, iptr:&n_ch_rlz,  defintval:1, TYPE_INT, 0 },
    { "X",  "abstx", PARAMFLAG_BOOL,  iptr:&abstx, defintval:0, TYPE_INT, 0 },
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    { "Operf", "Set the percentage of effective rate to testbench the modem performance (typically 30 and 70, range 1-100)",0, iptr:&test_perf,  defintval:0, TYPE_INT, 0 },
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    { "verbose", "display debug text", PARAMFLAG_BOOL,  iptr:&verbose, defintval:0, TYPE_INT, 0 },
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    { "help", "display help and exit", PARAMFLAG_BOOL,  iptr:&help, defintval:0, TYPE_INT, 0 },
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    { "", "",0,  iptr:NULL, defintval:0, TYPE_INT, 0 },
  };
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  struct option * long_options = parse_oai_options(options); 
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  int option_index;
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  int res;
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  while ((res=getopt_long_only(argc, argv, "", long_options, &option_index)) == 0) {
    if (options[option_index].voidptr != NULL ) {
      if (long_options[option_index].has_arg==no_argument)
        *(bool *)options[option_index].iptr=1;
      else switch (options[option_index].type) {
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	case TYPE_INT:
	  *(int *)options[option_index].iptr=atoi(optarg);
	  break;

	case TYPE_DOUBLE:
	  *(double *)options[option_index].dblptr=atof(optarg);
	  break;

	case TYPE_UINT8:
	  *(uint8_t *)options[option_index].dblptr=atoi(optarg);
	  break;
	  	    
	case TYPE_UINT16:
	  *(uint16_t *)options[option_index].dblptr=atoi(optarg);
	  break;
	  
	default:
	  printf("not decoded type.\n");
	  exit(1);
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        }
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      continue;
    }
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    switch (long_options[option_index].name[0]) {
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    case 'T':
      tdd_config=atoi(optarg);
      frame_type=TDD;
      break;

    case 'a':
      channel_model = AWGN;
      chMod = 1;
      break;

    case 'g':
      strncpy(channel_model_input,optarg,9);
      struct tmp {
	char opt;
	int m;
	int M;
      }
      tmp[]= {
	{'A',SCM_A,2},
	{'B',SCM_B,3},
	{'C',SCM_C,4},
	{'D',SCM_D,5},
	{'E',EPA,6},
	{'G',ETU,8},
	{'H',Rayleigh8,9},
	{'I',Rayleigh1,10},
	{'J',Rayleigh1_corr,11},
	{'K',Rayleigh1_anticorr,12},
	{'L',Rice8,13},
	{'M',Rice1,14},
	{'N',AWGN,1},
	{0,0,0}
      };
      struct tmp *ptr;

      for (ptr=tmp; ptr->opt!=0; ptr++)
	if ( ptr->opt == optarg[0] ) {
	  channel_model=ptr->m;
	  chMod=ptr->M;
	  break;
	}

      AssertFatal(ptr->opt != 0, "Unsupported channel model: %s !\n", optarg );
      break;

    case 'x':
      transmission_m=atoi(optarg);
      AssertFatal(transmission_m==1 || transmission_m==2,
		  "Unsupported transmission mode %d\n",transmission_m);
      break;

    case 'r':
      nb_rb = atoi(optarg);
      nb_rb_set = 1;
      break;
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      //case 'c':
      //  cyclic_shift = atoi(optarg);
      //  break;
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    case 'i':
      input_fdUL = fopen(optarg,"r");
      printf("Reading in %s (%p)\n",optarg,input_fdUL);
      AssertFatal(input_fdUL != (FILE *)NULL,"Unknown file %s\n",optarg);
      break;

    case 'A':
      beta_ACK = atoi(optarg);
      AssertFatal(beta_ACK>15,"beta_ack must be in (0..15)\n");
      break;

    case 'C':
      beta_CQI = atoi(optarg);
      AssertFatal((beta_CQI>15)||(beta_CQI<2),"beta_cqi must be in (2..15)\n");
      break;

    case 'R':
      beta_RI = atoi(optarg);
      AssertFatal((beta_RI>15)||(beta_RI<2),"beta_ri must be in (0..13)\n");
      break;

    case 'P':
      dump_perf=1;
      opp_enabled=1;
      break;

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    case 'L':
      set_parallel_conf(optarg);
      break;
      
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    default:
      printf("Wrong option: %s\n",long_options[option_index].name);
      exit(1);
      break;
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    }
  }
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  if ( res != -1 ) {
    printf("A wrong option has been found\n");
    exit(1);
  }
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  if (help || verbose )
     display_options_values(options, true);
  if (help)
    exit(0);
  
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  if (thread_struct.parallel_conf != PARALLEL_SINGLE_THREAD)
    set_worker_conf("WORKER_ENABLE");
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  RC.nb_L1_inst = 1;
  RC.nb_RU = 1;
  lte_param_init(&eNB,&UE,&ru,
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                 1,
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                 1,
                 n_rx,
                 1,
                 1,
                 extended_prefix_flag,
                 frame_type,
                 0,
                 tdd_config,
                 N_RB_DL,
                 4,
                 threequarter_fs,
                 osf,
                 0);
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  RC.eNB = (PHY_VARS_eNB ***)malloc(sizeof(PHY_VARS_eNB **));
  RC.eNB[0] = (PHY_VARS_eNB **)malloc(sizeof(PHY_VARS_eNB *));
  RC.ru = (RU_t **)malloc(sizeof(RC.ru));
  RC.eNB[0][0] = eNB;
  RC.ru[0] = ru;

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  for (int k=0; k<eNB->RU_list[0]->nb_rx; k++) eNB->common_vars.rxdataF[k]     =  eNB->RU_list[0]->common.rxdataF[k];
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  memset((void *)&eNB->UL_INFO,0,sizeof(eNB->UL_INFO));
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  printf("Setting indication lists\n");
  eNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list   = eNB->rx_pdu_list;
  eNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list = eNB->crc_pdu_list;
  eNB->UL_INFO.sr_ind.sr_indication_body.sr_pdu_list = eNB->sr_pdu_list;
  eNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list = eNB->harq_pdu_list;
  eNB->UL_INFO.cqi_ind.cqi_pdu_list = eNB->cqi_pdu_list;
  eNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = eNB->cqi_raw_pdu_list;
  printf("lte_param_init done\n");
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  // for a call to phy_reset_ue later we need PHY_vars_UE_g allocated and pointing to UE
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  PHY_vars_UE_g = (PHY_VARS_UE ***)malloc(sizeof(PHY_VARS_UE **));
  PHY_vars_UE_g[0] = (PHY_VARS_UE **) malloc(sizeof(PHY_VARS_UE *));
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  PHY_vars_UE_g[0][0] = UE;

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  if (nb_rb_set == 0)
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    nb_rb = eNB->frame_parms.N_RB_UL;
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  printf("1 . rxdataF_comp[0] %p\n",eNB->pusch_vars[0]->rxdataF_comp[0]);
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  printf("Setting mcs = %d\n",mcs);
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  printf("n_frames = %d\n", n_frames);
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  snr1 = snr0+snr_int;
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  printf("SNR0 %f, SNR1 %f\n",snr0,snr1);
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  frame_parms = &eNB->frame_parms;
  txdata = UE->common_vars.txdata;
  nsymb = (eNB->frame_parms.Ncp == NORMAL) ? 14 : 12;
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  sprintf(bler_fname,"ULbler_mcs%d_nrb%d_ChannelModel%d_nsim%d.csv",mcs,nb_rb,chMod,n_frames);
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  bler_fd = fopen(bler_fname,"w");
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  if (bler_fd==NULL) {
    fprintf(stderr,"Problem creating file %s\n",bler_fname);
    exit(-1);
  }
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  fprintf(bler_fd,"#SNR;mcs;nb_rb;TBS;rate;errors[0];trials[0];errors[1];trials[1];errors[2];trials[2];errors[3];trials[3]\n");
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  if (test_perf != 0) {
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    char hostname[1024];
    hostname[1023] = '\0';
    gethostname(hostname, 1023);
    printf("Hostname: %s\n", hostname);
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    //char dirname[FILENAME_MAX];
    //sprintf(dirname, "%s//SIMU/USER/pre-ci-logs-%s", getenv("OPENAIR_TARGETS"),hostname);
    //mkdir(dirname, 0777);
    sprintf(time_meas_fname,"time_meas_prb%d_mcs%d_antrx%d_channel%s_tx%d.csv",
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            N_RB_DL,mcs,n_rx,channel_model_input,transmission_m);
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    time_meas_fd = fopen(time_meas_fname,"w");
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    if (time_meas_fd==NULL) {
      fprintf(stderr,"Cannot create file %s!\n",time_meas_fname);
      exit(-1);
    }
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  }
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  if(abstx) {
    // CSV file
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    sprintf(csv_fname,"EULdataout_tx%d_mcs%d_nbrb%d_chan%d_nsimus%d_eren.m",transmission_m,mcs,nb_rb,chMod,n_frames);
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    csv_fdUL = fopen(csv_fname,"w");
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    if (csv_fdUL == NULL) {
      fprintf(stderr,"Problem opening file %s\n",csv_fname);
      exit(-1);
    }
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    fprintf(csv_fdUL,"data_all%d=[",mcs);
  }
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  if (xforms==1) {
    fl_initialize (&argc, argv, NULL, 0, 0);
    form_enb = create_lte_phy_scope_enb();
    sprintf (title, "LTE PHY SCOPE eNB");
    fl_show_form (form_enb->lte_phy_scope_enb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
  }
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  UE->pdcch_vars[0][0]->crnti = 14;
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  UE->frame_parms.soundingrs_ul_config_common.enabled_flag = srs_flag;
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  UE->frame_parms.soundingrs_ul_config_common.srs_BandwidthConfig = 2;
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  UE->frame_parms.soundingrs_ul_config_common.srs_SubframeConfig = 3;
  UE->soundingrs_ul_config_dedicated[eNB_id].srsConfigDedicatedSetup = srs_flag;
  UE->soundingrs_ul_config_dedicated[eNB_id].duration = 1;
  UE->soundingrs_ul_config_dedicated[eNB_id].srs_ConfigIndex = 2;
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  UE->soundingrs_ul_config_dedicated[eNB_id].srs_Bandwidth = 0;
  UE->soundingrs_ul_config_dedicated[eNB_id].transmissionComb = 0;
  UE->soundingrs_ul_config_dedicated[eNB_id].freqDomainPosition = 0;
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  UE->soundingrs_ul_config_dedicated[eNB_id].cyclicShift = 0;
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  eNB->frame_parms.soundingrs_ul_config_common.enabled_flag = srs_flag;
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  eNB->frame_parms.soundingrs_ul_config_common.srs_BandwidthConfig = 2;
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  eNB->frame_parms.soundingrs_ul_config_common.srs_SubframeConfig = 3;
  eNB->soundingrs_ul_config_dedicated[UE_id].srsConfigDedicatedSetup = srs_flag;
  eNB->soundingrs_ul_config_dedicated[UE_id].duration = 1;
  eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex = 2;
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  eNB->soundingrs_ul_config_dedicated[UE_id].srs_Bandwidth = 0;
  eNB->soundingrs_ul_config_dedicated[UE_id].transmissionComb = 0;
  eNB->soundingrs_ul_config_dedicated[UE_id].freqDomainPosition = 0;
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  eNB->soundingrs_ul_config_dedicated[UE_id].cyclicShift = 0;
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  eNB->pusch_config_dedicated[UE_id].betaOffset_ACK_Index = beta_ACK;
  eNB->pusch_config_dedicated[UE_id].betaOffset_RI_Index  = beta_RI;
  eNB->pusch_config_dedicated[UE_id].betaOffset_CQI_Index = beta_CQI;
  UE->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index = beta_ACK;
  UE->pusch_config_dedicated[eNB_id].betaOffset_RI_Index  = beta_RI;
  UE->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index = beta_CQI;
  UE->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled = 1;
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  // disable periodic cqi/ri reporting
  UE->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex = -1;
  UE->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = -1;
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  printf("PUSCH Beta : ACK %f, RI %f, CQI %f\n",(double)beta_ack[beta_ACK]/8,(double)beta_ri[beta_RI]/8,(double)beta_cqi[beta_CQI]/8);
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  UE2eNB = new_channel_desc_scm(1,
                                n_rx,
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                                channel_model,
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                                N_RB2sampling_rate(eNB->frame_parms.N_RB_UL),
                                N_RB2channel_bandwidth(eNB->frame_parms.N_RB_UL),
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                                forgetting_factor,
                                delay,
                                0);
  // set Doppler
  UE2eNB->max_Doppler = maxDoppler;

  // NN: N_RB_UL has to be defined in ulsim
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  for (int k=0; k<NUMBER_OF_UE_MAX; k++) eNB->ulsch[k] = new_eNB_ulsch(max_turbo_iterations,N_RB_DL,0);

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  UE->ulsch[0]   = new_ue_ulsch(N_RB_DL,0);
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  printf("ULSCH %p\n",UE->ulsch[0]);
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  if(get_thread_worker_conf() == WORKER_ENABLE) {
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    extern void init_fep_thread(PHY_VARS_eNB *, pthread_attr_t *);
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    extern void init_td_thread(PHY_VARS_eNB *);
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    init_fep_thread(eNB,NULL);
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    init_td_thread(eNB);
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  }
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  // Create transport channel structures for 2 transport blocks (MIMO)
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  for (i=0; i<2; i++) {
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    eNB->dlsch[0][i] = new_eNB_dlsch(1,8,1827072,N_RB_DL,0,&eNB->frame_parms);
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    if (!eNB->dlsch[0][i]) {
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      printf("Can't get eNB dlsch structures\n");
      exit(-1);
    }
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    eNB->dlsch[0][i]->rnti = 14;
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  }
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  /* allocate memory for both subframes (only one is really used
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     but there is now "copy_harq_proc_struct" which needs both
     to be valid)
     TODO: refine this somehow (necessary?)
  */
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  for (sf = 0; sf < 2; sf++) {
    for (i=0; i<2; i++) {
      UE->dlsch[sf][0][i]  = new_ue_dlsch(1,8,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
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      if (!UE->dlsch[sf][0][i]) {
        printf("Can't get ue dlsch structures\n");
        exit(-1);
      }
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      UE->dlsch[sf][0][i]->rnti   = 14;
    }
  }
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  UE->dlsch_SI[0]  = new_ue_dlsch(1,1,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
  UE->dlsch_ra[0]  = new_ue_dlsch(1,1,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
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  UE->measurements.rank[0] = 0;
  UE->transmission_mode[0] = 2;
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  UE->pucch_config_dedicated[0].tdd_AckNackFeedbackMode = disable_bundling == 0 ? bundling : multiplexing;
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  eNB->transmission_mode[0] = 2;
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  eNB->pucch_config_dedicated[0].tdd_AckNackFeedbackMode = disable_bundling == 0 ? bundling : multiplexing;
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  UE->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
  eNB->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
  UE->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
  eNB->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
  UE->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
  eNB->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
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  UE->mac_enabled=0;
  eNB_rxtx_proc_t *proc_rxtx   = &eNB->proc.proc_rxtx[subframe&1];
  UE_rxtx_proc_t *proc_rxtx_ue = &UE->proc.proc_rxtx[subframe&1];
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  proc_rxtx->frame_rx=1;
  proc_rxtx->subframe_rx=subframe;
  proc_rxtx->frame_tx=pdcch_alloc2ul_frame(&eNB->frame_parms,1,subframe);
  proc_rxtx->subframe_tx=pdcch_alloc2ul_subframe(&eNB->frame_parms,subframe);
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  proc_rxtx_ue->frame_tx = proc_rxtx->frame_rx;
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  proc_rxtx_ue->frame_rx = (subframe<4)?(proc_rxtx->frame_tx-1):(proc_rxtx->frame_tx);
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  proc_rxtx_ue->subframe_tx = proc_rxtx->subframe_rx;
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  proc_rxtx_ue->subframe_rx = (proc_rxtx->subframe_tx+6)%10;
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  printf("Init UL hopping UE\n");
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  init_ul_hopping(&UE->frame_parms);
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  printf("Init UL hopping eNB\n");
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  init_ul_hopping(&eNB->frame_parms);
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  UE->dlsch[subframe&1][0][0]->harq_ack[ul_subframe2pdcch_alloc_subframe(&eNB->frame_parms,subframe)].send_harq_status = 1;
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  UE->ulsch_Msg3_active[eNB_id] = 0;
  UE->ul_power_control_dedicated[eNB_id].accumulationEnabled=1;
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  coded_bits_per_codeword = nb_rb * (12 * get_Qm_ul(mcs)) * nsymb;

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  if (cqi_flag == 1) coded_bits_per_codeword-=UE->ulsch[0]->O;
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  rate = (double)dlsch_tbs25[get_I_TBS(mcs)][nb_rb-1]/(coded_bits_per_codeword);
  printf("Rate = %f (mod %d), coded bits %d\n",rate,get_Qm_ul(mcs),coded_bits_per_codeword);
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  for (ch_realization=0; ch_realization<n_ch_rlz; ch_realization++) {
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    /*
      if(abstx){
      int ulchestim_f[300*12];
      int ulchestim_t[2*(frame_parms->ofdm_symbol_size)];
      }
    */
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    if(abstx) {
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      printf("**********************Channel Realization Index = %d **************************\n", ch_realization);
      saving_bler=1;
    }
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    //    if ((subframe>5) || (subframe < 4))
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    //      UE->frame++;
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    for (SNR=snr0; SNR<snr1; SNR+=input_snr_step) {
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      errs[0]=0;
      errs[1]=0;
      errs[2]=0;
      errs[3]=0;
      round_trials[0] = 0;
      round_trials[1] = 0;
      round_trials[2] = 0;
      round_trials[3] = 0;
      cqi_errors=0;
      ack_errors=0;
      cqi_crc_falsepositives=0;
      cqi_crc_falsenegatives=0;
      round=0;
      //randominit(0);
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      harq_pid = subframe2harq_pid(&UE->frame_parms,proc_rxtx_ue->frame_tx,subframe);
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      input_buffer_length = UE->ulsch[0]->harq_processes[harq_pid]->TBS/8;
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      if ( input_buffer != NULL )
        free(input_buffer);

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      input_buffer = (unsigned char *)memalign(32,input_buffer_length+64);
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      //      printf("UL frame %d/subframe %d, harq_pid %d\n",UE->frame,subframe,harq_pid);
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      if (input_fdUL == NULL) {
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        if (n_frames == 1) {
          trch_out_fdUL= fopen("ulsch_trchUL.txt","w");

          for (i=0; i<input_buffer_length; i++) {
            input_buffer[i] = taus()&0xff;

            for (j=0; j<8; j++)
              fprintf(trch_out_fdUL,"%d\n",(input_buffer[i]>>(7-j))&1);
          }

          fclose(trch_out_fdUL);
        } else {
          for (i=0; i<input_buffer_length; i++)
            input_buffer[i] = taus()&0xff;
        }
      } else {
        n_frames=1;
        i=0;

        while (!feof(input_fdUL)) {
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          ret=fscanf(input_fdUL,"%s %s",input_val_str,input_val_str2);//&input_val1,&input_val2);
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          if (ret != 2) printf("ERROR: error reading file\n");
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          if ((i%4)==0) {
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            ((short *)txdata[0])[i/2] = (short)((1<<15)*strtod(input_val_str,NULL));
            ((short *)txdata[0])[(i/2)+1] = (short)((1<<15)*strtod(input_val_str2,NULL));
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            if ((i/4)<100)
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              printf("sample %d => %e + j%e (%d +j%d)\n",i/4,strtod(input_val_str,NULL),strtod(input_val_str2,NULL),((short *)txdata[0])[i/4],((short *)txdata[0])[(i/4)+1]); //1,input_val2,);
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          }

          i++;

          if (i>(FRAME_LENGTH_SAMPLES))
            break;
        }

        printf("Read in %d samples\n",i/4);
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        //      LOG_M("txsig0UL.m","txs0", txdata[0],2*frame_parms->samples_per_tti,1,1);
        //    LOG_M("txsig1.m","txs1", txdata[1],FRAME_LENGTH_COMPLEX_SAMPLES,1,1);
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        tx_lev = signal_energy(&txdata[0][0],
                               OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES);
        tx_lev_dB = (unsigned int) dB_fixed(tx_lev);
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      }

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      iter_trials=0;
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      reset_meas(&UE->phy_proc_tx);
      reset_meas(&UE->ofdm_mod_stats);
      reset_meas(&UE->ulsch_modulation_stats);
      reset_meas(&UE->ulsch_encoding_stats);
      reset_meas(&UE->ulsch_interleaving_stats);
      reset_meas(&UE->ulsch_rate_matching_stats);
      reset_meas(&UE->ulsch_turbo_encoding_stats);
      reset_meas(&UE->ulsch_segmentation_stats);
      reset_meas(&UE->ulsch_multiplexing_stats);
      reset_meas(&eNB->phy_proc_rx);
      reset_meas(&eNB->ulsch_channel_estimation_stats);
      reset_meas(&eNB->ulsch_freq_offset_estimation_stats);
      reset_meas(&eNB->rx_dft_stats);
      reset_meas(&eNB->ulsch_decoding_stats);
      reset_meas(&eNB->ulsch_turbo_decoding_stats);
      reset_meas(&eNB->ulsch_deinterleaving_stats);
      reset_meas(&eNB->ulsch_demultiplexing_stats);
      reset_meas(&eNB->ulsch_rate_unmatching_stats);
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      reset_meas(&eNB->ulsch_demodulation_stats);
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      reset_meas(&eNB->ulsch_tc_init_stats);
      reset_meas(&eNB->ulsch_tc_alpha_stats);
      reset_meas(&eNB->ulsch_tc_beta_stats);
      reset_meas(&eNB->ulsch_tc_gamma_stats);
      reset_meas(&eNB->ulsch_tc_ext_stats);
      reset_meas(&eNB->ulsch_tc_intl1_stats);
      reset_meas(&eNB->ulsch_tc_intl2_stats);
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      // initialization
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      varArray_t *table_tx=initVarArray(1000,sizeof(double));
      varArray_t *table_tx_ifft=initVarArray(1000,sizeof(double));
      varArray_t *table_tx_mod=initVarArray(1000,sizeof(double));
      varArray_t *table_tx_enc=initVarArray(1000,sizeof(double));
      varArray_t *table_rx=initVarArray(1000,sizeof(double));
      varArray_t *table_rx_fft=initVarArray(1000,sizeof(double));
      varArray_t *table_rx_demod=initVarArray(1000,sizeof(double));
      varArray_t *table_rx_dec=initVarArray(1000,sizeof(double));
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      ndi=0;
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      phy_reset_ue(0,0,0);
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      UE->UE_mode[eNB_id]=PUSCH;
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      SET_LOG_DEBUG(UE_TIMING);
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      for (trials = 0; trials<n_frames; trials++) {
        //      printf("*");
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        //        UE->frame++;
        //        eNB->frame++;
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        ndi = (1-ndi);
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        fflush(stdout);
        round=0;

        while (round < 4) {
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          proc_rxtx->frame_rx=1;
          proc_rxtx->subframe_rx=subframe;
          proc_rxtx->frame_tx=pdcch_alloc2ul_frame(&eNB->frame_parms,1,subframe);
          proc_rxtx->subframe_tx=pdcch_alloc2ul_subframe(&eNB->frame_parms,subframe);
          proc_rxtx_ue->frame_tx = proc_rxtx->frame_rx;
          proc_rxtx_ue->frame_rx = (subframe<4)?(proc_rxtx->frame_tx-1):(proc_rxtx->frame_tx);
          proc_rxtx_ue->subframe_tx = proc_rxtx->subframe_rx;
          proc_rxtx_ue->subframe_rx = (proc_rxtx->subframe_tx+6)%10;
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          eNB->ulsch[0]->harq_processes[harq_pid]->round=round;
          UE->ulsch[0]->harq_processes[harq_pid]->round=round;
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          if (n_frames==1) printf("filling ulsch: Trial %d : Round %d (subframe %d, frame %d)\n",trials,round,proc_rxtx_ue->subframe_tx,proc_rxtx_ue->frame_tx);
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          round_trials[round]++;
          UL_req.sfn_sf = (1<<4)+subframe;
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          if (n_frames==1) printf("filling ulsch: eNB prog frame %d, subframe %d (%d,%d)\n",proc_rxtx->frame_rx,subframe,sched_resp.frame,sched_resp.subframe);
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          int modulation_type;
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