eNB_scheduler_primitives.c 135 KB
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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
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 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
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 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */

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/*! \file eNB_scheduler_primitives.c
 * \brief primitives used by eNB for BCH, RACH, ULSCH, DLSCH scheduling
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 * \author  Navid Nikaein and Raymond Knopp
 * \date 2010 - 2014
 * \email: navid.nikaein@eurecom.fr
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 * \version 1.0
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 * @ingroup _mac

 */

#include "assertions.h"
#include "PHY/defs.h"
#include "PHY/extern.h"

#include "SCHED/defs.h"
#include "SCHED/extern.h"

#include "LAYER2/MAC/defs.h"
#include "LAYER2/MAC/extern.h"

#include "LAYER2/MAC/proto.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "OCG.h"
#include "OCG_extern.h"

#include "RRC/LITE/extern.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"

//#include "LAYER2/MAC/pre_processor.c"
#include "pdcp.h"

#if defined(ENABLE_ITTI)
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#include "intertask_interface.h"
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#endif

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#include "T.h"

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#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1

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extern int n_active_slices;

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int choose(int n, int k)
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{
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    int res = 1;
    int res2 = 1;
    int i;
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    if (k > n)
	return (0);
    if (n == k)
	return (1);
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    for (i = n; i > k; i--)
	res *= i;
    for (i = 2; i <= (n - k); i++)
	res2 *= i;
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    return (res / res2);
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}

// Patented algorithm from Yang et al, US Patent 2009, "Channel Quality Indexing and Reverse Indexing"
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void reverse_index(int N, int M, int r, int *v)
{
    int BaseValue = 0;
    int IncreaseValue, ThresholdValue;
    int sumV;
    int i;

    r = choose(N, M) - 1 - r;
    memset((void *) v, 0, M * sizeof(int));

    sumV = 0;
    i = M;
    while (i > 0 && r > 0) {
	IncreaseValue = choose(N - M + 1 - sumV - v[i - 1] + i - 2, i - 1);
	ThresholdValue = BaseValue + IncreaseValue;
	if (r >= ThresholdValue) {
	    v[i - 1]++;
	    BaseValue = ThresholdValue;
	} else {
	    r = r - BaseValue;
	    sumV += v[i - 1];
	    i--;
	    BaseValue = 0;
	}
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    }
}
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int to_prb(int dl_Bandwidth)
{
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    int prbmap[6] = { 6, 15, 25, 50, 75, 100 };
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    AssertFatal(dl_Bandwidth < 6, "dl_Bandwidth is 0..5\n");
    return (prbmap[dl_Bandwidth]);
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}

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int to_rbg(int dl_Bandwidth)
{
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    int rbgmap[6] = { 6, 8, 13, 17, 19, 25 };
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    AssertFatal(dl_Bandwidth < 6, "dl_Bandwidth is 0..5\n");
    return (rbgmap[dl_Bandwidth]);
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}
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int get_phich_resource_times6(COMMON_channels_t * cc)
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{
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    int phichmap[4] = { 1, 3, 6, 12 };
    AssertFatal(cc != NULL, "cc is null\n");
    AssertFatal(cc->mib != NULL, "cc->mib is null\n");
    AssertFatal((cc->mib->message.phich_Config.phich_Resource >= 0) &&
		(cc->mib->message.phich_Config.phich_Resource < 4),
		"phich_Resource %d not in 0..3\n",
		(int) cc->mib->message.phich_Config.phich_Resource);

    return (phichmap[cc->mib->message.phich_Config.phich_Resource]);
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}

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uint16_t mac_computeRIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs)
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{
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    uint16_t RIV;
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    if (Lcrbs <= (1 + (N_RB_DL >> 1)))
	RIV = (N_RB_DL * (Lcrbs - 1)) + RBstart;
    else
	RIV = (N_RB_DL * (N_RB_DL + 1 - Lcrbs)) + (N_RB_DL - 1 - RBstart);
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    return (RIV);
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}

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uint8_t getQm(uint8_t mcs)
{
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    if (mcs < 10)
	return (2);
    else if (mcs < 17)
	return (4);
    else
	return (6);
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}

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void
get_Msg3alloc(COMMON_channels_t * cc,
	      sub_frame_t current_subframe,
	      frame_t current_frame, frame_t * frame,
	      sub_frame_t * subframe)
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{
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    // Fill in other TDD Configuration!!!!

    if (cc->tdd_Config == NULL) {	// FDD
	*subframe = current_subframe + 6;

	if (*subframe > 9) {
	    *subframe = *subframe - 10;
	    *frame = (current_frame + 1) & 1023;
	} else {
	    *frame = current_frame;
	}
    } else {			// TDD
	if (cc->tdd_Config->subframeAssignment == 1) {
	    switch (current_subframe) {

	    case 0:
		*subframe = 7;
		*frame = current_frame;
		break;

	    case 4:
		*subframe = 2;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 5:
		*subframe = 2;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 9:
		*subframe = 7;
		*frame = (current_frame + 1) & 1023;
		break;
	    }
	} else if (cc->tdd_Config->subframeAssignment == 3) {
	    switch (current_subframe) {

	    case 0:
	    case 5:
	    case 6:
		*subframe = 2;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 7:
		*subframe = 3;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 8:
		*subframe = 4;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 9:
		*subframe = 2;
		*frame = (current_frame + 2) & 1023;
		break;
	    }
	} else if (cc->tdd_Config->subframeAssignment == 4) {
	    switch (current_subframe) {

	    case 0:
	    case 4:
	    case 5:
	    case 6:
		*subframe = 2;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 7:
		*subframe = 3;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 8:
	    case 9:
		*subframe = 2;
		*frame = (current_frame + 2) & 1023;
		break;
	    }
	} else if (cc->tdd_Config->subframeAssignment == 5) {
	    switch (current_subframe) {

	    case 0:
	    case 4:
	    case 5:
	    case 6:
		*subframe = 2;
		*frame = (current_frame + 1) & 1023;
		break;

	    case 7:
	    case 8:
	    case 9:
		*subframe = 2;
		*frame = (current_frame + 2) & 1023;
		break;
	    }
	}
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    }
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}

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void
get_Msg3allocret(COMMON_channels_t * cc,
		 sub_frame_t current_subframe,
		 frame_t current_frame,
		 frame_t * frame, sub_frame_t * subframe)
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{
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    if (cc->tdd_Config == NULL) {	//FDD
	/* always retransmit in n+8 */
	*subframe = current_subframe + 8;

	if (*subframe > 9) {
	    *subframe = *subframe - 10;
	    *frame = (current_frame + 1) & 1023;
	} else {
	    *frame = current_frame;
	}
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    } else {
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	if (cc->tdd_Config->subframeAssignment == 1) {
	    // original PUSCH in 2, PHICH in 6 (S), ret in 2
	    // original PUSCH in 3, PHICH in 9, ret in 3
	    // original PUSCH in 7, PHICH in 1 (S), ret in 7
	    // original PUSCH in 8, PHICH in 4, ret in 8
	    *frame = (current_frame + 1) & 1023;
	} else if (cc->tdd_Config->subframeAssignment == 3) {
	    // original PUSCH in 2, PHICH in 8, ret in 2 next frame
	    // original PUSCH in 3, PHICH in 9, ret in 3 next frame
	    // original PUSCH in 4, PHICH in 0, ret in 4 next frame
	    *frame = (current_frame + 1) & 1023;
	} else if (cc->tdd_Config->subframeAssignment == 4) {
	    // original PUSCH in 2, PHICH in 8, ret in 2 next frame
	    // original PUSCH in 3, PHICH in 9, ret in 3 next frame
	    *frame = (current_frame + 1) & 1023;
	} else if (cc->tdd_Config->subframeAssignment == 5) {
	    // original PUSCH in 2, PHICH in 8, ret in 2 next frame
	    *frame = (current_frame + 1) & 1023;
	}
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    }
}

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uint8_t
subframe2harqpid(COMMON_channels_t * cc, frame_t frame,
		 sub_frame_t subframe)
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{
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    uint8_t ret = 255;
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    AssertFatal(cc != NULL, "cc is null\n");
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    if (cc->tdd_Config == NULL) {	// FDD
	ret = (((frame << 1) + subframe) & 7);
    } else {
	switch (cc->tdd_Config->subframeAssignment) {
	case 1:
	    if ((subframe == 2) ||
		(subframe == 3) || (subframe == 7) || (subframe == 8))
		switch (subframe) {
		case 2:
		case 3:
		    ret = (subframe - 2);
		    break;

		case 7:
		case 8:
		    ret = (subframe - 5);
		    break;

		default:
		    AssertFatal(1 == 0,
				"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
				subframe,
				(int) cc->tdd_Config->subframeAssignment);
		    break;
		}

	    break;

	case 2:
	    AssertFatal((subframe == 2) || (subframe == 7),
			"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
			subframe,
			(int) cc->tdd_Config->subframeAssignment);

	    ret = (subframe / 7);
	    break;

	case 3:
	    AssertFatal((subframe > 1) && (subframe < 5),
			"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
			subframe,
			(int) cc->tdd_Config->subframeAssignment);
	    ret = (subframe - 2);
	    break;

	case 4:
	    AssertFatal((subframe > 1) && (subframe < 4),
			"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
			subframe,
			(int) cc->tdd_Config->subframeAssignment);
	    ret = (subframe - 2);
	    break;

	case 5:
	    AssertFatal(subframe == 2,
			"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",
			subframe,
			(int) cc->tdd_Config->subframeAssignment);
	    ret = (subframe - 2);
	    break;

	default:
	    AssertFatal(1 == 0,
			"subframe2_harq_pid, Unsupported TDD mode %d\n",
			(int) cc->tdd_Config->subframeAssignment);
	}
    }
    return ret;
}
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uint8_t
get_Msg3harqpid(COMMON_channels_t * cc,
		frame_t frame, sub_frame_t current_subframe)
{
    uint8_t ul_subframe = 0;
    uint32_t ul_frame = 0;

    if (cc->tdd_Config == NULL) {	// FDD
	ul_subframe =
	    (current_subframe >
	     3) ? (current_subframe - 4) : (current_subframe + 6);
	ul_frame = (current_subframe > 3) ? ((frame + 1) & 1023) : frame;
    } else {
	switch (cc->tdd_Config->subframeAssignment) {
	case 1:
	    switch (current_subframe) {
	    case 9:
	    case 0:
		ul_subframe = 7;
		break;

	    case 5:
	    case 7:
		ul_subframe = 2;
		break;

	    }

	    break;

	case 3:
	    switch (current_subframe) {
	    case 0:
	    case 5:
	    case 6:
		ul_subframe = 2;
		break;

	    case 7:
		ul_subframe = 3;
		break;

	    case 8:
		ul_subframe = 4;
		break;

	    case 9:
		ul_subframe = 2;
		break;
	    }

	    break;

	case 4:
	    switch (current_subframe) {
	    case 0:
	    case 5:
	    case 6:
	    case 8:
	    case 9:
		ul_subframe = 2;
		break;

	    case 7:
		ul_subframe = 3;
		break;
	    }

	    break;

	case 5:
	    ul_subframe = 2;
	    break;

	default:
	    LOG_E(PHY,
		  "get_Msg3_harq_pid: Unsupported TDD configuration %d\n",
		  (int) cc->tdd_Config->subframeAssignment);
	    AssertFatal(1 == 0,
			"get_Msg3_harq_pid: Unsupported TDD configuration");
	    break;
	}
    }
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    return (subframe2harqpid(cc, ul_frame, ul_subframe));
}
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uint32_t
pdcchalloc2ulframe(COMMON_channels_t * ccP, uint32_t frame, uint8_t n)
{
    uint32_t ul_frame;

    if ((ccP->tdd_Config) && (ccP->tdd_Config->subframeAssignment == 1) && ((n == 1) || (n == 6)))	// tdd_config 0,1 SF 1,5
	ul_frame = (frame + (n == 1 ? 0 : 1));
    else if ((ccP->tdd_Config) &&
	     (ccP->tdd_Config->subframeAssignment == 6) &&
	     ((n == 0) || (n == 1) || (n == 5) || (n == 6)))
	ul_frame = (frame + (n >= 5 ? 1 : 0));
    else if ((ccP->tdd_Config) && (ccP->tdd_Config->subframeAssignment == 6) && (n == 9))	// tdd_config 6 SF 9
	ul_frame = (frame + 1);
    else
	ul_frame = (frame + (n >= 6 ? 1 : 0));
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    LOG_D(PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, n,
	  ul_frame);
    return ul_frame;
}
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uint8_t pdcchalloc2ulsubframe(COMMON_channels_t * ccP, uint8_t n)
{
    uint8_t ul_subframe;

    if ((ccP->tdd_Config) && (ccP->tdd_Config->subframeAssignment == 1) && ((n == 1) || (n == 6)))	// tdd_config 0,1 SF 1,5
	ul_subframe = ((n + 6) % 10);
    else if ((ccP->tdd_Config) &&
	     (ccP->tdd_Config->subframeAssignment == 6) &&
	     ((n == 0) || (n == 1) || (n == 5) || (n == 6)))
	ul_subframe = ((n + 7) % 10);
    else if ((ccP->tdd_Config) && (ccP->tdd_Config->subframeAssignment == 6) && (n == 9))	// tdd_config 6 SF 9
	ul_subframe = ((n + 5) % 10);
    else
	ul_subframe = ((n + 4) % 10);
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    LOG_D(PHY, "subframe %d: PUSCH subframe = %d\n", n, ul_subframe);
    return ul_subframe;
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}

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int is_UL_sf(COMMON_channels_t * ccP, sub_frame_t subframeP)
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{
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    // if FDD return dummy value
    if (ccP->tdd_Config == NULL)
	return (0);
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    switch (ccP->tdd_Config->subframeAssignment) {
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    case 1:
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	switch (subframeP) {
	case 0:
	case 4:
	case 5:
	case 9:
	    return (0);
	    break;

	case 2:
	case 3:
	case 7:
	case 8:
	    return (1);
	    break;

	default:
	    return (0);
	    break;
	}
	break;
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    case 3:
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	if ((subframeP <= 1) || (subframeP >= 5))
	    return (0);
	else if ((subframeP > 1) && (subframeP < 5))
	    return (1);
	else
	    AssertFatal(1 == 0, "Unknown subframe number\n");
	break;
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    case 4:
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	if ((subframeP <= 1) || (subframeP >= 4))
	    return (0);
	else if ((subframeP > 1) && (subframeP < 4))
	    return (1);
	else
	    AssertFatal(1 == 0, "Unknown subframe number\n");
	break;
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    case 5:
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	if ((subframeP <= 1) || (subframeP >= 3))
	    return (0);
	else if ((subframeP > 1) && (subframeP < 3))
	    return (1);
	else
	    AssertFatal(1 == 0, "Unknown subframe number\n");
	break;
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    default:
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	AssertFatal(1 == 0,
		    "subframe %d Unsupported TDD configuration %d\n",
		    subframeP, (int) ccP->tdd_Config->subframeAssignment);
	break;
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    }
}

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uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
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{
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    uint16_t sf, f, nextf;
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    if (cc->tdd_Config == NULL) {	//FDD n+4
	return ((dlsch_absSF + 4) % 10240);
    } else {
	sf = dlsch_absSF % 10;
	f = dlsch_absSF / 10;
	nextf = (f + 1) & 1023;

	switch (cc->tdd_Config->subframeAssignment) {
	case 0:
	    AssertFatal(1 == 0, "SFA 0 to be filled in now, :-)\n");
	    break;
	case 1:
	    if ((sf == 5) || (sf == 6))
		return ((10 * nextf) + 2);	// ACK/NAK in SF 2 next frame
	    else if (sf == 9)
		return ((10 * nextf) + 3);	// ACK/NAK in SF 3 next frame
	    else if ((sf == 0) || (sf == 1))
		return ((10 * f) + 2);	// ACK/NAK in SF 7 same frame
	    else
		AssertFatal(1 == 0,
			    "Impossible dlsch subframe %d for TDD configuration 3\n",
			    sf);
	    break;
	case 2:
	    if ((sf == 4) || (sf == 5) || (sf == 6) || (sf == 8))
		return ((10 * nextf) + 2);	// ACK/NAK in SF 2 next frame
	    else if (sf == 9)
		return ((10 * nextf) + 7);	// ACK/NAK in SF 7 next frame
	    else if ((sf == 0) || (sf == 1) || (sf == 3))
		return ((10 * f) + 7);	// ACK/NAK in SF 7 same frame
	    else
		AssertFatal(1 == 0,
			    "Impossible dlsch subframe %d for TDD configuration 3\n",
			    sf);
	    break;
	case 3:
	    if ((sf == 5) || (sf == 6) || (sf == 7) || (sf == 8)
		|| (sf == 9))
		return ((10 * nextf) + (sf >> 1));	// ACK/NAK in 2,3,4 resp. next frame
	    else if (sf == 1)
		return ((10 * nextf) + 2);	// ACK/NAK in 2 next frame
	    else if (sf == 0)
		return ((10 * f) + 4);	// ACK/NAK in 4 same frame
	    else
		AssertFatal(1 == 0,
			    "Impossible dlsch subframe %d for TDD configuration 3\n",
			    sf);
	    break;
	case 4:
	    if ((sf == 6) || (sf == 7) || (sf == 8) || (sf == 9))
		return (((10 * nextf) + 3) % 10240);	// ACK/NAK in SF 3 next frame
	    else if ((sf == 0) || (sf == 1) || (sf == 4) || (sf == 5))
		return (((10 * nextf) + 2) % 10240);	// ACK/NAK in SF 2 next frame
	    else
		AssertFatal(1 == 0,
			    "Impossible dlsch subframe %d for TDD configuration 4\n",
			    sf);
	    break;
	case 5:
	    if ((sf == 0) || (sf == 1) || (sf == 3) || (sf == 4)
		|| (sf == 5) || (sf == 6) || (sf == 7) || (sf == 8))
		return (((10 * nextf) + 2) % 10240);	// ACK/NAK in SF 3 next frame
	    else if (sf == 9)
		return (((10 * (1 + nextf)) + 2) % 10240);	// ACK/NAK in SF 2 next frame
	    else
		AssertFatal(1 == 0,
			    "Impossible dlsch subframe %d for TDD configuration 5\n",
			    sf);
	    break;
	case 6:
	    AssertFatal(1 == 0, "SFA 6 To be filled in now, :-)\n");
	    break;
	default:
	    AssertFatal(1 == 0, "Illegal TDD subframe Assigment %d\n",
			(int) cc->tdd_Config->subframeAssignment);
	    break;
	}
    }
    AssertFatal(1 == 0, "Shouldn't get here\n");
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void
get_srs_pos(COMMON_channels_t * cc, uint16_t isrs,
	    uint16_t * psrsPeriodicity, uint16_t * psrsOffset)
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    if (cc->tdd_Config) {	// TDD
	AssertFatal(isrs >= 10, "2 ms SRS periodicity not supported");

	if ((isrs > 9) && (isrs < 15)) {
	    *psrsPeriodicity = 5;
	    *psrsOffset = isrs - 10;
	}
	if ((isrs > 14) && (isrs < 25)) {
	    *psrsPeriodicity = 10;
	    *psrsOffset = isrs - 15;
	}
	if ((isrs > 24) && (isrs < 45)) {
	    *psrsPeriodicity = 20;
	    *psrsOffset = isrs - 25;
	}
	if ((isrs > 44) && (isrs < 85)) {
	    *psrsPeriodicity = 40;
	    *psrsOffset = isrs - 45;
	}
	if ((isrs > 84) && (isrs < 165)) {
	    *psrsPeriodicity = 80;
	    *psrsOffset = isrs - 85;
	}
	if ((isrs > 164) && (isrs < 325)) {
	    *psrsPeriodicity = 160;
	    *psrsOffset = isrs - 165;
	}
	if ((isrs > 324) && (isrs < 645)) {
	    *psrsPeriodicity = 320;
	    *psrsOffset = isrs - 325;
	}

	AssertFatal(isrs <= 644, "Isrs out of range %d>644\n", isrs);
    }				// TDD
    else {			// FDD
	if (isrs < 2) {
	    *psrsPeriodicity = 2;
	    *psrsOffset = isrs;
	}
	if ((isrs > 1) && (isrs < 7)) {
	    *psrsPeriodicity = 5;
	    *psrsOffset = isrs - 2;
	}
	if ((isrs > 6) && (isrs < 17)) {
	    *psrsPeriodicity = 10;
	    *psrsOffset = isrs - 7;
	}
	if ((isrs > 16) && (isrs < 37)) {
	    *psrsPeriodicity = 20;
	    *psrsOffset = isrs - 17;
	}
	if ((isrs > 36) && (isrs < 77)) {
	    *psrsPeriodicity = 40;
	    *psrsOffset = isrs - 37;
	}
	if ((isrs > 76) && (isrs < 157)) {
	    *psrsPeriodicity = 80;
	    *psrsOffset = isrs - 77;
	}
	if ((isrs > 156) && (isrs < 317)) {
	    *psrsPeriodicity = 160;
	    *psrsOffset = isrs - 157;
	}
	if ((isrs > 316) && (isrs < 637)) {
	    *psrsPeriodicity = 320;
	    *psrsOffset = isrs - 317;
	}
	AssertFatal(isrs <= 636, "Isrs out of range %d>636\n", isrs);
    }
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void
get_csi_params(COMMON_channels_t * cc,
	       struct CQI_ReportPeriodic *cqi_ReportPeriodic,
	       uint16_t * Npd, uint16_t * N_OFFSET_CQI, int *H)
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    uint16_t cqi_PMI_ConfigIndex =
	cqi_ReportPeriodic->choice.setup.cqi_pmi_ConfigIndex;
    uint8_t Jtab[6] = { 0, 2, 2, 3, 4, 4 };

    AssertFatal(cqi_ReportPeriodic != NULL,
		"cqi_ReportPeriodic is null!\n");

    if (cc->tdd_Config == NULL) {	//FDD
	if (cqi_PMI_ConfigIndex <= 1) {	// 2 ms CQI_PMI period
	    *Npd = 2;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex;
	} else if (cqi_PMI_ConfigIndex <= 6) {	// 5 ms CQI_PMI period
	    *Npd = 5;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 2;
	} else if (cqi_PMI_ConfigIndex <= 16) {	// 10ms CQI_PMI period
	    *Npd = 10;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 7;
	} else if (cqi_PMI_ConfigIndex <= 36) {	// 20 ms CQI_PMI period
	    *Npd = 20;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 17;
	} else if (cqi_PMI_ConfigIndex <= 76) {	// 40 ms CQI_PMI period
	    *Npd = 40;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 37;
	} else if (cqi_PMI_ConfigIndex <= 156) {	// 80 ms CQI_PMI period
	    *Npd = 80;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 77;
	} else if (cqi_PMI_ConfigIndex <= 316) {	// 160 ms CQI_PMI period
	    *Npd = 160;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 157;
	} else if (cqi_PMI_ConfigIndex > 317) {

	    if (cqi_PMI_ConfigIndex <= 349) {	// 32 ms CQI_PMI period
		*Npd = 32;
		*N_OFFSET_CQI = cqi_PMI_ConfigIndex - 318;
	    } else if (cqi_PMI_ConfigIndex <= 413) {	// 64 ms CQI_PMI period
		*Npd = 64;
		*N_OFFSET_CQI = cqi_PMI_ConfigIndex - 350;
	    } else if (cqi_PMI_ConfigIndex <= 541) {	// 128 ms CQI_PMI period
		*Npd = 128;
		*N_OFFSET_CQI = cqi_PMI_ConfigIndex - 414;
	    }
	}
    } else {			// TDD
	if (cqi_PMI_ConfigIndex == 0) {	// all UL subframes
	    *Npd = 1;
	    *N_OFFSET_CQI = 0;
	} else if (cqi_PMI_ConfigIndex <= 6) {	// 5 ms CQI_PMI period
	    *Npd = 5;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 1;
	} else if (cqi_PMI_ConfigIndex <= 16) {	// 10ms CQI_PMI period
	    *Npd = 10;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 6;
	} else if (cqi_PMI_ConfigIndex <= 36) {	// 20 ms CQI_PMI period
	    *Npd = 20;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 16;
	} else if (cqi_PMI_ConfigIndex <= 76) {	// 40 ms CQI_PMI period
	    *Npd = 40;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 36;
	} else if (cqi_PMI_ConfigIndex <= 156) {	// 80 ms CQI_PMI period
	    *Npd = 80;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 76;
	} else if (cqi_PMI_ConfigIndex <= 316) {	// 160 ms CQI_PMI period
	    *Npd = 160;
	    *N_OFFSET_CQI = cqi_PMI_ConfigIndex - 156;
	}
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    }

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    // get H
    if (cqi_ReportPeriodic->choice.setup.cqi_FormatIndicatorPeriodic.
	present ==
	CQI_ReportPeriodic__setup__cqi_FormatIndicatorPeriodic_PR_subbandCQI)
	*H = 1 +
	    (Jtab[cc->mib->message.dl_Bandwidth] *
	     cqi_ReportPeriodic->choice.setup.
	     cqi_FormatIndicatorPeriodic.choice.subbandCQI.k);
    else
	*H = 1;
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uint8_t
get_dl_cqi_pmi_size_pusch(COMMON_channels_t * cc, uint8_t tmode,
			  uint8_t ri,
			  CQI_ReportModeAperiodic_t *
			  cqi_ReportModeAperiodic)
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    int Ntab[6] = { 0, 4, 7, 9, 10, 13 };
    int N = Ntab[cc->mib->message.dl_Bandwidth];
    int Ltab_uesel[6] = { 0, 6, 9, 13, 15, 18 };
    int L = Ltab_uesel[cc->mib->message.dl_Bandwidth];

    AssertFatal(cqi_ReportModeAperiodic != NULL,
		"cqi_ReportPeriodic is null!\n");

    switch (*cqi_ReportModeAperiodic) {
    case CQI_ReportModeAperiodic_rm12:
	AssertFatal(tmode == 4 || tmode == 6 || tmode == 8 || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm12\n",
		    tmode);
	AssertFatal(cc->p_eNB <= 4,
		    "only up to 4 antenna ports supported here\n");
	if (ri == 1 && cc->p_eNB == 2)
	    return (4 + (N << 1));
	else if (ri == 2 && cc->p_eNB == 2)
	    return (8 + N);
	else if (ri == 1 && cc->p_eNB == 4)
	    return (4 + (N << 2));
	else if (ri > 1 && cc->p_eNB == 4)
	    return (8 + (N << 2));
	break;
    case CQI_ReportModeAperiodic_rm20:
	// Table 5.2.2.6.3-1 (36.212)
	AssertFatal(tmode == 1 || tmode == 2 || tmode == 3 || tmode == 7
		    || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm20\n",
		    tmode);
	AssertFatal(tmode != 9
		    && tmode != 10,
		    "TM9/10 will be handled later for CQI_ReportModeAperiodic_rm20\n");
	return (4 + 2 + L);
	break;
    case CQI_ReportModeAperiodic_rm22:
	// Table 5.2.2.6.3-2 (36.212)
	AssertFatal(tmode == 4 || tmode == 6 || tmode == 8 || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm22\n",
		    tmode);
	AssertFatal(tmode != 9
		    && tmode != 10,
		    "TM9/10 will be handled later for CQI_ReportModeAperiodic_rm22\n");
	if (ri == 1 && cc->p_eNB == 2)
	    return (4 + 2 + 0 + 0 + L + 4);
	if (ri == 2 && cc->p_eNB == 2)
	    return (4 + 2 + 4 + 2 + L + 2);
	if (ri == 1 && cc->p_eNB == 4)
	    return (4 + 2 + 0 + 0 + L + 8);
	if (ri >= 2 && cc->p_eNB == 4)
	    return (4 + 2 + 4 + 2 + L + 8);
	break;
    case CQI_ReportModeAperiodic_rm30:
	// Table 5.2.2.6.2-1 (36.212)
	AssertFatal(tmode == 1 || tmode == 2 || tmode == 3 || tmode == 7
		    || tmode == 8 || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm30\n",
		    tmode);
	AssertFatal(tmode != 8 && tmode != 9
		    && tmode != 10,
		    "TM8/9/10 will be handled later for CQI_ReportModeAperiodic_rm30\n");
	return (4 + (N << 1));
	break;
    case CQI_ReportModeAperiodic_rm31:
	// Table 5.2.2.6.2-2 (36.212)
	AssertFatal(tmode == 4 || tmode == 6 || tmode == 8 || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm31\n",
		    tmode);
	AssertFatal(tmode != 8 && tmode != 9
		    && tmode != 10,
		    "TM8/9/10 will be handled later for CQI_ReportModeAperiodic_rm31\n");
	if (ri == 1 && cc->p_eNB == 2)
	    return (4 + (N << 1) + 0 + 0 + 2);
	else if (ri == 2 && cc->p_eNB == 2)
	    return (4 + (N << 1) + 4 + (N << 1) + 1);
	else if (ri == 1 && cc->p_eNB == 4)
	    return (4 + (N << 1) + 0 + 0 + 4);
	else if (ri >= 2 && cc->p_eNB == 4)
	    return (4 + (N << 1) + 4 + (N << 1) + 4);
	break;
    case CQI_ReportModeAperiodic_rm32_v1250:
	AssertFatal(tmode == 4 || tmode == 6 || tmode == 8 || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm32\n",
		    tmode);
	AssertFatal(1 == 0,
		    "CQI_ReportModeAperiodic_rm32_v1250 not supported yet\n");
	break;
    case CQI_ReportModeAperiodic_rm10_v1310:
	// Table 5.2.2.6.1-1F/G (36.212)
	if (ri == 1)
	    return (4);		// F
	else
	    return (7);		// G
	break;
    case CQI_ReportModeAperiodic_rm11_v1310:
	// Table 5.2.2.6.1-1H (36.212)
	AssertFatal(tmode == 4 || tmode == 6 || tmode == 8 || tmode == 9
		    || tmode == 10,
		    "Illegal TM (%d) for CQI_ReportModeAperiodic_rm11\n",
		    tmode);
	AssertFatal(cc->p_eNB <= 4,
		    "only up to 4 antenna ports supported here\n");
	if (ri == 1 && cc->p_eNB == 2)
	    return (4 + 0 + 2);
	else if (ri == 2 && cc->p_eNB == 2)
	    return (4 + 4 + 1);
	else if (ri == 1 && cc->p_eNB == 4)
	    return (4 + 0 + 4);
	else if (ri > 1 && cc->p_eNB == 4)
	    return (4 + 4 + 4);

	break;
    }
    AssertFatal(1 == 0, "Shouldn't get here\n");
    return (0);
}
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uint8_t
get_rel8_dl_cqi_pmi_size(UE_sched_ctrl * sched_ctl, int CC_idP,
			 COMMON_channels_t * cc, uint8_t tmode,
			 struct CQI_ReportPeriodic * cqi_ReportPeriodic)
{
    int no_pmi = 0;
    //    Ltab[6] = {0,log2(15/4/2),log2(25/4/2),log2(50/6/3),log2(75/8/4),log2(100/8/4)};

    uint8_t Ltab[6] = { 0, 1, 2, 2, 2, 2 };
    uint8_t ri = sched_ctl->periodic_ri_received[CC_idP];

    AssertFatal(cqi_ReportPeriodic != NULL,
		"cqi_ReportPeriodic is null!\n");
    AssertFatal(cqi_ReportPeriodic->present !=
		CQI_ReportPeriodic_PR_NOTHING,
		"cqi_ReportPeriodic->present == CQI_ReportPeriodic_PR_NOTHING!\n");
    AssertFatal(cqi_ReportPeriodic->choice.
		setup.cqi_FormatIndicatorPeriodic.present !=
		CQI_ReportPeriodic__setup__cqi_FormatIndicatorPeriodic_PR_NOTHING,
		"cqi_ReportPeriodic->cqi_FormatIndicatorPeriodic.choice.setup.present == CQI_ReportPeriodic__setup__cqi_FormatIndicatorPeriodic_PR_NOTHING!\n");

    switch (tmode) {
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    case 1:
    case 2:
    case 5:
    case 6:
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    case 7:
	no_pmi = 1;
	break;
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    default:
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	no_pmi = 0;
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    }
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    if ((cqi_ReportPeriodic->choice.setup.cqi_FormatIndicatorPeriodic.
	 present ==
	 CQI_ReportPeriodic__setup__cqi_FormatIndicatorPeriodic_PR_widebandCQI)
	|| (sched_ctl->feedback_cnt[CC_idP] == 0)) {
	// send wideband report every opportunity if wideband reporting mode is selected, else every H opportunities
	if (no_pmi == 1)
	    return (4);
	else if ((cc->p_eNB == 2) && (ri == 1))
	    return (6);
	else if ((cc->p_eNB == 2) && (ri == 2))
	    return (8);
	else if ((cc->p_eNB == 4) && (ri == 1))
	    return (8);
	else if ((cc->p_eNB == 4) && (ri == 2))
	    return (11);
	else
	    AssertFatal(1 == 0,
			"illegal combination p %d, ri %d, no_pmi %d\n",
			cc->p_eNB, ri, no_pmi);
    } else if (cqi_ReportPeriodic->choice.
	       setup.cqi_FormatIndicatorPeriodic.present ==
	       CQI_ReportPeriodic__setup__cqi_FormatIndicatorPeriodic_PR_subbandCQI)
    {
	if ((no_pmi == 1) || ri == 1)
	    return (4 + Ltab[cc->mib->message.dl_Bandwidth]);
	else
	    return (7 + Ltab[cc->mib->message.dl_Bandwidth]);
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    }
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    AssertFatal(1 == 0,
		"Shouldn't get here : cqi_ReportPeriodic->present %d\n",
		cqi_ReportPeriodic->choice.
		setup.cqi_FormatIndicatorPeriodic.present);
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}

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void
fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t * dl_config_pdu,
		     uint8_t aggregation_level,
		     uint16_t rnti,
		     uint8_t rnti_type,
		     uint8_t harq_process,
		     uint8_t tpc,
		     uint16_t resource_block_coding,
		     uint8_t mcs, uint8_t ndi, uint8_t rv,
		     uint8_t vrb_flag)
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    memset((void *) dl_config_pdu, 0,
	   sizeof(nfapi_dl_config_request_pdu_t));
    dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
    dl_config_pdu->pdu_size =
	(uint8_t) (2 + sizeof(nfapi_dl_config_dci_dl_pdu));
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format =
	NFAPI_DL_DCI_FORMAT_1A;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level =
	aggregation_level;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = rnti_type;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000;	// equal to RS power
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = harq_process;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = tpc;	// no TPC
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding =
	resource_block_coding;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = mcs;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = ndi;
    dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = rv;
    dl_config_pdu->dci_dl_pdu.
	dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = vrb_flag;
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}

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void
program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
		     frame_t frameP, sub_frame_t subframeP,
		     uint8_t cce_idx)
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{
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    eNB_MAC_INST *eNB = RC.mac[module_idP];
    COMMON_channels_t *cc = eNB->common_channels;
    UE_list_t *UE_list = &eNB->UE_list;
    rnti_t rnti = UE_RNTI(module_idP, UE_idP);
    nfapi_ul_config_request_body_t *ul_req;
    nfapi_ul_config_request_pdu_t *ul_config_pdu;
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    int use_simultaneous_pucch_pusch = 0;
    nfapi_ul_config_ulsch_harq_information *ulsch_harq_information = NULL;
    nfapi_ul_config_harq_information *harq_information = NULL;
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#if defined(Rel10) || defined(Rel14)
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    if ((UE_list->UE_template[CC_idP][UE_idP].physicalConfigDedicated->
	 ext2)
	&& (UE_list->UE_template[CC_idP][UE_idP].
	    physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020)
	&& (UE_list->UE_template[CC_idP][UE_idP].
	    physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020->
	    simultaneousPUCCH_PUSCH_r10)
	&& (*UE_list->UE_template[CC_idP][UE_idP].
	    physicalConfigDedicated->ext2->pucch_ConfigDedicated_v1020->
	    simultaneousPUCCH_PUSCH_r10 ==
	    PUCCH_ConfigDedicated_v1020__simultaneousPUCCH_PUSCH_r10_true))
	use_simultaneous_pucch_pusch = 1;
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#endif
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    // pucch1 and pusch feedback is similar, namely in n+k subframes from now
    // This is used in the following "if/else" condition to check if there isn't or is already an UL grant in n+k
    int16_t ul_absSF =
	get_pucch1_absSF(&cc[CC_idP], subframeP + (10 * frameP));

    if ((ul_config_pdu = has_ul_grant(module_idP, CC_idP,
				      ul_absSF, rnti)) == NULL) {
	// no UL grant so
	// Program ACK/NAK alone Format 1a/b or 3

	ul_req =
	    &RC.mac[module_idP]->UL_req_tmp[CC_idP][ul_absSF %
						    10].
	    ul_config_request_body;
	ul_config_pdu =
	    &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
	// Do PUCCH
	fill_nfapi_uci_acknak(module_idP,
			      CC_idP,
			      rnti, (frameP * 10) + subframeP, cce_idx);
    } else {
	/* there is already an existing UL grant so update it if needed
	 * on top of some other UL resource (PUSCH,combined SR/CQI/HARQ on PUCCH, etc)
	 */
	switch (ul_config_pdu->pdu_type) {

	    /* [ulsch] to [ulsch + harq] or [ulsch + harq on pucch] */

	case NFAPI_UL_CONFIG_ULSCH_PDU_TYPE:
	    if (use_simultaneous_pucch_pusch == 1) {
		// Convert it to an NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE
		harq_information =
		    &ul_config_pdu->ulsch_uci_harq_pdu.harq_information;
		ul_config_pdu->pdu_type =
		    NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE;
		LOG_D(MAC,
		      "Frame %d, Subframe %d: Switched UCI HARQ to ULSCH UCI HARQ\n",
		      frameP, subframeP);
	    } else {
		// Convert it to an NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE
		ulsch_harq_information =
		    &ul_config_pdu->ulsch_harq_pdu.harq_information;
		ul_config_pdu->pdu_type =
		    NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE;
		ul_config_pdu->ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.n_srs_initial = 0;	// last symbol not punctured
		ul_config_pdu->ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.initial_number_of_resource_blocks = ul_config_pdu->ulsch_harq_pdu.ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks;	// we don't change the number of resource blocks across retransmissions yet
		LOG_D(MAC,
		      "Frame %d, Subframe %d: Switched UCI HARQ to ULSCH HARQ\n",
		      frameP, subframeP);
	    }
	    break;
	case NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE:
	    AssertFatal(use_simultaneous_pucch_pusch == 1,
			"Cannot be NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE, simultaneous_pucch_pusch is active");
	    break;
	case NFAPI_UL_CONFIG_ULSCH_UCI_HARQ_PDU_TYPE:
	    AssertFatal(use_simultaneous_pucch_pusch == 0,
			"Cannot be NFAPI_UL_CONFIG_ULSCH_UCI_PDU_TYPE, simultaneous_pucch_pusch is inactive\n");
	    break;

	    /* [ulsch + cqi] to [ulsch + cqi + harq] */

	case NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE:
	    // Convert it to an NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE
	    ulsch_harq_information =
		&ul_config_pdu->ulsch_cqi_harq_ri_pdu.harq_information;
	    ul_config_pdu->pdu_type =
		NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE;
	    /* TODO: check this - when converting from nfapi_ul_config_ulsch_cqi_ri_pdu to
	     * nfapi_ul_config_ulsch_cqi_harq_ri_pdu, shouldn't we copy initial_transmission_parameters
	     * from the one to the other?
	     * Those two types are not compatible. 'initial_transmission_parameters' is not at the
	     * place in both.
	     */
	    ul_config_pdu->ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.n_srs_initial = 0;	// last symbol not punctured
	    ul_config_pdu->ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.initial_number_of_resource_blocks = ul_config_pdu->ulsch_harq_pdu.ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks;	// we don't change the number of resource blocks across retransmissions yet
	    break;
	case NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE:
	    AssertFatal(use_simultaneous_pucch_pusch == 0,
			"Cannot be NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE, simultaneous_pucch_pusch is active\n");
	    break;

	    /* [ulsch + cqi on pucch] to [ulsch + cqi on pucch + harq on pucch] */

	case NFAPI_UL_CONFIG_ULSCH_UCI_CSI_PDU_TYPE:
	    // convert it to an NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE
	    harq_information =
		&ul_config_pdu->ulsch_csi_uci_harq_pdu.harq_information;
	    ul_config_pdu->pdu_type =
		NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE;
	    break;
	case NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE:
	    AssertFatal(use_simultaneous_pucch_pusch == 1,
			"Cannot be NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE, simultaneous_pucch_pusch is inactive\n");
	    break;

	    /* [sr] to [sr + harq] */

	case NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE:
	    // convert to NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE
	    ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE;
	    harq_information =
		&ul_config_pdu->uci_sr_harq_pdu.harq_information;
	    break;
	case NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE:
	    /* nothing to do */
	    break;

	    /* [cqi] to [cqi + harq] */

	case NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE:
	    // convert to NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE
	    ul_config_pdu->pdu_type =
		NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE;
	    harq_information =
		&ul_config_pdu->uci_cqi_harq_pdu.harq_information;
	    break;
	case NFAPI_UL_CONFIG_UCI_CQI_HARQ_PDU_TYPE:
	    /* nothing to do */
	    break;

	    /* [cqi + sr] to [cqr + sr + harq] */

	case NFAPI_UL_CONFIG_UCI_CQI_SR_PDU_TYPE:
	    // convert to NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE
	    ul_config_pdu->pdu_type =
		NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE;
	    harq_information =
		&ul_config_pdu->uci_cqi_sr_harq_pdu.harq_information;
	    break;
	case NFAPI_UL_CONFIG_UCI_CQI_SR_HARQ_PDU_TYPE:
	    /* nothing to do */
	    break;
	}
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    }
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    if (ulsch_harq_information)
	fill_nfapi_ulsch_harq_information(module_idP, CC_idP,
					  rnti, ulsch_harq_information);
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    if (harq_information)
	fill_nfapi_harq_information(module_idP, CC_idP,
				    rnti,
				    (frameP * 10) + subframeP,
				    harq_information, cce_idx);
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}

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uint8_t get_V_UL_DAI(module_id_t module_idP, int CC_idP, uint16_t rntiP)
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{
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    nfapi_hi_dci0_request_body_t *HI_DCI0_req =
	&RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
    nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
	&HI_DCI0_req->hi_dci0_pdu_list[0];

    for (int i = 0; i < HI_DCI0_req->number_of_dci; i++) {
	if ((hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) &&
	    (hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.rnti == rntiP))
	    return (hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.
		    dl_assignment_index);
    }
    return (4);			// this is rule from Section 7.3 in 36.213
}
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void
fill_nfapi_ulsch_harq_information(module_id_t module_idP,
				  int CC_idP,
				  uint16_t rntiP,
				  nfapi_ul_config_ulsch_harq_information
				  * harq_information)
{
    eNB_MAC_INST *eNB = RC.mac[module_idP];
    COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
    UE_list_t *UE_list = &eNB->UE_list;

    int UE_id = find_UE_id(module_idP, rntiP);

    PUSCH_ConfigDedicated_t *puschConfigDedicated;
    //  PUSCH_ConfigDedicated_v1020_t        *puschConfigDedicated_v1020;
    //  PUSCH_ConfigDedicated_v1130_t        *puschConfigDedicated_v1130;
    //  PUSCH_ConfigDedicated_v1250_t        *puschConfigDedicated_v1250;

    AssertFatal(UE_id >= 0, "UE_id cannot be found, impossible\n");
    AssertFatal(UE_list != NULL, "UE_list is null\n");
    AssertFatal(UE_list->UE_template[CC_idP][UE_id].
		physicalConfigDedicated != NULL,
		"physicalConfigDedicated for rnti %x is null\n", rntiP);
    AssertFatal((puschConfigDedicated = (PUSCH_ConfigDedicated_t *)
		 UE_list->UE_template[CC_idP][UE_id].
		 physicalConfigDedicated->pusch_ConfigDedicated) != NULL,
		"physicalConfigDedicated->puschConfigDedicated for rnti %x is null\n",
		rntiP);
#if defined(Rel14) || defined(Rel14)
    /*  if (UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->ext2) puschConfigDedicated_v1020 =  UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->ext2->pusch_ConfigDedicated_v1020;
       #endif
       #ifdef Rel14
       if (UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->ext4) puschConfigDedicated_v1130 =  UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->ext4->pusch_ConfigDedicated_v1130;
       if (UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->ext5) puschConfigDedicated_v1250 =  UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->ext5->pusch_ConfigDedicated_v1250;
     */
#endif
    harq_information->harq_information_rel10.delta_offset_harq =
	puschConfigDedicated->betaOffset_ACK_Index;
    AssertFatal(UE_list->
		UE_template[CC_idP][UE_id].physicalConfigDedicated->
		pucch_ConfigDedicated != NULL,
		"pucch_ConfigDedicated is null!\n");
    if ((UE_list->UE_template[CC_idP][UE_id].
	 physicalConfigDedicated->pucch_ConfigDedicated->
	 tdd_AckNackFeedbackMode != NULL)
	&& (*UE_list->UE_template[CC_idP][UE_id].
	    physicalConfigDedicated->pucch_ConfigDedicated->
	    tdd_AckNackFeedbackMode ==
	    PUCCH_ConfigDedicated__tdd_AckNackFeedbackMode_multiplexing))
	harq_information->harq_information_rel10.ack_nack_mode = 1;	// multiplexing
    else
	harq_information->harq_information_rel10.ack_nack_mode = 0;	// bundling

    switch (get_tmode(module_idP, CC_idP, UE_id)) {
    case 1:
    case 2:
    case 5:
    case 6:
    case 7:
	if (cc->tdd_Config == NULL)	// FDD
	    harq_information->harq_information_rel10.harq_size = 1;
	else {
	    if (harq_information->harq_information_rel10.ack_nack_mode ==
		1)
		harq_information->harq_information_rel10.harq_size =
		    get_V_UL_DAI(module_idP, CC_idP, rntiP);
	    else
		harq_information->harq_information_rel10.harq_size = 1;
	}
	break;
    default:			// for any other TM we need 2 bits harq
	if (cc->tdd_Config == NULL) {
	    harq_information->harq_information_rel10.harq_size = 2;
	} else {
	    if (harq_information->harq_information_rel10.ack_nack_mode ==
		1)
		harq_information->harq_information_rel10.harq_size =
		    get_V_UL_DAI(module_idP, CC_idP, rntiP);
	    else
		harq_information->harq_information_rel10.harq_size = 2;
	}
	break;
    }				// get Tmode
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}

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void
fill_nfapi_harq_information(module_id_t module_idP,
			    int CC_idP,
			    uint16_t rntiP,
			    uint16_t absSFP,
			    nfapi_ul_config_harq_information *
			    harq_information, uint8_t cce_idxP)
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{
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    eNB_MAC_INST *eNB = RC.mac[module_idP];
    COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
    UE_list_t *UE_list = &eNB->UE_list;
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    int UE_id = find_UE_id(module_idP, rntiP);
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    AssertFatal(UE_id >= 0, "UE_id cannot be found, impossible\n");
    AssertFatal(UE_list != NULL, "UE_list is null\n");
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#if 0
    /* TODO: revisit, don't use Assert, it's perfectly possible to
     * have physicalConfigDedicated NULL here
     */
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    AssertFatal(UE_list->UE_template[CC_idP][UE_id].
		physicalConfigDedicated != NULL,
		"physicalConfigDedicated for rnti %x is null\n", rntiP);
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    harq_information->harq_information_rel11.num_ant_ports = 1;

    switch (get_tmode(module_idP, CC_idP, UE_id)) {
    case 1:
    case 2:
    case 5:
    case 6:
    case 7:
	if (cc->tdd_Config != NULL) {
	    AssertFatal(UE_list->
			UE_template[CC_idP]
			[UE_id].physicalConfigDedicated->
			pucch_ConfigDedicated != NULL,
			"pucch_ConfigDedicated is null for TDD!\n");
	    if ((UE_list->
		 UE_template[CC_idP][UE_id].physicalConfigDedicated->
		 pucch_ConfigDedicated->tdd_AckNackFeedbackMode != NULL)
		&& (*UE_list->
		    UE_template[CC_idP][UE_id].physicalConfigDedicated->
		    pucch_ConfigDedicated->tdd_AckNackFeedbackMode ==
		    PUCCH_ConfigDedicated__tdd_AckNackFeedbackMode_multiplexing))
	    {
		harq_information->harq_information_rel10_tdd.harq_size = 2;	// 2-bit ACK/NAK
		harq_information->harq_information_rel10_tdd.ack_nack_mode = 1;	// multiplexing
	    } else {
		harq_information->harq_information_rel10_tdd.harq_size = 1;	// 1-bit ACK/NAK
		harq_information->harq_information_rel10_tdd.ack_nack_mode = 0;	// bundling
	    }
	    harq_information->harq_information_rel10_tdd.n_pucch_1_0 =
		cc->radioResourceConfigCommon->pucch_ConfigCommon.
		n1PUCCH_AN + cce_idxP;
	    harq_information->
		harq_information_rel10_tdd.number_of_pucch_resources = 1;
	} else {
	    harq_information->
		harq_information_rel9_fdd.number_of_pucch_resources = 1;
	    harq_information->harq_information_rel9_fdd.harq_size = 1;	// 1-bit ACK/NAK
	    harq_information->harq_information_rel9_fdd.n_pucch_1_0 =
		cc->radioResourceConfigCommon->pucch_ConfigCommon.
		n1PUCCH_AN + cce_idxP;
	}
	break;
    default:			// for any other TM we need 2 bits harq
	if (cc->tdd_Config != NULL) {
	    AssertFatal(UE_list->
			UE_template[CC_idP]
			[UE_id].physicalConfigDedicated->
			pucch_ConfigDedicated != NULL,
			"pucch_ConfigDedicated is null for TDD!\n");
	    if ((UE_list->
		 UE_template[CC_idP][UE_id].physicalConfigDedicated->
		 pucch_ConfigDedicated->tdd_AckNackFeedbackMode != NULL)
		&& (*UE_list->
		    UE_template[CC_idP][UE_id].physicalConfigDedicated->
		    pucch_ConfigDedicated->tdd_AckNackFeedbackMode ==
		    PUCCH_ConfigDedicated__tdd_AckNackFeedbackMode_multiplexing))
	    {
		harq_information->harq_information_rel10_tdd.ack_nack_mode = 1;	// multiplexing
	    } else {
		harq_information->harq_information_rel10_tdd.ack_nack_mode = 0;	// bundling
	    }
	    harq_information->harq_information_rel10_tdd.harq_size = 2;
	    harq_information->harq_information_rel10_tdd.n_pucch_1_0 =
		cc->radioResourceConfigCommon->pucch_ConfigCommon.
		n1PUCCH_AN + cce_idxP;
	    harq_information->
		harq_information_rel10_tdd.number_of_pucch_resources = 1;
	} else {
	    harq_information->
		harq_information_rel9_fdd.number_of_pucch_resources = 1;
	    harq_information->harq_information_rel9_fdd.ack_nack_mode = 0;	// 1a/b
	    harq_information->harq_information_rel9_fdd.harq_size = 2;
	    harq_information->harq_information_rel9_fdd.n_pucch_1_0 =
		cc->radioResourceConfigCommon->pucch_ConfigCommon.
		n1PUCCH_AN + cce_idxP;
	}
	break;
    }				// get Tmode
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}
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uint16_t
fill_nfapi_uci_acknak(module_id_t module_idP,
		      int CC_idP,
		      uint16_t rntiP, uint16_t absSFP, uint8_t cce_idxP)
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{
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    eNB_MAC_INST *eNB = RC.mac[module_idP];
    COMMON_channels_t *cc = &eNB->common_channels[CC_idP];

    int ackNAK_absSF = get_pucch1_absSF(cc, absSFP);
    nfapi_ul_config_request_body_t *ul_req =
	&eNB->UL_req_tmp[CC_idP][ackNAK_absSF % 10].ul_config_request_body;
    nfapi_ul_config_request_pdu_t *ul_config_pdu =
	&ul_req->ul_config_pdu_list[ul_req->number_of_pdus];

    memset((void *) ul_config_pdu, 0,
	   sizeof(nfapi_ul_config_request_pdu_t));
    ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE;
    ul_config_pdu->pdu_size =
	(uint8_t) (2 + sizeof(nfapi_ul_config_uci_harq_pdu));
    ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.handle = 0;	// don't know how to use this
    ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti =
	rntiP;

    fill_nfapi_harq_information(module_idP, CC_idP,
				rntiP,
				absSFP,
				&ul_config_pdu->uci_harq_pdu.
				harq_information, cce_idxP);
    LOG_D(MAC,
	  "Filled in UCI HARQ request for rnti %x SF %d.%d acknakSF %d.%d, cce_idxP %d-> n1_pucch %d\n",
	  rntiP, absSFP / 10, absSFP % 10, ackNAK_absSF / 10,
	  ackNAK_absSF % 10, cce_idxP,
	  ul_config_pdu->uci_harq_pdu.
	  harq_information.harq_information_rel9_fdd.n_pucch_1_0);

    ul_req->number_of_pdus++;

    return (((ackNAK_absSF / 10) << 4) + (ackNAK_absSF % 10));
}
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void
fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
			nfapi_dl_config_request_body_t * dl_req,
			uint16_t length,
			uint16_t pdu_index,
			uint16_t rnti,
			uint8_t resource_allocation_type,
			uint8_t
			virtual_resource_block_assignment_flag,
			uint16_t resource_block_coding,
			uint8_t modulation,
			uint8_t redundancy_version,
			uint8_t transport_blocks,
			uint8_t transport_block_to_codeword_swap_flag,
			uint8_t transmission_scheme,
			uint8_t number_of_layers,
			uint8_t number_of_subbands,
			//                             uint8_t codebook_index,
			uint8_t ue_category_capacity,
			uint8_t pa,
			uint8_t delta_power_offset_index,
			uint8_t ngap,
			uint8_t nprb,
			uint8_t transmission_mode,
			uint8_t num_bf_prb_per_subband,
			uint8_t num_bf_vector)
{
    nfapi_dl_config_request_pdu_t *dl_config_pdu =
	&dl_req->dl_config_pdu_list[dl_req->number_pdu];
    memset((void *) dl_config_pdu, 0,
	   sizeof(nfapi_dl_config_request_pdu_t));

    dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
    dl_config_pdu->pdu_size =
	(uint8_t) (2 + sizeof(nfapi_dl_config_dlsch_pdu));
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.length = length;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = pdu_index;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = rnti;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type =
	resource_allocation_type;
    dl_config_pdu->dlsch_pdu.
	dlsch_pdu_rel8.virtual_resource_block_assignment_flag =
	virtual_resource_block_assignment_flag;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding =
	resource_block_coding;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = modulation;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version =
	redundancy_version;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks =
	transport_blocks;
    dl_config_pdu->dlsch_pdu.
	dlsch_pdu_rel8.transport_block_to_codeword_swap_flag =
	transport_block_to_codeword_swap_flag;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme =
	transmission_scheme;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers =
	number_of_layers;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands =
	number_of_subbands;
    //  dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index                         = codebook_index;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity =
	ue_category_capacity;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = pa;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index =
	delta_power_offset_index;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = ngap;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = nprb;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode =
	transmission_mode;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband =
	num_bf_prb_per_subband;
    dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = num_bf_vector;
    dl_req->number_pdu++;
}
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uint16_t
fill_nfapi_tx_req(nfapi_tx_request_body_t * tx_req_body,
		  uint16_t absSF, uint16_t pdu_length,
		  uint16_t pdu_index, uint8_t * pdu)
{
    nfapi_tx_request_pdu_t *TX_req =
	&tx_req_body->tx_pdu_list[tx_req_body->number_of_pdus];
    LOG_D(MAC, "Filling TX_req %d for pdu length %d\n",
	  tx_req_body->number_of_pdus, pdu_length);
    TX_req->pdu_length = pdu_length;
    TX_req->pdu_index = pdu_index;
    TX_req->num_segments = 1;
    TX_req->segments[0].segment_length = pdu_length;
    TX_req->segments[0].segment_data = pdu;
    tx_req_body->number_of_pdus++;

    return (((absSF / 10) << 4) + (absSF % 10));
}
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void
fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *
				     ul_config_pdu, uint8_t cqi_req,
				     COMMON_channels_t * cc,
				     struct PhysicalConfigDedicated
				     *physicalConfigDedicated,
				     uint8_t tmode, uint32_t handle,
				     uint16_t rnti,
				     uint8_t resource_block_start,
				     uint8_t
				     number_of_resource_blocks,
				     uint8_t mcs,
				     uint8_t cyclic_shift_2_for_drms,
				     uint8_t
				     frequency_hopping_enabled_flag,
				     uint8_t frequency_hopping_bits,
				     uint8_t new_data_indication,
				     uint8_t redundancy_version,
				     uint8_t harq_process_number,
				     uint8_t ul_tx_mode,
				     uint8_t current_tx_nb,
				     uint8_t n_srs, uint16_t size)
{
    memset((void *) ul_config_pdu, 0,
	   sizeof(nfapi_ul_config_request_pdu_t));

    ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
    ul_config_pdu->pdu_size =
	(uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_pdu));
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = handle;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = rnti;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start =
	resource_block_start;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks =
	number_of_resource_blocks;
    if (mcs < 11)
	ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
    else if (mcs < 21)
	ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
    else
	ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms =
	cyclic_shift_2_for_drms;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.
	frequency_hopping_enabled_flag = frequency_hopping_enabled_flag;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits =
	frequency_hopping_bits;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication =
	new_data_indication;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version =
	redundancy_version;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number =
	harq_process_number;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = ul_tx_mode;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = current_tx_nb;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = n_srs;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = size;

    if (cqi_req == 1) {
	// Add CQI portion
	ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
	ul_config_pdu->pdu_size =
	    (uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
	ul_config_pdu->ulsch_cqi_ri_pdu.
	    cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
	ul_config_pdu->ulsch_cqi_ri_pdu.
	    cqi_ri_information.cqi_ri_information_rel9.
	    aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
	LOG_D(MAC, "report_type %d\n",
	      ul_config_pdu->ulsch_cqi_ri_pdu.
	      cqi_ri_information.cqi_ri_information_rel9.report_type);

	if (cc->p_eNB <= 2
	    && (tmode == 3 || tmode == 4 || tmode == 8 || tmode == 9
		|| tmode == 10))
	    ul_config_pdu->ulsch_cqi_ri_pdu.
		cqi_ri_information.cqi_ri_information_rel9.
		aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
	else if (cc->p_eNB <= 2)
	    ul_config_pdu->ulsch_cqi_ri_pdu.
		cqi_ri_information.cqi_ri_information_rel9.
		aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
	else if (cc->p_eNB == 4)
	    ul_config_pdu->ulsch_cqi_ri_pdu.
		cqi_ri_information.cqi_ri_information_rel9.
		aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;

	AssertFatal(physicalConfigDedicated->cqi_ReportConfig != NULL,
		    "physicalConfigDedicated->cqi_ReportConfig is null!\n");
	AssertFatal(physicalConfigDedicated->
		    cqi_ReportConfig->cqi_ReportModeAperiodic != NULL,
		    "physicalConfigDedicated->cqi_ReportModeAperiodic is null!\n");
	AssertFatal(physicalConfigDedicated->pusch_ConfigDedicated != NULL,
		    "physicalConfigDedicated->puschConfigDedicated is null!\n");

	for (int ri = 0;
	     ri <
	     (1 << ul_config_pdu->ulsch_cqi_ri_pdu.
	      cqi_ri_information.cqi_ri_information_rel9.
	      aperiodic_cqi_pmi_ri_report.cc[0].ri_size); ri++)
	    ul_config_pdu->ulsch_cqi_ri_pdu.
		cqi_ri_information.cqi_ri_information_rel9.
		aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =
		get_dl_cqi_pmi_size_pusch(cc, tmode, 1 + ri,
					  physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic);

	ul_config_pdu->ulsch_cqi_ri_pdu.
	    cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi =
	    physicalConfigDedicated->pusch_ConfigDedicated->
	    betaOffset_CQI_Index;
	ul_config_pdu->ulsch_cqi_ri_pdu.
	    cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri =
	    physicalConfigDedicated->pusch_ConfigDedicated->
	    betaOffset_RI_Index;
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    }
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}

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void
fill_nfapi_ulsch_config_request_emtc(nfapi_ul_config_request_pdu_t *
				     ul_config_pdu, uint8_t ue_type,
				     uint16_t
				     total_number_of_repetitions,
				     uint16_t repetition_number,
				     uint16_t initial_transmission_sf_io)
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{
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    // Re13 fields

    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = ue_type;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions =
	total_number_of_repetitions;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number =
	repetition_number;
    ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io =
	initial_transmission_sf_io;
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}
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int get_numnarrowbands(long dl_Bandwidth)
{
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    int nb_tab[6] = { 1, 2, 4, 8, 12, 16 };
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    AssertFatal(dl_Bandwidth < 7
		|| dl_Bandwidth >= 0, "dl_Bandwidth not in [0..6]\n");
    return (nb_tab[dl_Bandwidth]);
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}

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int get_numnarrowbandbits(long dl_Bandwidth)
{
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    int nbbits_tab[6] = { 0, 1, 2, 3, 4, 4 };
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    AssertFatal(dl_Bandwidth < 7
		|| dl_Bandwidth >= 0, "dl_Bandwidth not in [0..6]\n");
    return (nbbits_tab[dl_Bandwidth]);
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}

//This implements the frame/subframe condition for first subframe of MPDCCH transmission (Section 9.1.5 36.213, Rel 13/14)
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int startSF_fdd_RA_times2[8] = { 2, 3, 4, 5, 8, 10, 16, 20 };
int startSF_tdd_RA[7] = { 1, 2, 4, 5, 8, 10, 20 };
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int
mpdcch_sf_condition(eNB_MAC_INST * eNB, int CC_id, frame_t frameP,
		    sub_frame_t subframeP, int rmax,
		    MPDCCH_TYPES_t mpdcch_type, int UE_id)
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{
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    struct PRACH_ConfigSIB_v1310 *ext4_prach =
	eNB->common_channels[CC_id].radioResourceConfigCommon_BR->
	ext4->prach_ConfigCommon_v1310;

    int T;
    EPDCCH_SetConfig_r11_t *epdcch_setconfig_r11;

    switch (mpdcch_type) {
    case TYPE0:
	AssertFatal(1 == 0, "MPDCCH Type 0 not handled yet\n");
	break;
    case TYPE1:
	AssertFatal(1 == 0, "MPDCCH Type 1 not handled yet\n");
	break;
    case TYPE1A:
	AssertFatal(1 == 0, "MPDCCH Type 1A not handled yet\n");
	break;
    case TYPE2:		// RAR
	AssertFatal(ext4_prach->mpdcch_startSF_CSS_RA_r13 != NULL,
		    "mpdcch_startSF_CSS_RA_r13 is null\n");
	AssertFatal(rmax > 0, "rmax is 0!\b");
	if (eNB->common_channels[CC_id].tdd_Config == NULL)	//FDD
	    T = rmax *
		startSF_fdd_RA_times2[ext4_prach->
				      mpdcch_startSF_CSS_RA_r13->
				      choice.fdd_r13] >> 1;
	else			//TDD
	    T = rmax *
		startSF_tdd_RA[ext4_prach->
			       mpdcch_startSF_CSS_RA_r13->choice.tdd_r13];
	break;
    case TYPE2A:
	AssertFatal(1 == 0, "MPDCCH Type 2A not handled yet\n");
	break;
    case TYPEUESPEC:
	epdcch_setconfig_r11 =
	    eNB->UE_list.UE_template[CC_id][UE_id].
	    physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.
	    choice.setup.setConfigToAddModList_r11->list.array[0];

	AssertFatal(epdcch_setconfig_r11 != NULL,
		    " epdcch_setconfig_r11 is null for UE specific \n");
	AssertFatal(epdcch_setconfig_r11->ext2 != NULL,
		    " ext2 doesn't exist in epdcch config ' \n");

	if (eNB->common_channels[CC_id].tdd_Config == NULL)	//FDD
	    T = rmax *
		startSF_fdd_RA_times2[epdcch_setconfig_r11->
				      ext2->mpdcch_config_r13->choice.
				      setup.mpdcch_StartSF_UESS_r13.choice.
				      fdd_r13] >> 1;
	else			//TDD
	    T = rmax *
		startSF_tdd_RA[epdcch_setconfig_r11->
			       ext2->mpdcch_config_r13->choice.
			       setup.mpdcch_StartSF_UESS_r13.choice.
			       tdd_r13];

	break;
    default:
	return (0);
    }
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    AssertFatal(T > 0, "T is 0!\n");
    if (((10 * frameP) + subframeP) % T == 0)
	return (1);
    else
	return (0);
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}

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int narrowband_to_first_rb(COMMON_channels_t * cc, int nb_index)
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Cedric Roux committed
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{
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    switch (cc->mib->message.dl_Bandwidth) {
    case 0:			// 6 PRBs, N_NB=1, i_0=0
	return (0);
	break;
    case 3:			// 50 PRBs, N_NB=8, i_0=1
	return ((int) (1 + (6 * nb_index)));
	break;
    case 5:			// 100 PRBs, N_NB=16, i_0=2
	return ((int) (2 + (6 * nb_index)));
	break;
    case 1:			// 15 PRBs  N_NB=2, i_0=1
	if (nb_index > 0)
	    return (1);
	else
	    return (0);
	break;
    case 2:			// 25 PRBs, N_NB=4, i_0=0
	if (nb_index > 1)
	    return (1 + (6 * nb_index));
	else
	    return ((6 * nb_index));
	break;
    case 4:			// 75 PRBs, N_NB=12, i_0=1
	if (nb_index > 5)
	    return (2 + (6 * nb_index));
	else
	    return (1 + (6 * nb_index));
	break;
    default:
	AssertFatal(1 == 0, "Impossible dl_Bandwidth %d\n",
		    (int) cc->mib->message.dl_Bandwidth);
	break;
    }
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}
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#endif

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//------------------------------------------------------------------------------
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void init_ue_sched_info(void)
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//------------------------------------------------------------------------------
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{
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    module_id_t i, j, k;

    for (i = 0; i < NUMBER_OF_eNB_MAX; i++) {
	for (k = 0; k < MAX_NUM_CCs; k++) {
	    for (j = 0; j < NUMBER_OF_UE_MAX; j++) {
		// init DL
		eNB_dlsch_info[i][k][j].weight = 0;
		eNB_dlsch_info[i][k][j].subframe = 0;
		eNB_dlsch_info[i][k][j].serving_num = 0;
		eNB_dlsch_info[i][k][j].status = S_DL_NONE;
		// init UL
		eNB_ulsch_info[i][k][j].subframe = 0;
		eNB_ulsch_info[i][k][j].serving_num = 0;
		eNB_ulsch_info[i][k][j].status = S_UL_NONE;
	    }
	}
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    }
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}