ulsim.c 73.7 KB
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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
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 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
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 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */
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/*! \file ulsim.c
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 \brief Top-level UL simulator
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 \author R. Knopp
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 \date 2011 - 2014
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 \version 0.1
 \company Eurecom
 \email: knopp@eurecom.fr
 \note
 \warning
*/

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#include <string.h>
#include <math.h>
#include <unistd.h>
#include "SIMULATION/TOOLS/defs.h"
#include "PHY/types.h"
#include "PHY/defs.h"
#include "PHY/vars.h"

#include "SCHED/defs.h"
#include "SCHED/vars.h"
#include "LAYER2/MAC/vars.h"
#include "OCG_vars.h"
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#include "intertask_interface_init.h"
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#include "unitary_defs.h"

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#include "PHY/TOOLS/lte_phy_scope.h"
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#include "dummy_functions.c"
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double cpuf;
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//#define MCS_COUNT 23//added for PHY abstraction
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channel_desc_t *eNB2UE[NUMBER_OF_eNB_MAX][NUMBER_OF_UE_MAX];
channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX];
//Added for PHY abstraction
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node_desc_t *enb_data[NUMBER_OF_eNB_MAX];
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node_desc_t *ue_data[NUMBER_OF_UE_MAX];
//double sinr_bler_map[MCS_COUNT][2][16];

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extern uint16_t beta_ack[16],beta_ri[16],beta_cqi[16];
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//extern  char* namepointer_chMag ;

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int xforms=0;
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FD_lte_phy_scope_enb *form_enb;
char title[255];

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/*the following parameters are used to control the processing times*/
double t_tx_max = -1000000000; /*!< \brief initial max process time for tx */
double t_rx_max = -1000000000; /*!< \brief initial max process time for rx */
double t_tx_min = 1000000000; /*!< \brief initial min process time for tx */
double t_rx_min = 1000000000; /*!< \brief initial min process time for tx */
int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
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int nfapi_mode = 0;

extern void fep_full(RU_t *ru);
extern void ru_fep_full_2thread(RU_t *ru);

nfapi_dl_config_request_t DL_req;
nfapi_ul_config_request_t UL_req;
nfapi_hi_dci0_request_t HI_DCI0_req;
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nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_DL_PDU];
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nfapi_tx_request_pdu_t tx_pdu_list[MAX_NUM_TX_REQUEST_PDU];
nfapi_tx_request_t TX_req;
Sched_Rsp_t sched_resp;

void
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fill_nfapi_ulsch_config_request(nfapi_ul_config_request_pdu_t *ul_config_pdu,
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				uint8_t                        cqi_req,
				uint8_t                        p_eNB,
				uint8_t                        cqi_ReportModeAperiodic,
				uint8_t                        betaOffset_CQI_Index,
				uint8_t                        betaOffset_RI_Index,
				uint8_t                        dl_cqi_pmi_size,
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				uint8_t                        tmode,
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				uint32_t                       handle,
				uint16_t                       rnti,
				uint8_t                        resource_block_start,
				uint8_t                        number_of_resource_blocks,
				uint8_t                        modulation_type,
				uint8_t                        cyclic_shift_2_for_drms,
				uint8_t                        frequency_hopping_enabled_flag,
				uint8_t                        frequency_hopping_bits,
				uint8_t                        new_data_indication,
				uint8_t                        redundancy_version,
				uint8_t                        harq_process_number,
				uint8_t                        ul_tx_mode,
				uint8_t                        current_tx_nb,
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				uint8_t                        n_srs,
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				uint16_t                       size)
{
  memset((void *) ul_config_pdu, 0, sizeof(nfapi_ul_config_request_pdu_t));

  //  printf("filling ul_config_pdu: modulation type %d, rvidx %d\n",modulation_type,redundancy_version);

  ul_config_pdu->pdu_type                                                    = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
  ul_config_pdu->pdu_size                                                    = (uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_pdu));
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.tl.tag                             = NFAPI_UL_CONFIG_REQUEST_ULSCH_PDU_REL8_TAG;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle                             = handle;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti                               = rnti;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start               = resource_block_start;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks          = number_of_resource_blocks;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type                    = modulation_type;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms            = cyclic_shift_2_for_drms;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag     = frequency_hopping_enabled_flag;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits             = frequency_hopping_bits;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication                = new_data_indication;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version                 = redundancy_version;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number                = harq_process_number;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode                         = ul_tx_mode;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb                      = current_tx_nb;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs                              = n_srs;
  ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size                               = size;

  if (cqi_req == 1) {
    // Add CQI portion
    ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
    ul_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.tl.tag = NFAPI_UL_CONFIG_REQUEST_CQI_RI_INFORMATION_REL9_TAG;
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
    LOG_D(MAC, "report_type %d\n",ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type);

    if (p_eNB <= 2
	&& (tmode == 3 || tmode == 4 || tmode == 8 || tmode == 9 || tmode == 10))
      ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
    else if (p_eNB <= 2) ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
    else if (p_eNB == 4) ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;

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    for (int ri = 0;
	 ri <  (1 << ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);
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	 ri++)
      ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =	dl_cqi_pmi_size;
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    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = betaOffset_CQI_Index;
    ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri  = betaOffset_RI_Index;
  }
}
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void fill_ulsch_dci(PHY_VARS_eNB *eNB,
		    int frame,
		    int subframe,
		    Sched_Rsp_t *sched_resp,
		    uint16_t rnti,
		    void *UL_dci,
		    int first_rb,
		    int nb_rb,
		    int mcs,
		    int modulation_type,
		    int ndi,
		    int cqi_flag,
		    uint8_t beta_CQI,
		    uint8_t beta_RI,
		    uint8_t cqi_size) {

  nfapi_ul_config_request_body_t *ul_req=&sched_resp->UL_req->ul_config_request_body;
  int harq_pid = ((frame*10)+subframe)&7;

  //  printf("ulsch in frame %d, subframe %d => harq_pid %d, mcs %d, ndi %d\n",frame,subframe,harq_pid,mcs,ndi);
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  switch (eNB->frame_parms.N_RB_UL) {
  case 6:
    break;

  case 25:
    if (eNB->frame_parms.frame_type == TDD) {
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->type    = 0;
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
      //printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_5MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->mcs     = mcs;
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->ndi     = ndi;
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->TPC     = 0;
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->cqi_req = cqi_flag&1;
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->cshift  = 0;
      ((DCI0_5MHz_TDD_1_6_t*)UL_dci)->dai     = 1;
    } else {
      ((DCI0_5MHz_FDD_t*)UL_dci)->type    = 0;
      ((DCI0_5MHz_FDD_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
      //      printf("nb_rb %d/%d, rballoc %d (dci %x) (dcip %p)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_5MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci,UL_dci);
      ((DCI0_5MHz_FDD_t*)UL_dci)->mcs     = mcs;
      ((DCI0_5MHz_FDD_t*)UL_dci)->ndi     = ndi;
      ((DCI0_5MHz_FDD_t*)UL_dci)->TPC     = 0;
      ((DCI0_5MHz_FDD_t*)UL_dci)->cqi_req = cqi_flag&1;
      ((DCI0_5MHz_FDD_t*)UL_dci)->cshift  = 0;
    }

    break;

  case 50:
    if (eNB->frame_parms.frame_type == TDD) {
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->type    = 0;
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
      //      printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_10MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->mcs     = mcs;
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->ndi     = ndi;
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->TPC     = 0;
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->cqi_req = cqi_flag&1;
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->cshift  = 0;
      ((DCI0_10MHz_TDD_1_6_t*)UL_dci)->dai     = 1;
    } else {
      ((DCI0_10MHz_FDD_t*)UL_dci)->type    = 0;
      ((DCI0_10MHz_FDD_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
      //printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_10MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
      ((DCI0_10MHz_FDD_t*)UL_dci)->mcs     = mcs;
      ((DCI0_10MHz_FDD_t*)UL_dci)->ndi     = ndi;
      ((DCI0_10MHz_FDD_t*)UL_dci)->TPC     = 0;
      ((DCI0_10MHz_FDD_t*)UL_dci)->cqi_req = cqi_flag&1;
      ((DCI0_10MHz_FDD_t*)UL_dci)->cshift  = 0;
    }

    break;

  case 100:
    if (eNB->frame_parms.frame_type == TDD) {
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->type    = 0;
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
      //      printf("nb_rb %d/%d, rballoc %d (dci %x)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_20MHz_TDD_1_6_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci);
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->mcs     = mcs;
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->ndi     = ndi;
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->TPC     = 0;
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->cqi_req = cqi_flag&1;
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->cshift  = 0;
      ((DCI0_20MHz_TDD_1_6_t*)UL_dci)->dai     = 1;
    } else {
      ((DCI0_20MHz_FDD_t*)UL_dci)->type    = 0;
      ((DCI0_20MHz_FDD_t*)UL_dci)->rballoc = computeRIV(eNB->frame_parms.N_RB_UL,first_rb,nb_rb);// 12 RBs from position 8
      //   printf("nb_rb %d/%d, rballoc %d (dci %x) (UL_dci %p)\n",nb_rb,eNB->frame_parms.N_RB_UL,((DCI0_20MHz_FDD_t*)UL_dci)->rballoc,*(uint32_t *)UL_dci,(void*)UL_dci);
      ((DCI0_20MHz_FDD_t*)UL_dci)->mcs     = mcs;
      ((DCI0_20MHz_FDD_t*)UL_dci)->ndi     = ndi;
      ((DCI0_20MHz_FDD_t*)UL_dci)->TPC     = 0;
      ((DCI0_20MHz_FDD_t*)UL_dci)->cqi_req = cqi_flag&1;
      ((DCI0_20MHz_FDD_t*)UL_dci)->cshift  = 0;
    }

    break;

  default:
    break;
  }

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  fill_nfapi_ulsch_config_request(&ul_req->ul_config_pdu_list[0],
				  cqi_flag&1,
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				  1,  // p_eNB
				  0,  // reportmode Aperiodic
				  beta_CQI,
				  beta_RI,
				  cqi_size,
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				  //cc,
				  //UE_template->physicalConfigDedicated,
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				  1,
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				  0,
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				  14,     // rnti
				  first_rb,	// resource_block_start
				  nb_rb,	// number_of_resource_blocks
				  modulation_type,
				  0,	// cyclic_shift_2_for_drms
				  0,	// frequency_hopping_enabled_flag
				  0,	// frequency_hopping_bits
				  ndi,	// new_data_indication
				  mcs>28?(mcs-28):0,	// redundancy_version
				  harq_pid,	// harq_process_number
				  0,	// ul_tx_mode
				  0,	// current_tx_nb
				  0,	// n_srs
				  get_TBS_UL(mcs,nb_rb));

  sched_resp->UL_req->header.message_id = NFAPI_UL_CONFIG_REQUEST;
  ul_req->number_of_pdus=1;
  ul_req->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
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}

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extern void eNB_fep_full(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
extern void eNB_fep_full_2thread(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc);
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int main(int argc, char **argv)
{
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  char c;
  int i,j,aa,u;
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  PHY_VARS_eNB *eNB;
  PHY_VARS_UE *UE;
  RU_t *ru;
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  int aarx,aatx;
  double channelx,channely;
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  double sigma2, sigma2_dB=10,SNR,SNR2=0,snr0=-2.0,snr1,SNRmeas,rate,saving_bler=0;
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  double input_snr_step=.2,snr_int=30;
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  double blerr;
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  int rvidx[8]={0,2,3,1,0,2,3,1};
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  int **txdata;

  LTE_DL_FRAME_PARMS *frame_parms;
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  double s_re0[30720],s_im0[30720],r_re0[30720],r_im0[30720];
  double s_re1[30720],s_im1[30720],r_re1[30720],r_im1[30720];
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  double r_re2[30720],r_im2[30720];
  double r_re3[30720],r_im3[30720];
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  double *s_re[2]={s_re0,s_re1};
  double *s_im[2]={s_im0,s_im1};
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  double *r_re[4]={r_re0,r_re1,r_re2,r_re3};
  double *r_im[4]={r_im0,r_im1,r_im2,r_im3};
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  double forgetting_factor=0.0; //in [0,1] 0 means a new channel every time, 1 means keep the same channel
  double iqim=0.0;
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  uint8_t extended_prefix_flag=0;
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  int cqi_flag=0,cqi_error,cqi_errors,ack_errors,cqi_crc_falsepositives,cqi_crc_falsenegatives;
  int ch_realization;
  int eNB_id = 0;
  int chMod = 0 ;
  int UE_id = 0;
  unsigned char nb_rb=25,first_rb=0,mcs=0,round=0,bundling_flag=1;
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  //unsigned char l;
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  unsigned char awgn_flag = 0 ;
  SCM_t channel_model=Rice1;


  unsigned char *input_buffer,harq_pid;
  unsigned short input_buffer_length;
  unsigned int ret;
  unsigned int coded_bits_per_codeword,nsymb;
  int subframe=3;
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  unsigned int tx_lev=0,tx_lev_dB,trials,errs[4]= {0,0,0,0},round_trials[4]= {0,0,0,0};
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  uint8_t transmission_mode=1,n_rx=1;
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  FILE *bler_fd=NULL;
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  char bler_fname[512];
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  FILE *time_meas_fd=NULL;
  char time_meas_fname[256];
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  FILE *input_fdUL=NULL,*trch_out_fdUL=NULL;
  //  unsigned char input_file=0;
  char input_val_str[50],input_val_str2[50];
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  //  FILE *rx_frame_file;
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  FILE *csv_fdUL=NULL;
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  /*
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  FILE *fperen=NULL;
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  char fperen_name[512];

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  FILE *fmageren=NULL;
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  char fmageren_name[512];
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  FILE *flogeren=NULL;
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  char flogeren_name[512];
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  */
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  /* FILE *ftxlev;
     char ftxlev_name[512];
  */
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  char csv_fname[512];
  int n_frames=5000;
  int n_ch_rlz = 1;
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  int abstx = 0;
  int hold_channel=0;
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  channel_desc_t *UE2eNB;

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  //uint8_t control_only_flag = 0;
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  int delay = 0;
  double maxDoppler = 0.0;
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  uint8_t srs_flag = 0;
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  uint8_t N_RB_DL=25,osf=1;
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  //uint8_t cyclic_shift = 0;
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  uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2,cqi_size=11;
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  uint8_t tdd_config=3,frame_type=FDD;
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  uint8_t N0=30;
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  double tx_gain=1.0;
  double cpu_freq_GHz;
  int avg_iter,iter_trials;

  uint32_t UL_alloc_pdu;
  int s,Kr,Kr_bytes;
  int dump_perf=0;
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  int test_perf=0;
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  int dump_table =0;

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  double effective_rate=0.0;
  char channel_model_input[10];
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  uint8_t max_turbo_iterations=4;
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  uint8_t parallel_flag=0;
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  int nb_rb_set = 0;
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  int sf;
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  int threequarter_fs=0;
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  int ndi;

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  opp_enabled=1; // to enable the time meas

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  sched_resp.DL_req = &DL_req;
  sched_resp.UL_req = &UL_req;
  sched_resp.HI_DCI0_req = &HI_DCI0_req;
  sched_resp.TX_req = &TX_req;
  memset((void*)&DL_req,0,sizeof(DL_req));
  memset((void*)&UL_req,0,sizeof(UL_req));
  memset((void*)&HI_DCI0_req,0,sizeof(HI_DCI0_req));
  memset((void*)&TX_req,0,sizeof(TX_req));

  UL_req.ul_config_request_body.ul_config_pdu_list = ul_config_pdu_list;
  TX_req.tx_request_body.tx_pdu_list = tx_pdu_list;

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  cpu_freq_GHz = (double)get_cpu_freq_GHz();
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  cpuf = cpu_freq_GHz;
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  printf("Detected cpu_freq %f GHz\n",cpu_freq_GHz);
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  AssertFatal(load_configmodule(argc,argv) != NULL,
	      "cannot load configuration module, exiting\n");
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  logInit();
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  /*
  // enable these lines if you need debug info
  // however itti will catch all signals, so ctrl-c won't work anymore
  // alternatively you can disable ITTI completely in CMakeLists.txt
  itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info, messages_definition_xml, NULL);
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  set_comp_log(PHY,LOG_DEBUG,LOG_MED,1);
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  set_glog(LOG_DEBUG,LOG_MED);
  */
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  while ((c = getopt (argc, argv, "hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF")) != -1) {
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    switch (c) {
    case 'a':
      channel_model = AWGN;
      chMod = 1;
      break;
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    case 'b':
      bundling_flag = 0;
      break;
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    case 'd':
      delay = atoi(optarg);
      break;
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    case 'D':
      maxDoppler = atoi(optarg);
      break;
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    case 'm':
      mcs = atoi(optarg);
      break;
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    case 'n':
      n_frames = atoi(optarg);
      break;
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    case 'Y':
      n_ch_rlz = atoi(optarg);
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      break;

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    case 'X':
      abstx= atoi(optarg);
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      break;

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    case 'g':
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      sprintf(channel_model_input,optarg,10);
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      switch((char)*optarg) {
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      case 'A':
        channel_model=SCM_A;
        chMod = 2;
        break;

      case 'B':
        channel_model=SCM_B;
        chMod = 3;
        break;

      case 'C':
        channel_model=SCM_C;
        chMod = 4;
        break;

      case 'D':
        channel_model=SCM_D;
        chMod = 5;
        break;

      case 'E':
        channel_model=EPA;
        chMod = 6;
        break;

      case 'F':
        channel_model=EVA;
        chMod = 7;
        break;

      case 'G':
        channel_model=ETU;
        chMod = 8;
        break;

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      case 'H':
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        channel_model=Rayleigh8;
        chMod = 9;
        break;

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      case 'I':
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        channel_model=Rayleigh1;
        chMod = 10;
        break;

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      case 'J':
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        channel_model=Rayleigh1_corr;
        chMod = 11;
        break;

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      case 'K':
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        channel_model=Rayleigh1_anticorr;
        chMod = 12;
        break;

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      case 'L':
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        channel_model=Rice8;
        chMod = 13;
        break;

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      case 'M':
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        channel_model=Rice1;
        chMod = 14;
        break;

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      case 'N':
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        channel_model=AWGN;
        chMod = 1;
        break;

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      default:
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        printf("Unsupported channel model!\n");
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        exit(-1);
        break;
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      }
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      break;
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    case 's':
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      snr0 = atof(optarg);
      break;
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    case 'w':
      snr_int = atof(optarg);
      break;
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    case 'e':
      input_snr_step= atof(optarg);
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      break;
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    case 'x':
      transmission_mode=atoi(optarg);
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      if ((transmission_mode!=1) &&
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        printf("Unsupported transmission mode %d\n",transmission_mode);
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        exit(-1);
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      }
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      break;
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    case 'y':
      n_rx = atoi(optarg);
      break;
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    case 'S':
      subframe = atoi(optarg);
      break;
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    case 'T':
      tdd_config=atoi(optarg);
      frame_type=TDD;
      break;
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    case 'p':
      extended_prefix_flag=1;
      break;
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    case 'r':
      nb_rb = atoi(optarg);
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      nb_rb_set = 1;
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      break;
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    case 'f':
      first_rb = atoi(optarg);
      break;
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    //case 'c':
    //  cyclic_shift = atoi(optarg);
    //  break;
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    case 'E':
      threequarter_fs=1;
      break;

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    case 'N':
      N0 = atoi(optarg);
      break;
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    case 'o':
      srs_flag = 1;
      break;

    case 'i':
      input_fdUL = fopen(optarg,"r");
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      printf("Reading in %s (%p)\n",optarg,input_fdUL);
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      if (input_fdUL == (FILE*)NULL) {
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        printf("Unknown file %s\n",optarg);
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        exit(-1);
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      }
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      //      input_file=1;
      break;
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    case 'A':
      beta_ACK = atoi(optarg);
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      if (beta_ACK>15) {
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        printf("beta_ack must be in (0..15)\n");
        exit(-1);
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      }
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      break;
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    case 'C':
      beta_CQI = atoi(optarg);
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      if ((beta_CQI>15)||(beta_CQI<2)) {
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        printf("beta_cqi must be in (2..15)\n");
        exit(-1);
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      }
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      break;
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    case 'R':
      beta_RI = atoi(optarg);
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      if ((beta_RI>15)||(beta_RI<2)) {
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        printf("beta_ri must be in (0..13)\n");
        exit(-1);
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      }
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      break;
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    case 'Q':
      cqi_flag=1;
      break;
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    case 'B':
      N_RB_DL=atoi(optarg);
      break;
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    case 'P':
      dump_perf=1;
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      opp_enabled=1;
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      break;
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    case 'O':
      test_perf=atoi(optarg);
      //print_perf =1;
      break;
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    case 'L':
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      parallel_flag=1;
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      break;
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    case 'I':
      max_turbo_iterations=atoi(optarg);
      break;
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    case 'F':
      xforms=1;
      break;

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    case 'Z':
      dump_table = 1;
      break;
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    case 'h':
    default:
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      /* option "-c cyclic_shift" is not used, let's remove from documentation */
      //printf("%s -h(elp) -a(wgn on) -m mcs -n n_frames -s snr0 -t delay_spread -p (extended prefix on) -r nb_rb -f first_rb -c cyclic_shift -o (srs on) -g channel_model [A:M] Use 3GPP 25.814 SCM-A/B/C/D('A','B','C','D') or 36-101 EPA('E'), EVA ('F'),ETU('G') models (ignores delay spread and Ricean factor), Rayghleigh8 ('H'), Rayleigh1('I'), Rayleigh1_corr('J'), Rayleigh1_anticorr ('K'), Rice8('L'), Rice1('M'), -d Channel delay, -D maximum Doppler shift \n",
      printf("%s -h(elp) -a(wgn on) -m mcs -n n_frames -s snr0 -t delay_spread -p (extended prefix on) -r nb_rb -f first_rb -o (srs on) -g channel_model [A:M] Use 3GPP 25.814 SCM-A/B/C/D('A','B','C','D') or 36-101 EPA('E'), EVA ('F'),ETU('G') models (ignores delay spread and Ricean factor), Rayghleigh8 ('H'), Rayleigh1('I'), Rayleigh1_corr('J'), Rayleigh1_anticorr ('K'), Rice8('L'), Rice1('M'), -d Channel delay, -D maximum Doppler shift \n",
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             argv[0]);
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      exit(1);
      break;
    }
  }
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  RC.nb_L1_inst = 1;
  RC.nb_RU = 1;
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  lte_param_init(&eNB,&UE,&ru,
		 1,
		 1,
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		 n_rx,
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                 1,
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		 1,
		 extended_prefix_flag,
		 frame_type,
		 0,
		 tdd_config,
		 N_RB_DL,
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		 4,
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		 threequarter_fs,
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		 osf,
		 0);
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  RC.eNB = (PHY_VARS_eNB ***)malloc(sizeof(PHY_VARS_eNB **));
  RC.eNB[0] = (PHY_VARS_eNB **)malloc(sizeof(PHY_VARS_eNB *));
  RC.ru = (RU_t **)malloc(sizeof(RC.ru));
  RC.eNB[0][0] = eNB;
  RC.ru[0] = ru;
  for (int k=0;k<eNB->RU_list[0]->nb_rx;k++) eNB->common_vars.rxdataF[k]     =  eNB->RU_list[0]->common.rxdataF[k];

  memset((void*)&eNB->UL_INFO,0,sizeof(eNB->UL_INFO));
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  printf("Setting indication lists\n");
  eNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list   = eNB->rx_pdu_list;
  eNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list = eNB->crc_pdu_list;
  eNB->UL_INFO.sr_ind.sr_indication_body.sr_pdu_list = eNB->sr_pdu_list;
  eNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list = eNB->harq_pdu_list;
  eNB->UL_INFO.cqi_ind.cqi_pdu_list = eNB->cqi_pdu_list;
  eNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = eNB->cqi_raw_pdu_list;

  printf("lte_param_init done\n");

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  // for a call to phy_reset_ue later we need PHY_vars_UE_g allocated and pointing to UE
  PHY_vars_UE_g = (PHY_VARS_UE***)malloc(sizeof(PHY_VARS_UE**));
  PHY_vars_UE_g[0] = (PHY_VARS_UE**) malloc(sizeof(PHY_VARS_UE*));
  PHY_vars_UE_g[0][0] = UE;

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  if (nb_rb_set == 0)
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    nb_rb = eNB->frame_parms.N_RB_UL;
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  printf("1 . rxdataF_comp[0] %p\n",eNB->pusch_vars[0]->rxdataF_comp[0]);
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  printf("Setting mcs = %d\n",mcs);
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  printf("n_frames = %d\n", n_frames);
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  snr1 = snr0+snr_int;
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  printf("SNR0 %f, SNR1 %f\n",snr0,snr1);

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  frame_parms = &eNB->frame_parms;
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  txdata = UE->common_vars.txdata;
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  nsymb = (eNB->frame_parms.Ncp == NORMAL) ? 14 : 12;
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  sprintf(bler_fname,"ULbler_mcs%d_nrb%d_ChannelModel%d_nsim%d.csv",mcs,nb_rb,chMod,n_frames);
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  bler_fd = fopen(bler_fname,"w");
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  if (bler_fd==NULL) {
    fprintf(stderr,"Problem creating file %s\n",bler_fname);
    exit(-1);
  }
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  fprintf(bler_fd,"#SNR;mcs;nb_rb;TBS;rate;errors[0];trials[0];errors[1];trials[1];errors[2];trials[2];errors[3];trials[3]\n");
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  if (test_perf != 0) {
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    char hostname[1024];
    hostname[1023] = '\0';
    gethostname(hostname, 1023);
    printf("Hostname: %s\n", hostname);
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    //char dirname[FILENAME_MAX];
    //sprintf(dirname, "%s//SIMU/USER/pre-ci-logs-%s", getenv("OPENAIR_TARGETS"),hostname);
    //mkdir(dirname, 0777);
    sprintf(time_meas_fname,"time_meas_prb%d_mcs%d_antrx%d_channel%s_tx%d.csv",
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            N_RB_DL,mcs,n_rx,channel_model_input,transmission_mode);
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    time_meas_fd = fopen(time_meas_fname,"w");
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    if (time_meas_fd==NULL) {
      fprintf(stderr,"Cannot create file %s!\n",time_meas_fname);
      exit(-1);
    }
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  }
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  if(abstx) {
    // CSV file
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    sprintf(csv_fname,"EULdataout_tx%d_mcs%d_nbrb%d_chan%d_nsimus%d_eren.m",transmission_mode,mcs,nb_rb,chMod,n_frames);
    csv_fdUL = fopen(csv_fname,"w");
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    if (csv_fdUL == NULL) {
      fprintf(stderr,"Problem opening file %s\n",csv_fname);
      exit(-1);
    }
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    fprintf(csv_fdUL,"data_all%d=[",mcs);
  }
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  if (xforms==1) {
    fl_initialize (&argc, argv, NULL, 0, 0);
    form_enb = create_lte_phy_scope_enb();
    sprintf (title, "LTE PHY SCOPE eNB");
    fl_show_form (form_enb->lte_phy_scope_enb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
  }
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  UE->pdcch_vars[0][0]->crnti = 14;
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  UE->frame_parms.soundingrs_ul_config_common.enabled_flag = srs_flag;
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  UE->frame_parms.soundingrs_ul_config_common.srs_BandwidthConfig = 2;
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  UE->frame_parms.soundingrs_ul_config_common.srs_SubframeConfig = 3;
  UE->soundingrs_ul_config_dedicated[eNB_id].srsConfigDedicatedSetup = srs_flag;
  UE->soundingrs_ul_config_dedicated[eNB_id].duration = 1;
  UE->soundingrs_ul_config_dedicated[eNB_id].srs_ConfigIndex = 2;
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  UE->soundingrs_ul_config_dedicated[eNB_id].srs_Bandwidth = 0;
  UE->soundingrs_ul_config_dedicated[eNB_id].transmissionComb = 0;
  UE->soundingrs_ul_config_dedicated[eNB_id].freqDomainPosition = 0;
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  UE->soundingrs_ul_config_dedicated[eNB_id].cyclicShift = 0;
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  eNB->frame_parms.soundingrs_ul_config_common.enabled_flag = srs_flag;
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  eNB->frame_parms.soundingrs_ul_config_common.srs_BandwidthConfig = 2;
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  eNB->frame_parms.soundingrs_ul_config_common.srs_SubframeConfig = 3;
  eNB->soundingrs_ul_config_dedicated[UE_id].srsConfigDedicatedSetup = srs_flag;
  eNB->soundingrs_ul_config_dedicated[UE_id].duration = 1;
  eNB->soundingrs_ul_config_dedicated[UE_id].srs_ConfigIndex = 2;
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  eNB->soundingrs_ul_config_dedicated[UE_id].srs_Bandwidth = 0;
  eNB->soundingrs_ul_config_dedicated[UE_id].transmissionComb = 0;
  eNB->soundingrs_ul_config_dedicated[UE_id].freqDomainPosition = 0;
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  eNB->soundingrs_ul_config_dedicated[UE_id].cyclicShift = 0;

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  eNB->pusch_config_dedicated[UE_id].betaOffset_ACK_Index = beta_ACK;
  eNB->pusch_config_dedicated[UE_id].betaOffset_RI_Index  = beta_RI;
  eNB->pusch_config_dedicated[UE_id].betaOffset_CQI_Index = beta_CQI;
  UE->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index = beta_ACK;
  UE->pusch_config_dedicated[eNB_id].betaOffset_RI_Index  = beta_RI;
  UE->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index = beta_CQI;
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  UE->ul_power_control_dedicated[eNB_id].deltaMCS_Enabled = 1;
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  // disable periodic cqi/ri reporting
  UE->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex = -1;
  UE->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex = -1;


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  printf("PUSCH Beta : ACK %f, RI %f, CQI %f\n",(double)beta_ack[beta_ACK]/8,(double)beta_ri[beta_RI]/8,(double)beta_cqi[beta_CQI]/8);

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  UE2eNB = new_channel_desc_scm(1,
                                n_rx,
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                                channel_model,
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				N_RB2sampling_rate(eNB->frame_parms.N_RB_UL),
				N_RB2channel_bandwidth(eNB->frame_parms.N_RB_UL),
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                                forgetting_factor,
                                delay,
                                0);
  // set Doppler
  UE2eNB->max_Doppler = maxDoppler;

  // NN: N_RB_UL has to be defined in ulsim
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  for (int k=0;k<NUMBER_OF_UE_MAX;k++) eNB->ulsch[k] = new_eNB_ulsch(max_turbo_iterations,N_RB_DL,0);
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  UE->ulsch[0]   = new_ue_ulsch(N_RB_DL,0);
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  if (parallel_flag == 1) {
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    extern void init_fep_thread(PHY_VARS_eNB *, pthread_attr_t *);
    extern void init_td_thread(PHY_VARS_eNB *, pthread_attr_t *);
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    init_fep_thread(eNB,NULL);
    init_td_thread(eNB,NULL);
  }
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  // Create transport channel structures for 2 transport blocks (MIMO)
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  for (i=0; i<2; i++) {
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    eNB->dlsch[0][i] = new_eNB_dlsch(1,8,1827072,N_RB_DL,0,&eNB->frame_parms);
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    if (!eNB->dlsch[0][i]) {
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      printf("Can't get eNB dlsch structures\n");
      exit(-1);
    }
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    eNB->dlsch[0][i]->rnti = 14;
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  }
  /* allocate memory for both subframes (only one is really used
   * but there is now "copy_harq_proc_struct" which needs both
   * to be valid)
   * TODO: refine this somehow (necessary?)
   */
  for (sf = 0; sf < 2; sf++) {
    for (i=0; i<2; i++) {
      UE->dlsch[sf][0][i]  = new_ue_dlsch(1,8,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
      if (!UE->dlsch[sf][0][i]) {
        printf("Can't get ue dlsch structures\n");
        exit(-1);
      }
      UE->dlsch[sf][0][i]->rnti   = 14;
    }
  }
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  UE->dlsch_SI[0]  = new_ue_dlsch(1,1,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
  UE->dlsch_ra[0]  = new_ue_dlsch(1,1,1827072,MAX_TURBO_ITERATIONS,N_RB_DL,0);
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  UE->measurements.rank[0] = 0;
  UE->transmission_mode[0] = 2;
  UE->pucch_config_dedicated[0].tdd_AckNackFeedbackMode = bundling_flag == 1 ? bundling : multiplexing;
  eNB->transmission_mode[0] = 2;
  eNB->pucch_config_dedicated[0].tdd_AckNackFeedbackMode = bundling_flag == 1 ? bundling : multiplexing;
  UE->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
  eNB->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
  UE->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
  eNB->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
  UE->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
  eNB->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
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  UE->mac_enabled=0;
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  eNB_rxtx_proc_t *proc_rxtx   = &eNB->proc.proc_rxtx[subframe&1];
  UE_rxtx_proc_t *proc_rxtx_ue = &UE->proc.proc_rxtx[subframe&1];
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  proc_rxtx->frame_rx=1;
  proc_rxtx->subframe_rx=subframe;
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  proc_rxtx->frame_tx=pdcch_alloc2ul_frame(&eNB->frame_parms,1,subframe);
  proc_rxtx->subframe_tx=pdcch_alloc2ul_subframe(&eNB->frame_parms,subframe);
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  proc_rxtx_ue->frame_tx = proc_rxtx->frame_rx;
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  proc_rxtx_ue->frame_rx = (subframe<4)?(proc_rxtx->frame_tx-1):(proc_rxtx->frame_tx);
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  proc_rxtx_ue->subframe_tx = proc_rxtx->subframe_rx;
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  proc_rxtx_ue->subframe_rx = (proc_rxtx->subframe_tx+6)%10;
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  printf("Init UL hopping UE\n");
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  init_ul_hopping(&UE->frame_parms);
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  printf("Init UL hopping eNB\n");
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  init_ul_hopping(&eNB->frame_parms);
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  UE->dlsch[subframe&1][0][0]->harq_ack[ul_subframe2pdcch_alloc_subframe(&eNB->frame_parms,subframe)].send_harq_status = 1;
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  UE->ulsch_Msg3_active[eNB_id] = 0;
  UE->ul_power_control_dedicated[eNB_id].accumulationEnabled=1;
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  /*
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  generate_ue_ulsch_params_from_dci((void *)&UL_alloc_pdu,
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                                    14,
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                                    proc_rxtx->subframe_tx,
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                                    format0,
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                                    UE,
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				    proc_rxtx_ue,
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                                    SI_RNTI,
                                    0,
                                    P_RNTI,
                                    CBA_RNTI,
                                    0,
                                    srs_flag);
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  //  printf("RIV %d\n",UL_alloc_pdu.rballoc);

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  generate_eNB_ulsch_params_from_dci(eNB,proc_rxtx,
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				     (void *)&UL_alloc_pdu,
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                                     14,
                                     format0,
                                     0,
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				     SI_RNTI,
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                                     0,
                                     P_RNTI,
                                     CBA_RNTI,
                                     srs_flag);
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  */
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  coded_bits_per_codeword = nb_rb * (12 * get_Qm_ul(mcs)) * nsymb;

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  if (cqi_flag == 1) coded_bits_per_codeword-=UE->ulsch[0]->O;
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  rate = (double)dlsch_tbs25[get_I_TBS(mcs)][nb_rb-1]/(coded_bits_per_codeword);

  printf("Rate = %f (mod %d), coded bits %d\n",rate,get_Qm_ul(mcs),coded_bits_per_codeword);
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  for (ch_realization=0; ch_realization<n_ch_rlz; ch_realization++) {

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    /*
      if(abstx){
      int ulchestim_f[300*12];
      int ulchestim_t[2*(frame_parms->ofdm_symbol_size)];
      }
    */
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    if(abstx) {
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      printf("**********************Channel Realization Index = %d **************************\n", ch_realization);
      saving_bler=1;
    }
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    //    if ((subframe>5) || (subframe < 4))
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    //      UE->frame++;
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    for (SNR=snr0; SNR<snr1; SNR+=input_snr_step) {
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      errs[0]=0;
      errs[1]=0;
      errs[2]=0;
      errs[3]=0;
      round_trials[0] = 0;
      round_trials[1] = 0;
      round_trials[2] = 0;
      round_trials[3] = 0;
      cqi_errors=0;
      ack_errors=0;
      cqi_crc_falsepositives=0;
      cqi_crc_falsenegatives=0;
      round=0;
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      //randominit(0);

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      harq_pid = subframe2harq_pid(&UE->frame_parms,proc_rxtx_ue->frame_tx,subframe);
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      input_buffer_length = UE->ulsch[0]->harq_processes[harq_pid]->TBS/8;
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      input_buffer = (unsigned char *)memalign(32,input_buffer_length+64);
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      //      printf("UL frame %d/subframe %d, harq_pid %d\n",UE->frame,subframe,harq_pid);
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      if (input_fdUL == NULL) {
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        if (n_frames == 1) {
          trch_out_fdUL= fopen("ulsch_trchUL.txt","w");

          for (i=0; i<input_buffer_length; i++) {
            input_buffer[i] = taus()&0xff;

            for (j=0; j<8; j++)
              fprintf(trch_out_fdUL,"%d\n",(input_buffer[i]>>(7-j))&1);
          }

          fclose(trch_out_fdUL);
        } else {
          for (i=0; i<input_buffer_length; i++)
            input_buffer[