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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
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 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
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 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */

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/*! \file LAYER2/MAC/defs.h
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* \brief MAC data structures, constant, and function prototype
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* \author Navid Nikaein and Raymond Knopp
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* \date 2011
* \version 0.5
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* \email navid.nikaein@eurecom.fr
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*/
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/** @defgroup _oai2  openair2 Reference Implementation
 * @ingroup _ref_implementation_
 * @{
 */
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/*@}*/
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#ifndef __LAYER2_MAC_DEFS_H__
#define __LAYER2_MAC_DEFS_H__



#include <stdio.h>
#include <stdlib.h>
#include <string.h>
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#include "COMMON/platform_constants.h"
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#include "BCCH-BCH-Message.h"
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#include "RadioResourceConfigCommon.h"
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#include "RadioResourceConfigCommonSIB.h"
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#include "RadioResourceConfigDedicated.h"
#include "MeasGapConfig.h"
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#include "SchedulingInfoList.h"
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#include "TDD-Config.h"
#include "RACH-ConfigCommon.h"
#include "MeasObjectToAddModList.h"
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#include "MobilityControlInfo.h"
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#if (RRC_VERSION >= MAKE_VERSION(9, 0, 0))
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#include "MBSFN-AreaInfoList-r9.h"
#include "MBSFN-SubframeConfigList.h"
#include "PMCH-InfoList-r9.h"
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#endif
#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
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#include "SCellToAddMod-r10.h"
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#endif
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#if (RRC_VERSION >= MAKE_VERSION(13, 0, 0))
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#include "SystemInformationBlockType1-v1310-IEs.h"
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#include "SystemInformationBlockType18-r12.h"
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#endif
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#include "RadioResourceConfigCommonSIB.h"
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#include "nfapi_interface.h"
#include "PHY_INTERFACE/IF_Module.h"
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#include "PHY/TOOLS/time_meas.h"

#include "PHY/defs_common.h" // for PRACH_RESOURCES_t
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#include "PHY/LTE_TRANSPORT/transport_common.h"
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#include "targets/ARCH/COMMON/common_lib.h"

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/** @defgroup _mac  MAC
 * @ingroup _oai2
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 * @{
 */

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#define BCCH_PAYLOAD_SIZE_MAX 128
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#define CCCH_PAYLOAD_SIZE_MAX 128
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#define PCCH_PAYLOAD_SIZE_MAX 128
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#define RAR_PAYLOAD_SIZE_MAX 128
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#define SCH_PAYLOAD_SIZE_MAX 8192
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#define DCH_PAYLOAD_SIZE_MAX 4096
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/// Logical channel ids from 36-311 (Note BCCH is not specified in 36-311, uses the same as first DRB)

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#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
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// Mask for identifying subframe for MBMS
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#define MBSFN_TDD_SF3 0x80	// for TDD
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#define MBSFN_TDD_SF4 0x40
#define MBSFN_TDD_SF7 0x20
#define MBSFN_TDD_SF8 0x10
#define MBSFN_TDD_SF9 0x08
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#define MBSFN_FDD_SF1 0x80	// for FDD
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#define MBSFN_FDD_SF2 0x40
#define MBSFN_FDD_SF3 0x20
#define MBSFN_FDD_SF6 0x10
#define MBSFN_FDD_SF7 0x08
#define MBSFN_FDD_SF8 0x04

#define MAX_MBSFN_AREA 8
#define MAX_PMCH_perMBSFN 15
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/*!\brief MAX MCCH payload size  */
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#define MCCH_PAYLOAD_SIZE_MAX 128
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//#define MCH_PAYLOAD_SIZE_MAX 16384// this value is using in case mcs and TBS index are high
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#endif

#define printk printf

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/*!\brief Maximum number of logical channl group IDs */
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#define MAX_NUM_LCGID 4
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/*!\brief logical channl group ID 0 */
#define LCGID0 0
/*!\brief logical channl group ID 1 */
#define LCGID1 1
/*!\brief logical channl group ID 2 */
#define LCGID2 2
/*!\brief logical channl group ID 3 */
#define LCGID3 3
/*!\brief Maximum number of logical chanels */
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#define MAX_NUM_LCID 11
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/*!\brief Maximum number od control elemenets */
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#define MAX_NUM_CE 5
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/*!\brief Maximum number of random access process */
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#define NB_RA_PROC_MAX 4
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/*!\brief size of buffer status report table */
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#define BSR_TABLE_SIZE 64
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/*!\brief The power headroom reporting range is from -23 ...+40 dB and beyond, with step 1 */
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#define PHR_MAPPING_OFFSET 23	// if ( x>= -23 ) val = floor (x + 23)
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/*!\brief maximum number of resource block groups */
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#define N_RBG_MAX 25		// for 20MHz channel BW
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/*!\brief minimum value for channel quality indicator */
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#define MIN_CQI_VALUE  0
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/*!\brief maximum value for channel quality indicator */
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#define MAX_CQI_VALUE  15
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/*!\briefmaximum number of supported bandwidth (1.4, 5, 10, 20 MHz) */
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#define MAX_SUPPORTED_BW  4
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/*!\brief CQI values range from 1 to 15 (4 bits) */
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#define CQI_VALUE_RANGE 16
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/*!\brief value for indicating BSR Timer is not running */
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#define MAC_UE_BSR_TIMER_NOT_RUNNING   (0xFFFF)
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#define LCID_EMPTY 0
#define LCID_NOT_EMPTY 1

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/*!\brief minimum RLC PDU size to be transmitted = min RLC Status PDU or RLC UM PDU SN 5 bits */
#define MIN_RLC_PDU_SIZE    (2)

/*!\brief minimum MAC data needed for transmitting 1 min RLC PDU size + 1 byte MAC subHeader */
#define MIN_MAC_HDR_RLC_SIZE    (1 + MIN_RLC_PDU_SIZE)

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/*!\brief maximum number of slices / groups */
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#define MAX_NUM_SLICES 10
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#define U_PLANE_INACTIVITY_VALUE 6000

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/*
 * eNB part
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 */
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/*
 * UE/ENB common part
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 */
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/*!\brief MAC header of Random Access Response for Random access preamble identifier (RAPID) */
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typedef struct {
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    uint8_t RAPID:6;
    uint8_t T:1;
    uint8_t E:1;
} __attribute__ ((__packed__)) RA_HEADER_RAPID;
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/*!\brief  MAC header of Random Access Response for backoff indicator (BI)*/
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typedef struct {
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    uint8_t BI:4;
    uint8_t R:2;
    uint8_t T:1;
    uint8_t E:1;
} __attribute__ ((__packed__)) RA_HEADER_BI;
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/*
typedef struct {
  uint64_t padding:16;
  uint64_t t_crnti:16;
  uint64_t hopping_flag:1;
  uint64_t rb_alloc:10;
  uint64_t mcs:4;
  uint64_t TPC:3;
  uint64_t UL_delay:1;
  uint64_t cqi_req:1;
  uint64_t Timing_Advance_Command:11;  // first/2nd octet LSB
  uint64_t R:1;                        // octet MSB
  } __attribute__((__packed__))RAR_PDU;

typedef struct {
  uint64_t padding:16;
  uint64_t R:1;                        // octet MSB
  uint64_t Timing_Advance_Command:11;  // first/2nd octet LSB
  uint64_t cqi_req:1;
  uint64_t UL_delay:1;
  uint64_t TPC:3;
  uint64_t mcs:4;
  uint64_t rb_alloc:10;
  uint64_t hopping_flag:1;
  uint64_t t_crnti:16;
  } __attribute__((__packed__))RAR_PDU;

#define sizeof_RAR_PDU 6
*/
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/*!\brief  MAC subheader short with 7bit Length field */
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typedef struct {
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    uint8_t LCID:5;		// octet 1 LSB
    uint8_t E:1;
    uint8_t R:2;		// octet 1 MSB
    uint8_t L:7;		// octet 2 LSB
    uint8_t F:1;		// octet 2 MSB
} __attribute__ ((__packed__)) SCH_SUBHEADER_SHORT;
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/*!\brief  MAC subheader long  with 15bit Length field */
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typedef struct {
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    uint8_t LCID:5;		// octet 1 LSB
    uint8_t E:1;
    uint8_t R:2;		// octet 1 MSB
    uint8_t L_MSB:7;
    uint8_t F:1;		// octet 2 MSB
    uint8_t L_LSB:8;
    uint8_t padding;
} __attribute__ ((__packed__)) SCH_SUBHEADER_LONG;
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/*!\brief MAC subheader short without length field */
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typedef struct {
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    uint8_t LCID:5;
    uint8_t E:1;
    uint8_t R:2;
} __attribute__ ((__packed__)) SCH_SUBHEADER_FIXED;
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/*!\brief  MAC subheader long  with 24bit DST field */
typedef struct {
  uint8_t   R0:4;
  uint8_t   V:4;//Version number: Possible values "0001", "0010", "0011" based on TS36.321 section 6.2.3.
  uint8_t  SRC07; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC815; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC1623; //Prose UE source ID. Size 24 bits.
  uint8_t  DST07; //Prose UE destination ID. Size 24 bits.
  uint8_t  DST815; //Prose UE destination ID. Size 24 bits.
  uint8_t  DST1623; //Prose UE destination ID. Size 24 bits.
  uint8_t  LCID:5;
  uint8_t  E:1;
  uint8_t  R1:2;
  uint8_t  L:7;	// Length field indicating the size of the corresponding SDU in bytes.
  uint8_t  F:1;
}__attribute__((__packed__))SLSCH_SUBHEADER_24_Bit_DST_SHORT;

/*!\brief  MAC subheader long  with 24bit DST field */
typedef struct {
  uint8_t   R0:4;
  uint8_t   V:4;//Version number: Possible values "0001", "0010", "0011" based on TS36.321 section 6.2.3.
  uint8_t  SRC07; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC815; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC1623; //Prose UE source ID. Size 24 bits.
  uint8_t  DST07; //Prose UE destination ID. Size 24 bits.
  uint8_t  DST815; //Prose UE destination ID. Size 24 bits.
  uint8_t  DST1623; //Prose UE destination ID. Size 24 bits.
  uint8_t  LCID:5;
  uint8_t  E:1;
  uint8_t  R1:2;
  uint8_t  L_MSB:7;	// Length field indicating the size of the corresponding SDU in bytes.
  uint8_t  F:1;
  uint8_t  L_LSB:8;
}__attribute__((__packed__))SLSCH_SUBHEADER_24_Bit_DST_LONG;

/*!\brief  MAC subheader long  with 24bit DST field */
typedef struct {
  uint8_t   R0:4;
  uint8_t   V:4;//Version number: Possible values "0001", "0010", "0011" based on TS36.321 section 6.2.3.
  uint8_t  SRC07; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC815; //Prose UE source ID. Size 24 bits.
  uint8_t  DST07; //Prose UE destination ID. Size 16 bits.
  uint8_t  DST815; //Prose UE destination ID. Size 16 bits.
  uint8_t  LCID:5;
  uint8_t  E:1;
  uint8_t  R1:2;
  uint8_t  L:7;	// Length field indicating the size of the corresponding SDU in bytes.
  uint8_t  F:1;
}__attribute__((__packed__))SLSCH_SUBHEADER_16_Bit_DST_SHORT;

/*!\brief  MAC subheader long  with 24bit DST field */
typedef struct {
  uint8_t   R0:4;
  uint8_t   V:4;//Version number: Possible values "0001", "0010", "0011" based on TS36.321 section 6.2.3.
  uint8_t  SRC07; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC815; //Prose UE source ID. Size 24 bits.
  uint8_t  SRC1623; //Prose UE source ID. Size 24 bits.
  uint8_t  DST07; //Prose UE destination ID. Size 16 bits.
  uint8_t  DST815; //Prose UE destination ID. Size 16 bits.
  uint8_t  LCID:5;
  uint8_t  E:1;
  uint8_t  R1:2;
  uint8_t  L_MSB:7;	// Length field indicating the size of the corresponding SDU in bytes.
  uint8_t  F:1;
  uint8_t  L_LSB:8;
}__attribute__((__packed__))SLSCH_SUBHEADER_16_Bit_DST_LONG;

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/*!\brief  mac control element: short buffer status report for a specific logical channel group ID*/
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typedef struct {
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    uint8_t Buffer_size:6;	// octet 1 LSB
    uint8_t LCGID:2;		// octet 1 MSB
} __attribute__ ((__packed__)) BSR_SHORT;
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typedef BSR_SHORT BSR_TRUNCATED;
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/*!\brief  mac control element: long buffer status report for all logical channel group ID*/
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typedef struct {
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    uint8_t Buffer_size3:6;
    uint8_t Buffer_size2:6;
    uint8_t Buffer_size1:6;
    uint8_t Buffer_size0:6;
} __attribute__ ((__packed__)) BSR_LONG;
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/*!\brief  mac control element: sidelink buffer status report */
typedef struct {
	uint8_t DST_1:4;
	uint8_t LCGID_1: 2;
	uint8_t Buffer_size_1:6;
	uint8_t DST_2:4;
	uint8_t LCGID_2: 2;
	uint8_t Buffer_size_2:6;
}__attribute__((__packed__))SL_BSR;

/*!\brief  mac control element: truncated sidelink buffer status report */
typedef struct {
	uint8_t DST:4;
	uint8_t LCGID: 2;
	uint8_t Buffer_size:6;
	uint8_t R1:1;
	uint8_t R2:1;
	uint8_t R3:1;
	uint8_t R4:1;
}__attribute__((__packed__))SL_BSR_Truncated;



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#define BSR_LONG_SIZE  (sizeof(BSR_LONG))
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/*!\brief  mac control element: timing advance  */
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typedef struct {
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    uint8_t TA:6;
    uint8_t R:2;
} __attribute__ ((__packed__)) TIMING_ADVANCE_CMD;
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/*!\brief  mac control element: power headroom report  */
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typedef struct {
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    uint8_t PH:6;
    uint8_t R:2;
} __attribute__ ((__packed__)) POWER_HEADROOM_CMD;
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/*! \brief MIB payload */
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typedef struct {
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    uint8_t payload[3];
} __attribute__ ((__packed__)) MIB_PDU;
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/*! \brief CCCH payload */
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typedef struct {
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    uint8_t payload[CCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) CCCH_PDU;
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/*! \brief BCCH payload */
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typedef struct {
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    uint8_t payload[BCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) BCCH_PDU;
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/*! \brief RAR payload */
typedef struct {
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    uint8_t payload[RAR_PAYLOAD_SIZE_MAX];
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} __attribute__ ((__packed__)) RAR_PDU;
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/*! \brief BCCH payload */
typedef struct {
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    uint8_t payload[PCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) PCCH_PDU;
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#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
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/*! \brief MCCH payload */
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typedef struct {
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    uint8_t payload[MCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) MCCH_PDU;
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/*!< \brief MAC control element for activation and deactivation of component carriers */
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typedef struct {
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    uint8_t C7:1;		/*!< \brief Component carrier 7 */
    uint8_t C6:1;		/*!< \brief Component carrier 6 */
    uint8_t C5:1;		/*!< \brief Component carrier 5 */
    uint8_t C4:1;		/*!< \brief Component carrier 4 */
    uint8_t C3:1;		/*!< \brief Component carrier 3 */
    uint8_t C2:1;		/*!< \brief Component carrier 2 */
    uint8_t C1:1;		/*!< \brief Component carrier 1 */
    uint8_t R:1;		/*!< \brief Reserved  */
} __attribute__ ((__packed__)) CC_ELEMENT;
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/*! \brief MAC control element: MCH Scheduling Information */
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typedef struct {
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    uint8_t stop_sf_MSB:3;	// octet 1 LSB
    uint8_t lcid:5;		// octet 2 MSB
    uint8_t stop_sf_LSB:8;
} __attribute__ ((__packed__)) MSI_ELEMENT;
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#endif
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/*! \brief Values of CCCH LCID for DLSCH */
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#define CCCH_LCHANID 0
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/*!\brief Values of BCCH logical channel (fake)*/
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#define BCCH 3			// SI
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/*!\brief Values of PCCH logical channel (fake)*/
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#define PCCH 4			// Paging
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/*!\brief Values of PCCH logical channel (fake) */
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#define MIBCH 5			// MIB
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/*!\brief Values of BCCH SIB1_BR logical channel (fake) */
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#define BCCH_SIB1_BR 6		// SIB1_BR
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/*!\brief Values of BCCH SIB_BR logical channel (fake) */
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#define BCCH_SI_BR 7		// SI-BR
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/*!\brief Value of CCCH / SRB0 logical channel */
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#define CCCH 0			// srb0
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/*!\brief DCCH / SRB1 logical channel */
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#define DCCH 1			// srb1
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/*!\brief DCCH1 / SRB2  logical channel */
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#define DCCH1 2			// srb2
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/*!\brief DTCH DRB1  logical channel */
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#define DTCH 3			// LCID
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/*!\brief MCCH logical channel */
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#define MCCH 4
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/*!\brief MTCH logical channel */
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#define MTCH 1
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// DLSCH LCHAN ID
/*!\brief LCID of UE contention resolution identity for DLSCH*/
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#define UE_CONT_RES 28
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/*!\brief LCID of timing advance for DLSCH */
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#define TIMING_ADV_CMD 29
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/*!\brief LCID of discontinous reception mode for DLSCH */
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#define DRX_CMD 30
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/*!\brief LCID of padding LCID for DLSCH */
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#define SHORT_PADDING 31

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#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
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// MCH LCHAN IDs (table6.2.1-4 TS36.321)
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/*!\brief LCID of MCCH for DL */
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#define MCCH_LCHANID 0
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/*!\brief LCID of MCH scheduling info for DL */
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#define MCH_SCHDL_INFO 30
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/*!\brief LCID of Carrier component activation/deactivation */
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#define CC_ACT_DEACT 27
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//TTN (for D2D)
#define SL_DISCOVERY 8 //LCID (fake)
#define MAX_NUM_DEST 10
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#endif

// ULSCH LCHAN IDs
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/*!\brief LCID of extended power headroom for ULSCH */
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#define EXTENDED_POWER_HEADROOM 25
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/*!\brief LCID of power headroom for ULSCH */
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#define POWER_HEADROOM 26
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/*!\brief LCID of CRNTI for ULSCH */
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#define CRNTI 27
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/*!\brief LCID of truncated BSR for ULSCH */
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#define TRUNCATED_BSR 28
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/*!\brief LCID of short BSR for ULSCH */
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#define SHORT_BSR 29
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/*!\brief LCID of long BSR for ULSCH */
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#define LONG_BSR 30
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/*!\bitmaps for BSR Triggers */
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#define	BSR_TRIGGER_NONE		(0)	/* No BSR Trigger */
#define	BSR_TRIGGER_REGULAR		(1)	/* For Regular and ReTxBSR Expiry Triggers */
#define	BSR_TRIGGER_PERIODIC	(2)	/* For BSR Periodic Timer Expiry Trigger */
#define	BSR_TRIGGER_PADDING		(4)	/* For Padding BSR Trigger */
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/*! \brief Downlink SCH PDU Structure */
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typedef struct {
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    uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX];
    uint16_t Pdu_size[8];
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} __attribute__ ((__packed__)) DLSCH_PDU;

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/*! \brief MCH PDU Structure */
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typedef struct {
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    int8_t payload[SCH_PAYLOAD_SIZE_MAX];
    uint16_t Pdu_size;
    uint8_t mcs;
    uint8_t sync_area;
    uint8_t msi_active;
    uint8_t mcch_active;
    uint8_t mtch_active;
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} __attribute__ ((__packed__)) MCH_PDU;

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/*! \brief Uplink SCH PDU Structure */
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typedef struct {
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    int8_t payload[SCH_PAYLOAD_SIZE_MAX];	/*!< \brief SACH payload */
    uint16_t Pdu_size;
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} __attribute__ ((__packed__)) ULSCH_PDU;

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/*! \brief Uplink SCH PDU Structure */
typedef struct {
  int8_t payload[DCH_PAYLOAD_SIZE_MAX];         /*!< \brief SACH payload */
  uint16_t Pdu_size;
} __attribute__ ((__packed__)) ULDCH_PDU;

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/*!\brief RA process state*/
typedef enum {
    IDLE = 0,
    MSG2,
    WAITMSG3,
    MSG4,
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    WAITMSG4ACK,
    MSGCRNTI,
    MSGCRNTI_ACK
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} RA_state;

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/*!\brief  UE ULSCH scheduling states*/
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typedef enum {
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    S_UL_NONE = 0,
    S_UL_WAITING,
    S_UL_SCHEDULED,
    S_UL_BUFFERED,
    S_UL_NUM_STATUS
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} UE_ULSCH_STATUS;

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/*!\brief  UE DLSCH scheduling states*/
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typedef enum {
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    S_DL_NONE = 0,
    S_DL_WAITING,
    S_DL_SCHEDULED,
    S_DL_BUFFERED,
    S_DL_NUM_STATUS
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} UE_DLSCH_STATUS;

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/*!\brief  scheduling policy for the contention-based access */
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typedef enum {
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    CBA_ES = 0,			/// equal share of RB among groups w
    CBA_ES_S,			/// equal share of RB among groups with small allocation
    CBA_PF,			/// proportional fair (kind of)
    CBA_PF_S,			/// proportional fair (kind of) with small RB allocation
    CBA_RS			/// random allocation
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} CBA_POLICY;

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/*!\brief  scheduler mode */
typedef enum {
    SCHED_MODE_DEFAULT = 0,			/// default cheduler
    SCHED_MODE_FAIR_RR			/// fair raund robin
} SCHEDULER_MODES;

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/*! \brief temporary struct for ULSCH sched */
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typedef struct {
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    rnti_t rnti;
    uint16_t subframe;
    uint16_t serving_num;
    UE_ULSCH_STATUS status;
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} eNB_ULSCH_INFO;
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/*! \brief temp struct for DLSCH sched */
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typedef struct {
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    rnti_t rnti;
    uint16_t weight;
    uint16_t subframe;
    uint16_t serving_num;
    UE_DLSCH_STATUS status;
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} eNB_DLSCH_INFO;
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/*! \brief eNB overall statistics */
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typedef struct {
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    /// num BCCH PDU per CC
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    uint32_t total_num_bcch_pdu;
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    /// BCCH buffer size
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    uint32_t bcch_buffer;
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    /// total BCCH buffer size
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    uint32_t total_bcch_buffer;
    /// BCCH MCS
    uint32_t bcch_mcs;

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    /// num CCCH PDU per CC
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    uint32_t total_num_ccch_pdu;
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    /// BCCH buffer size
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    uint32_t ccch_buffer;
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    /// total BCCH buffer size
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    uint32_t total_ccch_buffer;
    /// BCCH MCS
    uint32_t ccch_mcs;
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  /// num PCCH PDU per CC
  uint32_t total_num_pcch_pdu;
  /// PCCH buffer size
  uint32_t pcch_buffer;
  /// total PCCH buffer size
  uint32_t total_pcch_buffer;
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  /// BCCH MCS
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  uint32_t pcch_mcs;
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/// num active users
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    uint16_t num_dlactive_UEs;
    ///  available number of PRBs for a give SF
    uint16_t available_prbs;
    /// total number of PRB available for the user plane
    uint32_t total_available_prbs;
    /// aggregation
    /// total avilable nccc : num control channel element
    uint16_t available_ncces;
    // only for a new transmission, should be extended for retransmission
    // current dlsch  bit rate for all transport channels
    uint32_t dlsch_bitrate;
    //
    uint32_t dlsch_bytes_tx;
    //
    uint32_t dlsch_pdus_tx;
    //
    uint32_t total_dlsch_bitrate;
    //
    uint32_t total_dlsch_bytes_tx;
    //
    uint32_t total_dlsch_pdus_tx;

    // here for RX
    //
    uint32_t ulsch_bitrate;
    //
    uint32_t ulsch_bytes_rx;
    //
    uint64_t ulsch_pdus_rx;

    uint32_t total_ulsch_bitrate;
    //
    uint32_t total_ulsch_bytes_rx;
    //
    uint32_t total_ulsch_pdus_rx;


    /// MAC agent-related stats
    /// total number of scheduling decisions
    int sched_decisions;
    /// missed deadlines
    int missed_deadlines;
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} eNB_STATS;
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/*! \brief eNB statistics for the connected UEs*/
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typedef struct {
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    /// CRNTI of UE
    rnti_t crnti;		///user id (rnti) of connected UEs
    // rrc status
    uint8_t rrc_status;
    /// harq pid
    uint8_t harq_pid;
    /// harq rounf
    uint8_t harq_round;
    /// total available number of PRBs for a new transmission
    uint16_t rbs_used;
    /// total available number of PRBs for a retransmission
    uint16_t rbs_used_retx;
    /// total nccc used for a new transmission: num control channel element
    uint16_t ncce_used;
    /// total avilable nccc for a retransmission: num control channel element
    uint16_t ncce_used_retx;

    // mcs1 before the rate adaptaion
    uint8_t dlsch_mcs1;
    /// Target mcs2 after rate-adaptation
    uint8_t dlsch_mcs2;
    //  current TBS with mcs2
    uint32_t TBS;
    //  total TBS with mcs2
    //  uint32_t total_TBS;
    //  total rb used for a new transmission
    uint32_t total_rbs_used;
    //  total rb used for retransmission
    uint32_t total_rbs_used_retx;

    /// TX
    /// Num pkt
    uint32_t num_pdu_tx[NB_RB_MAX];
    /// num bytes
    uint32_t num_bytes_tx[NB_RB_MAX];
    /// num retransmission / harq
    uint32_t num_retransmission;
    /// instantaneous tx throughput for each TTI
    //  uint32_t tti_throughput[NB_RB_MAX];
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    // Number of received MAC SDU
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    uint32_t num_mac_sdu_tx;
    // LCID related to SDU
    unsigned char lcid_sdu[NB_RB_MAX];
    // Length of SDU Got from LC DL
    uint32_t sdu_length_tx[NB_RB_MAX];
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    /// overall
    //
    uint32_t dlsch_bitrate;
    //total
    uint32_t total_dlsch_bitrate;
    /// headers+ CE +  padding bytes for a MAC PDU
    uint64_t overhead_bytes;
    /// headers+ CE +  padding bytes for a MAC PDU
    uint64_t total_overhead_bytes;
    /// headers+ CE +  padding bytes for a MAC PDU
    uint64_t avg_overhead_bytes;
    // MAC multiplexed payload
    uint64_t total_sdu_bytes;
    // total MAC pdu bytes
    uint64_t total_pdu_bytes;

    // total num pdu
    uint32_t total_num_pdus;
    //
    //  uint32_t avg_pdu_size;

    /// RX

    /// PUCCH1a/b power (dBm)
    int32_t Po_PUCCH_dBm;
    /// Indicator that Po_PUCCH has been updated by PHY
    int32_t Po_PUCCH_update;
    /// Uplink measured RSSI
    int32_t UL_rssi;
    /// preassigned mcs after rate adaptation
    uint8_t ulsch_mcs1;
    /// adjusted mcs
    uint8_t ulsch_mcs2;

    /// estimated average pdu inter-departure time
    uint32_t avg_pdu_idt;
    /// estimated average pdu size
    uint32_t avg_pdu_ps;
    ///
    uint32_t aggregated_pdu_size;
    uint32_t aggregated_pdu_arrival;

    ///  uplink transport block size
    uint32_t ulsch_TBS;
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    uint32_t total_ulsch_TBS;
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    ///  total rb used for a new uplink transmission
    uint32_t num_retransmission_rx;
    ///  total rb used for a new uplink transmission
    uint32_t rbs_used_rx;
    ///  total rb used for a new uplink retransmission
    uint32_t rbs_used_retx_rx;
    ///  total rb used for a new uplink transmission
    uint32_t total_rbs_used_rx;
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    /// normalized rx power
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    int32_t normalized_rx_power;
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    /// target rx power
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    int32_t target_rx_power;

    /// num rx pdu
    uint32_t num_pdu_rx[NB_RB_MAX];
    /// num bytes rx
    uint32_t num_bytes_rx[NB_RB_MAX];
    /// instantaneous rx throughput for each TTI
    //  uint32_t tti_goodput[NB_RB_MAX];
    /// errors
    uint32_t num_errors_rx;

    uint64_t overhead_bytes_rx;
    /// headers+ CE +  padding bytes for a MAC PDU
    uint64_t total_overhead_bytes_rx;
    /// headers+ CE +  padding bytes for a MAC PDU
    uint64_t avg_overhead_bytes_rx;
    //
    uint32_t ulsch_bitrate;
    //total
    uint32_t total_ulsch_bitrate;
    /// overall
    ///  MAC pdu bytes
    uint64_t pdu_bytes_rx;
    /// total MAC pdu bytes
    uint64_t total_pdu_bytes_rx;
    /// total num pdu
    uint32_t total_num_pdus_rx;
    /// num of error pdus
    uint32_t total_num_errors_rx;
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    // Number of error PDUS
    uint32_t num_mac_sdu_rx;
    // Length of SDU Got from LC UL - Size array can be refined
    uint32_t      sdu_length_rx[NB_RB_MAX];
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} eNB_UE_STATS;
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/*! \brief eNB template for UE context information  */
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typedef struct {
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    /// C-RNTI of UE
    rnti_t rnti;
    /// NDI from last scheduling
    uint8_t oldNDI[8];
    /// mcs1 from last scheduling
    uint8_t oldmcs1[8];
    /// mcs2 from last scheduling
    uint8_t oldmcs2[8];
    /// NDI from last UL scheduling
    uint8_t oldNDI_UL[8];
    /// mcs from last UL scheduling
    uint8_t mcs_UL[8];
    /// TBS from last UL scheduling
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    int TBS_UL[8];
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    /// Flag to indicate UL has been scheduled at least once
    boolean_t ul_active;
    /// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received)
    boolean_t configured;

    /// MCS from last scheduling
    uint8_t mcs[8];

    /// TPC from last scheduling
    uint8_t oldTPC[8];

    // PHY interface info

    /// Number of Allocated RBs for DL after scheduling (prior to frequency allocation)
    uint16_t nb_rb[8];		// num_max_harq

    /// Number of Allocated RBs for UL after scheduling
    uint16_t nb_rb_ul[8];	// num_max_harq

    /// Number of Allocated RBs for UL after scheduling
    uint16_t first_rb_ul[8];	// num_max_harq

    /// Cyclic shift for DMRS after scheduling
    uint16_t cshift[8];		// num_max_harq

    /// Number of Allocated RBs by the ulsch preprocessor
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    uint8_t pre_allocated_nb_rb_ul[MAX_NUM_SLICES];
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    /// index of Allocated RBs by the ulsch preprocessor
    int8_t pre_allocated_rb_table_index_ul;

    /// total allocated RBs
    int8_t total_allocated_rbs;

    /// pre-assigned MCS by the ulsch preprocessor
    uint8_t pre_assigned_mcs_ul;

    /// assigned MCS by the ulsch scheduler
    uint8_t assigned_mcs_ul;

    /// DL DAI
    uint8_t DAI;

    /// UL DAI
    uint8_t DAI_ul[10];

    /// UL Scheduling Request Received
    uint8_t ul_SR;

    ///Resource Block indication for each sub-band in MU-MIMO
    uint8_t rballoc_subband[8][50];

    // Logical channel info for link with RLC

    /// LCGID mapping
    long lcgidmap[11];

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	///UE logical channel priority
    long lcgidpriority[11];

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    /// phr information
    int8_t phr_info;

    /// phr information
    int8_t phr_info_configured;

    ///dl buffer info
    uint32_t dl_buffer_info[MAX_NUM_LCID];
    /// total downlink buffer info
    uint32_t dl_buffer_total;
    /// total downlink pdus
    uint32_t dl_pdus_total;
    /// downlink pdus for each LCID
    uint32_t dl_pdus_in_buffer[MAX_NUM_LCID];
    /// creation time of the downlink buffer head for each LCID
    uint32_t dl_buffer_head_sdu_creation_time[MAX_NUM_LCID];
    /// maximum creation time of the downlink buffer head across all LCID
    uint32_t dl_buffer_head_sdu_creation_time_max;
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    /// a flag indicating that the downlink head SDU is segmented
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    uint8_t dl_buffer_head_sdu_is_segmented[MAX_NUM_LCID];
    /// size of remaining size to send for the downlink head SDU
    uint32_t dl_buffer_head_sdu_remaining_size_to_send[MAX_NUM_LCID];

    /// uplink buffer creation time for each LCID
    uint32_t ul_buffer_creation_time[MAX_NUM_LCGID];
    /// maximum uplink buffer creation time across all the LCIDs
    uint32_t ul_buffer_creation_time_max;
    /// uplink buffer size per LCID
    uint32_t ul_buffer_info[MAX_NUM_LCGID];

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    /// uplink bytes that are currently scheduled
    int scheduled_ul_bytes;
    /// estimation of the UL buffer size
    int estimated_ul_buffer;

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    /// UE tx power
    int32_t ue_tx_power;
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    /// stores the frame where the last TPC was transmitted
    uint32_t pusch_tpc_tx_frame;
    uint32_t pusch_tpc_tx_subframe;
    uint32_t pucch_tpc_tx_frame;
    uint32_t pucch_tpc_tx_subframe;
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#ifdef LOCALIZATION
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    eNB_UE_estimated_distances distance;
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#endif
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#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
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    uint8_t rach_resource_type;
    uint16_t mpdcch_repetition_cnt;
    frame_t Msg2_frame;
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#endif
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    sub_frame_t Msg2_subframe;
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    PhysicalConfigDedicated_t *physicalConfigDedicated;
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} UE_TEMPLATE;

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/*! \brief scheduling control information set through an API (not used)*/
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typedef struct {
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    ///UL transmission bandwidth in RBs
    uint8_t ul_bandwidth[MAX_NUM_LCID];
    ///DL transmission bandwidth in RBs
    uint8_t dl_bandwidth[MAX_NUM_LCID];

    //To do GBR bearer
    uint8_t min_ul_bandwidth[MAX_NUM_LCID];

    uint8_t min_dl_bandwidth[MAX_NUM_LCID];

    ///aggregated bit rate of non-gbr bearer per UE
    uint64_t ue_AggregatedMaximumBitrateDL;
    ///aggregated bit rate of non-gbr bearer per UE
    uint64_t ue_AggregatedMaximumBitrateUL;
    ///CQI scheduling interval in subframes.
    uint16_t cqiSchedInterval;
    ///Contention resolution timer used during random access
    uint8_t mac_ContentionResolutionTimer;

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    uint16_t max_rbs_allowed_slice[NFAPI_CC_MAX][MAX_NUM_SLICES];
    uint16_t max_rbs_allowed_slice_uplink[NFAPI_CC_MAX][MAX_NUM_SLICES];
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    uint8_t max_mcs[MAX_NUM_LCID];

    uint16_t priority[MAX_NUM_LCID];

    // resource scheduling information

    /// Current DL harq round per harq_pid on each CC
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    uint8_t round_UL[NFAPI_CC_MAX][8];
    uint8_t dl_pow_off[NFAPI_CC_MAX];
    uint16_t pre_nb_available_rbs[NFAPI_CC_MAX];
    unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX];
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    uint16_t ta_timer;
    int16_t ta_update;
    uint16_t ul_consecutive_errors;
    int32_t context_active_timer;
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    int32_t cqi_req_timer;
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    /// indicator that CQI was received on PUSCH when requested
    int32_t cqi_received;
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    int32_t ul_failure_timer;
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    uint32_t ue_reestablishment_reject_timer;
    uint32_t ue_reestablishment_reject_timer_thres;
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    int32_t ul_scheduled;
    int32_t ra_pdcch_order_sent;
    int32_t ul_out_of_sync;
    int32_t phr_received;
    uint8_t periodic_ri_received[NFAPI_CC_MAX];
    uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
    uint8_t pucch1_cqi_update[NFAPI_CC_MAX];
    uint8_t pucch1_snr[NFAPI_CC_MAX];
    uint8_t pucch2_cqi_update[NFAPI_CC_MAX];
    uint8_t pucch2_snr[NFAPI_CC_MAX];
    uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
    uint8_t pucch3_snr[NFAPI_CC_MAX];
    uint8_t pusch_snr[NFAPI_CC_MAX];
    uint16_t feedback_cnt[NFAPI_CC_MAX];
    uint16_t timing_advance;
    uint16_t timing_advance_r9;
    uint8_t periodic_wideband_cqi[NFAPI_CC_MAX];
    uint8_t periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX];
    uint8_t periodic_wideband_pmi[NFAPI_CC_MAX];
    uint8_t periodic_subband_cqi[NFAPI_CC_MAX][16];
    uint8_t periodic_subband_spatial_diffcqi[NFAPI_CC_MAX][16];
    uint8_t aperiodic_subband_cqi0[NFAPI_CC_MAX][25];
    uint8_t aperiodic_subband_pmi[NFAPI_CC_MAX][25];
    uint8_t aperiodic_subband_diffcqi0[NFAPI_CC_MAX][25];
    uint8_t aperiodic_subband_cqi1[NFAPI_CC_MAX][25];
    uint8_t aperiodic_subband_diffcqi1[NFAPI_CC_MAX][25];
    uint8_t aperiodic_wideband_cqi0[NFAPI_CC_MAX];
    uint8_t aperiodic_wideband_pmi[NFAPI_CC_MAX];
    uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX];
    uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX];
    uint8_t dl_cqi[NFAPI_CC_MAX];
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    int32_t uplane_inactivity_timer;
    uint8_t crnti_reconfigurationcomplete_flag;
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    uint8_t cqi_req_flag;
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} UE_sched_ctrl;
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/*! \brief eNB template for the Random access information */
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typedef struct {
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    /// Flag to indicate this process is active
    RA_state state;
    /// Subframe where preamble was received
    uint8_t preamble_subframe;
    /// Subframe where Msg2 is to be sent
    uint8_t Msg2_subframe;
    /// Frame where Msg2 is to be sent
    frame_t Msg2_frame;
    /// Subframe where Msg3 is to be sent
    sub_frame_t Msg3_subframe;
    /// Frame where Msg3 is to be sent
    frame_t Msg3_frame;
    /// Subframe where Msg4 is to be sent
    sub_frame_t Msg4_subframe;
    /// Frame where Msg4 is to be sent
    frame_t Msg4_frame;
    /// harq_pid used for Msg4 transmission
    uint8_t harq_pid;
    /// UE RNTI allocated during RAR
    rnti_t rnti;
    /// RA RNTI allocated from received PRACH
    uint16_t RA_rnti;
    /// Received preamble_index
    uint8_t preamble_index;
    /// Received UE Contention Resolution Identifier
    uint8_t cont_res_id[6];
    /// Timing offset indicated by PHY
    int16_t timing_offset;
    /// Timeout for RRC connection
    int16_t RRC_timer;
    /// Msg3 first RB
    uint8_t msg3_first_rb;
    /// Msg3 number of RB
    uint8_t msg3_nb_rb;
    /// Msg3 MCS
    uint8_t msg3_mcs;
    /// Msg3 TPC command
    uint8_t msg3_TPC;
    /// Msg3 ULdelay command
    uint8_t msg3_ULdelay;
    /// Msg3 cqireq command
    uint8_t msg3_cqireq;
    /// Round of Msg3 HARQ
    uint8_t msg3_round;
    /// TBS used for Msg4
    int msg4_TBsize;
    /// MCS used for Msg4
    int msg4_mcs;
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    uint8_t rach_resource_type;
    uint8_t msg2_mpdcch_repetition_cnt;
    uint8_t msg4_mpdcch_repetition_cnt;
    uint8_t msg2_narrowband;
    uint8_t msg34_narrowband;
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#endif
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    int32_t  crnti_rrc_mui;
    int8_t   crnti_harq_pid;
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} RA_t;
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/*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */
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typedef struct {
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    uint8_t sbmap[13];	//13 = number of SB MAX for 100 PRB
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    uint8_t periodicity;
    uint8_t first_subframe;
    uint8_t sb_size;
    uint8_t nb_active_sb;
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} SBMAP_CONF;
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/*! \brief UE list used by eNB to order UEs/CC for scheduling*/
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typedef struct {
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    /// Dedicated information for UEs
    struct PhysicalConfigDedicated
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	*physicalConfigDedicated[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
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    /// DLSCH pdu
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    DLSCH_PDU DLSCH_pdu[NFAPI_CC_MAX][2][MAX_MOBILES_PER_ENB];
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    /// DCI template and MAC connection parameters for UEs
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    UE_TEMPLATE UE_template[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
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    /// DCI template and MAC connection for RA processes
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    int pCC_id[MAX_MOBILES_PER_ENB];
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    /// sorted downlink component carrier for the scheduler
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    int ordered_CCids[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
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    /// number of downlink active component carrier
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    int numactiveCCs[MAX_MOBILES_PER_ENB];
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    /// sorted uplink component carrier for the scheduler
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    int ordered_ULCCids[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
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    /// number of uplink active component carrier
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    int numactiveULCCs[MAX_MOBILES_PER_ENB];
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    /// number of downlink active component carrier
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    uint8_t dl_CC_bitmap[MAX_MOBILES_PER_ENB];
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    /// eNB to UE statistics
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    eNB_UE_STATS eNB_UE_stats[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
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    /// scheduling control info
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    UE_sched_ctrl UE_sched_ctrl[MAX_MOBILES_PER_ENB];
    int next[MAX_MOBILES_PER_ENB];
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    int head;
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    int next_ul[MAX_MOBILES_PER_ENB];
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    int head_ul;
    int avail;
    int num_UEs;
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    boolean_t active[MAX_MOBILES_PER_ENB];
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    /// Sorting criteria for the UE list in the MAC preprocessor
    uint16_t sorting_criteria[MAX_NUM_SLICES][CR_NUM];
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    uint16_t first_rb_offset[NFAPI_CC_MAX][MAX_NUM_SLICES];
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    int assoc_dl_slice_idx[MAX_MOBILES_PER_ENB];
    int assoc_ul_slice_idx[MAX_MOBILES_PER_ENB];
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} UE_list_t;
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/*! \brief deleting control information*/
typedef struct {
    ///rnti of UE
    rnti_t rnti;
    ///remove UE context flag
    boolean_t removeContextFlg;
} UE_free_ctrl;
/*! \brief REMOVE UE list used by eNB to order UEs/CC for deleting*/
typedef struct {
    /// deleting control info
    UE_free_ctrl UE_free_ctrl[NUMBER_OF_UE_MAX+1];
    int num_UEs;
    int head_freelist; ///the head position of the delete list
    int tail_freelist; ///the tail position of the delete list
} UE_free_list_t;

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/// Structure for saving the output of each pre_processor instance
typedef struct {
    uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
    uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
    uint16_t nb_rbs_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
    uint8_t  slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX];
    uint8_t  slice_allocated_rbgs[NFAPI_CC_MAX][N_RBG_MAX];
    uint8_t  MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX];

    uint32_t bytes_lcid[MAX_MOBILES_PER_ENB][MAX_NUM_LCID];
    uint32_t wb_pmi[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
    uint8_t  mcs[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];

} pre_processor_results_t;

/**
 * slice specific scheduler for the DL
 */
typedef void (*slice_scheduler_dl)(module_id_t mod_id,
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                                   int         slice_idx,
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                                   frame_t     frame,
                                   sub_frame_t subframe,
                                   int        *mbsfn_flag);

typedef struct {
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    slice_id_t id;

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    /// RB share for each slice for past and current time
    float     pct;
    float     pct_current;

    /// whether this slice is isolated from the others for past and current time
    int       isol;
    int       isol_current;

    int       prio;
    int       prio_current;

    /// Frequency ranges for slice positioning
    int       pos_low;
    int       pos_high;
    int       pos_low_current;
    int       pos_high_current;

    // max mcs for each slice for past and current time
    int       maxmcs;
    int       maxmcs_current;

    /// criteria for sorting policies of the slices
    uint32_t  sorting;
    uint32_t  sorting_current;

    /// Accounting policy (just greedy(1) or fair(0) setting for now)
    int       accounting;
    int       accounting_current;

    /// Whether the scheduler callback should be updated
    int       update_sched;
    int       update_sched_current;

    /// name of available scheduler
    char     *sched_name;

    /// pointer to the slice specific scheduler in DL
    slice_scheduler_dl sched_cb;

} slice_sched_conf_dl_t;

typedef void (*slice_scheduler_ul)(module_id_t   mod_id,
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                                   frame_t       frame,
                                   sub_frame_t   subframe,
                                   unsigned char sched_subframe,
                                   uint16_t     *first_rb);

typedef struct {
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    slice_id_t id;

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    /// RB share for each slice for past and current time
    float     pct;
    float     pct_current;

    // MAX MCS for each slice for past and current time
    int       maxmcs;
    int       maxmcs_current;

    /// criteria for sorting policies of the slices
    uint32_t  sorting;
    uint32_t  sorting_current;

    /// starting RB (RB offset) of UL scheduling
    int       first_rb;
    int       first_rb_current;

    /// Slice scheduler callback update needed
    int       update_sched;
    int       update_sched_current;

    /// name of available scheduler
    char     *sched_name;

    /// pointer to the slice specific scheduler in UL
    slice_scheduler_ul sched_cb;

} slice_sched_conf_ul_t;


typedef struct {
    /// counter used to indicate when all slices have pre-allocated UEs
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    /// indicates whether remaining RBs after first intra-slice allocation will
    /// be allocated to UEs of the same slice
    int       intraslice_share_active;
    int       intraslice_share_active_current;
    /// indicates whether remaining RBs after slice allocation will be
    /// allocated to UEs of another slice. Isolated slices will be ignored
    int       interslice_share_active;
    int       interslice_share_active_current;

    /// number of active slices for past and current time in DL
    int      n_dl;
    int      n_dl_current;
    /// RB share stats for DL
    float    tot_pct_dl;
    float    tot_pct_dl_current;
    float    avg_pct_dl;
    slice_sched_conf_dl_t dl[MAX_NUM_SLICES];

    /// number of active slices for past and current time in UL
    int      n_ul;
    int      n_ul_current;
    /// RB share stats for UL
    float    tot_pct_ul;
    float    tot_pct_ul_current;
    float    avg_pct_ul;
    slice_sched_conf_ul_t ul[MAX_NUM_SLICES];

    pre_processor_results_t pre_processor_results[MAX_NUM_SLICES];
} slice_info_t;

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/*! \brief eNB common channels */
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typedef struct {
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    int physCellId;
    int p_eNB;
    int Ncp;
    int eutra_band;
    uint32_t dl_CarrierFreq;
    BCCH_BCH_Message_t *mib;
    RadioResourceConfigCommonSIB_t *radioResourceConfigCommon;
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    RadioResourceConfigCommonSIB_t *radioResourceConfigCommon_BR;
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#endif
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    TDD_Config_t *tdd_Config;
    SchedulingInfoList_t *schedulingInfoList;
    ARFCN_ValueEUTRA_t ul_CarrierFreq;
    long ul_Bandwidth;
    /// Outgoing MIB PDU for PHY
    MIB_PDU MIB_pdu;
    /// Outgoing BCCH pdu for PHY
    BCCH_PDU BCCH_pdu;
    /// Outgoing BCCH DCI allocation
    uint32_t BCCH_alloc_pdu;
    /// Outgoing CCCH pdu for PHY
    CCCH_PDU CCCH_pdu;
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    /// Outgoing PCCH DCI allocation
    uint32_t PCCH_alloc_pdu;
    /// Outgoing PCCH pdu for PHY
    PCCH_PDU PCCH_pdu;
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    /// Outgoing RAR pdu for PHY
    RAR_PDU RAR_pdu;
    /// Template for RA computations
    RA_t ra[NB_RA_PROC_MAX];
    /// VRB map for common channels
    uint8_t vrb_map[100];
    /// VRB map for common channels and retransmissions by PHICH
    uint8_t vrb_map_UL[100];
    /// MBSFN SubframeConfig
    struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
    /// number of subframe allocation pattern available for MBSFN sync area
    uint8_t num_sf_allocation_pattern;
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#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
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    /// MBMS Flag
    uint8_t MBMS_flag;
    /// Outgoing MCCH pdu for PHY
    MCCH_PDU MCCH_pdu;
    /// MCCH active flag
    uint8_t msi_active;
    /// MCCH active flag
    uint8_t mcch_active;
    /// MTCH active flag
    uint8_t mtch_active;
    /// number of active MBSFN area
    uint8_t num_active_mbsfn_area;
    /// MBSFN Area Info
    struct MBSFN_AreaInfo_r9 *mbsfn_AreaInfo[MAX_MBSFN_AREA];
    /// PMCH Config
    struct PMCH_Config_r9 *pmch_Config[MAX_PMCH_perMBSFN];
    /// MBMS session info list
    struct MBMS_SessionInfoList_r9 *mbms_SessionList[MAX_PMCH_perMBSFN];
    /// Outgoing MCH pdu for PHY
    MCH_PDU MCH_pdu;
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    /// Rel13 parameters from SIB1
    SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext;
    /// Counter for SIB1-BR scheduling
    int SIB1_BR_cnt;
    /// Outgoing BCCH-BR pdu for PHY
    BCCH_PDU BCCH_BR_pdu[20];
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typedef struct eNB_MAC_INST_s {
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