eNB_scheduler_dlsch.c 82.1 KB
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/*******************************************************************************
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    OpenAirInterface
    Copyright(c) 1999 - 2014 Eurecom
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    OpenAirInterface is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
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    OpenAirInterface is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
    along with OpenAirInterface.The full GNU General Public License is
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    included in this distribution in the file called "COPYING". If not,
    see <http://www.gnu.org/licenses/>.
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  Contact Information
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  OpenAirInterface Admin: openair_admin@eurecom.fr
  OpenAirInterface Tech : openair_tech@eurecom.fr
  OpenAirInterface Dev  : openair4g-devel@eurecom.fr

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  Address      : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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*******************************************************************************/

/*! \file eNB_scheduler_dlsch.c
 * \brief procedures related to eNB for the DLSCH transport channel
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 * \author  Navid Nikaein and Raymond Knopp
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 * \date 2010 - 2014
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 * \email: navid.nikaein@eurecom.fr
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 * \version 1.0
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 * @ingroup _mac

 */

#include "assertions.h"
#include "PHY/defs.h"
#include "PHY/extern.h"

#include "SCHED/defs.h"
#include "SCHED/extern.h"

#include "LAYER2/MAC/defs.h"
#include "LAYER2/MAC/proto.h"
#include "LAYER2/MAC/extern.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "OCG.h"
#include "OCG_extern.h"

#include "RRC/LITE/extern.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"

//#include "LAYER2/MAC/pre_processor.c"
#include "pdcp.h"

#if defined(ENABLE_ITTI)
# include "intertask_interface.h"
#endif

#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1

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extern inline unsigned int taus(void);

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void add_ue_dlsch_info(module_id_t module_idP, int CC_id, int UE_id, sub_frame_t subframeP, UE_DLSCH_STATUS status){
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  eNB_dlsch_info[module_idP][UE_id].rnti             = UE_RNTI(module_idP,UE_id);
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  //  eNB_dlsch_info[module_idP][ue_mod_idP].weight           = weight;
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  eNB_dlsch_info[module_idP][UE_id].subframe         = subframeP;
  eNB_dlsch_info[module_idP][UE_id].status           = status;
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  eNB_dlsch_info[module_idP][UE_id].serving_num++;
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}

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int schedule_next_dlue(module_id_t module_idP, sub_frame_t subframeP){
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  int next_ue;
  UE_list_t *UE_list=&eNB_mac_inst[module_idP].UE_list;
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  for (next_ue=UE_list->head; next_ue>=0; next_ue=UE_list->next[next_ue] ){
    if  (eNB_dlsch_info[module_idP][next_ue].status == S_DL_WAITING)
      return next_ue;
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  }
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  for (next_ue=UE_list->head; next_ue>=0; next_ue=UE_list->next[next_ue] ){
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    if  (eNB_dlsch_info[module_idP][next_ue].status == S_DL_BUFFERED) {
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      eNB_dlsch_info[module_idP][next_ue].status = S_DL_WAITING;
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    }
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  }

  return(-1);//next_ue;
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}

unsigned char generate_dlsch_header(unsigned char *mac_header,
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				    unsigned char num_sdus,
				    unsigned short *sdu_lengths,
				    unsigned char *sdu_lcids,
				    unsigned char drx_cmd,
				    short timing_advance_cmd,
				    unsigned char *ue_cont_res_id,
				    unsigned char short_padding,
				    unsigned short post_padding) {
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  SCH_SUBHEADER_FIXED *mac_header_ptr = (SCH_SUBHEADER_FIXED *)mac_header;
  uint8_t first_element=0,last_size=0,i;
  uint8_t mac_header_control_elements[16],*ce_ptr;

  ce_ptr = &mac_header_control_elements[0];

  // compute header components

  if ((short_padding == 1) || (short_padding == 2)) {
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    mac_header_ptr->R    = 0;
    mac_header_ptr->E    = 0;
    mac_header_ptr->LCID = SHORT_PADDING;
    first_element=1;
    last_size=1;
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  }
  if (short_padding == 2) {
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    mac_header_ptr->E = 1;
    mac_header_ptr++;
    mac_header_ptr->R = 0;
    mac_header_ptr->E    = 0;
    mac_header_ptr->LCID = SHORT_PADDING;
    last_size=1;
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  }

  if (drx_cmd != 255) {
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    if (first_element>0) {
      mac_header_ptr->E = 1;
      mac_header_ptr++;
    }
    else {
      first_element=1;
    }
    mac_header_ptr->R = 0;
    mac_header_ptr->E    = 0;
    mac_header_ptr->LCID = DRX_CMD;
    last_size=1;
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  }

  if (timing_advance_cmd != 0) {
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    if (first_element>0) {
      mac_header_ptr->E = 1;
      mac_header_ptr++;
    }
    else {
      first_element=1;
    }
    mac_header_ptr->R = 0;
    mac_header_ptr->E    = 0;
    mac_header_ptr->LCID = TIMING_ADV_CMD;
    last_size=1;
    //    msg("last_size %d,mac_header_ptr %p\n",last_size,mac_header_ptr);
    ((TIMING_ADVANCE_CMD *)ce_ptr)->R=0;
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    ((TIMING_ADVANCE_CMD *)ce_ptr)->TA=(timing_advance_cmd+31)&0x3f;
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    LOG_D(MAC,"timing advance =%d (%d)\n",timing_advance_cmd,((TIMING_ADVANCE_CMD *)ce_ptr)->TA);
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    ce_ptr+=sizeof(TIMING_ADVANCE_CMD);
    //msg("offset %d\n",ce_ptr-mac_header_control_elements);
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  }

  if (ue_cont_res_id) {
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    if (first_element>0) {
      mac_header_ptr->E = 1;
      /*
	printf("[eNB][MAC] last subheader : %x (R%d,E%d,LCID%d)\n",*(unsigned char*)mac_header_ptr,
	((SCH_SUBHEADER_FIXED *)mac_header_ptr)->R,
	((SCH_SUBHEADER_FIXED *)mac_header_ptr)->E,
	((SCH_SUBHEADER_FIXED *)mac_header_ptr)->LCID);
      */
      mac_header_ptr++;
    }
    else {
      first_element=1;
    }
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    mac_header_ptr->R = 0;
    mac_header_ptr->E    = 0;
    mac_header_ptr->LCID = UE_CONT_RES;
    last_size=1;
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    LOG_T(MAC,"[eNB ][RAPROC] Generate contention resolution msg: %x.%x.%x.%x.%x.%x\n",
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          ue_cont_res_id[0],
          ue_cont_res_id[1],
          ue_cont_res_id[2],
          ue_cont_res_id[3],
          ue_cont_res_id[4],
          ue_cont_res_id[5]);

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    memcpy(ce_ptr,ue_cont_res_id,6);
    ce_ptr+=6;
    // msg("(cont_res) : offset %d\n",ce_ptr-mac_header_control_elements);
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  }

  //msg("last_size %d,mac_header_ptr %p\n",last_size,mac_header_ptr);

  for (i=0;i<num_sdus;i++) {
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    LOG_T(MAC,"[eNB] Generate DLSCH header num sdu %d len sdu %d\n",num_sdus, sdu_lengths[i]);
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    if (first_element>0) {
      mac_header_ptr->E = 1;
      /*msg("last subheader : %x (R%d,E%d,LCID%d)\n",*(unsigned char*)mac_header_ptr,
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	((SCH_SUBHEADER_FIXED *)mac_header_ptr)->R,
	((SCH_SUBHEADER_FIXED *)mac_header_ptr)->E,
	((SCH_SUBHEADER_FIXED *)mac_header_ptr)->LCID);
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      */
      mac_header_ptr+=last_size;
      //msg("last_size %d,mac_header_ptr %p\n",last_size,mac_header_ptr);
    }
    else {
      first_element=1;
    }
    if (sdu_lengths[i] < 128) {
      ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->R    = 0;
      ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->E    = 0;
      ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->F    = 0;
      ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->LCID = sdu_lcids[i];
      ((SCH_SUBHEADER_SHORT *)mac_header_ptr)->L    = (unsigned char)sdu_lengths[i];
      last_size=2;
    }
    else {
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->R    = 0;
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->E    = 0;
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->F    = 1;
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->LCID = sdu_lcids[i];
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_MSB    = ((unsigned short) sdu_lengths[i]>>8)&0x7f;
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_LSB    = (unsigned short) sdu_lengths[i]&0xff;
      ((SCH_SUBHEADER_LONG *)mac_header_ptr)->padding   = 0x00;
      last_size=3;
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#ifdef DEBUG_HEADER_PARSING
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      LOG_D(MAC,"[eNB] generate long sdu, size %x (MSB %x, LSB %x)\n",
	    sdu_lengths[i],
	    ((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_MSB,
	    ((SCH_SUBHEADER_LONG *)mac_header_ptr)->L_LSB);
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#endif
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    }
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  }
  /*

    printf("last_size %d,mac_header_ptr %p\n",last_size,mac_header_ptr);

    printf("last subheader : %x (R%d,E%d,LCID%d)\n",*(unsigned char*)mac_header_ptr,
    ((SCH_SUBHEADER_FIXED *)mac_header_ptr)->R,
    ((SCH_SUBHEADER_FIXED *)mac_header_ptr)->E,
    ((SCH_SUBHEADER_FIXED *)mac_header_ptr)->LCID);


    if (((SCH_SUBHEADER_FIXED*)mac_header_ptr)->LCID < UE_CONT_RES) {
    if (((SCH_SUBHEADER_SHORT*)mac_header_ptr)->F == 0)
    printf("F = 0, sdu len (L field) %d\n",(((SCH_SUBHEADER_SHORT*)mac_header_ptr)->L));
    else
    printf("F = 1, sdu len (L field) %d\n",(((SCH_SUBHEADER_LONG*)mac_header_ptr)->L));
    }
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  */
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  if (post_padding>0) {// we have lots of padding at the end of the packet
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    mac_header_ptr->E = 1;
    mac_header_ptr+=last_size;
    // add a padding element
    mac_header_ptr->R    = 0;
    mac_header_ptr->E    = 0;
    mac_header_ptr->LCID = SHORT_PADDING;
    mac_header_ptr++;
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  }
  else { // no end of packet padding
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    // last SDU subhead is of fixed type (sdu length implicitly to be computed at UE)
    mac_header_ptr++;
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  }

  //msg("After subheaders %d\n",(uint8_t*)mac_header_ptr - mac_header);

  if ((ce_ptr-mac_header_control_elements) > 0) {
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    // printf("Copying %d bytes for control elements\n",ce_ptr-mac_header_control_elements);
    memcpy((void*)mac_header_ptr,mac_header_control_elements,ce_ptr-mac_header_control_elements);
    mac_header_ptr+=(unsigned char)(ce_ptr-mac_header_control_elements);
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  }
  //msg("After CEs %d\n",(uint8_t*)mac_header_ptr - mac_header);

  return((unsigned char*)mac_header_ptr - mac_header);

}

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void set_ul_DAI(int module_idP,int UE_idP, int CC_idP,  int frameP, int subframeP, LTE_DL_FRAME_PARMS  *frame_parms[MAX_NUM_CCs]) {
 
  eNB_MAC_INST         *eNB      = &eNB_mac_inst[module_idP];
  UE_list_t            *UE_list  = &eNB->UE_list;
  unsigned char         DAI;
 
  if (frame_parms[CC_idP]->frame_type == TDD) {
    DAI = (UE_list->UE_template[CC_idP][UE_idP].DAI-1)&3;
    LOG_D(MAC,"[eNB %d] Frame %d, subframe %d: DAI %d for UE %d\n",module_idP,frameP,subframeP,DAI,UE_idP);
    // Save DAI for Format 0 DCI
    
    switch (frame_parms[CC_idP]->tdd_config) {
    case 0:
      //      if ((subframeP==0)||(subframeP==1)||(subframeP==5)||(subframeP==6))
      break;
    case 1:
      switch (subframeP) {
      case 1:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[7] = DAI;
	break;
      case 4:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[8] = DAI;
	break;
      case 6:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[2] = DAI;
	break;
      case 9:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[3] = DAI;
	break;
      }
    case 2:
      //      if ((subframeP==3)||(subframeP==8))
      //	UE_list->UE_template[CC_idP][UE_idP].DAI_ul = DAI;
      break;
    case 3:
      //if ((subframeP==6)||(subframeP==8)||(subframeP==0)) {
      //  LOG_D(MAC,"schedule_ue_spec: setting UL DAI to %d for subframeP %d => %d\n",DAI,subframeP, ((subframeP+8)%10)>>1);
      //  UE_list->UE_template[CC_idP][UE_idP].DAI_ul[((subframeP+8)%10)>>1] = DAI;
      //}
     switch (subframeP) {
      case 5:
      case 6:
      case 1:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[2] = DAI;
	break;
      case 7:
      case 8:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[3] = DAI;
	break;
      case 9:
      case 0:
	UE_list->UE_template[CC_idP][UE_idP].DAI_ul[4] = DAI;
	break;
      default:
	break;
      }
      
      break;
    case 4:
      //      if ((subframeP==8)||(subframeP==9))
      //	UE_list->UE_template[CC_idP][UE_idP].DAI_ul = DAI;
      break;
    case 5:
      //      if (subframeP==8)
      //	UE_list->UE_template[CC_idP][UE_idP].DAI_ul = DAI;
      break;
    case 6:
      //      if ((subframeP==1)||(subframeP==4)||(subframeP==6)||(subframeP==9))
      //	UE_list->UE_template[CC_idP][UE_idP].DAI_ul = DAI;
      break;
    default:
      break;
    }
  }
}

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void schedule_ue_spec(module_id_t   module_idP,
                      frame_t       frameP,
                      sub_frame_t   subframeP,
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                      unsigned int  *nb_rb_used0,
                      unsigned int  *nCCE_used,
                      int           *mbsfn_flag) {

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  uint8_t               CC_id;
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  int                   UE_id;
  uint16_t              nCCE[MAX_NUM_CCs];
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  int                   N_RBG[MAX_NUM_CCs];
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  unsigned char         aggregation;
  mac_rlc_status_resp_t rlc_status;
  unsigned char         header_len_dcch=0, header_len_dcch_tmp=0,header_len_dtch=0,header_len_dtch_tmp=0, ta_len=0;
  unsigned char         sdu_lcids[11],offset,num_sdus=0;
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  uint16_t              nb_rb,nb_rb_temp,total_nb_available_rb[MAX_NUM_CCs],nb_available_rb; 
  uint16_t              TBS,j,sdu_lengths[11],rnti,padding=0,post_padding=0;
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  unsigned char         dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
  unsigned char         round            = 0;
  unsigned char         harq_pid         = 0;
  void                 *DLSCH_dci        = NULL;
  LTE_eNB_UE_stats     *eNB_UE_stats     = NULL;
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  uint16_t              sdu_length_total = 0;
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  unsigned char         DAI;
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  int                   i                = 0;
  uint8_t               dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
  unsigned char         rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX];
  uint16_t              pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
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  int                   mcs;
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  uint16_t              min_rb_unit[MAX_NUM_CCs];
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  short                 ta_update        = 0;
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  eNB_MAC_INST         *eNB      = &eNB_mac_inst[module_idP];
  UE_list_t            *UE_list  = &eNB->UE_list;
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  LTE_DL_FRAME_PARMS   *frame_parms[MAX_NUM_CCs];
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  int                   continue_flag=0;

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  if (UE_list->head==-1)
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    return;
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  start_meas(&eNB->schedule_dlsch);
  vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_IN);
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  //weight = get_ue_weight(module_idP,UE_id);
  aggregation = 1; // set to the maximum aggregation level

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  for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
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    min_rb_unit[CC_id]=get_min_rb_unit(module_idP,CC_id);
    frame_parms[CC_id] = mac_xface->get_lte_frame_parms(module_idP,CC_id); 
    total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL - nb_rb_used0[CC_id];
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    nCCE[CC_id] = mac_xface->get_nCCE_max(module_idP,CC_id) - nCCE_used[CC_id];
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    N_RBG[CC_id] = frame_parms[CC_id]->N_RBG;

    // store the global enb stats: 
    eNB->eNB_stats[CC_id].num_dlactive_UEs =  UE_list->num_UEs;
    eNB->eNB_stats[CC_id].available_prbs =  total_nb_available_rb[CC_id];
    eNB->eNB_stats[CC_id].total_available_prbs +=  total_nb_available_rb[CC_id];
    eNB->eNB_stats[CC_id].available_ncces = nCCE[CC_id];
    eNB->eNB_stats[CC_id].dlsch_bytes_tx=0;
    eNB->eNB_stats[CC_id].dlsch_pdus_tx=0;
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  }
   
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  /// CALLING Pre_Processor for downlink scheduling (Returns estimation of RBs required by each UE and the allocation on sub-band)
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  vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_IN);
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  start_meas(&eNB->schedule_dlsch_preprocessor);
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  dlsch_scheduler_pre_processor(module_idP,
				frameP,
				subframeP,
				dl_pow_off,
				pre_nb_available_rbs,
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				N_RBG,
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				rballoc_sub_UE,
				mbsfn_flag);
  stop_meas(&eNB->schedule_dlsch_preprocessor);
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  vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT);
 
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  for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
    if (mbsfn_flag[CC_id]>0)
      continue;
    for (UE_id=UE_list->head;UE_id>=0;UE_id=UE_list->next[UE_id]) {
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      rnti = UE_RNTI(module_idP,UE_id);
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      eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
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      if (rnti==0) {
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	LOG_N(MAC,"Cannot find rnti for UE_id %d (num_UEs %d)\n",UE_id,UE_list->num_UEs);
	// mac_xface->macphy_exit("Cannot find rnti for UE_id");
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	continue_flag=1;
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      }
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      if (eNB_UE_stats==NULL) {
	LOG_N(MAC,"[eNB] Cannot find eNB_UE_stats\n");
	//	mac_xface->macphy_exit("[MAC][eNB] Cannot find eNB_UE_stats\n");
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	continue_flag=1; 
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      }
      if ((pre_nb_available_rbs[CC_id][UE_id] == 0) || (nCCE[CC_id] < (1<<aggregation))) {
	LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
	      module_idP, frameP, UE_id, CC_id, nb_rb_used0[CC_id], pre_nb_available_rbs[CC_id][UE_id], nCCE[CC_id], aggregation);
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	//if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
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	continue_flag=1; //to next user (there might be rbs availiable for other UEs in TM5
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	// else
	//	break;
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      }
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      if (frame_parms[CC_id]->frame_type == TDD)  {
	set_ue_dai (subframeP,
		    frame_parms[CC_id]->tdd_config,
		    UE_id,
		    CC_id,
		    UE_list);
	// update UL DAI after DLSCH scheduling
	set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);

      }

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      if (continue_flag == 1 ){
	add_ue_dlsch_info(module_idP,
			  CC_id,
			  UE_id,
			  subframeP,
			  S_DL_NONE);
	continue;
      }
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      nb_available_rb = pre_nb_available_rbs[CC_id][UE_id];
      UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti;
      UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_get_rrc_status(module_idP,1,UE_id);
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      mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
494 495
      UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
      UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
496
      
497 498
      sdu_length_total=0;
      num_sdus=0;
499
      
500
      /*	
501
	DevCheck(((eNB_UE_stats->DL_cqi[0] < MIN_CQI_VALUE) || (eNB_UE_stats->DL_cqi[0] > MAX_CQI_VALUE)), 
502
	eNB_UE_stats->DL_cqi[0], MIN_CQI_VALUE, MAX_CQI_VALUE);
503
	*/
504 505 506
      eNB_UE_stats->dlsch_mcs1 = cqi_to_mcs[eNB_UE_stats->DL_cqi[0]];
      eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);	

507

508
#ifdef EXMIMO
509 510
      if (mac_xface->get_transmission_mode(module_idP,CC_id, rnti)==5)
	eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1,16);
511
#endif
512

513
      // store stats
514
      UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi= eNB_UE_stats->DL_cqi[0];
515 516 517 518 519
      // initializing the rb allocation indicator for each UE
      for(j=0;j<frame_parms[CC_id]->N_RBG;j++){ 
	UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = 0;
      }

520
      LOG_D(MAC,"[eNB %d] Frame %d: Scheduling UE %d on CC_id %d (rnti %x, harq_pid %d, round %d, rb %d, cqi %d, mcs %d, ncc %d, rrc %d)\n",
521 522
	    module_idP, frameP, UE_id,CC_id,rnti,harq_pid, round,nb_available_rb,
	    eNB_UE_stats->DL_cqi[0], eNB_UE_stats->dlsch_mcs1,
523
	    nCCE[CC_id],
524 525 526 527 528
	    UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status);
                
     
      // Note this code is for a specific DCI format
      DLSCH_dci = (void *)UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid];
529
      
530 531 532
          
      /* process retransmission  */

533
      if (round > 0) {
534 535
	
	if (frame_parms[CC_id]->frame_type == TDD) {
536 537
	  UE_list->UE_template[CC_id][UE_id].DAI++;
	  update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI);
538 539
	  LOG_D(MAC,"DAI update: subframeP %d: UE %d, DAI %d\n",
		subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].DAI);
540 541 542 543 544 545 546
	}
	
	// get freq_allocation
	nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
	if (nb_rb <= nb_available_rb) {
	  
	  if(nb_rb == pre_nb_available_rbs[CC_id][UE_id]){
547 548 549 550 551 552 553 554 555 556 557 558 559 560
	    for(j=0;j<frame_parms[CC_id]->N_RBG;j++) // for indicating the rballoc for each sub-band
	      UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
	  } else {
	    nb_rb_temp = nb_rb;
	    j = 0;
	    while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)){
	      if(rballoc_sub_UE[CC_id][UE_id][j] == 1){
		UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
		if((j == frame_parms[CC_id]->N_RBG-1) &&
		   ((frame_parms[CC_id]->N_RB_DL == 25)||
		    (frame_parms[CC_id]->N_RB_DL == 50)))
		  nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id]+1;
		else
		  nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id];
561
	      }
562
	      j = j+1;
563
	    }
564 565
	  }
	  
566 567 568 569 570 571 572 573
	  nb_available_rb -= nb_rb;
	  aggregation = process_ue_cqi(module_idP,UE_id);
	  nCCE[CC_id]-=(1<<aggregation); // adjust the remaining nCCE
	  nCCE_used[CC_id] += (1<<aggregation);
	      
	      
	  PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
	  PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[CC_id][UE_id];
574
	  for(j=0;j<frame_parms[CC_id]->N_RBG;j++)
575 576 577 578 579 580
	    PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
	      
	  switch (mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
	  case 1:
	  case 2:
	  default:
581
	    switch (frame_parms[CC_id]->N_RB_DL) {
582
	    case 6:
583
	      if (frame_parms[CC_id]->frame_type == TDD) {
584 585 586 587 588 589 590 591 592 593 594 595 596 597 598
		//	      ((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rv       = round&3;
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",module_idP,harq_pid,round,(UE_list->UE_template[CC_id][UE_id].DAI-1),((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->mcs);
	      }
	      else {
		//	      ((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rv       = round&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",module_idP,harq_pid,round,((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->mcs);
		    
	      }
	      break;
	    case 25:
599
	      if (frame_parms[CC_id]->frame_type == TDD) {
600 601 602 603 604 605 606 607 608 609 610 611 612 613 614
		//	      ((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv       = round&3;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",module_idP,harq_pid,round,(UE_list->UE_template[CC_id][UE_id].DAI-1),((DCI1_5MHz_TDD_t*)DLSCH_dci)->mcs);
	      }
	      else {
		//	      ((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv       = round&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",module_idP,harq_pid,round,((DCI1_5MHz_FDD_t*)DLSCH_dci)->mcs);
		    
	      }
	      break;
	    case 50:
615
	      if (frame_parms[CC_id]->frame_type == TDD) {
616 617 618 619 620 621 622 623 624 625 626 627 628 629 630
		//	      ((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->rv       = round&3;
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",module_idP,harq_pid,round,(UE_list->UE_template[CC_id][UE_id].DAI-1),((DCI1_10MHz_TDD_t*)DLSCH_dci)->mcs);
	      }
	      else {
		//	      ((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_10MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_10MHz_FDD_t*)DLSCH_dci)->rv       = round&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",module_idP,harq_pid,round,((DCI1_10MHz_FDD_t*)DLSCH_dci)->mcs);
		    
	      }
	      break;
	    case 100:
631
	      if (frame_parms[CC_id]->frame_type == TDD) {
632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695
		//	      ((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->rv       = round&3;
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",module_idP,harq_pid,round,(UE_list->UE_template[CC_id][UE_id].DAI-1),((DCI1_20MHz_TDD_t*)DLSCH_dci)->mcs);
	      }
	      else {
		//	      ((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi      = 0;
		((DCI1_20MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_20MHz_FDD_t*)DLSCH_dci)->rv       = round&3;
		LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",module_idP,harq_pid,round,((DCI1_20MHz_FDD_t*)DLSCH_dci)->mcs);
		    
	      }
	      break;
	    }
	    break;
	  case 4:
	    //	  if (nb_rb>10) {
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 0;
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	    // }
	    //else {
	    //  ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->ndi1 = 0;
	    // ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    // ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->rv1 = round&3;
	    // ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	    // }
	    break;
	  case 5:
	    // if(nb_rb>10){
	    //((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->mcs = eNB_UE_stats->DL_cqi[0]<<1;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->ndi = 0;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rv = round&3;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	    if(dl_pow_off[CC_id][UE_id] == 2)
	      dl_pow_off[CC_id][UE_id] = 1;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = dl_pow_off[CC_id][UE_id];
	    // }
	    break;
	  case 6:
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->ndi = 0;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rv = round&3;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = 1;//dl_pow_off[UE_id];
	    break;
	  }
	      
	  add_ue_dlsch_info(module_idP,
			    CC_id,
			    UE_id,
			    subframeP,
			    S_DL_SCHEDULED);
	  
	  //eNB_UE_stats->dlsch_trials[round]++;
	  UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission+=1;
	  UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx=nb_rb;
	  UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_retx+=nb_rb;
	  UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCE[CC_id];
	  UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
	  UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1;
	}
696 697
	else { 
	  LOG_D(MAC,"[eNB %d] Frame %d : don't schedule UE %d, its retransmission takes more resources than we have\n", module_idP, frameP, UE_id);
698
	}
699
      }
700
      else {  /* This is a potentially new SDU opportunity */ 
701 702 703 704 705 706 707 708
	
	rlc_status.bytes_in_buffer = 0;
	// Now check RLC information to compute number of required RBs
	// get maximum TBS size for RLC request
	//TBS = mac_xface->get_TBS(eNB_UE_stats->DL_cqi[0]<<1,nb_available_rb);
	TBS = mac_xface->get_TBS_DL(eNB_UE_stats->dlsch_mcs1,nb_available_rb);
	// check first for RLC data on DCCH
	// add the length for  all the control elements (timing adv, drx, etc) : header + payload
709
#ifndef EXMIMO_IOT
710
	ta_len = ((eNB_UE_stats->timing_advance_update/4)!=0) ? 2 : 0;
711
#else
712
	ta_len = 0;
713
#endif
714 715 716
	
	header_len_dcch = 2; // 2 bytes DCCH SDU subheader
	
717 718 719 720 721 722 723 724 725 726
	if ( TBS-ta_len-header_len_dcch > 0 ) 
	  {
	  rlc_status = mac_rlc_status_ind(
					  module_idP,
					  UE_id,
					  frameP,
					  ENB_FLAG_YES,
					  MBMS_FLAG_NO,
					  DCCH,
					  (TBS-ta_len-header_len_dcch)); // transport block set size
727
	  
728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745
	  sdu_lengths[0]=0;
	  if (rlc_status.bytes_in_buffer > 0) {  // There is DCCH to transmit
	    LOG_D(MAC,"[eNB %d] Frame %d, DL-DCCH->DLSCH, Requesting %d bytes from RLC (RRC message)\n",module_idP,frameP,TBS-header_len_dcch);
	    sdu_lengths[0] += mac_rlc_data_req(
					       module_idP,
					       UE_id,
					       frameP,
					       ENB_FLAG_YES,
					       MBMS_FLAG_NO,
					       DCCH,
					       (char *)&dlsch_buffer[sdu_lengths[0]]);
	    
	    LOG_D(MAC,"[eNB %d][DCCH] Got %d bytes from RLC\n",module_idP,sdu_lengths[0]);
	    sdu_length_total = sdu_lengths[0];
	    sdu_lcids[0] = DCCH;
	    UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[DCCH]+=1;
	    UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[DCCH]+=sdu_lengths[0];
	    num_sdus = 1;
746
#ifdef DEBUG_eNB_SCHEDULER
747 748 749 750
	    LOG_T(MAC,"[eNB %d][DCCH] Got %d bytes :",module_idP,sdu_lengths[0]);
	    for (j=0;j<sdu_lengths[0];j++)
	      LOG_T(MAC,"%x ",dlsch_buffer[j]);
	    LOG_T(MAC,"\n");
751
#endif
752 753 754 755 756
	  }
	  else {
	    header_len_dcch = 0;
	    sdu_length_total = 0;
	  }
757 758
	}
	// check for DCCH1 and update header information (assume 2 byte sub-header)
759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782
	  if (TBS-ta_len-header_len_dcch-sdu_length_total > 0 ) 
	  {
	  rlc_status = mac_rlc_status_ind(
					  module_idP,
					  UE_id,
					  frameP,
					  ENB_FLAG_YES,
					  MBMS_FLAG_NO,
					  DCCH+1,
					  (TBS-ta_len-header_len_dcch-sdu_length_total)); // transport block set size less allocations for timing advance and
	  // DCCH SDU
	  
	  if (rlc_status.bytes_in_buffer > 0) 
	    {
	    LOG_D(MAC,"[eNB %d], Frame %d, DCCH1->DLSCH, Requesting %d bytes from RLC (RRC message)\n",
		  module_idP,frameP,TBS-header_len_dcch-sdu_length_total);
	    sdu_lengths[num_sdus] += mac_rlc_data_req(
						      module_idP,
						      UE_id,
						      frameP,
						      ENB_FLAG_YES,
						      MBMS_FLAG_NO,
						      DCCH+1,
						      (char *)&dlsch_buffer[sdu_lengths[0]]);
783
	  
784 785 786 787 788 789 790 791
	    sdu_lcids[num_sdus] = DCCH1;
	    sdu_length_total += sdu_lengths[num_sdus];
	    header_len_dcch += 2;
	    UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[DCCH1]+=1;
	    UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[DCCH1]+=sdu_lengths[num_sdus];
	    num_sdus++;
	    LOG_D(MAC,"[eNB %d] Got %d bytes for DCCH from RLC\n",module_idP,sdu_lengths[0]);
	  }
792
	}
793 794
	  // check for DTCH and update header information
	  // here we should loop over all possible DTCH
795 796 797 798 799 800 801
	
	header_len_dtch = 3; // 3 bytes DTCH SDU subheader
	
	LOG_D(MAC,"[eNB %d], Frame %d, DTCH->DLSCH, Checking RLC status (rab %d, tbs %d, len %d)\n",
	      module_idP,frameP,DTCH,TBS,
	      TBS-ta_len-header_len_dcch-sdu_length_total-header_len_dtch);
	
802 803 804 805 806 807 808 809 810 811
	if (TBS-ta_len-header_len_dcch-sdu_length_total-header_len_dtch > 0 ) 
	  {
	  rlc_status = mac_rlc_status_ind(
					  module_idP,
					  UE_id,
					  frameP,
					  ENB_FLAG_YES,
					  MBMS_FLAG_NO,
					  DTCH,
					  TBS-ta_len-header_len_dcch-sdu_length_total-header_len_dtch);
812
	  
813 814
	  if (rlc_status.bytes_in_buffer > 0) {
	    
815
	    LOG_D(MAC,"[eNB %d][USER-PLANE DEFAULT DRB], Frame %d, DTCH->DLSCH, Requesting %d bytes from RLC (hdr len dtch %d)\n",
816 817 818 819 820 821 822 823 824 825
		  module_idP,frameP,TBS-header_len_dcch-sdu_length_total-header_len_dtch,header_len_dtch);
	    sdu_lengths[num_sdus] = mac_rlc_data_req(
						     module_idP,
						     UE_id,
						     frameP,
						     ENB_FLAG_YES,
						     MBMS_FLAG_NO,
						     DTCH,
						     (char*)&dlsch_buffer[sdu_length_total]);
	    
826
	    LOG_D(MAC,"[eNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n",module_idP,sdu_lengths[num_sdus],DTCH);
827 828 829 830 831 832 833 834 835 836 837
	    sdu_lcids[num_sdus] = DTCH;
	    sdu_length_total += sdu_lengths[num_sdus];
	    UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[DTCH]+=1;
	    UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[DTCH]+=sdu_lengths[num_sdus];
	    if (sdu_lengths[num_sdus] < 128) {
	      header_len_dtch=2;
	    }
	    num_sdus++;
	  }
	  else {
	    header_len_dtch = 0;
838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873
	  }
	}
	
	// there is a payload
	if (((sdu_length_total + header_len_dcch + header_len_dtch )> 0)) {
	  
	  // Now compute number of required RBs for total sdu length
	  // Assume RAH format 2
	  // adjust  header lengths
	  header_len_dcch_tmp = header_len_dcch;
	  header_len_dtch_tmp = header_len_dtch;
	  if (header_len_dtch==0) {
	    header_len_dcch = (header_len_dcch >0) ? 1 : header_len_dcch;  // remove length field
	  } else {
	    header_len_dtch = (header_len_dtch > 0) ? 1 :header_len_dtch;     // remove length field for the last SDU
	  }
	  
	  
	  mcs = eNB_UE_stats->dlsch_mcs1;
	  if (mcs==0) nb_rb = 4;   // don't let the TBS get too small
	  else nb_rb=min_rb_unit[CC_id];
	  
	  TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
	  
	  while (TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len))  {
	    nb_rb += min_rb_unit[CC_id];  //
	    if (nb_rb>nb_available_rb) { // if we've gone beyond the maximum number of RBs
	      // (can happen if N_RB_DL is odd)
	      TBS = mac_xface->get_TBS_DL(eNB_UE_stats->dlsch_mcs1,nb_available_rb);
	      nb_rb = nb_available_rb;
	      break;
	    }
	    TBS = mac_xface->get_TBS_DL(eNB_UE_stats->dlsch_mcs1,nb_rb);
	  }
	  
	  if(nb_rb == pre_nb_available_rbs[CC_id][UE_id]) {
874
	    for(j=0;j<frame_parms[CC_id]->N_RBG;j++) {// for indicating the rballoc for each sub-band
875 876 877 878 879 880
	      UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
	    }
	  } else
	    {
	      nb_rb_temp = nb_rb;
	      j = 0;
881
	      while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)){
882 883
		if(rballoc_sub_UE[CC_id][UE_id][j] == 1){
		  UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = rballoc_sub_UE[CC_id][UE_id][j];
884 885 886
		  if ((j == frame_parms[CC_id]->N_RBG-1) &&
		      ((frame_parms[CC_id]->N_RB_DL == 25)||
		       (frame_parms[CC_id]->N_RB_DL == 50)))
887 888 889 890 891 892 893 894 895 896 897
		    nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id]+1;
		  else
		    nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id];
		}
		j = j+1;
	      }
	    }
	  
	  PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
	  PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[CC_id][UE_id];
	  
898
	  for(j=0;j<frame_parms[CC_id]->N_RBG;j++)
899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915
	    PHY_vars_eNB_g[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
	  
	  
	  // decrease mcs until TBS falls below required length
	  while ((TBS > (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && (mcs>0)) {
	    mcs--;
	    TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
	  }
	  
	  // if we have decreased too much or we don't have enough RBs, increase MCS
	  while ((TBS < (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && ((( dl_pow_off[CC_id][UE_id]>0) && (mcs<28)) || ( (dl_pow_off[CC_id][UE_id]==0) && (mcs<=15)))) {
	    mcs++;
	    TBS = mac_xface->get_TBS_DL(mcs,nb_rb);
	  }
	  
	  LOG_D(MAC,"dlsch_mcs before and after the rate matching = (%d, %d)\n",eNB_UE_stats->dlsch_mcs1, mcs);
	  
916
#ifdef DEBUG_eNB_SCHEDULER
917 918 919 920
	  LOG_D(MAC,"[eNB %d] Generated DLSCH header (mcs %d, TBS %d, nb_rb %d)\n",
		module_idP,mcs,TBS,nb_rb);
	  // msg("[MAC][eNB ] Reminder of DLSCH with random data %d %d %d %d \n",
	  //	TBS, sdu_length_total, offset, TBS-sdu_length_total-offset);
921
#endif
922 923 924 925 926 927 928 929 930 931 932 933 934 935 936
	  
	  if ((TBS - header_len_dcch - header_len_dtch - sdu_length_total - ta_len) <= 2) {
	    padding = (TBS - header_len_dcch - header_len_dtch - sdu_length_total - ta_len);
	    post_padding = 0;
	  }
	  else {
	    padding = 0;
	    // adjust the header len
	    if (header_len_dtch==0)
	      header_len_dcch = header_len_dcch_tmp;
	    else //if (( header_len_dcch==0)&&((header_len_dtch==1)||(header_len_dtch==2)))
	      header_len_dtch = header_len_dtch_tmp;
	    
	    post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len ; // 1 is for the postpadding header
	  }
937
#ifndef EXMIMO_IOT
938
	  ta_update = eNB_UE_stats->timing_advance_update/4;
939
#else
940
	  ta_update = 0;
941
#endif
942 943 944 945 946 947 948 949 950 951 952 953
	  
	  offset = generate_dlsch_header((unsigned char*)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
					 // offset = generate_dlsch_header((unsigned char*)eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0],
					 num_sdus,              //num_sdus
					 sdu_lengths,  //
					 sdu_lcids,
					 255,                                   // no drx
					 ta_update, // timing advance
					 NULL,                                  // contention res id
					 padding,
					 post_padding);
	  //#ifdef DEBUG_eNB_SCHEDULER
954
	  LOG_D(MAC,"[eNB %d][DLSCH] Frame %d Generate header for UE_id %d on CC_id %d: sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,timing advance value : %d, padding %d,post_padding %d,(mcs %d, TBS %d, nb_rb %d),header_dcch %d, header_dtch %d\n",
955 956
		module_idP,frameP, UE_id, CC_id, sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,
		ta_len,padding,post_padding,mcs,TBS,nb_rb,header_len_dcch,header_len_dtch);
957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972
	  //#endif
	  
	  LOG_T(MAC,"[eNB %d] First 16 bytes of DLSCH : \n");
	  for (i=0;i<16;i++)
	    LOG_T(MAC,"%x.",dlsch_buffer[i]);
	  LOG_T(MAC,"\n");
	  
	  // cycle through SDUs and place in dlsch_buffer
	  memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset],dlsch_buffer,sdu_length_total);
	  // memcpy(&eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset],dcch_buffer,sdu_lengths[0]);
	  
	  // fill remainder of DLSCH with random data
	  for (j=0;j<(TBS-sdu_length_total-offset);j++)
	    UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset+sdu_length_total+j] = (char)(taus()&0xff);
	  //eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset+sdu_lengths[0]+j] = (char)(taus()&0xff);
	  
973
#if defined(USER_MODE) && defined(OAI_EMU)
974 975 976 977 978 979 980
	  /* Tracing of PDU is done on UE side */
	  if (oai_emulation.info.opt_enabled)
	    trace_pdu(1, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
		      TBS, module_idP, 3, UE_RNTI(module_idP,UE_id),
		      eNB->subframe,0,0);
	  LOG_D(OPT,"[eNB %d][DLSCH] Frame %d  rnti %x  with size %d\n",
		module_idP, frameP, UE_RNTI(module_idP,UE_id), TBS);
981
#endif
982 983 984 985 986 987 988 989 990 991 992 993
	  
	  aggregation = process_ue_cqi(module_idP,UE_id);
	  nCCE[CC_id]-=(1<<aggregation); // adjust the remaining nCCE
	  nCCE_used[CC_id]+=(1<<aggregation); // adjust the remaining nCCE
	  UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid] = nb_rb;
	  
	  add_ue_dlsch_info(module_idP,
			    CC_id,
			    UE_id,
			    subframeP,
			    S_DL_SCHEDULED);
	  // store stats
994 995
	  eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total;
	  eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1;
996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008
	  
	  UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
	  UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used += nb_rb;
	  UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used = nCCE[CC_id];
	  UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
	  UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=mcs;
	  UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
	  
	  UE_list->eNB_UE_stats[CC_id][UE_id].overhead_bytes= TBS- sdu_length_total;
	  UE_list->eNB_UE_stats[CC_id][UE_id].total_sdu_bytes+= sdu_length_total;
	  UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes+= TBS;
	  UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus+=1;
	  
1009
	  if (frame_parms[CC_id]->frame_type == TDD) {
1010 1011
	    UE_list->UE_template[CC_id][UE_id].DAI++;
	    //	printf("DAI update: subframeP %d: UE %d, DAI %d\n",subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].DAI);
1012
#warning only for 5MHz channel 
1013 1014 1015 1016 1017 1018 1019
	    update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI);
	  }
	  
	  switch (mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
	  case 1:
	  case 2:
	  default:
1020 1021
	    if (frame_parms[CC_id]->frame_type == TDD) {
	      switch (frame_parms[CC_id]->N_RB_DL) {
1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060
	      case 6:
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
		((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		break;
	      case 25:
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		LOG_D(MAC,"Format1 DCI: harq_pid %d, ndi %d\n",harq_pid,((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi);
		break;
	      case 50:
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->rv = 0;
		((DCI1_10MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		break;
	      case 100:
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->rv = 0;
		((DCI1_20MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		break;
	      default:
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
		((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai      = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
		break;
	      }
	    }
	    else {
1061
	      switch (frame_parms[CC_id]->N_RB_DL) {
1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143
	      case 6:
		((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
		break;
	      case 25:
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
		break;
	      case 50:
		((DCI1_10MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_10MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_10MHz_FDD_t*)DLSCH_dci)->rv = 0;
		break;
	      case 100:
		((DCI1_20MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_20MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_20MHz_FDD_t*)DLSCH_dci)->rv = 0;
		break;
	      default:
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
		((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
		break;
	      }
	    }
	    break;
	  case 4:
	    //  if (nb_rb>10) {
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1;
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = round&3;
	    ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;

	    //}
	    /* else {
	       ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->mcs1 = eNB_UE_stats->DL_cqi[0];
	       ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	       ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->ndi1 = 1;
	       ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->rv1 = round&3;
	       ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->tpmi = 5;
	       ((DCI2_5MHz_2A_L10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	       }*/
	    break;
	  case 5:

	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->mcs = mcs;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->ndi = 1;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rv = round&3;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	    if(dl_pow_off[CC_id][UE_id] == 2)
	      dl_pow_off[CC_id][UE_id] = 1;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = dl_pow_off[CC_id][UE_id];
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->tpmi = 5;
	    break;
	  case 6:
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->mcs = mcs;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->ndi = 1;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rv = round&3;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->dl_power_off = 1;
	    ((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->tpmi = 5;
	    break;
	  }
	  // Toggle NDI for next time
	  LOG_D(MAC,"Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",frameP,subframeP,UE_id,
		UE_list->UE_template[CC_id][UE_id].rnti,harq_pid,UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]);
	  UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]=1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
	}

	else {  // There is no data from RLC or MAC header, so don't schedule

	}
1144
      }
1145
      if (frame_parms[CC_id]->frame_type == TDD) {
1146
	set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
1147
      }
1148
    }
1149
  }
1150 1151 1152
  //printf("MAC nCCE : %d\n",*nCCE_used);


1153 1154
  stop_meas(&eNB->schedule_dlsch); 
  vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_OUT);
1155
    
1156 1157
}

1158
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,uint32_t *RBallocP,uint8_t RA_scheduledP,int *mbsfn_flagP) {
1159 1160

  // loop over all allocated UEs and compute frequency allocations for PDSCH
1161
  int   UE_id = -1;
1162 1163 1164
  uint8_t            first_rb,nb_rb=3;
  rnti_t        rnti;
  unsigned char vrb_map[100];
1165
  uint8_t            rballoc_sub[25]; 
1166
  //uint8_t number_of_subbands=13;
1167
  uint32_t           *rballoc=RBallocP;
1168 1169 1170 1171

  unsigned char round;
  unsigned char harq_pid;
  void         *DLSCH_dci=NULL;
1172
  DCI_PDU      *DCI_pdu;
1173
  int           i;
1174
  void         *BCCH_alloc_pdu;
1175
  int           size_bits,size_bytes;
1176 1177 1178 1179
  int CC_id;
  eNB_MAC_INST *eNB  =&eNB_mac_inst[module_idP];
  UE_list_t    *UE_list = &eNB->UE_list;
  RA_TEMPLATE  *RA_template;
1180 1181


1182
  start_meas(&eNB->fill_DLSCH_dci);
1183
  vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN);
1184 1185 1186 1187
  for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {

    if (mbsfn_flagP[CC_id]>0)
      continue;
1188

1189 1190 1191 1192
    DCI_pdu  = &eNB->common_channels[CC_id].DCI_pdu;
    BCCH_alloc_pdu=(void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
    // clear vrb_map
    memset(vrb_map,0,100);
1193

1194 1195 1196 1197 1198

    // SI DLSCH
    //  printf("BCCH check\n");
    if (eNB->common_channels[CC_id].bcch_active == 1) {
      eNB->common_channels[CC_id].bcch_active = 0;
1199 1200
      LOG_D(MAC,"[eNB %d] Frame %d subframeP %d: BCCH active\n", module_idP, frameP, subframeP);
      // randomize frequency allocation for SI
1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212
      first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));

      /*  Where is this from, should be removed!!!!

	  if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
	
	  }
	  else {
	  BCCH_alloc_pdu_fdd.rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  rballoc[CC_id] |= mac_xface->get_rballoc(BCCH_alloc_pdu_fdd.vrb_type,BCCH_alloc_pdu_fdd.rballoc);
	  }
      */
1213 1214 1215 1216 1217 1218


      vrb_map[first_rb] = 1;
      vrb_map[first_rb+1] = 1;
      vrb_map[first_rb+2] = 1;
      vrb_map[first_rb+3] = 1;
1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294
      
      if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
	switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
	case 6:
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_1_5MHz_TDD_1_6_t),
			 2,
			 sizeof_DCI1A_1_5MHz_TDD_1_6_t,
			 format1A,0);
	  break;
	case 25:
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_5MHz_TDD_1_6_t),
			 2,
			 sizeof_DCI1A_5MHz_TDD_1_6_t,
			 format1A,0);
	  break;
	case 50:
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_10MHz_TDD_1_6_t),
			 2,
			 sizeof_DCI1A_10MHz_TDD_1_6_t,
			 format1A,0);
	  break;
	case 100:
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_20MHz_TDD_1_6_t),
			 2,
			 sizeof_DCI1A_20MHz_TDD_1_6_t,
			 format1A,0);
	  break;
	}
1295 1296
      }
      else {
1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374
	switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
	case 6:
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;

	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_1_5MHz_FDD_t),
			 2,
			 sizeof_DCI1A_1_5MHz_FDD_t,
			 format1A,0);
	  break;
	case 25:
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;

	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_5MHz_FDD_t),
			 2,
			 sizeof_DCI1A_5MHz_FDD_t,
			 format1A,0);
	  break;
	case 50:
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;

	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_10MHz_FDD_t),
			 2,
			 sizeof_DCI1A_10MHz_FDD_t,
			 format1A,0);
	  break;
	case 100:
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
	  ((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;

	  rballoc[CC_id] |= mac_xface->get_rballoc(0,((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
	  add_common_dci(DCI_pdu,
			 BCCH_alloc_pdu,
			 SI_RNTI,
			 sizeof(DCI1A_20MHz_FDD_t),
			 2,
			 sizeof_DCI1A_20MHz_FDD_t,
			 format1A,0);
	  break;
	}
1375
      }
1376 1377
    }
    if (RA_scheduledP == 1) {
1378 1379
      for (i=0;i<NB_RA_PROC_MAX;i++) {

1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614
	RA_template = &eNB->common_channels[CC_id].RA_template[i];

	if (RA_template->generate_rar == 1) {

	  //FK: postponed to fill_rar
	  //RA_template->generate_rar = 0;

	  LOG_D(MAC,"[eNB %d] Frame %d, subframeP %d: Generating RAR DCI (proc %d), RA_active %d format 1A (%d,%d))\n",
		module_idP,frameP, subframeP,i,
		RA_template->RA_active,
		RA_template->RA_dci_fmt1,
		RA_template->RA_dci_size_bits1);
	  // randomize frequency allocation for RA
	  while (1) {
	    first_rb = (unsigned char)(taus()%(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL-4));
	    if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
	      break;
	  }
	  vrb_map[first_rb] = 1;
	  vrb_map[first_rb+1] = 1;
	  vrb_map[first_rb+2] = 1;
	  vrb_map[first_rb+3] = 1;

	  if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
	    switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
	    case 6:
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
	      ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	      rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
						       ((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
	      break;
	    case 25:
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
	      ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	      rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
						       ((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
	      break;
	    case 50:
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rv=0;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->mcs=0;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
	      ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL,first_rb,4);
	      rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
						       ((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
	      break;
	    case 100:
	      ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
	      ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
	      ((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->ndi=1;
	      ((DCI1A_20MHz_TDD_1_6_t*)&