Commit 1f439ef2 authored by Calvin HSU's avatar Calvin HSU
Browse files

Merge branch 'develop-nr' of https://gitlab.eurecom.fr/oai/openairinterface5g into develop-nr

parents d5234dd1 3716e921
......@@ -146,7 +146,7 @@ int nr_init_frame_parms(nfapi_config_request_t* config,
frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
(frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
return 0;
}
......@@ -283,7 +283,7 @@ int nr_init_frame_parms_ue(nfapi_config_request_t* config,
//frame_parms->samples_per_subframe = (frame_parms->samples_per_subframe_wCP + (frame_parms->nb_prefix_samples0 * frame_parms->slots_per_subframe) +
// (frame_parms->nb_prefix_samples * frame_parms->slots_per_subframe * (frame_parms->symbols_per_slot - 1)));
frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
return 0;
}
......
......@@ -45,7 +45,6 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
......@@ -53,11 +52,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3;
LOG_I(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
/// QPSK modulation
for (int m=0; m<NR_PBCH_DMRS_LENGTH>>1; m++) {
for (int m=0; m<NR_PBCH_DMRS_LENGTH; m++) {
idx = ((((gold_pbch_dmrs[(m<<1)>>5])>>((m<<1)&0x1f))&1)<<1) ^ (((gold_pbch_dmrs[((m<<1)+1)>>5])>>(((m<<1)+1)&0x1f))&1);
mod_dmrs[m<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dmrs[(m<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
......@@ -131,25 +131,30 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
return 0;
}
void nr_pbch_scrambling(uint32_t Nid,
void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint8_t *pbch_a,
uint32_t length)
uint16_t M,
uint16_t length,
uint8_t bitwise)
{
uint8_t reset, offset;
uint32_t x1, x2, s=0;
uint64_t tmp=0;
uint8_t M = length - 3; // case Lmax = 4--> 29
uint8_t *pbch_e = pbch->pbch_e;
uint32_t *pbch_a_prime = (uint32_t*)pbch->pbch_a_prime;
uint32_t *pbch_a_interleaved = (uint32_t*)pbch->pbch_a_interleaved;
uint32_t unscrambling_mask = 0x87002D;
reset = 1;
// x1 is set in lte_gold_generic
x2 = Nid;
// The Gold sequence is shifted by nushift* M, so we skip (nushift*M /32) double words
for (int i=0; i<(uint16_t)ceil((nushift*M)/5); i++) {
for (int i=0; i<(uint16_t)ceil((nushift*M)/32); i++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
// Scrambling is now done with offset (nushift*M)%32
offset = (nushift*M)&0x1f;
for (int i=0; i<length; i++) {
......@@ -157,61 +162,115 @@ void nr_pbch_scrambling(uint32_t Nid,
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
pbch_a[i] = (pbch_a[i]&1) ^ ((s>>((i+offset)&0x1f))&1);
if (bitwise) {
(*pbch_a_prime) ^= ((unscrambling_mask>>i)&1)? (((*pbch_a_interleaved)>>i)&1)<<i : ((((*pbch_a_interleaved)>>i)&1) ^ ((s>>((i+offset)&0x1f))&1))<<i;
}
else
pbch_e[i] = (pbch_e[i]&1) ^ ((s>>((i+offset)&0x1f))&1);
}
}
uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
uint8_t nr_pbch_payload_interleaver(uint8_t i) {
uint8_t j_sfn=0, j_hrf=10, j_ssb=11, j_other=14;
if (24<=i && i<=27) //Sfn bits
return nr_pbch_payload_interleaving_pattern[j_sfn + i -24];
else if (i==28) // Hrf bit
return nr_pbch_payload_interleaving_pattern[j_hrf];
else if (29<=i) // Ssb bits
return nr_pbch_payload_interleaving_pattern[j_ssb + (i-29)];
else
return nr_pbch_payload_interleaving_pattern[j_other + i];
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t *pbch_pdu,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
uint8_t n_hf,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
int frame_mod8,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int k,l,m;
int16_t a;
int16_t mod_pbch_e[NR_POLAR_PBCH_E<<1];
uint8_t sfn_4lsb, idx=0;
int16_t mod_pbch_e[NR_POLAR_PBCH_E];
uint8_t idx=0;
uint16_t M;
uint8_t nushift;
LOG_I(PHY, "PBCH generation started\n");
///Payload generation
// Fix byte endian
if (!frame_mod8)
for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a[NR_PBCH_PDU_BITS-i-1] = pbch_pdu[i];
if (!(sfn&7))
for (int i=0; i<(NR_PBCH_PDU_BITS>>3); i++)
pbch->pbch_a[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_pdu[i];
#ifdef DEBUG_PBCH_ENCODING
printf("Byte endian fix:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%04x\n", i, pbch->pbch_a[i]);
#endif
// Extra bits generation
sfn_4lsb = sfn&3;
// Extra byte generation
uint8_t *xbyte = pbch->pbch_a;
//memset((void*) xbyte, 0, 1);
for (int i=0; i<4; i++)
pbch->pbch_a[NR_PBCH_PDU_BITS+i] = (sfn_4lsb>>i)&1; // 4 lsb of sfn
(*xbyte) ^= ((sfn>>i)&1)<<i; // 4 lsb of sfn
pbch->pbch_a[NR_PBCH_PDU_BITS+4] = n_hf; // half frame index bit
(*xbyte) ^= n_hf<<4; // half frame index bit
pbch->pbch_a[NR_PBCH_PDU_BITS+5] = (config->sch_config.ssb_subcarrier_offset.value>>5)&1; //MSB of k0 -- Note the case Lssb=64 is not supported (FR2)
if (Lmax == 64)
for (int i=0; i<3; i++)
(*xbyte) ^= ((ssb_index>>(3+i))&1)<<(5+i); // resp. 4th, 5th and 6th bits of ssb_index
else
(*xbyte) ^= ((config->sch_config.ssb_subcarrier_offset.value>>5)&1)<<5; //MSB of k_SSB
#ifdef DEBUG_PBCH_ENCODING
printf("Extra byte:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%04x\n", i, pbch->pbch_a[i]);
#endif
// Payload interleaving
uint32_t* input = (uint32_t*)pbch->pbch_a;
uint32_t* output = (uint32_t*)pbch->pbch_a_interleaved;
for (int i=0; i<32; i++)
(*output) |= (((*input)>>i)&1)<<(nr_pbch_payload_interleaver(i));
#ifdef DEBUG_PBCH_ENCODING
printf("Interleaving:\n");
for (int i=0; i<4; i++)
printf("pbch_a_interleaved[%d]: 0x%04x\n", i, pbch->pbch_a_interleaved[i]);
#endif
// Scrambling
nr_pbch_scrambling((uint32_t)config->sch_config.physical_cell_id.value, nushift, pbch->pbch_a, NR_POLAR_PBCH_PAYLOAD_BITS);
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1);
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 1);
#ifdef DEBUG_PBCH_ENCODING
#endif
/// CRC, coding and rate matching
polar_encoder (pbch->pbch_a, pbch->pbch_e, &frame_parms->pbch_polar_params);
polar_encoder (pbch->pbch_a_prime, pbch->pbch_e, &frame_parms->pbch_polar_params);
#ifdef DEBUG_PBCH_ENCODING
#endif
/// Scrambling
M = NR_POLAR_PBCH_E;
nushift = config->sch_config.physical_cell_id.value &3;;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 0);
/// QPSK modulation
for (int i=0; i<NR_POLAR_PBCH_E>>1; i++){
idx = ((pbch->pbch_e[i<<1]&1)<<1) ^ (pbch->pbch_e[(i<<1)+1]&1);
......
......@@ -62,7 +62,6 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
......@@ -71,10 +70,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
\brief PBCH scrambling function
@param
*/
void nr_pbch_scrambling(uint32_t Nid,
void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint32_t Nid,
uint8_t nushift,
uint8_t *pbch_a,
uint32_t length);
uint16_t M,
uint16_t length,
uint8_t bitwise);
/*!
\fn int nr_generate_pbch
......@@ -87,11 +88,19 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t nushift,
uint8_t n_hf,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
int frame_mod8,
nfapi_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
\fn int nr_generate_pbch
\brief PBCH interleaving function
@param bit index i of the input payload
@returns the bit index of the output
*/
uint8_t nr_pbch_payload_interleaver(uint8_t i);
#endif /*__NR_TRANSPORT__H__*/
This diff is collapsed.
......@@ -42,70 +42,80 @@
#define NR_PDCCH_DCI_H
#ifdef NR_PDCCH_DCI_H
struct NR_DCI_INFO_EXTRACTED {
uint8_t carrier_ind ; // 0 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 1 SUL_IND_0_1:
uint8_t identifier_dci_formats ; // 2 IDENTIFIER_DCI_FORMATS:
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint16_t freq_dom_resource_assignment_UL; // 8 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 9 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 10 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 11 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 12 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 13 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 14 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 15 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 16 TB1_MCS:
uint8_t tb1_ndi ; // 17 TB1_NDI:
uint8_t tb1_rv ; // 18 TB1_RV:
uint8_t tb2_mcs ; // 19 TB2_MCS:
uint8_t tb2_ndi ; // 20 TB2_NDI:
uint8_t tb2_rv ; // 21 TB2_RV:
uint8_t mcs ; // 22 MCS:
uint8_t ndi ; // 23 NDI:
uint8_t rv ; // 24 RV:
uint8_t harq_process_number ; // 25 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 26 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 27 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 28 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tpc_pusch ; // 29 TPC_PUSCH:
uint8_t tpc_pucch ; // 30 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 31 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 32 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t short_message_ind ; // 33 SHORT_MESSAGE_IND: 1 bit if crc scrambled with P-RNTI
uint8_t srs_resource_ind ; // 34 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 35 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 36 ANTENNA_PORTS:
uint8_t tci ; // 37 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 38 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 39 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 40 CSI_REQUEST:
uint8_t cbgti ; // 41 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 42 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 43 PTRS_DMRS:
uint8_t beta_offset_ind ; // 44 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 45 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t sul_ind_0_0 ; // 46 SUL_IND_0_0:
uint16_t padding ; // 47 PADDING: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
};
typedef struct NR_DCI_INFO_EXTRACTED NR_DCI_INFO_EXTRACTED_t;
#endif
This diff is collapsed.
......@@ -38,7 +38,9 @@
typedef struct {
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS];
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_a_interleaved[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_a_prime[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint8_t pbch_e[NR_POLAR_PBCH_E];
} NR_gNB_PBCH;
......
......@@ -578,57 +578,109 @@ typedef struct {
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef NR_PDCCH_DEFS_NR_UE
#define MAX_NR_DCI_DECODED_SLOT 10
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 48
// The following parameters define 'position' of each DCI field described in TS 38.212
#define CARRIER_IND 0
#define SUL_IND_0_1 1
#define IDENTIFIER_DCI_FORMATS 2
#define NBR_NR_DCI_FIELDS 56
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
#define SUL_IND_0_1 2
#define SLOT_FORMAT_IND 3
#define PRE_EMPTION_IND 4
#define TPC_CMD_NUMBER 5
#define BLOCK_NUMBER 6
#define BANDWIDTH_PART_IND 7
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 8
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 9
#define TIME_DOM_RESOURCE_ASSIGNMENT 10
#define VRB_TO_PRB_MAPPING 11
#define PRB_BUNDLING_SIZE_IND 12
#define RATE_MATCHING_IND 13
#define ZP_CSI_RS_TRIGGER 14
#define FREQ_HOPPING_FLAG 15
#define TB1_MCS 16
#define TB1_NDI 17
#define TB1_RV 18
#define TB2_MCS 19
#define TB2_NDI 20
#define TB2_RV 21
#define MCS 22
#define NDI 23
#define RV 24
#define HARQ_PROCESS_NUMBER 25
#define DAI_ 26
#define FIRST_DAI 27
#define SECOND_DAI 28
#define TPC_PUSCH 29
#define TPC_PUCCH 30
#define PUCCH_RESOURCE_IND 31
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 32
#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 34
#define PRECOD_NBR_LAYERS 35
#define ANTENNA_PORTS 36
#define TCI 37
#define SRS_REQUEST 38
#define TPC_CMD_NUMBER_FORMAT2_3 39
#define CSI_REQUEST 40
#define CBGTI 41
#define CBGFI 42
#define PTRS_DMRS 43
#define BETA_OFFSET_IND 44
#define DMRS_SEQ_INI 45
#define SUL_IND_0_0 46
#define PADDING 47
#define SHORT_MESSAGE_IND 8
#define SHORT_MESSAGES 9
#define FREQ_DOM_RESOURCE_ASSIGNMENT_UL 10
#define FREQ_DOM_RESOURCE_ASSIGNMENT_DL 11
#define TIME_DOM_RESOURCE_ASSIGNMENT 12
#define VRB_TO_PRB_MAPPING 13
#define PRB_BUNDLING_SIZE_IND 14
#define RATE_MATCHING_IND 15
#define ZP_CSI_RS_TRIGGER 16
#define FREQ_HOPPING_FLAG 17
#define TB1_MCS 18
#define TB1_NDI 19
#define TB1_RV 20
#define TB2_MCS 21
#define TB2_NDI 22
#define TB2_RV 23
#define MCS 24
#define NDI 25
#define RV 26
#define HARQ_PROCESS_NUMBER 27
#define DAI_ 28
#define FIRST_DAI 29
#define SECOND_DAI 30
#define TB_SCALING 31
#define TPC_PUSCH 32
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
//#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
#define TCI 39
#define SRS_REQUEST 40
#define TPC_CMD_NUMBER_FORMAT2_3 41
#define CSI_REQUEST 42
#define CBGTI 43
#define CBGFI 44
#define PTRS_DMRS 45
#define BETA_OFFSET_IND 46
#define DMRS_SEQ_INI 47
#define UL_SCH_IND 48
#define PADDING_NR_DCI 49
#define SUL_IND_0_0 50
#define RA_PREAMBLE_INDEX 51
#define SUL_IND_1_0 52
#define SS_PBCH_INDEX 53
#define PRACH_MASK_INDEX 54
#define RESERVED_NR_DCI 55
typedef enum {
_format_0_0_found=0,
_format_0_1_found=1,
_format_1_0_found=2,
_format_1_1_found=3,
_format_2_0_found=4,
_format_2_1_found=5,
_format_2_2_found=6,
_format_2_3_found=7} format_found_t;
#define TOTAL_NBR_SCRAMBLED_VALUES 13
#define _C_RNTI_ 0
#define _CS_RNTI_ 1
#define _NEW_RNTI_ 2
#define _TC_RNTI_ 3
#define _P_RNTI_ 4
#define _SI_RNTI_ 5
#define _RA_RNTI_ 6
#define _SP_CSI_RNTI_ 7
#define _SFI_RNTI_ 8
#define _INT_RNTI_ 9
#define _TPC_PUSCH_RNTI_ 10
#define _TPC_PUCCH_RNTI_ 11
#define _TPC_SRS_RNTI_ 12
typedef enum {
_c_rnti = _C_RNTI_,
_cs_rnti = _CS_RNTI_,
_new_rnti = _NEW_RNTI_,
_tc_rnti = _TC_RNTI_,
_p_rnti = _P_RNTI_,
_si_rnti = _SI_RNTI_,
_ra_rnti = _RA_RNTI_,
_sp_csi_rnti = _SP_CSI_RNTI_,
_sfi_rnti = _SFI_RNTI_,
_int_rnti = _INT_RNTI_,
_tpc_pusch_rnti = _TPC_PUSCH_RNTI_,
_tpc_pucch_rnti = _TPC_PUCCH_RNTI_,
_tpc_srs_rnti = _TPC_SRS_RNTI_} crc_scrambled_t;
typedef enum {bundle_n2=2,bundle_n3=3,bundle_n6=6} NR_UE_CORESET_REG_bundlesize_t;
......
......@@ -54,8 +54,8 @@
#define NR_PSS_LENGTH 127
#define NR_SSS_LENGTH 127
#define NR_PBCH_DMRS_LENGTH 144
#define NR_PBCH_DMRS_LENGTH_DWORD 5 // roundup(NR_PBCH_DMRS_LENGTH/32)
#define NR_PBCH_DMRS_LENGTH 144 // in mod symbols
#define NR_PBCH_DMRS_LENGTH_DWORD 10 // roundup(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
#define NR_MAX_NUM_BWP 4
......@@ -76,6 +76,11 @@ typedef enum{
nr_ssb_type_E
} nr_ssb_type_e;
typedef enum {
nr_FR1 = 0,
nr_FR2
} nr_frequency_range_e;
typedef struct NR_BWP_PARMS {
/// Associated numerology index
uint8_t numerology_index;
......@@ -88,6 +93,8 @@ typedef struct NR_BWP_PARMS {
} NR_BWP_PARMS;
typedef struct NR_DL_FRAME_PARMS {
/// frequency range
nr_frequency_range_e freq_range;
/// Number of resource blocks (RB) in DL
uint8_t N_RB_DL;
/// Number of resource blocks (RB) in UL
......
......@@ -123,16 +123,13 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
int **txdataF = gNB->common_vars.txdataF;
uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
int ss_subframe = (cfg->sch_config.half_frame_index.value)? 5 : 0;
int sfn = 10*frame + subframe;
int frame_mod8 = frame&7;
uint8_t Lmax, nushift, ssb_index=0, n_hf=0;
uint8_t Lmax, ssb_index=0, n_hf=0;