Commit 24f50d66 authored by Florian Kaltenberger's avatar Florian Kaltenberger
Browse files

Merge branch 'develop-nr' into 'nr_mib_fix'

# Conflicts:
#   targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
parents 858502c1 32eb84f1
...@@ -1357,6 +1357,7 @@ set(PHY_SRC_UE ...@@ -1357,6 +1357,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c ${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c ${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c ${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
# ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c
${PHY_POLARSRC} ${PHY_POLARSRC}
${PHY_LDPCSRC} ${PHY_LDPCSRC}
) )
...@@ -1602,7 +1603,14 @@ add_library(L2 ...@@ -1602,7 +1603,14 @@ add_library(L2
${MAC_SRC} ${MAC_SRC}
${ENB_APP_SRC} ${ENB_APP_SRC}
) )
# ${OPENAIR2_DIR}/RRC/L2_INTERFACE/openair_rrc_L2_interface.c)
add_library(MAC_NR
${MAC_NR_SRC}
)
add_library(MAC_UE_NR
${MAC_NR_SRC_UE}
)
add_library(L2_NR add_library(L2_NR
${L2_NR_SRC} ${L2_NR_SRC}
...@@ -2550,6 +2558,9 @@ target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES}) ...@@ -2550,6 +2558,9 @@ target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE}) add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl) target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim) foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
......
...@@ -516,10 +516,10 @@ function main() { ...@@ -516,10 +516,10 @@ function main() {
install_usrp_uhd_driver $UHD_IMAGES_DIR install_usrp_uhd_driver $UHD_IMAGES_DIR
fi fi
fi fi
if [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then # if [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
echo_info "\nInstalling packages for ADRV9371_ZC706 support" # echo_info "\nInstalling packages for ADRV9371_ZC706 support"
check_install_libiio_driver # check_install_libiio_driver
fi # fi
if [ "$HW" == "OAI_BLADERF" ] ; then if [ "$HW" == "OAI_BLADERF" ] ; then
echo_info "installing packages for BLADERF support" echo_info "installing packages for BLADERF support"
check_install_bladerf_driver check_install_bladerf_driver
...@@ -836,9 +836,18 @@ function main() { ...@@ -836,9 +836,18 @@ function main() {
echo_info "liboai_device.so is linked to EXMIMO device library" echo_info "liboai_device.so is linked to EXMIMO device library"
elif [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then elif [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
ln -sf $OPENAIR_DIR/targets/ARCH/ADRV9371_ZC706/slib/libadrv9371_zc706.so liboai_device.so SYRIQ_KVER=$(uname -r)
SYRIQ_KMAJ=$(echo $SYRIQ_KVER | sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/')
SYRIQ_KMIN=$(echo $SYRIQ_KVER | sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/')
#echo $SYRIQ_KMAJ$SYRIQ_KMIN
if [ "$SYRIQ_KMAJ$SYRIQ_KMIN" == "319" ] || [ "$SYRIQ_KMAJ$SYRIQ_KMIN" == "410" ] || [ "$SYRIQ_KMAJ$SYRIQ_KMIN" == "415" ] ; then
# echo "Kernel $SYRIQ_KMAJ.$SYRIQ_KMIN detected"
ln -sf /usr/local/lib/syriq/libadrv9371zc706.so liboai_device.so
else
echo_error "== FAILED == Unexpected Kernel $SYRIQ_KMAJ.$SYRIQ_KMIN"
fi
echo_info "liboai_device.so is linked to ADRV9371_ZC706 device library for Kernel $SYRIQ_KMAJ.$SYRIQ_KMIN"
echo_info "liboai_device.so is linked to ADRV9371_ZC706 device library"
elif [ "$HW" == "OAI_USRP" ] ; then elif [ "$HW" == "OAI_USRP" ] ; then
compilations \ compilations \
$build_dir oai_usrpdevif \ $build_dir oai_usrpdevif \
......
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include "stddef.h" #include "stddef.h"
#include "platform_types.h" #include "platform_types.h"
#include "fapi_nr_ue_constants.h" #include "fapi_nr_ue_constants.h"
#include "PHY/impl_defs_nr.h"
/* /*
typedef unsigned int uint32_t; typedef unsigned int uint32_t;
...@@ -150,6 +151,10 @@ typedef struct { ...@@ -150,6 +151,10 @@ typedef struct {
typedef struct { typedef struct {
uint16_t rnti; uint16_t rnti;
uint8_t dci_format; uint8_t dci_format;
// n_CCE index of first CCE for PDCCH reception
int n_CCE;
// N_CCE is L, or number of CCEs for DCI
int N_CCE;
fapi_nr_dci_pdu_rel15_t dci; fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t; } fapi_nr_dci_indication_pdu_t;
...@@ -232,11 +237,92 @@ typedef struct { ...@@ -232,11 +237,92 @@ typedef struct {
uint16_t root_sequence_index; uint16_t root_sequence_index;
uint16_t rsrp_threshold_ssb; uint16_t rsrp_threshold_ssb;
uint16_t rsrp_threshold_sul; uint16_t rsrp_threshold_sul;
uint16_t prach_freq_offset;
} fapi_nr_ul_config_prach_pdu; } fapi_nr_ul_config_prach_pdu;
typedef struct { typedef struct {
pucch_format_nr_t format; /* format 0 1 2 3 4 */
uint8_t initialCyclicShift; /* x x */
uint8_t nrofSymbols; /* x x x x x */
uint8_t startingSymbolIndex; /* x x x x x */
uint8_t timeDomainOCC; /* x */
uint8_t nrofPRBs; /* x x */
uint16_t startingPRB; /* maxNrofPhysicalResourceBlocks = 275 */
uint8_t occ_length; /* x */
uint8_t occ_Index; /* x */
feature_status_t intraSlotFrequencyHopping;
uint16_t secondHopPRB;
/*
-- Enabling inter-slot frequency hopping when PUCCH Format 1, 3 or 4 is repeated over multiple slots.
-- The field is not applicable for format 2.
*/
feature_status_t interslotFrequencyHopping;
/*
-- Enabling 2 DMRS symbols per hop of a PUCCH Format 3 or 4 if both hops are more than X symbols when FH is enabled (X=4).
-- Enabling 4 DMRS sybmols for a PUCCH Format 3 or 4 with more than 2X+1 symbols when FH is disabled (X=4).
-- Corresponds to L1 parameter 'PUCCH-F3-F4-additional-DMRS' (see 38.213, section 9.2.1)
-- The field is not applicable for format 1 and 2.
*/
enable_feature_t additionalDMRS;
/*
-- Max coding rate to determine how to feedback UCI on PUCCH for format 2, 3 or 4
-- Corresponds to L1 parameter 'PUCCH-F2-maximum-coderate', 'PUCCH-F3-maximum-coderate' and 'PUCCH-F4-maximum-coderate'
-- (see 38.213, section 9.2.5)
-- The field is not applicable for format 1.
*/
PUCCH_MaxCodeRate_t maxCodeRate;
/*
-- Number of slots with the same PUCCH F1, F3 or F4. When the field is absent the UE applies the value n1.
-- Corresponds to L1 parameter 'PUCCH-F1-number-of-slots', 'PUCCH-F3-number-of-slots' and 'PUCCH-F4-number-of-slots'
-- (see 38.213, section 9.2.6)
-- The field is not applicable for format 2.
*/
uint8_t nrofSlots;
/*
-- Enabling pi/2 BPSK for UCI symbols instead of QPSK for PUCCH.
-- Corresponds to L1 parameter 'PUCCH-PF3-PF4-pi/2PBSK' (see 38.213, section 9.2.5)
-- The field is not applicable for format 1 and 2.
*/
feature_status_t pi2PBSK;
/*
-- Enabling simultaneous transmission of CSI and HARQ-ACK feedback with or without SR with PUCCH Format 2, 3 or 4
-- Corresponds to L1 parameter 'PUCCH-F2-Simultaneous-HARQ-ACK-CSI', 'PUCCH-F3-Simultaneous-HARQ-ACK-CSI' and
-- 'PUCCH-F4-Simultaneous-HARQ-ACK-CSI' (see 38.213, section 9.2.5)
-- When the field is absent the UE applies the value OFF
-- The field is not applicable for format 1.
*/
enable_feature_t simultaneousHARQ_ACK_CSI;
/*
-- Configuration of group- and sequence hopping for all the PUCCH formats 0, 1, 3 and 4. "neither" implies neither group
-- or sequence hopping is enabled. "enable" enables group hopping and disables sequence hopping. "disable"” disables group
-- hopping and enables sequence hopping. Corresponds to L1 parameter 'PUCCH-GroupHopping' (see 38.211, section 6.4.1.3)
pucch-GroupHopping ENUMERATED { neither, enable, disable },
*/
pucch_GroupHopping_t pucch_GroupHopping;
/*
-- Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled.
-- Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2)
hoppingId BIT STRING (SIZE (10)) OPTIONAL, -- Need R
*/
uint16_t hoppingId;
/*
-- Power control parameter P0 for PUCCH transmissions. Value in dBm. Only even values (step size 2) allowed.
-- Corresponds to L1 parameter 'p0-nominal-pucch' (see 38.213, section 7.2)
p0-nominal INTEGER (-202..24) OPTIONAL, -- Need R
*/
int8_t p0_nominal;
int8_t deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR];
uint8_t p0_PUCCH_Id; /* INTEGER (1..8) */
int8_t p0_PUCCH_Value;
// pathlossReferenceRSs SEQUENCE (SIZE (1..maxNrofPUCCH-PathlossReferenceRSs)) OF PUCCH-PathlossReferenceRS OPTIONAL, -- Need M
int8_t twoPUCCH_PC_AdjustmentStates;
} fapi_nr_ul_config_pucch_pdu; } fapi_nr_ul_config_pucch_pdu;
typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t; typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
typedef struct{ typedef struct{
uint8_t aperiodicSRS_ResourceTrigger; uint8_t aperiodicSRS_ResourceTrigger;
......
...@@ -18,5 +18,6 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER' ...@@ -18,5 +18,6 @@ alias oailte='cd $OPENAIR_TARGETS/RT/USER'
alias oais='cd $OPENAIR_TARGETS/SIMU/USER' alias oais='cd $OPENAIR_TARGETS/SIMU/USER'
alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES' alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES'
export IIOD_REMOTE=192.168.121.32 #export IIOD_REMOTE=192.168.121.32
export IIOD_REMOTE=192.168.1.11
...@@ -91,7 +91,7 @@ uint16_t nr_pbch_extract(int **rxdataF, ...@@ -91,7 +91,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
for (rb=0; rb<20; rb++) { for (rb=0; rb<20; rb++) {
j=0; j=0;
if (symbol==1 || symbol==7) { if (symbol==1 || symbol==3) {
for (i=0; i<12; i++) { for (i=0; i<12; i++) {
if ((i!=nushiftmod4) && if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) && (i!=(nushiftmod4+4)) &&
...@@ -147,7 +147,7 @@ uint16_t nr_pbch_extract(int **rxdataF, ...@@ -147,7 +147,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
for (rb=0; rb<20; rb++) { for (rb=0; rb<20; rb++) {
j=0; j=0;
if (symbol==1 || symbol==7) { if (symbol==1 || symbol==3) {
for (i=0; i<12; i++) { for (i=0; i<12; i++) {
if ((i!=nushiftmod4) && if ((i!=nushiftmod4) &&
(i!=(nushiftmod4+4)) && (i!=(nushiftmod4+4)) &&
......
This diff is collapsed.
...@@ -82,6 +82,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue, ...@@ -82,6 +82,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
uint8_t timeDomainOCC, uint8_t timeDomainOCC,
uint8_t nr_bit); uint8_t nr_bit);
void nr_generate_pucch2(PHY_VARS_NR_UE *ue, void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF, int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated, PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
...@@ -94,6 +95,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, ...@@ -94,6 +95,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint16_t startingPRB, uint16_t startingPRB,
uint8_t nr_bit); uint8_t nr_bit);
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint16_t crnti,
int32_t **txdataF, int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt, pucch_format_nr_t fmt,
...@@ -397,7 +399,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, ...@@ -397,7 +399,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
*/ */
int16_t table_6_3_2_4_1_2_Wi_Re[8][7][7] = { int16_t table_6_3_2_4_1_2_Wi_Re[8][7][7] = {
{{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}}, {{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}}, {{32767,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,0,0,0,0,0}, {32767,-32767,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}}, {{32767,32767,0,0,0,0,0}, {32767,-32767,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,32767,0,0,0,0}, {32767,-16384,-16384,0,0,0,0}, {32767,-16384,-16384,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}}, {{32767,32767,32767,0,0,0,0}, {32767,-16384,-16384,0,0,0,0}, {32767,-16384,-16384,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
{{32767,32767,32767,32767,0,0,0}, {32767,-32767,32767,-32767,0,0,0}, {32767,32767,-32767,-32767,0,0,0}, {32767,-32767,-32767,32767,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}}, {{32767,32767,32767,32767,0,0,0}, {32767,-32767,32767,-32767,0,0,0}, {32767,32767,-32767,-32767,0,0,0}, {32767,-32767,-32767,32767,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}, {0,0,0,0,0,0,0}},
......
...@@ -59,9 +59,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024]; ...@@ -59,9 +59,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192]; unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#include "SIMULATION/ETH_TRANSPORT/vars.h" #include "SIMULATION/ETH_TRANSPORT/vars.h"
......
...@@ -55,9 +55,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024]; ...@@ -55,9 +55,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192]; unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#include "SIMULATION/ETH_TRANSPORT/vars.h" #include "SIMULATION/ETH_TRANSPORT/vars.h"
......
...@@ -54,10 +54,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024]; ...@@ -54,10 +54,6 @@ unsigned short rev[2048],rev_times4[8192],rev_half[1024];
unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192]; unsigned short rev256[256],rev512[512],rev1024[1024],rev4096[4096],rev2048[2048],rev8192[8192];
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#include "SIMULATION/ETH_TRANSPORT/vars.h" #include "SIMULATION/ETH_TRANSPORT/vars.h"
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
//#include "PHY/phy_vars_nr_ue.h" //#include "PHY/phy_vars_nr_ue.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "PHY/impl_defs_nr.h"
extern PHY_VARS_NR_UE ***PHY_vars_UE_g; extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
...@@ -51,10 +52,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -51,10 +52,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0]; NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0]; NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0]; NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
if(scheduled_response->dl_config != NULL){ if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config; fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
for(i=0; i<dl_config->number_pdus; ++i){ for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){ if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
...@@ -143,6 +148,52 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -143,6 +148,52 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv; ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
} }
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
// pucch config pdu
fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
uint8_t pucch_resource_id = 0; //FIXME!!!
uint8_t format = 1; // FIXME!!!
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
}
if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
// prach config pdu
fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;
prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
}
} }
}else{ }else{
......
...@@ -373,7 +373,7 @@ void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int ...@@ -373,7 +373,7 @@ void config_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, int
{ {
NR_UE_DLSCH_t *dlsch; NR_UE_DLSCH_t *dlsch;
//dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t)); dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch != NULL) { if (dlsch != NULL) {
......
...@@ -87,6 +87,8 @@ fifo_dump_emos_UE emos_dump_UE; ...@@ -87,6 +87,8 @@ fifo_dump_emos_UE emos_dump_UE;
#define NS_PER_SLOT 500000 #define NS_PER_SLOT 500000
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
extern double cpuf; extern double cpuf;
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
...@@ -3903,8 +3905,11 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t * ...@@ -3903,8 +3905,11 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
crc_scrambled_values, crc_scrambled_values,
ptr_nr_dci_info_extracted);//&nr_dci_info_extracted); ptr_nr_dci_info_extracted);//&nr_dci_info_extracted);
ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti; ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format; ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
ue->dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE;
ue->dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L;
ue->dci_ind.number_of_dcis = ue->dci_ind.number_of_dcis + 1;
memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) ); memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
//printf(">>> example mcs=%d\n",nr_dci_info_extracted.mcs); //printf(">>> example mcs=%d\n",nr_dci_info_extracted.mcs);
...@@ -6137,10 +6142,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN ...@@ -6137,10 +6142,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx); LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
/*if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1)) if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
{ {
ue_pbch_procedures(eNB_id,ue,proc,abstraction_flag); ue_pbch_procedures(eNB_id,ue,proc,abstraction_flag);
}*/ }
// do procedures for C-RNTI // do procedures for C-RNTI
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx); LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
......
...@@ -178,7 +178,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -178,7 +178,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int ri_status = 0; int ri_status = 0;
int csi_status = 0; int csi_status = 0;
int initial_pucch_id = NB_INITIAL_PUCCH_RESOURCE;; int initial_pucch_id = NB_INITIAL_PUCCH_RESOURCE;
int pucch_resource_set = MAX_NB_OF_PUCCH_RESOURCE_SETS; int pucch_resource_set = MAX_NB_OF_PUCCH_RESOURCE_SETS;
int pucch_resource_id = MAX_NB_OF_PUCCH_RESOURCES; int pucch_resource_id = MAX_NB_OF_PUCCH_RESOURCES;
int pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR; int pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR;
...@@ -587,7 +587,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -587,7 +587,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
} }
case pucch_format2_nr: case pucch_format2_nr:
{ {
nr_generate_pucch2(ue,ue->common_vars.txdataF, nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms, &ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id], &ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload, pucch_payload,
...@@ -603,7 +605,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -603,7 +605,9 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format3_nr: case pucch_format3_nr:
case pucch_format4_nr: case pucch_format4_nr:
{ {
nr_generate_pucch3_4(ue,ue->common_vars.txdataF, nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms, &ue->frame_parms,
format, format,
&ue->pucch_config_dedicated_nr[gNB_id], &ue->pucch_config_dedicated_nr[gNB_id],
...@@ -871,6 +875,10 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size ...@@ -871,6 +875,10 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size
else { else {
/* see TS 38.213 9.2.1 PUCCH Resource Sets */ /* see TS 38.213 9.2.1 PUCCH Resource Sets */
int delta_PRI = harq_status->pucch_resource_indicator; int delta_PRI = harq_status->pucch_resource_indicator;
// n_CCE can be obtained from ue->dci_ind.dci_list[i].n_CCE. FIXME!!!
// N_CCE can be obtained from ue->dci_ind.dci_list[i].N_CCE. FIXME!!!
//int n_CCE = ue->dci_ind.dci_list[0].n_CCE;
//int N_CCE = ue->dci_ind.dci_list[0].N_CCE;
int n_CCE_0 = harq_status->n_CCE; int n_CCE_0 = harq_status->n_CCE;
int N_CCE_0 = harq_status->N_CCE; int N_CCE_0 = harq_status->N_CCE;
if (N_CCE_0 == 0) { if (N_CCE_0 == 0) {
......
...@@ -71,6 +71,8 @@ ...@@ -71,6 +71,8 @@
#define NS_PER_SLOT 500000 #define NS_PER_SLOT 500000
char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};