Commit 2b64cb8f authored by Rohit Gupta's avatar Rohit Gupta
Browse files

Merge branch 'develop' into feature-34-test_framework

parents c2598500 e2fbe8be
...@@ -32,8 +32,8 @@ job1: ...@@ -32,8 +32,8 @@ job1:
- sshpass -p "$OAI_PASS" rsync -az -e "ssh -o StrictHostKeyChecking=no " --rsync-path="mkdir -p $NFS_TEST_RESULTS_DIR && rsync" $OPENAIR_DIR/cmake_targets/autotests/log $OAI_USER@localhost:$NFS_TEST_RESULTS_DIR - sshpass -p "$OAI_PASS" rsync -az -e "ssh -o StrictHostKeyChecking=no " --rsync-path="mkdir -p $NFS_TEST_RESULTS_DIR && rsync" $OPENAIR_DIR/cmake_targets/autotests/log $OAI_USER@localhost:$NFS_TEST_RESULTS_DIR
- sshpass -p "$OAI_PASS" rsync -az -e "ssh -o StrictHostKeyChecking=no " --rsync-path="mkdir -p $EXTERNAL_SHARE_DIR && rsync" $OPENAIR_DIR/cmake_targets/autotests/log $OAI_USER@localhost:$EXTERNAL_SHARE_DIR - sshpass -p "$OAI_PASS" rsync -az -e "ssh -o StrictHostKeyChecking=no " --rsync-path="mkdir -p $EXTERNAL_SHARE_DIR && rsync" $OPENAIR_DIR/cmake_targets/autotests/log $OAI_USER@localhost:$EXTERNAL_SHARE_DIR
- cat $OPENAIR_DIR/cmake_targets/autotests/log/results_autotests.xml - cat $OPENAIR_DIR/cmake_targets/autotests/log/results_autotests.xml
- exce_log=`egrep -i 'warning|error|critical|exception' $NFS_TEST_RESULTS_DIR/log/python_autotest.log ` - exce_log=`egrep -i 'warning|error|critical|exception' $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest.log `
- if [ -n "$exce_log" ]; then echo -e "\e[31mThere are errors in $NFS_TEST_RESULTS_DIR/log/python_autotest.log. Please check the logs\e[0m" ; fi - if [ -n "$exce_log" ]; then echo -e "\e[31mThere are errors in $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest.log. Please check the logs\e[0m" ; fi
- exce_log=`egrep -i 'warning|error|critical|exception' $NFS_TEST_RESULTS_DIR/log/python_autotest_cleanup.log ` - exce_log=`egrep -i 'warning|error|critical|exception' $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest_cleanup.log `
- if [ -n "$exce_log" ]; then echo -e "\e[31mThere are errors in $NFS_TEST_RESULTS_DIR/log/python_autotest_cleanup.log. Please check the logs\e[0m" ; fi - if [ -n "$exce_log" ]; then echo -e "\e[31mThere are errors in $OPENAIR_DIR/cmake_targets/autotests/log/python_autotest_cleanup.log. Please check the logs\e[0m" ; fi
...@@ -1013,6 +1013,13 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo , ...@@ -1013,6 +1013,13 @@ def handle_testcaseclass_softmodem (testcase, oldprogramList, logdirOAI5GRepo ,
run_result=0 run_result=0
run_result_string = ' RUN_'+str(run) + ' = FAIL(Assert)' run_result_string = ' RUN_'+str(run) + ' = FAIL(Assert)'
#If there is thread busy error, we mark the test case as failure as most likely eNB crashed
cmd = "grep -ilr \"thread busy\" " + logdir_local_testcase + " | cat "
cmd_out = subprocess.check_output ([cmd], shell=True)
if not cmd_out:
run_result=0
run_result_string = ' RUN_'+str(run) + ' = FAIL(Thread_Busy)'
run_result_string = run_result_string + tput_run_string run_result_string = run_result_string + tput_run_string
test_result=test_result & run_result test_result=test_result & run_result
......
This diff is collapsed.
...@@ -60,7 +60,9 @@ function help() ...@@ -60,7 +60,9 @@ function help()
echo_error " -f, --rf-config-file filename RF specific configuration file" echo_error " -f, --rf-config-file filename RF specific configuration file"
echo_error " -K, --itti-dump-file filename ITTI dump file containing all ITTI events occuring during EPC runtime.(can omit file name if last argument)" echo_error " -K, --itti-dump-file filename ITTI dump file containing all ITTI events occuring during EPC runtime.(can omit file name if last argument)"
echo_error " -M, --target-dl-mcs mcs Downlink target MCS." echo_error " -M, --target-dl-mcs mcs Downlink target MCS."
echo_error " -m, --mscgen directory Generate mscgen output files in a directory" echo_error " -n, --T-no-wait don't wait for tracer, start immediately"
echo_error " -p, --T-port port use given port"
echo_error " -m, --mscgen directory Generate mscgen output files in a directory"
echo_error " -s, --show-stdout Do not redirect stdout and stderr to file /tmp/lte_softmodem.stdout.txt." echo_error " -s, --show-stdout Do not redirect stdout and stderr to file /tmp/lte_softmodem.stdout.txt."
echo_error " -S, --enable-missed-slot Continue execution in case of missed slot." echo_error " -S, --enable-missed-slot Continue execution in case of missed slot."
echo_error " -T, --target-ul-mcs mcs Uplink target MCS." echo_error " -T, --target-ul-mcs mcs Uplink target MCS."
...@@ -188,7 +190,17 @@ function main() ...@@ -188,7 +190,17 @@ function main()
exe_arguments="$exe_arguments -m $2" exe_arguments="$exe_arguments -m $2"
shift 2; shift 2;
;; ;;
-V | --vcd) -n | --T-no-wait)
echo "setting T tracer operation"
exe_arguments="$exe_arguments --T_nowait"
shift ;
;;
-p | --T-port)
echo "setting T tracer port"
exe_arguments="$exe_arguments --T_port $2"
shift 2;
;;
-V | --vcd)
echo "setting gtk-wave output" echo "setting gtk-wave output"
exe_arguments="$exe_arguments -V /tmp/oai_gtk_wave.vcd" exe_arguments="$exe_arguments -V /tmp/oai_gtk_wave.vcd"
shift ; shift ;
......
...@@ -1126,12 +1126,8 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1126,12 +1126,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch[0]->harq_ids[subframe] = harq_pid; dlsch[0]->harq_ids[subframe] = harq_pid;
if (dlsch0_harq->round == 0) { if (dlsch0_harq->round == 0)
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch[0], harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
}
break; break;
...@@ -1265,9 +1261,6 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1265,9 +1261,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if (dlsch0_harq->round == 0) { if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch[0], harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid); // printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
// MCS and TBS don't change across HARQ rounds // MCS and TBS don't change across HARQ rounds
...@@ -1635,19 +1628,11 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -1635,19 +1628,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
} }
// reset HARQ process if this is the first transmission // reset HARQ process if this is the first transmission
if (dlsch0_harq->round == 0) { if (dlsch0_harq->round == 0)
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
}
if (dlsch1_harq->round == 0) { if (dlsch1_harq->round == 0)
/* necessary test? */
if (dlsch1_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch1, harq_pid);
dlsch1_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE;
}
dlsch0->rnti = rnti; dlsch0->rnti = rnti;
dlsch1->rnti = rnti; dlsch1->rnti = rnti;
...@@ -2022,19 +2007,11 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2022,19 +2007,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
} }
// reset HARQ process if this is the first transmission // reset HARQ process if this is the first transmission
if ((dlsch0->active==1) && (dlsch0_harq->round == 0)) { if ((dlsch0->active==1) && (dlsch0_harq->round == 0))
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
}
if ((dlsch1->active==1) && (dlsch1_harq->round == 0)) { if ((dlsch1->active==1) && (dlsch1_harq->round == 0))
/* necessary test? */
if (dlsch1_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch1, harq_pid);
dlsch1_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE;
}
dlsch0->rnti = rnti; dlsch0->rnti = rnti;
dlsch1->rnti = rnti; dlsch1->rnti = rnti;
...@@ -2174,23 +2151,16 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2174,23 +2151,16 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// check if either TB is disabled (see 36-213 V8.6 p. 26) // check if either TB is disabled (see 36-213 V8.6 p. 26)
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) { if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0))
LOG_W(PHY, "what to do with respect to remove_harq_pid_from_freelist?\n");
dlsch0_harq->status = DISABLED; dlsch0_harq->status = DISABLED;
}
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) { if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0))
LOG_W(PHY, "what to do with respect to remove_harq_pid_from_freelist?\n");
dlsch1_harq->status = DISABLED; dlsch1_harq->status = DISABLED;
}
dlsch0_harq->Nl = 1; dlsch0_harq->Nl = 1;
if (dlsch0_harq->round == 0) { if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid); // printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
} }
...@@ -2355,17 +2325,11 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2355,17 +2325,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if ((dlsch0_harq->round == 0) && (dlsch0->active == 1) ) { if ((dlsch0_harq->round == 0) && (dlsch0->active == 1) ) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
dlsch0_harq->mcs = mcs1; dlsch0_harq->mcs = mcs1;
} }
if ((dlsch1_harq->round == 0) && (dlsch1->active == 1) ) { if ((dlsch1_harq->round == 0) && (dlsch1->active == 1) ) {
/* necessary test? */
if (dlsch1_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch1, harq_pid);
dlsch1_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE;
dlsch1_harq->mcs = mcs2; dlsch1_harq->mcs = mcs2;
} }
...@@ -2529,9 +2493,6 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2529,9 +2493,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if (dlsch0_harq->round == 0) { if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid); // printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
} }
...@@ -2661,9 +2622,6 @@ int generate_eNB_dlsch_params_from_dci(int frame, ...@@ -2661,9 +2622,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
// dlsch0_harq->Ndi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi; // dlsch0_harq->Ndi = ((DCI1E_5MHz_2A_M10PRB_TDD_t *)dci_pdu)->ndi;
if (dlsch0_harq->round == 0) { if (dlsch0_harq->round == 0) {
/* necessary test? */
if (dlsch0_harq->status == SCH_IDLE)
remove_harq_pid_from_freelist(dlsch0, harq_pid);
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",harq_pid); // printf("Setting DLSCH process %d to ACTIVE\n",harq_pid);
} }
......
...@@ -258,13 +258,6 @@ typedef struct { ...@@ -258,13 +258,6 @@ typedef struct {
uint8_t error_threshold; uint8_t error_threshold;
/// Pointers to 8 HARQ processes for the DLSCH /// Pointers to 8 HARQ processes for the DLSCH
LTE_DL_eNB_HARQ_t *harq_processes[8]; LTE_DL_eNB_HARQ_t *harq_processes[8];
/// circular list of free harq PIDs (the oldest come first)
/// (10 is arbitrary value, must be > to max number of DL HARQ processes in LTE)
int harq_pid_freelist[10];
/// the head position of the free list (if list is free then head=tail)
int head_freelist;
/// the tail position of the free list
int tail_freelist;
/// Number of soft channel bits /// Number of soft channel bits
uint32_t G; uint32_t G;
/// Codebook index for this dlsch (0,1,2,3) /// Codebook index for this dlsch (0,1,2,3)
......
...@@ -156,9 +156,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_ ...@@ -156,9 +156,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
for (i=0; i<10; i++) for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq; dlsch->harq_ids[i] = Mdlharq;
dlsch->head_freelist = 0;
dlsch->tail_freelist = 0;
for (i=0; i<Mdlharq; i++) { for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (LTE_DL_eNB_HARQ_t *)malloc16(sizeof(LTE_DL_eNB_HARQ_t)); dlsch->harq_processes[i] = (LTE_DL_eNB_HARQ_t *)malloc16(sizeof(LTE_DL_eNB_HARQ_t));
LOG_T(PHY, "Required mem size %d (bw scaling %d), dlsch->harq_processes[%d] %p\n", LOG_T(PHY, "Required mem size %d (bw scaling %d), dlsch->harq_processes[%d] %p\n",
...@@ -199,8 +196,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_ ...@@ -199,8 +196,6 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
msg("Can't get harq_p %d\n",i); msg("Can't get harq_p %d\n",i);
exit_flag=3; exit_flag=3;
} }
put_harq_pid_in_freelist(dlsch, i);
} }
if (exit_flag==0) { if (exit_flag==0) {
......
...@@ -55,7 +55,7 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue, ...@@ -55,7 +55,7 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
unsigned int rx_offset; unsigned int rx_offset;
void (*dft)(int16_t *,int16_t *, int); void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[2048]; // This is for misalignment issues for 6 and 15 PRBs int tmp_dft_in[2048] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
switch (frame_parms->ofdm_symbol_size) { switch (frame_parms->ofdm_symbol_size) {
case 128: case 128:
......
...@@ -400,9 +400,6 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui ...@@ -400,9 +400,6 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1); uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid);
int8_t find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB); int8_t find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB); int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rnti); int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rnti);
......
...@@ -155,10 +155,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -155,10 +155,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1; ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0; ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(50,10,3); ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(50,10,3);
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = subframe / 5;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1; ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1; ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = subframe % 5;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB ((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
} }
...@@ -233,10 +233,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -233,10 +233,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3); ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
...@@ -266,10 +266,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -266,10 +266,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3); ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(25,10,3);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rah = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
...@@ -304,10 +304,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -304,10 +304,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3); ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
...@@ -338,10 +338,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -338,10 +338,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3); ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(50,10,3);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rah = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
...@@ -375,10 +375,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -375,10 +375,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3); ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
...@@ -409,10 +409,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -409,10 +409,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3); ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc; //computeRIV(100,10,3);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = subframe % 5;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = subframe / 5;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rah = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
...@@ -451,13 +451,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -451,13 +451,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = subframe / 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = subframe / 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = subframe % 5;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
...@@ -473,13 +473,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -473,13 +473,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0; DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; DLSCH_alloc_pdu1E.ndi = subframe / 5;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]]; //DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28); //DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs; DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs; phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; DLSCH_alloc_pdu1E.harq_pid = subframe % 5;
DLSCH_alloc_pdu1E.dai = 0; DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0; DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc; DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
......
...@@ -133,30 +133,6 @@ uint8_t is_SR_subframe(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t sched_su ...@@ -133,30 +133,6 @@ uint8_t is_SR_subframe(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t sched_su
return(0); return(0);
} }
void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
{
DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->tail_freelist] = harq_pid;
DLSCH_ptr->tail_freelist = (DLSCH_ptr->tail_freelist + 1) % 10;
}
void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
{
if (DLSCH_ptr->head_freelist == DLSCH_ptr->tail_freelist) {
LOG_E(PHY, "%s:%d: you cannot read this!\n", __FILE__, __LINE__);
abort();
}
/* basic check, in case several threads deal with the free list at the same time
* in normal situations it should not happen, that's also why we don't use any
* locking mechanism to protect the free list
* to be refined in case things don't work properly
*/
if (harq_pid != DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]) {
LOG_E(PHY, "%s:%d: critical error, get in touch with the authors\n", __FILE__, __LINE__);
abort();
}
DLSCH_ptr->head_freelist = (DLSCH_ptr->head_freelist + 1) % 10;
}
int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB) int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB)
{ {
uint8_t i; uint8_t i;
...@@ -221,12 +197,6 @@ int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rntiP) { ...@@ -221,12 +197,6 @@ int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rntiP) {
memset(&phy_vars_eNB->eNB_UE_stats[i],0,sizeof(LTE_eNB_UE_stats)); memset(&phy_vars_eNB->eNB_UE_stats[i],0,sizeof(LTE_eNB_UE_stats));
// mac_exit_wrapper("Removing UE"); // mac_exit_wrapper("Removing UE");
/* clear the harq pid freelist */
phy_vars_eNB->dlsch_eNB[i][0]->head_freelist = 0;
phy_vars_eNB->dlsch_eNB[i][0]->tail_freelist = 0;
for (j = 0; j < 8; j++)
put_harq_pid_in_freelist(phy_vars_eNB->dlsch_eNB[i][0], j);
return(i); return(i);
} }
} }
...@@ -258,9 +228,8 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16 ...@@ -258,9 +228,8 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
LTE_eNB_DLSCH_t *DLSCH_ptr;