diff --git a/cmake_targets/CMakeLists.txt b/cmake_targets/CMakeLists.txt
index 6437bfe8e2e2f2f75d66a722adfff861f042d29b..c4e2399351da779e7367aeef57e8601c6a15b0f5 100644
--- a/cmake_targets/CMakeLists.txt
+++ b/cmake_targets/CMakeLists.txt
@@ -963,7 +963,7 @@ set(UTIL_SRC
${OPENAIR_DIR}/common/utils/LOG/log.c
# ${OPENAIR2_DIR}/UTIL/LOG/vcd_signal_dumper.c
${OPENAIR2_DIR}/UTIL/MATH/oml.c
- ${OPENAIR2_DIR}/UTIL/MEM/mem_block.c
+# ${OPENAIR2_DIR}/UTIL/MEM/mem_block.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG_create_dir.c
# ${OPENAIR2_DIR}/UTIL/OCG/OCG_detect_file.c
@@ -1652,8 +1652,9 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/CODING/viterbi.c
#${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
- ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
- #${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
+
+# ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
+# ${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c
@@ -2561,13 +2562,13 @@ add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest SIMU PHY PHY_NR m ${ATLAS_LIBRARIES})
add_executable(nr_dlschsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c ${T_SOURCE})
-target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
+target_link_libraries(nr_dlschsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
add_executable(nr_pbchsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c ${T_SOURCE})
target_link_libraries(nr_pbchsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
-add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
-target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
+add_executable(nr_dlsim ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlsim.c ${T_SOURCE})
+target_link_libraries(nr_dlsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_NR MAC_UE_NR RRC_LIB NR_RRC_LIB CONFIG_LIB L2_NR -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
diff --git a/cmake_targets/autotests/test_case_list.xml b/cmake_targets/autotests/test_case_list.xml
index 4c4ed12ca5ea178e111af576c958e2f4cbe2b2b5..c54c3e33220de5427c1007ea5f393efafca772b8 100644
--- a/cmake_targets/autotests/test_case_list.xml
+++ b/cmake_targets/autotests/test_case_list.xml
@@ -1035,14 +1035,16 @@
<testCase id="015103">
<class>execution</class>
- <desc>polartest Test cases. (Test1: PBCH polar test)</desc>
+ <desc>polartest Test cases. (Test1: PBCH polar test),
+ (Test2: DCI polar test)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/polartest.Rel15</main_exec>
- <main_exec_args>-q -s-10 -f0</main_exec_args>
+ <main_exec_args>-q -s-10 -f0
+ -q -s-10 -f0 -m1</main_exec_args>
<tags>polartest.test1</tags>
<search_expr_true>BLER= 0.000000</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
@@ -1051,16 +1053,24 @@
<testCase id="015104">
<class>execution</class>
- <desc>nr_pbchsim Test cases. (Test1: PBCH-only),
- (Test2: PBCH and synchronization)</desc>
+ <desc>nr_pbchsim Test cases. (Test1: PBCH-only, 106 PRB),
+ (Test2: PBCH and synchronization, 106PBR),
+ (Test3: PBCH-only, 217 PRB),
+ (Test4: PBCH and synchronization, 217 RPB),
+ (Test5: PBCH-only, 217 PRB),
+ (Test6: PBCH and synchronization, 217 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
- <main_exec_args>-s-11 -S-10 -n1000
- -s-11 -S-10 -n10 -I</main_exec_args>
+ <main_exec_args>-s-11 -S-10 -n1000 -R106
+ -s-11 -S-10 -n10 -I -R106
+ -s-11 -S-10 -n1000 -R217 -N10
+ -s-11 -S-10 -n10 -I -R217 -N10
+ -s-11 -S-10 -n1000 -R273 -N20
+ -s-11 -S-10 -n10 -I -R273 -N20</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2</tags>
<search_expr_true>PBCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
diff --git a/cmake_targets/phy_simulators/CMakeLists.txt b/cmake_targets/phy_simulators/CMakeLists.txt
index 3ca13e722e9de3ec1dcd08ee56c5a6685c45ee92..4347189bc2183d7d0b3e689834c7ec46ab42df9e 100644
--- a/cmake_targets/phy_simulators/CMakeLists.txt
+++ b/cmake_targets/phy_simulators/CMakeLists.txt
@@ -3,11 +3,11 @@ set(PACKAGE_NAME "unitary_tests_simulators")
set(PHYSIM True)
set(RF_BOARD None)
set(XFORMS True)
-set(ENABLE_ITTI False)
+set(ENABLE_ITTI True)
set(DEBUG_PHY False)
set(MU_RECIEVER False)
set(NAS_UE False)
set(MESSAGE_CHART_GENERATOR False)
-set(RRC_ASN1_VERSION "Rel14")
+set(RRC_ASN1_VERSION "Rel15")
set(T_TRACER True)
include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)
diff --git a/common/utils/LOG/vcd_signal_dumper.c b/common/utils/LOG/vcd_signal_dumper.c
index cb28be85501f164a814b49d0bb29aacc4604bc9a..12971c3761ba9e7ca11a05877e4d227a4b9ebd2f 100644
--- a/common/utils/LOG/vcd_signal_dumper.c
+++ b/common/utils/LOG/vcd_signal_dumper.c
@@ -74,10 +74,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_RU",
"frame_number_RX0_RU",
"frame_number_RX1_RU",
- "subframe_number_TX0_RU",
- "subframe_number_TX1_RU",
- "subframe_number_RX0_RU",
- "subframe_number_RX1_RU",
+ "tti_number_TX0_RU",
+ "tti_number_TX1_RU",
+ "tti_number_RX0_RU",
+ "tti_number_RX1_RU",
"runtime_TX_eNB",
"runtime_RX_eNB",
"frame_number_TX0_UE",
@@ -196,10 +196,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_gNB",
"frame_number_RX0_gNB",
"frame_number_RX1_gNB",
- "subframe_number_TX0_gNB",
- "subframe_number_TX1_gNB",
- "subframe_number_RX0_gNB",
- "subframe_number_RX1_gNB"
+ "slot_number_TX0_gNB",
+ "slot_number_TX1_gNB",
+ "slot_number_RX0_gNB",
+ "slot_number_RX1_gNB"
};
const char* eurecomFunctionsNames[] = {
diff --git a/common/utils/LOG/vcd_signal_dumper.h b/common/utils/LOG/vcd_signal_dumper.h
index 5c1ba9e7fe1c878d499105f9fb37e00cd6d72143..7b439d4dd5555a131f5d3cc85dafb915a18fa9f9 100644
--- a/common/utils/LOG/vcd_signal_dumper.h
+++ b/common/utils/LOG/vcd_signal_dumper.h
@@ -51,10 +51,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_RU,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_RU,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_RU,
+ VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU,
+ VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX1_RU,
+ VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU,
+ VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_TX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_RX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_UE,
@@ -173,10 +173,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,
- VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,
+ VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,
+ VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,
+ VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,
+ VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_END
} vcd_signal_dump_variables;
diff --git a/common/utils/T/T_messages.txt b/common/utils/T/T_messages.txt
index 6057c09f1c930a18b0e7fd07eefdcf7c0779a1e2..10dc5fb07cccb3db8b1806749bf38b4a3e6faad5 100644
--- a/common/utils/T/T_messages.txt
+++ b/common/utils/T/T_messages.txt
@@ -1099,26 +1099,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_RU
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_RU
- DESC = VCD variable SUBFRAME_NUMBER_TX0_RU
+ID = VCD_VARIABLE_TTI_NUMBER_TX0_RU
+ DESC = VCD variable TTI_NUMBER_TX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_TX0_RU
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_RU
- DESC = VCD variable SUBFRAME_NUMBER_TX1_RU
+ VCD_NAME = tti_number_TX0_RU
+ID = VCD_VARIABLE_TTI_NUMBER_TX1_RU
+ DESC = VCD variable TTI_NUMBER_TX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_TX1_RU
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_RU
- DESC = VCD variable SUBFRAME_NUMBER_RX0_RU
+ VCD_NAME = tti_number_TX1_RU
+ID = VCD_VARIABLE_TTI_NUMBER_RX0_RU
+ DESC = VCD variable TTI_NUMBER_RX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_RX0_RU
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_RU
- DESC = VCD variable SUBFRAME_NUMBER_RX1_RU
+ VCD_NAME = tti_number_RX0_RU
+ID = VCD_VARIABLE_TTI_NUMBER_RX1_RU
+ DESC = VCD variable TTI_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_RX1_RU
+ VCD_NAME = tti_number_RX1_RU
ID = VCD_VARIABLE_RUNTIME_TX_ENB
DESC = VCD variable RUNTIME_TX_ENB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
@@ -1701,26 +1701,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_gNB
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_GNB
- DESC = VCD variable SUBFRAME_NUMBER_TX0_GNB
+ID = VCD_VARIABLE_SLOT_NUMBER_TX0_GNB
+ DESC = VCD variable SLOT_NUMBER_TX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_TX0_gNB
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_GNB
- DESC = VCD variable SUBFRAME_NUMBER_TX1_GNB
+ VCD_NAME = slot_number_TX0_gNB
+ID = VCD_VARIABLE_SLOT_NUMBER_TX1_GNB
+ DESC = VCD variable SLOT_NUMBER_TX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_TX1_gNB
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_GNB
- DESC = VCD variable SUBFRAME_NUMBER_RX0_GNB
+ VCD_NAME = slot_number_TX1_gNB
+ID = VCD_VARIABLE_SLOT_NUMBER_RX0_GNB
+ DESC = VCD variable SLOT_NUMBER_RX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_RX0_gNB
-ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_GNB
- DESC = VCD variable SUBFRAME_NUMBER_RX1_GNB
+ VCD_NAME = slot_number_RX0_gNB
+ID = VCD_VARIABLE_SLOT_NUMBER_RX1_GNB
+ DESC = VCD variable SLOT_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
- VCD_NAME = subframe_number_RX1_gNB
+ VCD_NAME = slot_number_RX1_gNB
#functions
diff --git a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
index 1396faced85342c72c657aeb3ea13d7c007bea2c..838e52dadae63b179706b379197d74fba7c75c01 100644
--- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
@@ -24,119 +24,119 @@
#include "PHY/impl_defs_nr.h"
/*
-typedef unsigned int uint32_t;
-typedef unsigned short uint16_t;
-typedef unsigned char uint8_t;
-typedef signed int int32_t;
-typedef signed short int16_t;
-typedef signed char int8_t;
+ typedef unsigned int uint32_t;
+ typedef unsigned short uint16_t;
+ typedef unsigned char uint8_t;
+ typedef signed int int32_t;
+ typedef signed short int16_t;
+ typedef signed char int8_t;
*/
typedef struct {
- uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
- uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
- uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
- uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
- uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
- uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
- uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
- uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
- uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
- uint8_t short_messages ; // 9 SHORT_MESSAGES:
- uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
- // (NOTE 1) If DCI format 0_0 is monitored in common search space
- // and if the number of information bits in the DCI format 0_0 prior to padding
- // is larger than the payload size of the DCI format 1_0 monitored in common search space
- // the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
- // is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
- uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
- uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
- // where I the number of entries in the higher layer parameter pusch-AllocationList
- uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
- uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
- uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
- uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
- uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
- uint8_t tb1_mcs ; // 18 TB1_MCS:
- uint8_t tb1_ndi ; // 19 TB1_NDI:
- uint8_t tb1_rv ; // 20 TB1_RV:
- uint8_t tb2_mcs ; // 21 TB2_MCS:
- uint8_t tb2_ndi ; // 22 TB2_NDI:
- uint8_t tb2_rv ; // 23 TB2_RV:
- uint8_t mcs ; // 24 MCS:
- uint8_t ndi ; // 25 NDI:
- uint8_t rv ; // 26 RV:
- uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
- uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
- // 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
- // 0 otherwise
- uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
- uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
- uint8_t tb_scaling ; // 31 TB_SCALING:
- uint8_t tpc_pusch ; // 32 TPC_PUSCH:
- uint8_t tpc_pucch ; // 33 TPC_PUCCH:
- uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
- uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
- uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
- uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
- uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
- uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
- uint8_t srs_request ; // 40 SRS_REQUEST:
- uint8_t tpc_cmd ; // 41 TPC_CMD:
- uint8_t csi_request ; // 42 CSI_REQUEST:
- uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
- uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
- uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
- uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
- uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
- // is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
- uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
- uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
- // and if the number of information bits in the DCI format 0_0 prior to padding
- // is less than the payload size of the DCI format 1_0 monitored in common search space
- // zeros shall be appended to the DCI format 0_0
- // until the payload size equals that of the DCI format 1_0
- uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
- uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
- uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
- uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
- uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
- uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
+ uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
+ uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
+ uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
+ uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
+ uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
+ uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
+ uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
+ uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
+ uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
+ uint8_t short_messages ; // 9 SHORT_MESSAGES:
+ uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
+ // (NOTE 1) If DCI format 0_0 is monitored in common search space
+ // and if the number of information bits in the DCI format 0_0 prior to padding
+ // is larger than the payload size of the DCI format 1_0 monitored in common search space
+ // the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
+ // is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
+ uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
+ uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
+ // where I the number of entries in the higher layer parameter pusch-AllocationList
+ uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
+ uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
+ uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
+ uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
+ uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
+ uint8_t tb1_mcs ; // 18 TB1_MCS:
+ uint8_t tb1_ndi ; // 19 TB1_NDI:
+ uint8_t tb1_rv ; // 20 TB1_RV:
+ uint8_t tb2_mcs ; // 21 TB2_MCS:
+ uint8_t tb2_ndi ; // 22 TB2_NDI:
+ uint8_t tb2_rv ; // 23 TB2_RV:
+ uint8_t mcs ; // 24 MCS:
+ uint8_t ndi ; // 25 NDI:
+ uint8_t rv ; // 26 RV:
+ uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
+ uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
+ // 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
+ // 0 otherwise
+ uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
+ uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
+ uint8_t tb_scaling ; // 31 TB_SCALING:
+ uint8_t tpc_pusch ; // 32 TPC_PUSCH:
+ uint8_t tpc_pucch ; // 33 TPC_PUCCH:
+ uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
+ uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
+ uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
+ uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
+ uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
+ uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
+ uint8_t srs_request ; // 40 SRS_REQUEST:
+ uint8_t tpc_cmd ; // 41 TPC_CMD:
+ uint8_t csi_request ; // 42 CSI_REQUEST:
+ uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
+ uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
+ uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
+ uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
+ uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
+ // is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
+ uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
+ uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
+ // and if the number of information bits in the DCI format 0_0 prior to padding
+ // is less than the payload size of the DCI format 1_0 monitored in common search space
+ // zeros shall be appended to the DCI format 0_0
+ // until the payload size equals that of the DCI format 1_0
+ uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
+ uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
+ uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
+ uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
+ uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
+ uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} fapi_nr_dci_pdu_rel15_t;
typedef struct {
- uint8_t uci_format;
- uint8_t uci_channel;
- uint8_t harq_ack_bits;
- uint32_t harq_ack;
- uint8_t csi_bits;
- uint32_t csi;
- uint8_t sr_bits;
- uint32_t sr;
+ uint8_t uci_format;
+ uint8_t uci_channel;
+ uint8_t harq_ack_bits;
+ uint32_t harq_ack;
+ uint8_t csi_bits;
+ uint32_t csi;
+ uint8_t sr_bits;
+ uint32_t sr;
} fapi_nr_uci_pdu_rel15_t;
- typedef struct {
- /// frequency_domain_resource;
- //uint32_t rb_start;
- //uint32_t rb_end;
- uint64_t frequency_domain_resource;
- uint16_t rb_offset;
-
- uint8_t duration;
- uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
- uint8_t cce_reg_interleaved_reg_bundle_size; // valid if CCE to REG mapping type is interleaved type
- uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
- uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
- uint8_t precoder_granularity;
- uint16_t pdcch_dmrs_scrambling_id;
-
- uint8_t tci_state_pdcch;
- uint8_t tci_present_in_dci;
- } fapi_nr_coreset_t;
+typedef struct {
+ /// frequency_domain_resource;
+ //uint32_t rb_start;
+ //uint32_t rb_end;
+ uint64_t frequency_domain_resource;
+ uint16_t rb_offset;
+
+ uint8_t duration;
+ uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
+ uint8_t cce_reg_interleaved_reg_bundle_size; // valid if CCE to REG mapping type is interleaved type
+ uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
+ uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
+ uint8_t precoder_granularity;
+ uint16_t pdcch_dmrs_scrambling_id;
+
+ uint8_t tci_state_pdcch;
+ uint8_t tci_present_in_dci;
+} fapi_nr_coreset_t;
//
// Top level FAPI messages
@@ -148,79 +148,80 @@ typedef struct {
// P7
//
- typedef struct {
- uint16_t rnti;
- uint8_t dci_format;
- // n_CCE index of first CCE for PDCCH reception
- int n_CCE;
- // N_CCE is L, or number of CCEs for DCI
- int N_CCE;
- fapi_nr_dci_pdu_rel15_t dci;
- } fapi_nr_dci_indication_pdu_t;
+typedef struct {
+ uint16_t rnti;
+ uint8_t dci_format;
+ // n_CCE index of first CCE for PDCCH reception
+ int n_CCE;
+ // N_CCE is L, or number of CCEs for DCI
+ int N_CCE;
+ fapi_nr_dci_pdu_rel15_t dci;
+} fapi_nr_dci_indication_pdu_t;
///
typedef struct {
- uint32_t sfn_slot;
- uint16_t number_of_dcis;
- fapi_nr_dci_indication_pdu_t dci_list[10];
+ uint32_t sfn_slot;
+ uint16_t number_of_dcis;
+ fapi_nr_dci_indication_pdu_t dci_list[10];
} fapi_nr_dci_indication_t;
- typedef struct {
- uint32_t pdu_length;
- uint8_t* pdu;
- } fapi_nr_pdsch_pdu_t;
+typedef struct {
+ uint32_t pdu_length;
+ uint8_t* pdu;
+} fapi_nr_pdsch_pdu_t;
- typedef struct {
- uint8_t* pdu; // 3bytes
- uint8_t additional_bits;
- uint8_t ssb_index;
- uint8_t ssb_length;
- uint16_t cell_id;
+typedef struct {
+ uint8_t* pdu; // 3bytes
+ uint8_t additional_bits;
+ uint8_t ssb_index;
+ uint8_t ssb_length;
+ uint16_t cell_id;
- } fapi_nr_mib_pdu_t;
+} fapi_nr_mib_pdu_t;
- typedef struct {
- uint32_t pdu_length;
- uint8_t* pdu;
- uint32_t sibs_mask;
- } fapi_nr_sib_pdu_t;
-
- typedef struct {
- uint8_t pdu_type;
- union {
- fapi_nr_pdsch_pdu_t pdsch_pdu;
- fapi_nr_mib_pdu_t mib_pdu;
- fapi_nr_sib_pdu_t sib_pdu;
- };
- } fapi_nr_rx_indication_body_t;
+typedef struct {
+ uint32_t pdu_length;
+ uint8_t* pdu;
+ uint32_t sibs_mask;
+} fapi_nr_sib_pdu_t;
+
+typedef struct {
+ uint8_t pdu_type;
+ union {
+ fapi_nr_pdsch_pdu_t pdsch_pdu;
+ fapi_nr_mib_pdu_t mib_pdu;
+ fapi_nr_sib_pdu_t sib_pdu;
+ };
+} fapi_nr_rx_indication_body_t;
///
+#define NFAPI_RX_IND_MAX_PDU 100
typedef struct {
- uint32_t sfn_slot;
- uint16_t number_pdus;
- fapi_nr_rx_indication_body_t *rx_indication_body;
+ uint32_t sfn_slot;
+ uint16_t number_pdus;
+ fapi_nr_rx_indication_body_t rx_indication_body[NFAPI_RX_IND_MAX_PDU];
} fapi_nr_rx_indication_t;
- typedef struct {
- uint8_t ul_cqi;
- uint16_t timing_advance;
- uint16_t rnti;
- } fapi_nr_tx_config_t;
+typedef struct {
+ uint8_t ul_cqi;
+ uint16_t timing_advance;
+ uint16_t rnti;
+} fapi_nr_tx_config_t;
- typedef struct {
- uint16_t pdu_length;
- uint16_t pdu_index;
- uint8_t* pdu;
- } fapi_nr_tx_request_body_t;
+typedef struct {
+ uint16_t pdu_length;
+ uint16_t pdu_index;
+ uint8_t* pdu;
+} fapi_nr_tx_request_body_t;
///
typedef struct {
- uint32_t sfn_slot;
- fapi_nr_tx_config_t tx_config;
- uint16_t number_of_pdus;
- fapi_nr_tx_request_body_t *tx_request_body;
+ uint32_t sfn_slot;
+ fapi_nr_tx_config_t tx_config;
+ uint16_t number_of_pdus;
+ fapi_nr_tx_request_body_t *tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
@@ -240,7 +241,7 @@ typedef struct {
uint16_t prach_freq_offset;
} fapi_nr_ul_config_prach_pdu;
- typedef struct {
+typedef struct {
pucch_format_nr_t format; /* format 0 1 2 3 4 */
uint8_t initialCyclicShift; /* x x */
@@ -353,104 +354,105 @@ typedef struct {
uint8_t beta_offset_ind;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
- typedef struct {
- uint16_t rnti;
- fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
- } fapi_nr_ul_config_pusch_pdu;
+typedef struct {
+ uint16_t rnti;
+ fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
+} fapi_nr_ul_config_pusch_pdu;
- typedef struct {
+typedef struct {
- } fapi_nr_ul_config_srs_pdu;
+} fapi_nr_ul_config_srs_pdu;
- typedef struct {
- uint8_t pdu_type;
- union {
- fapi_nr_ul_config_prach_pdu prach_config_pdu;
- fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
- fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
- fapi_nr_ul_config_srs_pdu srs_config_pdu;
- };
- } fapi_nr_ul_config_request_pdu_t;
+typedef struct {
+ uint8_t pdu_type;
+ union {
+ fapi_nr_ul_config_prach_pdu prach_config_pdu;
+ fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
+ fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
+ fapi_nr_ul_config_srs_pdu srs_config_pdu;
+ };
+} fapi_nr_ul_config_request_pdu_t;
typedef struct {
- uint32_t sfn_slot;
- uint8_t number_pdus;
- fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
+ uint32_t sfn_slot;
+ uint8_t number_pdus;
+ fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
- typedef struct {
- uint16_t rnti;
-
- fapi_nr_coreset_t coreset;
- uint32_t duration;
- uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
- uint16_t monitoring_symbols_within_slot;
- // DCI foramt-specific
- uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
- uint8_t format_2_3_monitorying_periodicity;
- uint8_t format_2_3_number_of_candidates;
- } fapi_nr_dl_config_dci_dl_pdu_rel15_t;
+typedef struct {
+ uint16_t rnti;
+
+ fapi_nr_coreset_t coreset;
+ uint16_t N_RB_BWP;
+ uint32_t duration;
+ uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
+ uint16_t monitoring_symbols_within_slot;
+ // DCI foramt-specific
+ uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
+ uint8_t format_2_3_monitorying_periodicity;
+ uint8_t format_2_3_number_of_candidates;
+} fapi_nr_dl_config_dci_dl_pdu_rel15_t;
- typedef struct {
- fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
- } fapi_nr_dl_config_dci_pdu;
- typedef struct{
- uint8_t aperiodicSRS_ResourceTrigger;
- } fapi_nr_dl_srs_config_t;
+typedef struct {
+ fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
+} fapi_nr_dl_config_dci_pdu;
+typedef struct{
+ uint8_t aperiodicSRS_ResourceTrigger;
+} fapi_nr_dl_srs_config_t;
+
+typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
+//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
+typedef struct {
+ uint8_t bandwidth_part_ind;
+ uint16_t number_rbs;
+ uint16_t start_rb;
+ uint8_t frame_offset;
+ uint16_t number_symbols;
+ uint16_t start_symbol;
+ uint8_t prb_bundling_size_ind;
+ uint8_t rate_matching_ind;
+ uint8_t zp_csi_rs_trigger;
+ uint8_t mcs;
+ uint8_t ndi;
+ uint8_t rv;
+ uint8_t tb2_mcs;
+ uint8_t tb2_ndi;
+ uint8_t tb2_rv;
+ uint8_t harq_process_nbr;
+ vrb_to_prb_mapping_t vrb_to_prb_mapping;
+ uint8_t dai;
+ double scaling_factor_S;
+ int8_t accumulated_delta_PUCCH;
+ uint8_t pucch_resource_id;
+ uint8_t pdsch_to_harq_feedback_time_ind;
+ uint8_t n_dmrs_cdm_groups;
+ uint8_t dmrs_ports[10];
+ uint8_t n_front_load_symb;
+ uint8_t tci_state;
+ fapi_nr_dl_srs_config_t srs_config;
+ uint8_t cbgti;
+ uint8_t codeBlockGroupFlushIndicator;
+ // to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
+} fapi_nr_dl_config_dlsch_pdu_rel15_t;
- typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
- //typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
- typedef struct {
- uint8_t bandwidth_part_ind;
- uint16_t number_rbs;
- uint16_t start_rb;
- uint8_t frame_offset;
- uint16_t number_symbols;
- uint16_t start_symbol;
- uint8_t prb_bundling_size_ind;
- uint8_t rate_matching_ind;
- uint8_t zp_csi_rs_trigger;
- uint8_t mcs;
- uint8_t ndi;
- uint8_t rv;
- uint8_t tb2_mcs;
- uint8_t tb2_ndi;
- uint8_t tb2_rv;
- uint8_t harq_process_nbr;
- vrb_to_prb_mapping_t vrb_to_prb_mapping;
- uint8_t dai;
- double scaling_factor_S;
- int8_t accumulated_delta_PUCCH;
- uint8_t pucch_resource_id;
- uint8_t pdsch_to_harq_feedback_time_ind;
- uint8_t n_dmrs_cdm_groups;
- uint8_t dmrs_ports[10];
- uint8_t n_front_load_symb;
- uint8_t tci_state;
- fapi_nr_dl_srs_config_t srs_config;
- uint8_t cbgti;
- uint8_t codeBlockGroupFlushIndicator;
- // to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
- } fapi_nr_dl_config_dlsch_pdu_rel15_t;
+typedef struct {
+ uint16_t rnti;
+ fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
+} fapi_nr_dl_config_dlsch_pdu;
- typedef struct {
- uint16_t rnti;
- fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
- } fapi_nr_dl_config_dlsch_pdu;
-
- typedef struct {
- uint8_t pdu_type;
- union {
- fapi_nr_dl_config_dci_pdu dci_config_pdu;
- fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
- };
- } fapi_nr_dl_config_request_pdu_t;
-
-typedef struct {
- uint32_t sfn_slot;
- uint8_t number_pdus;
- fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
+typedef struct {
+ uint8_t pdu_type;
+ union {
+ fapi_nr_dl_config_dci_pdu dci_config_pdu;
+ fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
+ };
+} fapi_nr_dl_config_request_pdu_t;
+
+typedef struct {
+ uint32_t sfn_slot;
+ uint8_t number_pdus;
+ fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
@@ -460,444 +462,444 @@ typedef struct {
- typedef struct {
- fapi_nr_coreset_t coreset;
+typedef struct {
+ fapi_nr_coreset_t coreset;
- uint8_t monitoring_slot_peridicity;
- uint8_t monitoring_slot_offset;
- uint16_t duration;
- uint16_t monitoring_symbols_within_slot;
- uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
+ uint8_t monitoring_slot_peridicity;
+ uint8_t monitoring_slot_offset;
+ uint16_t duration;
+ uint16_t monitoring_symbols_within_slot;
+ uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
- uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
- uint8_t dci_2_3_monitorying_periodicity;
- uint8_t dci_2_3_number_of_candidates;
+ uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
+ uint8_t dci_2_3_monitorying_periodicity;
+ uint8_t dci_2_3_number_of_candidates;
- } fapi_nr_search_space_t;
+} fapi_nr_search_space_t;
- typedef struct {
- fapi_nr_search_space_t search_space_sib1;
- fapi_nr_search_space_t search_space_others_sib;
- fapi_nr_search_space_t search_space_paging;
- //fapi_nr_coreset_t coreset_ra; // common coreset
- fapi_nr_search_space_t search_space_ra;
- } fapi_nr_pdcch_config_common_t;
+typedef struct {
+ fapi_nr_search_space_t search_space_sib1;
+ fapi_nr_search_space_t search_space_others_sib;
+ fapi_nr_search_space_t search_space_paging;
+ //fapi_nr_coreset_t coreset_ra; // common coreset
+ fapi_nr_search_space_t search_space_ra;
+} fapi_nr_pdcch_config_common_t;
- typedef struct {
- uint8_t k0;
- uint8_t mapping_type;
- uint8_t symbol_starting;
- uint8_t symbol_length;
- } fapi_nr_pdsch_time_domain_resource_allocation_t;
+typedef struct {
+ uint8_t k0;
+ uint8_t mapping_type;
+ uint8_t symbol_starting;
+ uint8_t symbol_length;
+} fapi_nr_pdsch_time_domain_resource_allocation_t;
- typedef struct {
- fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
- } fapi_nr_pdsch_config_common_t;
+typedef struct {
+ fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
+} fapi_nr_pdsch_config_common_t;
- typedef struct {
- uint8_t prach_configuration_index;
- uint8_t msg1_fdm;
- uint8_t msg1_frequency_start;
- uint8_t zero_correlation_zone_config;
- uint8_t preamble_received_target_power;
- uint8_t preamble_transmission_max;
- uint8_t power_ramping_step;
- uint8_t ra_window_size;
-
- uint8_t total_number_of_preamble;
- uint8_t ssb_occasion_per_rach;
- uint8_t cb_preamble_per_ssb;
-
- uint8_t group_a_msg3_size;
- uint8_t group_a_number_of_preamble;
- uint8_t group_b_power_offset;
- uint8_t contention_resolution_timer;
- uint8_t rsrp_threshold_ssb;
- uint8_t rsrp_threshold_ssb_sul;
- uint8_t prach_length; // l839, l139
- uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
- uint8_t msg1_subcarrier_spacing;
- uint8_t restrictedset_config;
- uint8_t msg3_transform_precoding;
- } fapi_nr_rach_config_common_t;
+typedef struct {
+ uint8_t prach_configuration_index;
+ uint8_t msg1_fdm;
+ uint8_t msg1_frequency_start;
+ uint8_t zero_correlation_zone_config;
+ uint8_t preamble_received_target_power;
+ uint8_t preamble_transmission_max;
+ uint8_t power_ramping_step;
+ uint8_t ra_window_size;
+
+ uint8_t total_number_of_preamble;
+ uint8_t ssb_occasion_per_rach;
+ uint8_t cb_preamble_per_ssb;
+
+ uint8_t group_a_msg3_size;
+ uint8_t group_a_number_of_preamble;
+ uint8_t group_b_power_offset;
+ uint8_t contention_resolution_timer;
+ uint8_t rsrp_threshold_ssb;
+ uint8_t rsrp_threshold_ssb_sul;
+ uint8_t prach_length; // l839, l139
+ uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
+ uint8_t msg1_subcarrier_spacing;
+ uint8_t restrictedset_config;
+ uint8_t msg3_transform_precoding;
+} fapi_nr_rach_config_common_t;
- typedef struct {
- uint8_t k2;
- uint8_t mapping_type;
- uint8_t symbol_starting;
- uint8_t symbol_length;
- } fapi_nr_pusch_time_domain_resource_allocation_t;
+typedef struct {
+ uint8_t k2;
+ uint8_t mapping_type;
+ uint8_t symbol_starting;
+ uint8_t symbol_length;
+} fapi_nr_pusch_time_domain_resource_allocation_t;
- typedef struct {
- uint8_t group_hopping_enabled_transform_precoding;
- fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
- uint8_t msg3_delta_preamble;
- uint8_t p0_nominal_with_grant;
- } fapi_nr_pusch_config_common_t;
+typedef struct {
+ uint8_t group_hopping_enabled_transform_precoding;
+ fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
+ uint8_t msg3_delta_preamble;
+ uint8_t p0_nominal_with_grant;
+} fapi_nr_pusch_config_common_t;
- typedef struct {
- uint8_t pucch_resource_common;
- uint8_t pucch_group_hopping;
- uint8_t hopping_id;
- uint8_t p0_nominal;
- } fapi_nr_pucch_config_common_t;
+typedef struct {
+ uint8_t pucch_resource_common;
+ uint8_t pucch_group_hopping;
+ uint8_t hopping_id;
+ uint8_t p0_nominal;
+} fapi_nr_pucch_config_common_t;
- typedef struct {
+typedef struct {
- uint8_t subcarrier_spacing_common;
- uint8_t ssb_subcarrier_offset;
- uint8_t dmrs_type_a_position;
- uint8_t pdcch_config_sib1;
- uint8_t cell_barred;
- uint8_t intra_frequency_reselection;
+ uint8_t subcarrier_spacing_common;
+ uint8_t ssb_subcarrier_offset;
+ uint8_t dmrs_type_a_position;
+ uint8_t pdcch_config_sib1;
+ uint8_t cell_barred;
+ uint8_t intra_frequency_reselection;
- uint16_t system_frame_number;
- uint8_t ssb_index;
- uint8_t half_frame_bit;
- } fapi_nr_pbch_config_t;
+ uint16_t system_frame_number;
+ uint8_t ssb_index;
+ uint8_t half_frame_bit;
+} fapi_nr_pbch_config_t;
- typedef struct {
+typedef struct {
- fapi_nr_pdcch_config_common_t pdcch_config_common;
- fapi_nr_pdsch_config_common_t pdsch_config_common;
+ fapi_nr_pdcch_config_common_t pdcch_config_common;
+ fapi_nr_pdsch_config_common_t pdsch_config_common;
- } fapi_nr_dl_bwp_common_config_t;
+} fapi_nr_dl_bwp_common_config_t;
- typedef struct {
- uint16_t int_rnti;
- uint8_t time_frequency_set;
- uint8_t dci_payload_size;
- uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
- uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
- } fapi_nr_downlink_preemption_t;
+typedef struct {
+ uint16_t int_rnti;
+ uint8_t time_frequency_set;
+ uint8_t dci_payload_size;
+ uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
+ uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
+} fapi_nr_downlink_preemption_t;
- typedef struct {
- uint8_t tpc_index;
- uint8_t tpc_index_sul;
- uint8_t target_cell;
- } fapi_nr_pusch_tpc_command_config_t;
+typedef struct {
+ uint8_t tpc_index;
+ uint8_t tpc_index_sul;
+ uint8_t target_cell;
+} fapi_nr_pusch_tpc_command_config_t;
- typedef struct {
- uint8_t tpc_index_pcell;
- uint8_t tpc_index_pucch_scell;
- } fapi_nr_pucch_tpc_command_config_t;
+typedef struct {
+ uint8_t tpc_index_pcell;
+ uint8_t tpc_index_pucch_scell;
+} fapi_nr_pucch_tpc_command_config_t;
- typedef struct {
- uint8_t starting_bit_of_format_2_3;
- uint8_t feild_type_format_2_3;
- } fapi_nr_srs_tpc_command_config_t;
+typedef struct {
+ uint8_t starting_bit_of_format_2_3;
+ uint8_t feild_type_format_2_3;
+} fapi_nr_srs_tpc_command_config_t;
- typedef struct {
- fapi_nr_downlink_preemption_t downlink_preemption;
- fapi_nr_pusch_tpc_command_config_t tpc_pusch;
- fapi_nr_pucch_tpc_command_config_t tpc_pucch;
- fapi_nr_srs_tpc_command_config_t tpc_srs;
- } fapi_nr_pdcch_config_dedicated_t;
+typedef struct {
+ fapi_nr_downlink_preemption_t downlink_preemption;
+ fapi_nr_pusch_tpc_command_config_t tpc_pusch;
+ fapi_nr_pucch_tpc_command_config_t tpc_pucch;
+ fapi_nr_srs_tpc_command_config_t tpc_srs;
+} fapi_nr_pdcch_config_dedicated_t;
- typedef struct {
- uint8_t dmrs_type;
- uint8_t dmrs_addition_position;
- uint8_t max_length;
- uint16_t scrambling_id0;
- uint16_t scrambling_id1;
- uint8_t ptrs_frequency_density[2]; // phase tracking rs
- uint8_t ptrs_time_density[3]; // phase tracking rs
- uint8_t ptrs_epre_ratio; // phase tracking rs
- uint8_t ptrs_resource_element_offset; // phase tracking rs
- } fapi_nr_dmrs_downlink_config_t;
+typedef struct {
+ uint8_t dmrs_type;
+ uint8_t dmrs_addition_position;
+ uint8_t max_length;
+ uint16_t scrambling_id0;
+ uint16_t scrambling_id1;
+ uint8_t ptrs_frequency_density[2]; // phase tracking rs
+ uint8_t ptrs_time_density[3]; // phase tracking rs
+ uint8_t ptrs_epre_ratio; // phase tracking rs
+ uint8_t ptrs_resource_element_offset; // phase tracking rs
+} fapi_nr_dmrs_downlink_config_t;
- typedef struct {
- uint8_t bwp_or_cell_level;
- uint8_t pattern_type;
- uint32_t resource_blocks[9]; // bitmaps type 275 bits
- uint8_t slot_type; // bitmaps type one/two slot(s)
- uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
- uint8_t periodic; // bitmaps type
- uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
+typedef struct {
+ uint8_t bwp_or_cell_level;
+ uint8_t pattern_type;
+ uint32_t resource_blocks[9]; // bitmaps type 275 bits
+ uint8_t slot_type; // bitmaps type one/two slot(s)
+ uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
+ uint8_t periodic; // bitmaps type
+ uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
- fapi_nr_coreset_t coreset; // coreset
+ fapi_nr_coreset_t coreset; // coreset
- uint8_t subcarrier_spacing;
- uint8_t mode;
- } fapi_nr_rate_matching_pattern_group_t;
+ uint8_t subcarrier_spacing;
+ uint8_t mode;
+} fapi_nr_rate_matching_pattern_group_t;
- typedef struct {
- // resource mapping
- uint8_t row; // row1/row2/row4/other
- uint16_t frequency_domain_allocation; // 4/12/3/6 bits
- uint8_t number_of_ports;
- uint8_t first_ofdm_symbol_in_time_domain;
- uint8_t first_ofdm_symbol_in_time_domain2;
- uint8_t cdm_type;
- uint8_t density; // .5/1/3
- uint8_t density_dot5_type; // even/odd PRBs
+typedef struct {
+ // resource mapping
+ uint8_t row; // row1/row2/row4/other
+ uint16_t frequency_domain_allocation; // 4/12/3/6 bits
+ uint8_t number_of_ports;
+ uint8_t first_ofdm_symbol_in_time_domain;
+ uint8_t first_ofdm_symbol_in_time_domain2;
+ uint8_t cdm_type;
+ uint8_t density; // .5/1/3
+ uint8_t density_dot5_type; // even/odd PRBs
- uint8_t frequency_band_starting_rb; // freqBand
- uint8_t frequency_band_number_of_rb; // freqBand
+ uint8_t frequency_band_starting_rb; // freqBand
+ uint8_t frequency_band_number_of_rb; // freqBand
- // periodicityAndOffset
- uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
- uint32_t offset; // 0..639 bits
- } fapi_nr_zp_csi_rs_resource_t;
+ // periodicityAndOffset
+ uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
+ uint32_t offset; // 0..639 bits
+} fapi_nr_zp_csi_rs_resource_t;
- typedef struct {
- uint16_t data_scrambling_id_pdsch;
- fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
- fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
- uint8_t vrb_to_prb_interleaver;
- uint8_t resource_allocation;
- fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
- uint8_t pdsch_aggregation_factor;
- fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
- fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
- uint8_t rbg_size;
- uint8_t mcs_table;
- uint8_t max_num_of_code_word_scheduled_by_dci;
- uint8_t bundle_size; // prb_bundling static
- uint8_t bundle_size_set1; // prb_bundling dynamic
- uint8_t bundle_size_set2; // prb_bundling dynamic
- fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
- } fapi_nr_pdsch_config_dedicated_t;
+typedef struct {
+ uint16_t data_scrambling_id_pdsch;
+ fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
+ fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
+ uint8_t vrb_to_prb_interleaver;
+ uint8_t resource_allocation;
+ fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
+ uint8_t pdsch_aggregation_factor;
+ fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
+ fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
+ uint8_t rbg_size;
+ uint8_t mcs_table;
+ uint8_t max_num_of_code_word_scheduled_by_dci;
+ uint8_t bundle_size; // prb_bundling static
+ uint8_t bundle_size_set1; // prb_bundling dynamic
+ uint8_t bundle_size_set2; // prb_bundling dynamic
+ fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
+} fapi_nr_pdsch_config_dedicated_t;
- typedef struct {
- uint16_t starting_prb;
- uint8_t intra_slot_frequency_hopping;
- uint16_t second_hop_prb;
- uint8_t format; // pucch format 0..4
- uint8_t initial_cyclic_shift;
- uint8_t number_of_symbols;
- uint8_t starting_symbol_index;
- uint8_t time_domain_occ;
- uint8_t number_of_prbs;
- uint8_t occ_length;
- uint8_t occ_index;
- } fapi_nr_pucch_resource_t;
+typedef struct {
+ uint16_t starting_prb;
+ uint8_t intra_slot_frequency_hopping;
+ uint16_t second_hop_prb;
+ uint8_t format; // pucch format 0..4
+ uint8_t initial_cyclic_shift;
+ uint8_t number_of_symbols;
+ uint8_t starting_symbol_index;
+ uint8_t time_domain_occ;
+ uint8_t number_of_prbs;
+ uint8_t occ_length;
+ uint8_t occ_index;
+} fapi_nr_pucch_resource_t;
- typedef struct {
- uint8_t periodicity;
- uint8_t number_of_harq_process;
- fapi_nr_pucch_resource_t n1_pucch_an;
- } fapi_nr_sps_config_t;
+typedef struct {
+ uint8_t periodicity;
+ uint8_t number_of_harq_process;
+ fapi_nr_pucch_resource_t n1_pucch_an;
+} fapi_nr_sps_config_t;
- typedef struct {
- uint8_t beam_failure_instance_max_count;
- uint8_t beam_failure_detection_timer;
- } fapi_nr_radio_link_monitoring_config_t;
+typedef struct {
+ uint8_t beam_failure_instance_max_count;
+ uint8_t beam_failure_detection_timer;
+} fapi_nr_radio_link_monitoring_config_t;
- typedef struct {
- fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
- fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
- fapi_nr_sps_config_t sps_config;
- fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
+typedef struct {
+ fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
+ fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
+ fapi_nr_sps_config_t sps_config;
+ fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
- } fapi_nr_dl_bwp_dedicated_config_t;
+} fapi_nr_dl_bwp_dedicated_config_t;
- typedef struct {
- fapi_nr_rach_config_common_t rach_config_common;
- fapi_nr_pusch_config_common_t pusch_config_common;
- fapi_nr_pucch_config_common_t pucch_config_common;
+typedef struct {
+ fapi_nr_rach_config_common_t rach_config_common;
+ fapi_nr_pusch_config_common_t pusch_config_common;
+ fapi_nr_pucch_config_common_t pucch_config_common;
- } fapi_nr_ul_bwp_common_config_t;
+} fapi_nr_ul_bwp_common_config_t;
- typedef struct {
- uint8_t inter_slot_frequency_hopping;
- uint8_t additional_dmrs;
- uint8_t max_code_rate;
- uint8_t number_of_slots;
- uint8_t pi2bpsk;
- uint8_t simultaneous_harq_ack_csi;
- } fapi_nr_pucch_format_config_t;
+typedef struct {
+ uint8_t inter_slot_frequency_hopping;
+ uint8_t additional_dmrs;
+ uint8_t max_code_rate;
+ uint8_t number_of_slots;
+ uint8_t pi2bpsk;
+ uint8_t simultaneous_harq_ack_csi;
+} fapi_nr_pucch_format_config_t;
- typedef struct {
- fapi_nr_pucch_format_config_t format1;
- fapi_nr_pucch_format_config_t format2;
- fapi_nr_pucch_format_config_t format3;
- fapi_nr_pucch_format_config_t format4;
- fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
- uint8_t dl_data_to_ul_ack[8];
- // pucch power control
- uint8_t deltaF_pucch_f0;
- uint8_t deltaF_pucch_f1;
- uint8_t deltaF_pucch_f2;
- uint8_t deltaF_pucch_f3;
- uint8_t deltaF_pucch_f4;
- uint8_t two_pucch_pc_adjusment_states;
- } fapi_nr_pucch_config_dedicated_t;
+typedef struct {
+ fapi_nr_pucch_format_config_t format1;
+ fapi_nr_pucch_format_config_t format2;
+ fapi_nr_pucch_format_config_t format3;
+ fapi_nr_pucch_format_config_t format4;
+ fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
+ uint8_t dl_data_to_ul_ack[8];
+ // pucch power control
+ uint8_t deltaF_pucch_f0;
+ uint8_t deltaF_pucch_f1;
+ uint8_t deltaF_pucch_f2;
+ uint8_t deltaF_pucch_f3;
+ uint8_t deltaF_pucch_f4;
+ uint8_t two_pucch_pc_adjusment_states;
+} fapi_nr_pucch_config_dedicated_t;
- typedef struct {
- uint8_t dmrs_type;
- uint8_t dmrs_addition_position;
- uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
- uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
- uint16_t ptrs_frequency_density[2];
- uint8_t ptrs_time_density[3];
- uint8_t ptrs_max_number_of_ports;
- uint8_t ptrs_resource_element_offset;
- uint8_t ptrs_power;
- uint16_t ptrs_sample_density[5];
- uint8_t ptrs_time_density_transform_precoding;
-
- uint8_t max_length;
- uint16_t scrambling_id0;
- uint16_t scrambling_id1;
- uint8_t npusch_identity;
- uint8_t disable_sequence_group_hopping;
- uint8_t sequence_hopping_enable;
- } fapi_nr_dmrs_uplink_config_t;
+typedef struct {
+ uint8_t dmrs_type;
+ uint8_t dmrs_addition_position;
+ uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
+ uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
+ uint16_t ptrs_frequency_density[2];
+ uint8_t ptrs_time_density[3];
+ uint8_t ptrs_max_number_of_ports;
+ uint8_t ptrs_resource_element_offset;
+ uint8_t ptrs_power;
+ uint16_t ptrs_sample_density[5];
+ uint8_t ptrs_time_density_transform_precoding;
+
+ uint8_t max_length;
+ uint16_t scrambling_id0;
+ uint16_t scrambling_id1;
+ uint8_t npusch_identity;
+ uint8_t disable_sequence_group_hopping;
+ uint8_t sequence_hopping_enable;
+} fapi_nr_dmrs_uplink_config_t;
- typedef struct {
- uint8_t tpc_accmulation;
- uint8_t msg3_alpha;
- uint8_t p0_nominal_with_grant;
- uint8_t two_pusch_pc_adjustments_states;
- uint8_t delta_mcs;
- } fapi_nr_pusch_power_control_t;
-
- typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
- typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
- typedef enum {
- codebook_subset_fullyAndPartialAndNonCoherent = 1,
- codebook_subset_partialAndNonCoherent = 2,
- codebook_subset_nonCoherent = 3} codebook_subset_t;
- typedef struct {
- uint16_t data_scrambling_identity;
- tx_config_t tx_config;
- fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
- fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
- fapi_nr_pusch_power_control_t pusch_power_control;
- uint8_t frequency_hopping;
- uint16_t frequency_hopping_offset_lists[4];
- uint8_t resource_allocation;
- fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
- uint8_t pusch_aggregation_factor;
- uint8_t mcs_table;
- uint8_t mcs_table_transform_precoder;
- transform_precoder_t transform_precoder;
- codebook_subset_t codebook_subset;
- uint8_t max_rank;
- uint8_t rbg_size;
-
- //uci-OnPUSCH
- uint8_t uci_on_pusch_type; //dynamic, semi-static
- uint8_t beta_offset_ack_index1[4];
- uint8_t beta_offset_ack_index2[4];
- uint8_t beta_offset_ack_index3[4];
- uint8_t beta_offset_csi_part1_index1[4];
- uint8_t beta_offset_csi_part1_index2[4];
- uint8_t beta_offset_csi_part2_index1[4];
- uint8_t beta_offset_csi_part2_index2[4];
-
- uint8_t tp_pi2BPSK;
- } fapi_nr_pusch_config_dedicated_t;
+typedef struct {
+ uint8_t tpc_accmulation;
+ uint8_t msg3_alpha;
+ uint8_t p0_nominal_with_grant;
+ uint8_t two_pusch_pc_adjustments_states;
+ uint8_t delta_mcs;
+} fapi_nr_pusch_power_control_t;
+
+typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
+typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
+typedef enum {
+ codebook_subset_fullyAndPartialAndNonCoherent = 1,
+ codebook_subset_partialAndNonCoherent = 2,
+ codebook_subset_nonCoherent = 3} codebook_subset_t;
+typedef struct {
+ uint16_t data_scrambling_identity;
+ tx_config_t tx_config;
+ fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
+ fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
+ fapi_nr_pusch_power_control_t pusch_power_control;
+ uint8_t frequency_hopping;
+ uint16_t frequency_hopping_offset_lists[4];
+ uint8_t resource_allocation;
+ fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
+ uint8_t pusch_aggregation_factor;
+ uint8_t mcs_table;
+ uint8_t mcs_table_transform_precoder;
+ transform_precoder_t transform_precoder;
+ codebook_subset_t codebook_subset;
+ uint8_t max_rank;
+ uint8_t rbg_size;
+
+ //uci-OnPUSCH
+ uint8_t uci_on_pusch_type; //dynamic, semi-static
+ uint8_t beta_offset_ack_index1[4];
+ uint8_t beta_offset_ack_index2[4];
+ uint8_t beta_offset_ack_index3[4];
+ uint8_t beta_offset_csi_part1_index1[4];
+ uint8_t beta_offset_csi_part1_index2[4];
+ uint8_t beta_offset_csi_part2_index1[4];
+ uint8_t beta_offset_csi_part2_index2[4];
+
+ uint8_t tp_pi2BPSK;
+} fapi_nr_pusch_config_dedicated_t;
- typedef struct {
- uint8_t frequency_hopping;
- fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
- uint8_t mcs_table;
- uint8_t mcs_table_transform_precoder;
-
- //uci-OnPUSCH
- uint8_t uci_on_pusch_type; //dynamic, semi-static
- uint8_t beta_offset_ack_index1[4];
- uint8_t beta_offset_ack_index2[4];
- uint8_t beta_offset_ack_index3[4];
- uint8_t beta_offset_csi_part1_index1[4];
- uint8_t beta_offset_csi_part1_index2[4];
- uint8_t beta_offset_csi_part2_index1[4];
- uint8_t beta_offset_csi_part2_index2[4];
-
- uint8_t resource_allocation;
- // rgb-Size structure missing in spec.
- uint8_t power_control_loop_to_use;
- // p0-PUSCH-Alpha
- uint8_t p0;
- uint8_t alpha;
-
- uint8_t transform_precoder;
- uint8_t number_of_harq_process;
- uint8_t rep_k;
- uint8_t rep_k_rv;
- uint8_t periodicity;
- uint8_t configured_grant_timer;
- // rrc-ConfiguredUplinkGrant
- uint16_t time_domain_offset;
- uint8_t time_domain_allocation;
- uint32_t frequency_domain_allocation;
- uint8_t antenna_ports;
- uint8_t dmrs_seq_initialization;
- uint8_t precoding_and_number_of_layers;
- uint8_t srs_resource_indicator;
- uint8_t mcs_and_tbs;
- uint8_t frequency_hopping_offset;
- uint8_t path_loss_reference_index;
-
- } fapi_nr_configured_grant_config_t;
+typedef struct {
+ uint8_t frequency_hopping;
+ fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
+ uint8_t mcs_table;
+ uint8_t mcs_table_transform_precoder;
+
+ //uci-OnPUSCH
+ uint8_t uci_on_pusch_type; //dynamic, semi-static
+ uint8_t beta_offset_ack_index1[4];
+ uint8_t beta_offset_ack_index2[4];
+ uint8_t beta_offset_ack_index3[4];
+ uint8_t beta_offset_csi_part1_index1[4];
+ uint8_t beta_offset_csi_part1_index2[4];
+ uint8_t beta_offset_csi_part2_index1[4];
+ uint8_t beta_offset_csi_part2_index2[4];
+
+ uint8_t resource_allocation;
+ // rgb-Size structure missing in spec.
+ uint8_t power_control_loop_to_use;
+ // p0-PUSCH-Alpha
+ uint8_t p0;
+ uint8_t alpha;
+
+ uint8_t transform_precoder;
+ uint8_t number_of_harq_process;
+ uint8_t rep_k;
+ uint8_t rep_k_rv;
+ uint8_t periodicity;
+ uint8_t configured_grant_timer;
+ // rrc-ConfiguredUplinkGrant
+ uint16_t time_domain_offset;
+ uint8_t time_domain_allocation;
+ uint32_t frequency_domain_allocation;
+ uint8_t antenna_ports;
+ uint8_t dmrs_seq_initialization;
+ uint8_t precoding_and_number_of_layers;
+ uint8_t srs_resource_indicator;
+ uint8_t mcs_and_tbs;
+ uint8_t frequency_hopping_offset;
+ uint8_t path_loss_reference_index;
+
+} fapi_nr_configured_grant_config_t;
- typedef struct {
- uint8_t qcl_type1_serving_cell_index;
- uint8_t qcl_type1_bwp_id;
- uint8_t qcl_type1_rs_type; // csi-rs or ssb
- uint8_t qcl_type1_nzp_csi_rs_resource_id;
- uint8_t qcl_type1_ssb_index;
- uint8_t qcl_type1_type;
+typedef struct {
+ uint8_t qcl_type1_serving_cell_index;
+ uint8_t qcl_type1_bwp_id;
+ uint8_t qcl_type1_rs_type; // csi-rs or ssb
+ uint8_t qcl_type1_nzp_csi_rs_resource_id;
+ uint8_t qcl_type1_ssb_index;
+ uint8_t qcl_type1_type;
- uint8_t qcl_type2_serving_cell_index;
- uint8_t qcl_type2_bwp_id;
- uint8_t qcl_type2_rs_type; // csi-rs or ssb
- uint8_t qcl_type2_nzp_csi_rs_resource_id;
- uint8_t qcl_type2_ssb_index;
- uint8_t qcl_type2_type;
+ uint8_t qcl_type2_serving_cell_index;
+ uint8_t qcl_type2_bwp_id;
+ uint8_t qcl_type2_rs_type; // csi-rs or ssb
+ uint8_t qcl_type2_nzp_csi_rs_resource_id;
+ uint8_t qcl_type2_ssb_index;
+ uint8_t qcl_type2_type;
- } fapi_nr_tci_state_t;
+} fapi_nr_tci_state_t;
- typedef struct {
- uint8_t root_sequence_index;
- // rach genertic
- uint8_t prach_configuration_index;
- uint8_t msg1_fdm;
- uint8_t msg1_frequency_start;
- uint8_t zero_correlation_zone_config;
- uint8_t preamble_received_target_power;
- uint8_t preamble_transmission_max;
- uint8_t power_ramping_step;
- uint8_t ra_window_size;
-
- uint8_t rsrp_threshold_ssb;
- // PRACH-ResourceDedicatedBFR
- uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- // NZP-CSI-RS-Resource
- uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
-
- uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
- uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
-
- uint8_t ssb_per_rach_occasion;
- uint8_t ra_ssb_occasion_mask_index;
- fapi_nr_search_space_t recovery_search_space;
- // RA-Prioritization
- uint8_t power_ramping_step_high_priority;
- uint8_t scaling_factor_bi;
- uint8_t beam_failure_recovery_timer;
- } fapi_nr_beam_failure_recovery_config_t;
+typedef struct {
+ uint8_t root_sequence_index;
+ // rach genertic
+ uint8_t prach_configuration_index;
+ uint8_t msg1_fdm;
+ uint8_t msg1_frequency_start;
+ uint8_t zero_correlation_zone_config;
+ uint8_t preamble_received_target_power;
+ uint8_t preamble_transmission_max;
+ uint8_t power_ramping_step;
+ uint8_t ra_window_size;
+
+ uint8_t rsrp_threshold_ssb;
+ // PRACH-ResourceDedicatedBFR
+ uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ // NZP-CSI-RS-Resource
+ uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+
+ uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
+ uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
+
+ uint8_t ssb_per_rach_occasion;
+ uint8_t ra_ssb_occasion_mask_index;
+ fapi_nr_search_space_t recovery_search_space;
+ // RA-Prioritization
+ uint8_t power_ramping_step_high_priority;
+ uint8_t scaling_factor_bi;
+ uint8_t beam_failure_recovery_timer;
+} fapi_nr_beam_failure_recovery_config_t;
- typedef struct {
- fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
- fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
- fapi_nr_configured_grant_config_t configured_grant_config;
- // SRS-Config
- uint8_t srs_tpc_accumulation;
- fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
+typedef struct {
+ fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
+ fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
+ fapi_nr_configured_grant_config_t configured_grant_config;
+ // SRS-Config
+ uint8_t srs_tpc_accumulation;
+ fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
- } fapi_nr_ul_bwp_dedicated_config_t;
+} fapi_nr_ul_bwp_dedicated_config_t;
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
@@ -906,15 +908,15 @@ typedef struct {
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED 0x10
typedef struct {
- uint32_t config_mask;
+ uint32_t config_mask;
- fapi_nr_pbch_config_t pbch_config; // MIB
+ fapi_nr_pbch_config_t pbch_config; // MIB
- fapi_nr_dl_bwp_common_config_t dl_bwp_common;
- fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
+ fapi_nr_dl_bwp_common_config_t dl_bwp_common;
+ fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
- fapi_nr_ul_bwp_common_config_t ul_bwp_common;
- fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
+ fapi_nr_ul_bwp_common_config_t ul_bwp_common;
+ fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
} fapi_nr_config_request_t;
diff --git a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
index a3b59d5e7fc7518f3bec4d54e9759f4ee5c6559e..4273186dcf42d164ab19cd2c2c2f0d74f1d4ca18 100644
--- a/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+++ b/nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
@@ -72,7 +72,7 @@ typedef struct
// These TLVs are used by the VNF to configure the RF in the PNF
// nfapi_uint16_tlv_t max_transmit_power;
- nfapi_uint16_tlv_t earfcn;
+ nfapi_uint16_tlv_t nrarfcn;
// nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands;
// nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands;
@@ -95,7 +95,7 @@ typedef struct
#define NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG 0x511F
#define NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG 0x5120
#define NFAPI_NR_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG 0x5128
-#define NFAPI_NR_NFAPI_EARFCN_TAG 0x5129
+#define NFAPI_NR_NFAPI_NRARFCN_TAG 0x5129
#define NFAPI_NR_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG 0x5130
#define NFAPI_NR_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG 0x5131
#define NFAPI_NR_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG 0x5132
@@ -149,8 +149,6 @@ typedef struct {
#define NFAPI_NR_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x5006
typedef struct {
- nfapi_uint16_tlv_t tx_antenna_ports;
- nfapi_uint16_tlv_t rx_antenna_ports;
nfapi_uint16_tlv_t dl_carrier_bandwidth;
nfapi_uint16_tlv_t ul_carrier_bandwidth;
nfapi_uint16_tlv_t dl_bwp_subcarrierspacing;
@@ -161,18 +159,17 @@ typedef struct {
nfapi_uint16_tlv_t ul_absolutefrequencypointA;
nfapi_uint16_tlv_t dl_offsettocarrier;
nfapi_uint16_tlv_t ul_offsettocarrier;
- nfapi_uint16_tlv_t dl_scs_subcarrierspacing;
- nfapi_uint16_tlv_t ul_scs_subcarrierspacing;
- nfapi_uint16_tlv_t dl_scs_specificcarrier_k0;
- nfapi_uint16_tlv_t ul_scs_specificcarrier_k0;
+ nfapi_uint16_tlv_t dl_subcarrierspacing;
+ nfapi_uint16_tlv_t ul_subcarrierspacing;
+ nfapi_uint16_tlv_t dl_specificcarrier_k0;
+ nfapi_uint16_tlv_t ul_specificcarrier_k0;
nfapi_uint16_tlv_t NIA_subcarrierspacing;
} nfapi_nr_rf_config_t;
-#define NFAPI_NR_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG 0x500A
-#define NFAPI_NR_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG 0x500B
-#define NFAPI_NR_RF_CONFIG_REFERENCE_SIGNAL_POWER_TAG 0x500C
-#define NFAPI_NR_RF_CONFIG_TX_ANTENNA_PORTS_TAG 0x500D
-#define NFAPI_NR_RF_CONFIG_RX_ANTENNA_PORTS_TAG 0x500E
+#define NFAPI_NR_RF_CONFIG_DL_CARRIER_BANDWIDTH_TAG 0x500A
+#define NFAPI_NR_RF_CONFIG_UL_CARRIER_BANDWIDTH_TAG 0x500B
+#define NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG 0x500C
+#define NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG 0x500D
typedef struct {
nfapi_uint16_tlv_t physical_cell_id;
@@ -511,6 +508,8 @@ typedef struct {
uint16_t rnti;
uint8_t rnti_type;
uint8_t dci_format;
+ /// Number of CRB in BWP that this DCI configures
+ uint16_t n_RB_BWP;
uint8_t config_type;
uint8_t search_space_type;
uint8_t common_search_space_type;
diff --git a/openair1/PHY/CODING/TESTBENCH/ldpctest.c b/openair1/PHY/CODING/TESTBENCH/ldpctest.c
index 8229862abf0544e786653b4d7da9e8d467920cb1..6db9548dbeafc5231ebe81f4d7cf60016b3beae1 100644
--- a/openair1/PHY/CODING/TESTBENCH/ldpctest.c
+++ b/openair1/PHY/CODING/TESTBENCH/ldpctest.c
@@ -421,7 +421,6 @@ int test_ldpc(short No_iteration,
stop_meas(time_decoder);
}
-
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
// printf("esimated_output[%d]=%d\n",i,esimated_output[i]);
@@ -435,8 +434,6 @@ int test_ldpc(short No_iteration,
///printf("test_input[0][%d]: %d \n",i,test_input[0][i]);
if (estimated_output[j][i] != test_input[j][i])
{
-
-
//////printf("error pos %d (%d, %d)\n\n",i,estimated_output[i],test_input[0][i]);
segment_bler = segment_bler + 1;
break;
diff --git a/openair1/PHY/CODING/TESTBENCH/polartest.c b/openair1/PHY/CODING/TESTBENCH/polartest.c
index 88179d03ed7c5430d027f9903d7feff603adf455..6d50070b863df627b449ed7005a892cb032602fb 100644
--- a/openair1/PHY/CODING/TESTBENCH/polartest.c
+++ b/openair1/PHY/CODING/TESTBENCH/polartest.c
@@ -20,11 +20,8 @@ int main(int argc, char *argv[]) {
//Initiate timing. (Results depend on CPU Frequency. Therefore, might change due to performance variances during simulation.)
time_stats_t timeEncoder,timeDecoder;
- time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
- time_stats_t path_metric,sorting,update_LLR;
opp_enabled=1;
int decoder_int16=0;
- int generate_optim_code=0;
cpu_freq_GHz = get_cpu_freq_GHz();
reset_meas(&timeEncoder);
reset_meas(&timeDecoder);
@@ -37,7 +34,7 @@ int main(int argc, char *argv[]) {
double SNR, SNR_lin;
int16_t nBitError = 0; // -1 = Decoding failed (All list entries have failed the CRC checks).
- int8_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
+ uint32_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
uint16_t testLength = 0, coderLength = 0, blockErrorCumulative=0, bitErrorCumulative=0;
double timeEncoderCumulative = 0, timeDecoderCumulative = 0;
uint8_t aggregation_level = 8, decoderListSize = 8, pathMetricAppr = 0;
@@ -73,21 +70,20 @@ int main(int argc, char *argv[]) {
pathMetricAppr = (uint8_t) atoi(optarg);
break;
- case 'q':
- decoder_int16=1;
- break;
+ case 'q':
+ decoder_int16 = 1;
+ break;
- case 'g':
- generate_optim_code=1;
- iterations=1;
- SNRstart=-6.0;
- SNRstop =-6.0;
- decoder_int16=1;
- break;
+ case 'g':
+ iterations = 1;
+ SNRstart = -6.0;
+ SNRstop = -6.0;
+ decoder_int16 = 1;
+ break;
- case 'h':
- printf("./polartest -s SNRstart -d SNRinc -f SNRstop -m [0=PBCH|1=DCI|2=UCI] -i iterations -l decoderListSize -a pathMetricAppr -q (use fixed point decoder)\n");
- exit(-1);
+ case 'h':
+ printf("./polartest -s SNRstart -d SNRinc -f SNRstop -m [0=PBCH|1=DCI|2=UCI] -i iterations -l decoderListSize -a pathMetricAppr\n");
+ exit(-1);
default:
perror("[polartest.c] Problem at argument parsing with getopt");
@@ -95,13 +91,13 @@ int main(int argc, char *argv[]) {
}
if (polarMessageType == 0) { //PBCH
- testLength = NR_POLAR_PBCH_PAYLOAD_BITS;
+ testLength = 64;//NR_POLAR_PBCH_PAYLOAD_BITS;
coderLength = NR_POLAR_PBCH_E;
aggregation_level = NR_POLAR_PBCH_AGGREGATION_LEVEL;
} else if (polarMessageType == 1) { //DCI
//testLength = nr_get_dci_size(params_rel15->dci_format, params_rel15->rnti_type, &fp->initial_bwp_dl, cfg);
- testLength = 20;
- coderLength = 108; //to be changed by aggregate level function.
+ testLength = 41; //20;
+ coderLength = 108*8; //to be changed by aggregate level function.
} else if (polarMessageType == -1) { //UCI
//testLength = ;
//coderLength = ;
@@ -149,18 +145,18 @@ int main(int argc, char *argv[]) {
uint8_t testArrayLength = ceil(testLength / 32.0);
uint8_t coderArrayLength = ceil(coderLength / 32.0);
- uint32_t *testInput = malloc(sizeof(uint32_t) * testArrayLength); //generate randomly
- uint32_t *encoderOutput = malloc(sizeof(uint32_t) * coderArrayLength);
- uint32_t *estimatedOutput = malloc(sizeof(uint32_t) * testArrayLength); //decoder output
+ uint32_t testInput[testArrayLength]; //generate randomly
+ uint32_t encoderOutput[coderArrayLength];
+ uint32_t estimatedOutput[testArrayLength]; //decoder output
memset(testInput,0,sizeof(uint32_t) * testArrayLength);
memset(encoderOutput,0,sizeof(uint32_t) * coderArrayLength);
memset(estimatedOutput,0,sizeof(uint32_t) * testArrayLength);
- uint8_t *encoderOutputByte = malloc(sizeof(uint8_t) * coderLength);
- double *modulatedInput = malloc (sizeof(double) * coderLength); //channel input
- double *channelOutput = malloc (sizeof(double) * coderLength); //add noise
- int16_t *channelOutput_int16;
- if (decoder_int16 == 1) channelOutput_int16 = (int16_t*)malloc (sizeof(int16_t) * coderLength);
+ uint8_t encoderOutputByte[coderLength];
+ double modulatedInput[coderLength]; //channel input
+ double channelOutput[coderLength]; //add noise
+
+ int16_t channelOutput_int16[coderLength];
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
@@ -211,6 +207,8 @@ int main(int argc, char *argv[]) {
rnti);
printf("dci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
+ free(encoder_outputByte);
+ free(channel_output);
return 0;
#endif
@@ -270,7 +268,7 @@ int main(int argc, char *argv[]) {
uint8_t nr_polar_A[32] = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,1};
uint8_t nr_polar_crc[24];
uint8_t **crc_generator_matrix = crc24c_generator_matrix(32);
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(nr_polar_A,
+ nr_matrix_multiplication_uint8_1D_uint8_2D(nr_polar_A,
crc_generator_matrix,
nr_polar_crc,
32,
@@ -326,10 +324,18 @@ int main(int argc, char *argv[]) {
for (int i=0; i<32; i++)
printf("%d\n",(testInput[0]>>i)&1);*/
+
+
+ int len_mod64=currentPtr->payloadBits&63;
+ ((uint64_t*)testInput)[currentPtr->payloadBits/64]&=((((uint64_t)1)<<len_mod64)-1);
+
start_meas(&timeEncoder);
- polar_encoder(testInput, encoderOutput, currentPtr);
+ if (decoder_int16==0)
+ polar_encoder(testInput, encoderOutput, currentPtr);
+ else
+ polar_encoder_fast((uint64_t*)testInput, encoderOutput,0, currentPtr);
+ //polar_encoder_fast((uint64_t*)testInput, (uint64_t*)encoderOutput,0, currentPtr);
stop_meas(&timeEncoder);
-
/*printf("encoderOutput: [0]->0x%08x\n", encoderOutput[0]);
printf("encoderOutput: [1]->0x%08x\n", encoderOutput[1]);*/
@@ -371,7 +377,7 @@ int main(int argc, char *argv[]) {
aPrioriArray);
else
decoderState = polar_decoder_int16(channelOutput_int16,
- estimatedOutput,
+ (uint64_t*)estimatedOutput,
currentPtr);
@@ -381,17 +387,20 @@ int main(int argc, char *argv[]) {
//calculate errors
- if (decoderState==-1) {
+ if (decoderState!=0) {
blockErrorState=-1;
nBitError=-1;
} else {
- for (int i = 0; i < testArrayLength; i++) {
- for (int j = 0; j < (sizeof(testInput[0])*8); j++) {
- if (((estimatedOutput[i]>>j) & 1) != ((testInput[i]>>j) & 1)) nBitError++;
- }
- }
-
- if (nBitError>0) blockErrorState=1;
+ for (int j = 0; j < currentPtr->payloadBits; j++) {
+ if (((estimatedOutput[0]>>j) & 1) != ((testInput[0]>>j) & 1)) nBitError++;
+ // printf("bit %d: %d => %d\n",j,(testInput[0]>>j)&1,(estimatedOutput[0]>>j)&1);
+ }
+
+
+ if (nBitError>0) {
+ blockErrorState=1;
+ // printf("Error: Input %x, Output %x\n",testInput[0],estimatedOutput[0]);
+ }
}
//Iteration times are in microseconds.
@@ -417,7 +426,8 @@ int main(int argc, char *argv[]) {
printf("[ListSize=%d, Appr=%d] SNR=%+8.3f, BLER=%9.6f, BER=%12.9f, t_Encoder=%9.3fus, t_Decoder=%9.3fus\n",
decoderListSize, pathMetricAppr, SNR, ((double)blockErrorCumulative/iterations),
((double)bitErrorCumulative / (iterations*testLength)),
- (timeEncoderCumulative/iterations),timeDecoderCumulative/iterations);
+ (double)timeEncoder.diff/timeEncoder.trials/(cpu_freq_GHz*1000.0),(double)timeDecoder.diff/timeDecoder.trials/(cpu_freq_GHz*1000.0));
+ //(timeEncoderCumulative/iterations),timeDecoderCumulative/iterations);
if (blockErrorCumulative==0 && bitErrorCumulative==0)
break;
@@ -430,14 +440,5 @@ int main(int argc, char *argv[]) {
print_meas(&timeDecoder,"polar_decoder",NULL,NULL);
fclose(logFile);
- //Bit
- free(testInput);
- free(encoderOutput);
- free(estimatedOutput);
- //Byte
- free(encoderOutputByte);
- free(modulatedInput);
- free(channelOutput);
-
return (0);
}
diff --git a/openair1/PHY/CODING/coding_defs.h b/openair1/PHY/CODING/coding_defs.h
index 19d4826cd9b13511236eb9d95815a98f69fd5539..2040faf4a29dca0a722dfdf0208c90a9205242c5 100644
--- a/openair1/PHY/CODING/coding_defs.h
+++ b/openair1/PHY/CODING/coding_defs.h
@@ -342,7 +342,7 @@ void ccodedab_init_inv(void);
/*!\fn void crcTableInit(void)
\brief This function initializes the different crc tables.*/
-//void crcTableInit (void);
+void crcTableInit (void);
@@ -387,6 +387,8 @@ unsigned int crc12 (unsigned char * inptr, int bitlen);
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits*/
unsigned int crc8 (unsigned char * inptr, int bitlen);
+
+int check_crc(uint8_t* decoded_bytes, uint32_t n, uint32_t F, uint8_t crc_type);
/*!\fn void phy_viterbi_dot11_sse2(int8_t *y, uint8_t *decoded_bytes, uint16_t n,int offset,int traceback)
\brief This routine performs a SIMD optmized Viterbi decoder for the 802.11 64-state convolutional code. It can be
@@ -441,8 +443,6 @@ int32_t rate_matching_lte(uint32_t N_coded,
uint8_t *inPtr,
uint32_t off);
-void crcTableInit (void);
-
unsigned int crcbit (unsigned char * inputptr, int octetlen, unsigned int poly);
int16_t reverseBits(int32_t ,int32_t);
diff --git a/openair1/PHY/CODING/crc_byte.c b/openair1/PHY/CODING/crc_byte.c
index 0ad4ba62e739c9c9380f8426626d4963b5b3edb9..d728d6b9ad8202c37414d516e395eba9692f4497 100644
--- a/openair1/PHY/CODING/crc_byte.c
+++ b/openair1/PHY/CODING/crc_byte.c
@@ -58,8 +58,8 @@ The first bit is in the MSB of each byte
*********************************************************/
unsigned int crcbit (unsigned char * inputptr,
- int octetlen,
- unsigned int poly)
+ int octetlen,
+ unsigned int poly)
{
unsigned int i, crc = 0, c;
@@ -170,14 +170,12 @@ unsigned int crc24c (unsigned char * inptr,
resbit = (bitlen % 8);
while (octetlen-- > 0) {
-/*#ifdef DEBUG_CRC24C
- printf("crc24c: in %x => crc %x (%x)\n",crc,*inptr,crc24cTable[(*inptr) ^ (crc >> 24)]);
-#endif*/
crc = (crc << 8) ^ crc24cTable[(*inptr++) ^ (crc >> 24)];
}
- if (resbit > 0)
+ if (resbit > 0) {
crc = (crc << resbit) ^ crc24cTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
+ }
return crc;
}
diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
index 1d883c1fe8a33ad337b11ec7a812ccf09ca816f4..4466fc8eeae76ef5453240d9890838ff308912cd 100644
--- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
+++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
@@ -201,7 +201,7 @@ void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,sho
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
- short Zc,Kb,nrows,ncols;
+ short Zc,Kb=0,nrows=0,ncols=0;
int i,i1;
int no_punctured_columns,removed_bit;
@@ -210,7 +210,6 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int simd_size;
- //determine number of bits in codeword
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
@@ -256,7 +255,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
#endif
if ((Zc&31) > 0) simd_size = 16;
- else simd_size = 32;
+ else simd_size = 32;
unsigned char c[22*Zc] __attribute__((aligned(32))); //padded input, unpacked, max size
unsigned char d[46*Zc] __attribute__((aligned(32))); //coded parity part output, unpacked, max size
@@ -321,7 +320,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
- short Zc,Kb,nrows,ncols;
+ short Zc,Kb=0,nrows=0,ncols=0;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -521,7 +520,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **channel_input,short block_length, short BG, int n_segments,unsigned int macro_num, time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
- short Zc,Kb,nrows,ncols;
+ short Zc,Kb=0,nrows=0,ncols=0;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
diff --git a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
index 07335b2cfb5971aa01499d0e737dd14991cc092e..13318c9d5d7cbb8d90d8d44e3319a1677038164f 100644
--- a/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
+++ b/openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
@@ -367,7 +367,13 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
unsigned char d[68*384]; //coded output, unpacked, max size
unsigned char channel_temp,temp;
short *Gen_shift_values, *no_shift_values, *pointer_shift_values;
- short Zc,Kb,nrows,ncols;
+ short Zc;
+ //initialize for BG == 1
+ short Kb = 22;
+ short nrows = 46;//parity check bits
+ short ncols = 22;//info bits
+
+
int i,i1,i2,i3,i4,i5,temp_prime,var;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -438,6 +444,9 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
no_shift_values=(short *) no_shift_values_BG2;
pointer_shift_values=(short *) pointer_shift_values_BG2;
}
+ else {
+ AssertFatal(0,"BG %d is not supported yet\n",BG);
+ }
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
index 2c9f8ad985dd43175f70b26864f0f6a2f18b742d..305a9c62663c488c2c9cc10aeac0fe2380dff0d5 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
@@ -37,7 +37,7 @@
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
-
+#include "assertions.h"
int8_t polar_decoder(
double *input,
@@ -48,11 +48,11 @@ int8_t polar_decoder(
{
//Assumes no a priori knowledge.
- uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
- uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
+ uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
+ uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
@@ -231,9 +231,9 @@ int8_t polar_decoder(
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -256,6 +256,7 @@ int8_t polar_decoder(
//Deinterleaving (ĉ to b)
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
+
//Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
@@ -266,11 +267,11 @@ int8_t polar_decoder(
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
- nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
- nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
+ nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
@@ -280,17 +281,17 @@ int8_t polar_decoder(
}
int8_t polar_decoder_aPriori(double *input,
- uint32_t *out,
- t_nrPolar_paramsPtr polarParams,
- uint8_t listSize,
- uint8_t pathMetricAppr,
- double *aPrioriPayload)
+ uint32_t *out,
+ t_nrPolar_paramsPtr polarParams,
+ uint8_t listSize,
+ uint8_t pathMetricAppr,
+ double *aPrioriPayload)
{
- uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
- uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
+ uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
+ uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
@@ -483,9 +484,9 @@ int8_t polar_decoder_aPriori(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -509,8 +510,8 @@ int8_t polar_decoder_aPriori(double *input,
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
- for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
-
+ for (int j = 0; j < polarParams->payloadBits; j++)
+ polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
break;
}
}
@@ -518,16 +519,17 @@ int8_t polar_decoder_aPriori(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
- nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
- nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
+ nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
+
return(0);
}
@@ -544,11 +546,11 @@ int8_t polar_decoder_aPriori_timing(double *input,
FILE* logFile)
{
- uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
- uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
+ uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
+ uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
@@ -740,9 +742,9 @@ int8_t polar_decoder_aPriori_timing(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -775,11 +777,11 @@ int8_t polar_decoder_aPriori_timing(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
- nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
- nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
+ nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
@@ -797,11 +799,11 @@ int8_t polar_decoder_dci(double *input,
uint16_t n_RNTI)
{
- uint8_t ***bit = nr_alloc_uint8_t_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **bitUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
- uint8_t **llrUpdated = nr_alloc_uint8_t_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
+ uint8_t **bitUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
+ uint8_t **llrUpdated = nr_alloc_uint8_2D_array(polarParams->N, (polarParams->n+1)); //0=False, 1=True
double ***llr = nr_alloc_double_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
- uint8_t **crcChecksum = nr_alloc_uint8_t_2D_array(polarParams->crcParityBits, 2*listSize);
+ uint8_t **crcChecksum = nr_alloc_uint8_2D_array(polarParams->crcParityBits, 2*listSize);
double *pathMetric = malloc(sizeof(double)*(2*listSize));
uint8_t *crcState = malloc(sizeof(uint8_t)*(2*listSize)); //0=False, 1=True
uint8_t extended_crc_scrambling_pattern[polarParams->crcParityBits];
@@ -989,9 +991,9 @@ int8_t polar_decoder_dci(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
return(-1);
}
@@ -1024,11 +1026,11 @@ int8_t polar_decoder_dci(double *input,
free(d_tilde);
free(pathMetric);
free(crcState);
- nr_free_uint8_t_3D_array(bit, polarParams->N, (polarParams->n+1));
+ nr_free_uint8_3D_array(bit, polarParams->N, (polarParams->n+1));
nr_free_double_3D_array(llr, polarParams->N, (polarParams->n+1));
- nr_free_uint8_t_2D_array(crcChecksum, polarParams->crcParityBits);
- nr_free_uint8_t_2D_array(extended_crc_generator_matrix, polarParams->K);
- nr_free_uint8_t_2D_array(tempECGM, polarParams->K);
+ nr_free_uint8_2D_array(crcChecksum, polarParams->crcParityBits);
+ nr_free_uint8_2D_array(extended_crc_generator_matrix, polarParams->K);
+ nr_free_uint8_2D_array(tempECGM, polarParams->K);
/*
* Return bits.
@@ -1037,49 +1039,130 @@ int8_t polar_decoder_dci(double *input,
return(0);
}
+void init_polar_deinterleaver_table(t_nrPolar_params *polarParams) {
+
+ AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
+ AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K);
+
+ int bit_i,ip,ipmod64;
+
+ int numbytes = polarParams->K>>3;
+ int residue = polarParams->K&7;
+ int numbits;
+ if (residue>0) numbytes++;
+ for (int byte=0;byte<numbytes;byte++) {
+ if (byte<(polarParams->K>>3)) numbits=8;
+ else numbits=residue;
+ for (int i=0;i<numbits;i++) {
+ // flip bit endian for B
+ ip=polarParams->K - 1 - polarParams->interleaving_pattern[(8*byte)+i];
+#if 0
+ printf("byte %d, i %d => ip %d\n",byte,i,ip);
+#endif
+ ipmod64 = ip&63;
+ AssertFatal(ip<128,"ip = %d\n",ip);
+ for (int val=0;val<256;val++) {
+ bit_i=(val>>i)&1;
+ if (ip<64) polarParams->B_tab0[byte][val] |= (((uint64_t)bit_i)<<ipmod64);
+ else polarParams->B_tab1[byte][val] |= (((uint64_t)bit_i)<<ipmod64);
+ }
+ }
+ }
+
+}
-int8_t polar_decoder_int16(int16_t *input,
- uint8_t *out,
- t_nrPolar_params *polarParams)
+uint32_t polar_decoder_int16(int16_t *input,
+ uint64_t *out,
+ t_nrPolar_params *polarParams)
{
int16_t d_tilde[polarParams->N];// = malloc(sizeof(double) * polarParams->N);
+
nr_polar_rate_matching_int16(input, d_tilde, polarParams->rate_matching_pattern, polarParams->K, polarParams->N, polarParams->encoderLength);
for (int i=0;i<polarParams->N;i++) {
if (d_tilde[i]<-128) d_tilde[i]=-128;
else if (d_tilde[i]>127) d_tilde[i]=128;
}
+
memcpy((void*)&polarParams->tree.root->alpha[0],(void*)&d_tilde[0],sizeof(int16_t)*polarParams->N);
- /*
- * SCL polar decoder.
- */
-
-
generic_polar_decoder(polarParams,polarParams->tree.root);
//Extract the information bits (û to ĉ)
- nr_polar_info_bit_extraction(polarParams->nr_polar_U, polarParams->nr_polar_CPrime, polarParams->information_bit_pattern, polarParams->N);
+ uint64_t Cprime[4]={0,0,0,0};
+ uint64_t B[4]={0,0,0,0};
+ for (int i=0;i<polarParams->K;i++) Cprime[i>>6] = Cprime[i>>6] | ((uint64_t)polarParams->nr_polar_U[polarParams->Q_I_N[i]])<<(i&63);
//Deinterleaving (ĉ to b)
+ uint8_t *Cprimebyte = (uint8_t*)Cprime;
+ if (polarParams->K<65) {
+ B[0] = polarParams->B_tab0[0][Cprimebyte[0]] |
+ polarParams->B_tab0[1][Cprimebyte[1]] |
+ polarParams->B_tab0[2][Cprimebyte[2]] |
+ polarParams->B_tab0[3][Cprimebyte[3]] |
+ polarParams->B_tab0[4][Cprimebyte[4]] |
+ polarParams->B_tab0[5][Cprimebyte[5]] |
+ polarParams->B_tab0[6][Cprimebyte[6]] |
+ polarParams->B_tab0[7][Cprimebyte[7]];
+ }
+ else if (polarParams->K<129) {
+ int len = polarParams->K/8;
+ if ((polarParams->K&7) > 0) len++;
+ for (int k=0;k<len;k++) {
+ B[0] |= polarParams->B_tab0[k][Cprimebyte[k]];
+ B[1] |= polarParams->B_tab1[k][Cprimebyte[k]];
+ }
+ }
- nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
-
- //Remove the CRC (â)
- //for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
- // Check the CRC
- for (int j=0;j<polarParams->crcParityBits;j++) {
- int crcbit=0;
- for (int i=0;i<polarParams->payloadBits;i++)
- crcbit = crcbit ^ (polarParams->crc_generator_matrix[i][j] & polarParams->nr_polar_B[i]);
- if (crcbit != polarParams->nr_polar_B[polarParams->payloadBits+j]) return(-1);
+ int len=polarParams->payloadBits;
+ //int len_mod64=len&63;
+ int crclen = polarParams->crcParityBits;
+ uint64_t rxcrc=B[0]&((1<<crclen)-1);
+ uint32_t crc;
+ uint64_t Ar;
+
+ AssertFatal(len<65,"A must be less than 65 bits\n");
+ if (len<=32) {
+ Ar = (uint32_t)(B[0]>>crclen);
+ uint8_t A32_flip[4];
+ uint32_t Aprime= (uint32_t)(Ar<<(32-len));
+ A32_flip[0]=((uint8_t*)&Aprime)[3];
+ A32_flip[1]=((uint8_t*)&Aprime)[2];
+ A32_flip[2]=((uint8_t*)&Aprime)[1];
+ A32_flip[3]=((uint8_t*)&Aprime)[0];
+ crc = (uint64_t)(crc24c(A32_flip,len)>>8);
}
- // pack into ceil(payloadBits/32) 32 bit words, lowest index in MSB
- // nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
- nr_byte2bit_uint8_32_t(polarParams->nr_polar_B, polarParams->payloadBits, (unsigned int *)out);
- return(0);
+ else if (len<=64) {
+ Ar = (B[0]>>crclen) | (B[1]<<(64-crclen));;
+ uint8_t A64_flip[8];
+ uint64_t Aprime= (uint32_t)(Ar<<(64-len));
+ A64_flip[0]=((uint8_t*)&Aprime)[7];
+ A64_flip[1]=((uint8_t*)&Aprime)[6];
+ A64_flip[2]=((uint8_t*)&Aprime)[5];
+ A64_flip[3]=((uint8_t*)&Aprime)[4];
+ A64_flip[4]=((uint8_t*)&Aprime)[3];
+ A64_flip[5]=((uint8_t*)&Aprime)[2];
+ A64_flip[6]=((uint8_t*)&Aprime)[1];
+ A64_flip[7]=((uint8_t*)&Aprime)[0];
+ crc = (uint64_t)(crc24c(A64_flip,len)>>8);
+ }
+
+#if 0
+ printf("A %llx B %llx|%llx Cprime %llx|%llx (crc %x,rxcrc %llx %d)\n",
+ Ar,
+ B[1],B[0],Cprime[1],Cprime[0],crc,
+ rxcrc,polarParams->payloadBits);
+#endif
+
+ out[0]=Ar;
+
+
+ return(crc^rxcrc);
+
+
+
}
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
index 1967d3934c19d321f2f8622942a4d702ec758b3b..bec322b946c11159d9d8a722906a1fe026645d91 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
@@ -34,18 +34,18 @@
#include "PHY/sse_intrin.h"
#include "PHY/impl_defs_top.h"
-//#define DEBUG_NEW_IMPL
+//#define DEBUG_NEW_IMPL 1
void updateLLR(double ***llr,
- uint8_t **llrU,
- uint8_t ***bit,
- uint8_t **bitU,
- uint8_t listSize,
- uint16_t row,
- uint16_t col,
- uint16_t xlen,
- uint8_t ylen,
- uint8_t approximation)
+ uint8_t **llrU,
+ uint8_t ***bit,
+ uint8_t **bitU,
+ uint8_t listSize,
+ uint16_t row,
+ uint16_t col,
+ uint16_t xlen,
+ uint8_t ylen,
+ uint8_t approximation)
{
uint16_t offset = (xlen/(pow(2,(ylen-col-1))));
for (uint8_t i=0; i<listSize; i++) {
@@ -219,8 +219,8 @@ decoder_node_t *add_nodes(int level,int first_leaf_index,t_nrPolar_params *pp) {
decoder_node_t *new_node = new_decoder_node(first_leaf_index,level);
#ifdef DEBUG_NEW_IMPL
printf("New node %d order %d, level %d\n",pp->tree.num_nodes,Nv,level);
- pp->tree.num_nodes++;
#endif
+ pp->tree.num_nodes++;
if (level==0) {
#ifdef DEBUG_NEW_IMPL
printf("leaf %d (%s)\n",first_leaf_index,pp->information_bit_pattern[first_leaf_index]==1 ? "information or crc" : "frozen");
@@ -233,16 +233,19 @@ decoder_node_t *add_nodes(int level,int first_leaf_index,t_nrPolar_params *pp) {
for (int i=0;i<Nv;i++) {
if (pp->information_bit_pattern[i+first_leaf_index]>0) all_frozen_below=0;
}
-if (all_frozen_below==0) new_node->left=add_nodes(level-1,first_leaf_index,pp);
- else {
+ if (all_frozen_below==0) new_node->left=add_nodes(level-1,first_leaf_index,pp);
+ else {
#ifdef DEBUG_NEW_IMPL
- printf("aggregating frozen bits %d ... %d at level %d (%s)\n",first_leaf_index,first_leaf_index+Nv-1,level,((first_leaf_index/Nv)&1)==0?"left":"right");
+ printf("aggregating frozen bits %d ... %d at level %d (%s)\n",first_leaf_index,first_leaf_index+Nv-1,level,((first_leaf_index/Nv)&1)==0?"left":"right");
#endif
new_node->leaf=1;
new_node->all_frozen=1;
}
if (all_frozen_below==0) new_node->right=add_nodes(level-1,first_leaf_index+(Nv/2),pp);
+#ifdef DEBUG_NEW_IMPL
+ printf("new_node (%d): first_leaf_index %d, left %p, right %p\n",Nv,first_leaf_index,new_node->left,new_node->right);
+#endif
return(new_node);
}
@@ -251,7 +254,9 @@ void build_decoder_tree(t_nrPolar_params *pp) {
pp->tree.num_nodes=0;
pp->tree.root = add_nodes(pp->n,0,pp);
-
+#ifdef DEBUG_NEW_IMPL
+ printf("root : left %p, right %p\n",pp->tree.root->left,pp->tree.root->right);
+#endif
}
#if defined(__arm__) || defined(__aarch64__)
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h b/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
index 30584c7ddc98f5fe3d3b9f85cc348e8eb5fea3c1..68e9ef35714fcd2e868e07b2d8c80b8bb123e0d7 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
@@ -78,54 +78,62 @@ typedef struct decoder_tree_t_s {
} decoder_tree_t;
struct nrPolar_params {
- //messageType: 0=PBCH, 1=DCI, -1=UCI
- int idx; //idx = (messageType * messageLength * aggregation_prime);
- struct nrPolar_params *nextPtr;
-
- uint8_t n_max;
- uint8_t i_il;
- uint8_t i_seg;
- uint8_t n_pc;
- uint8_t n_pc_wm;
- uint8_t i_bil;
- uint16_t payloadBits;
- uint16_t encoderLength;
- uint8_t crcParityBits;
- uint8_t crcCorrectionBits;
- uint16_t K;
- uint16_t N;
- uint8_t n;
- uint32_t crcBit;
-
- uint16_t *interleaving_pattern;
- uint16_t *rate_matching_pattern;
- const uint16_t *Q_0_Nminus1;
- int16_t *Q_I_N;
- int16_t *Q_F_N;
- int16_t *Q_PC_N;
- uint8_t *information_bit_pattern;
- uint16_t *channel_interleaver_pattern;
- uint32_t crc_polynomial;
-
- uint8_t **crc_generator_matrix; //G_P
- uint8_t **G_N;
- uint32_t* crc256Table;
+ //messageType: 0=PBCH, 1=DCI, -1=UCI
+ int idx; //idx = (messageType * messageLength * aggregation_prime);
+ struct nrPolar_params *nextPtr;
+
+ uint8_t n_max;
+ uint8_t i_il;
+ uint8_t i_seg;
+ uint8_t n_pc;
+ uint8_t n_pc_wm;
+ uint8_t i_bil;
+ uint16_t payloadBits;
+ uint16_t encoderLength;
+ uint8_t crcParityBits;
+ uint8_t crcCorrectionBits;
+ uint16_t K;
+ uint16_t N;
+ uint8_t n;
+ uint32_t crcBit;
+
+ uint16_t *interleaving_pattern;
+ uint16_t *deinterleaving_pattern;
+ uint16_t *rate_matching_pattern;
+ const uint16_t *Q_0_Nminus1;
+ int16_t *Q_I_N;
+ int16_t *Q_F_N;
+ int16_t *Q_PC_N;
+ uint8_t *information_bit_pattern;
+ uint16_t *channel_interleaver_pattern;
+ uint32_t crc_polynomial;
+
+ uint8_t **crc_generator_matrix; //G_P
+ uint8_t **G_N;
+ uint64_t **G_N_tab;
+ int groupsize;
+ int *rm_tab;
+ uint64_t cprime_tab0[32][256];
+ uint64_t cprime_tab1[32][256];
+ uint64_t B_tab0[32][256];
+ uint64_t B_tab1[32][256];
+ uint32_t* crc256Table;
uint8_t **extended_crc_generator_matrix;
- //lowercase: bits, Uppercase: Bits stored in bytes
- //polar_encoder vectors
- uint8_t *nr_polar_crc;
- uint8_t *nr_polar_aPrime;
- uint8_t *nr_polar_APrime;
- uint8_t *nr_polar_D;
- uint8_t *nr_polar_E;
-
- //Polar Coding vectors
- uint8_t *nr_polar_A;
- uint8_t *nr_polar_CPrime;
- uint8_t *nr_polar_B;
- uint8_t *nr_polar_U;
-
-decoder_tree_t tree;
+ //lowercase: bits, Uppercase: Bits stored in bytes
+ //polar_encoder vectors
+ uint8_t *nr_polar_crc;
+ uint8_t *nr_polar_aPrime;
+ uint8_t *nr_polar_APrime;
+ uint8_t *nr_polar_D;
+ uint8_t *nr_polar_E;
+
+ //Polar Coding vectors
+ uint8_t *nr_polar_A;
+ uint8_t *nr_polar_CPrime;
+ uint8_t *nr_polar_B;
+ uint8_t *nr_polar_U;
+
+ decoder_tree_t tree;
} __attribute__ ((__packed__));
typedef struct nrPolar_params t_nrPolar_params;
typedef t_nrPolar_params *t_nrPolar_paramsPtr;
@@ -139,11 +147,10 @@ void polar_encoder_dci(uint32_t *in,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI);
-void polar_encoder_timing(uint32_t *in,
- uint32_t *out,
- t_nrPolar_paramsPtr polarParams,
- double cpuFreqGHz,
- FILE* logFile);
+void polar_encoder_fast(uint64_t *A,
+ uint32_t *out,
+ int32_t crcmask,
+ t_nrPolar_paramsPtr polarParams);
int8_t polar_decoder(double *input,
uint8_t *output,
@@ -151,6 +158,10 @@ int8_t polar_decoder(double *input,
uint8_t listSize,
uint8_t pathMetricAppr);
+uint32_t polar_decoder_int16(int16_t *input,
+ uint64_t *out,
+ t_nrPolar_params *polarParams);
+
int8_t polar_decoder_aPriori(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
@@ -174,7 +185,12 @@ int8_t polar_decoder_dci(double *input,
uint8_t pathMetricAppr,
uint16_t n_RNTI);
-void generic_polar_decoder(t_nrPolar_params *,decoder_node_t *);
+void generic_polar_decoder(t_nrPolar_params *,
+ decoder_node_t *);
+
+void build_decoder_tree(t_nrPolar_params *pp);
+void build_polar_tables(t_nrPolar_paramsPtr polarParams);
+void init_polar_deinterleaver_table(t_nrPolar_params *polarParams);
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
int8_t messageType,
@@ -200,153 +216,168 @@ const uint16_t* nr_polar_sequence_pattern(uint8_t n);
* @param E
* @param n_max */
uint32_t nr_polar_output_length(uint16_t K,
- uint16_t E,
- uint8_t n_max);
+ uint16_t E,
+ uint8_t n_max);
void nr_polar_channel_interleaver_pattern(uint16_t *cip,
- uint8_t I_BIL,
- uint16_t E);
+ uint8_t I_BIL,
+ uint16_t E);
void nr_polar_rate_matching_pattern(uint16_t *rmp,
- uint16_t *J,
- const uint8_t *P_i_,
- uint16_t K,
- uint16_t N,
- uint16_t E);
+ uint16_t *J,
+ const uint8_t *P_i_,
+ uint16_t K,
+ uint16_t N,
+ uint16_t E);
void nr_polar_rate_matching(double *input,
- double *output,
- uint16_t *rmp,
- uint16_t K,
- uint16_t N,
- uint16_t E);
-
-void nr_polar_rate_matching_int16(int16_t *input, int16_t *output, uint16_t *rmp, uint16_t K, uint16_t N, uint16_t E);
+ double *output,
+ uint16_t *rmp,
+ uint16_t K,
+ uint16_t N,
+ uint16_t E);
+
+void nr_polar_rate_matching_int16(int16_t *input,
+ int16_t *output,
+ uint16_t *rmp,
+ uint16_t K,
+ uint16_t N,
+ uint16_t E);
void nr_polar_interleaving_pattern(uint16_t K,
- uint8_t I_IL,
- uint16_t *PI_k_);
+ uint8_t I_IL,
+ uint16_t *PI_k_);
void nr_polar_info_bit_pattern(uint8_t *ibp,
- int16_t *Q_I_N,
- int16_t *Q_F_N,
- uint16_t *J,
- const uint16_t *Q_0_Nminus1,
- uint16_t K,
- uint16_t N,
- uint16_t E,
- uint8_t n_PC);
+ int16_t *Q_I_N,
+ int16_t *Q_F_N,
+ uint16_t *J,
+ const uint16_t *Q_0_Nminus1,
+ uint16_t K,
+ uint16_t N,
+ uint16_t E,
+ uint8_t n_PC);
void nr_polar_info_bit_extraction(uint8_t *input,
- uint8_t *output,
- uint8_t *pattern,
- uint16_t size);
+ uint8_t *output,
+ uint8_t *pattern,
+ uint16_t size);
void nr_bit2byte_uint32_8_t(uint32_t *in,
- uint16_t arraySize,
- uint8_t *out);
+ uint16_t arraySize,
+ uint8_t *out);
void nr_byte2bit_uint8_32_t(uint8_t *in,
- uint16_t arraySize,
- uint32_t *out);
+ uint16_t arraySize,
+ uint32_t *out);
void nr_crc_bit2bit_uint32_8_t(uint32_t *in,
- uint16_t arraySize,
- uint8_t *out);
+ uint16_t arraySize,
+ uint8_t *out);
void nr_polar_bit_insertion(uint8_t *input,
- uint8_t *output,
- uint16_t N,
- uint16_t K,
- int16_t *Q_I_N,
- int16_t *Q_PC_N,
- uint8_t n_PC);
-
-void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1,
- uint8_t **matrix2,
- uint8_t *output,
- uint16_t row,
- uint16_t col);
-
-uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen,
- uint16_t ylen,
- uint16_t zlen);
-
-uint8_t **nr_alloc_uint8_t_2D_array(uint16_t xlen,
- uint16_t ylen);
+ uint8_t *output,
+ uint16_t N,
+ uint16_t K,
+ int16_t *Q_I_N,
+ int16_t *Q_PC_N,
+ uint8_t n_PC);
+
+void nr_matrix_multiplication_uint8_1D_uint8_2D(uint8_t *matrix1,
+ uint8_t **matrix2,
+ uint8_t *output,
+ uint16_t row,
+ uint16_t col);
+
+uint8_t ***nr_alloc_uint8_3D_array(uint16_t xlen,
+ uint16_t ylen,
+ uint16_t zlen);
+
+uint8_t **nr_alloc_uint8_2D_array(uint16_t xlen,
+ uint16_t ylen);
double ***nr_alloc_double_3D_array(uint16_t xlen,
- uint16_t ylen,
- uint16_t zlen);
+ uint16_t ylen,
+ uint16_t zlen);
-void nr_free_uint8_t_3D_array(uint8_t ***input,
- uint16_t xlen,
- uint16_t ylen);
-
-void nr_free_uint8_t_2D_array(uint8_t **input,
- uint16_t xlen);
+double **nr_alloc_double_2D_array(uint16_t xlen,
+ uint16_t ylen);
void nr_free_double_3D_array(double ***input,
- uint16_t xlen,
- uint16_t ylen);
+ uint16_t xlen,
+ uint16_t ylen);
+
+void nr_free_double_2D_array(double **input,
+ uint16_t xlen);
+
+void nr_free_uint8_3D_array(uint8_t ***input,
+ uint16_t xlen,
+ uint16_t ylen);
+
+void nr_free_uint8_2D_array(uint8_t **input,
+ uint16_t xlen);
+
+void nr_sort_asc_double_1D_array_ind(double *matrix,
+ uint8_t *ind,
+ uint8_t len);
+
+void nr_sort_asc_int16_1D_array_ind(int32_t *matrix,
+ int *ind,
+ int len);
void nr_free_double_2D_array(double **input, uint16_t xlen);
void updateLLR(double ***llr,
- uint8_t **llrU,
- uint8_t ***bit,
- uint8_t **bitU,
- uint8_t listSize,
- uint16_t row,
- uint16_t col,
- uint16_t xlen,
- uint8_t ylen,
- uint8_t approximation);
+ uint8_t **llrU,
+ uint8_t ***bit,
+ uint8_t **bitU,
+ uint8_t listSize,
+ uint16_t row,
+ uint16_t col,
+ uint16_t xlen,
+ uint8_t ylen,
+ uint8_t approximation);
void updateBit(uint8_t ***bit,
- uint8_t **bitU,
- uint8_t listSize,
- uint16_t row,
- uint16_t col,
- uint16_t xlen,
- uint8_t ylen);
+ uint8_t **bitU,
+ uint8_t listSize,
+ uint16_t row,
+ uint16_t col,
+ uint16_t xlen,
+ uint8_t ylen);
void updatePathMetric(double *pathMetric,
- double ***llr,
- uint8_t listSize,
- uint8_t bitValue,
- uint16_t row,
- uint8_t approximation);
+ double ***llr,
+ uint8_t listSize,
+ uint8_t bitValue,
+ uint16_t row,
+ uint8_t approximation);
void updatePathMetric2(double *pathMetric,
- double ***llr,
- uint8_t listSize,
- uint16_t row,
- uint8_t approximation);
+ double ***llr,
+ uint8_t listSize,
+ uint16_t row,
+ uint8_t approximation);
void computeLLR(double ***llr,
- uint16_t row,
- uint16_t col,
- uint8_t i,
- uint16_t offset,
- uint8_t approximation);
+ uint16_t row,
+ uint16_t col,
+ uint8_t i,
+ uint16_t offset,
+ uint8_t approximation);
void updateCrcChecksum(uint8_t **crcChecksum,
- uint8_t **crcGen,
- uint8_t listSize,
- uint32_t i2,
- uint8_t len);
+ uint8_t **crcGen,
+ uint8_t listSize,
+ uint32_t i2,
+ uint8_t len);
void updateCrcChecksum2(uint8_t **crcChecksum,
- uint8_t **crcGen,
- uint8_t listSize,
- uint32_t i2,
- uint8_t len);
-
-void nr_sort_asc_double_1D_array_ind(double *matrix,
- uint8_t *ind,
- uint8_t len);
+ uint8_t **crcGen,
+ uint8_t listSize,
+ uint32_t i2,
+ uint8_t len);
uint8_t **crc24c_generator_matrix(uint16_t payloadSizeBits);
@@ -356,11 +387,11 @@ uint8_t **crc6_generator_matrix(uint16_t payloadSizeBits);
//Also nr_polar_rate_matcher
static inline void nr_polar_interleaver(uint8_t *input,
- uint8_t *output,
- uint16_t *pattern,
- uint16_t size)
+ uint8_t *output,
+ uint16_t *pattern,
+ uint16_t size)
{
- for (int i=0; i<size; i++) output[i]=input[pattern[i]];
+ for (int i=0; i<size; i++) output[i]=input[pattern[i]];
}
static inline void nr_polar_deinterleaver(uint8_t *input,
@@ -375,7 +406,4 @@ static inline void nr_polar_deinterleaver(uint8_t *input,
void build_decoder_tree(t_nrPolar_params *pp);
-int8_t polar_decoder_int16(int16_t *input,
- uint8_t *out,
- t_nrPolar_params *polarParams);
#endif
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
index fb2723f7b005e828fcd43a582229055aa152265b..50d14d87e211f88481a849b55a0699acb34fafc5 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
@@ -21,296 +21,541 @@
/*!\file PHY/CODING/nrPolar_tools/nr_polar_encoder.c
* \brief
- * \author Turker Yilmaz
+ * \author Raymond Knopp, Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
- * \email turker.yilmaz@eurecom.fr
+ * \email raymond.knopp@eurecom.fr, turker.yilmaz@eurecom.fr
* \note
* \warning
-*/
+ */
//#define DEBUG_POLAR_ENCODER
//#define DEBUG_POLAR_ENCODER_DCI
//#define DEBUG_POLAR_ENCODER_TIMING
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
+#include "assertions.h"
//input [a_31 a_30 ... a_0]
//output [f_31 f_30 ... f_0] [f_63 f_62 ... f_32] ...
void polar_encoder(uint32_t *in,
- uint32_t *out,
- t_nrPolar_paramsPtr polarParams)
+ uint32_t *out,
+ t_nrPolar_paramsPtr polarParams)
{
- if (polarParams->idx == 0){//PBCH
- nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
- /*
- * Bytewise operations
- */
- //Calculate CRC.
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_A,
- polarParams->crc_generator_matrix,
- polarParams->nr_polar_crc,
- polarParams->payloadBits,
- polarParams->crcParityBits);
- for (uint8_t i = 0; i < polarParams->crcParityBits; i++)
- polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
-
- //Attach CRC to the Transport Block. (a to b)
- for (uint16_t i = 0; i < polarParams->payloadBits; i++)
- polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
- for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
- polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
- } else { //UCI
+ if (polarParams->idx == 0){//PBCH
+ /*
+ uint64_t B = (((uint64_t)*in)&((((uint64_t)1)<<32)-1)) | (((uint64_t)crc24c((uint8_t*)in,polarParams->payloadBits)>>8)<<polarParams->payloadBits);
+#ifdef DEBUG_POLAR_ENCODER
+ printf("polar_B %llx (crc %x)\n",B,crc24c((uint8_t*)in,polarParams->payloadBits)>>8);
+#endif
+nr_bit2byte_uint32_8_t((uint32_t*)&B, polarParams->K, polarParams->nr_polar_B);*/
+
+ nr_bit2byte_uint32_8_t((uint32_t*)in, polarParams->payloadBits, polarParams->nr_polar_A);
+ /*
+ * Bytewise operations
+ */
+ //Calculate CRC.
+
+ nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_A,
+ polarParams->crc_generator_matrix,
+ polarParams->nr_polar_crc,
+ polarParams->payloadBits,
+ polarParams->crcParityBits);
+ for (uint8_t i = 0; i < polarParams->crcParityBits; i++)
+ polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
+
+
+ //Attach CRC to the Transport Block. (a to b)
+ for (uint16_t i = 0; i < polarParams->payloadBits; i++)
+ polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
+ for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
+ polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
+
+#ifdef DEBUG_POLAR_ENCODER
+ uint64_t B2=0;
+ for (int i = 0;i<polarParams->K;i++) B2 = B2 | ((uint64_t)polarParams->nr_polar_B[i] << i);
+ printf("polar_B %llx\n",B2);
+#endif
+ /* for (int j=0;j<polarParams->crcParityBits;j++) {
+ for (int i=0;i<polarParams->payloadBits;i++)
+ printf("%1d.%1d+",polarParams->crc_generator_matrix[i][j],polarParams->nr_polar_A[i]);
+ printf(" => %d\n",polarParams->nr_polar_crc[j]);
+ }*/
+
+ } else { //UCI
+
+ }
+
+ //Interleaving (c to c')
+ nr_polar_interleaver(polarParams->nr_polar_B,
+ polarParams->nr_polar_CPrime,
+ polarParams->interleaving_pattern,
+ polarParams->K);
+
+
+#ifdef DEBUG_POLAR_ENCODER
+ uint64_t Cprime=0;
+ for (int i = 0;i<polarParams->K;i++) {
+ Cprime = Cprime | ((uint64_t)polarParams->nr_polar_CPrime[i] << i);
+ if (polarParams->nr_polar_CPrime[i] == 1) printf("pos %d : %llx\n",i,Cprime);
+ }
+ printf("polar_Cprime %llx\n",Cprime);
+#endif
+ //Bit insertion (c' to u)
+ nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
+ polarParams->nr_polar_U,
+ polarParams->N,
+ polarParams->K,
+ polarParams->Q_I_N,
+ polarParams->Q_PC_N,
+ polarParams->n_pc);
+
+ //Encoding (u to d)
+ /* memset(polarParams->nr_polar_U,0,polarParams->N);
+ polarParams->nr_polar_U[247]=1;
+ polarParams->nr_polar_U[253]=1;*/
+ nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_U,
+ polarParams->G_N,
+ polarParams->nr_polar_D,
+ polarParams->N,
+ polarParams->N);
+ for (uint16_t i = 0; i < polarParams->N; i++)
+ polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
+
+ uint64_t D[8];
+ memset((void*)D,0,8*sizeof(int64_t));
+#ifdef DEBUG_POLAR_ENCODER
+ for (int i=0;i<polarParams->N;i++) D[i/64] |= ((uint64_t)polarParams->nr_polar_D[i])<<(i&63);
+ printf("D %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",
+ D[0],D[1],D[2],D[3],D[4],D[5],D[6],D[7]);
+#endif
- }
+ //Rate matching
+ //Sub-block interleaving (d to y) and Bit selection (y to e)
+ nr_polar_interleaver(polarParams->nr_polar_D,
+ polarParams->nr_polar_E,
+ polarParams->rate_matching_pattern,
+ polarParams->encoderLength);
- //Interleaving (c to c')
- nr_polar_interleaver(polarParams->nr_polar_B,
- polarParams->nr_polar_CPrime,
- polarParams->interleaving_pattern,
- polarParams->K);
-
- //Bit insertion (c' to u)
- nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
- polarParams->nr_polar_U,
- polarParams->N,
- polarParams->K,
- polarParams->Q_I_N,
- polarParams->Q_PC_N,
- polarParams->n_pc);
-
- //Encoding (u to d)
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U,
- polarParams->G_N,
- polarParams->nr_polar_D,
- polarParams->N,
- polarParams->N);
- for (uint16_t i = 0; i < polarParams->N; i++)
- polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
-
- //Rate matching
- //Sub-block interleaving (d to y) and Bit selection (y to e)
- nr_polar_interleaver(polarParams->nr_polar_D,
- polarParams->nr_polar_E,
- polarParams->rate_matching_pattern,
- polarParams->encoderLength);
-
- /*
- * Return bits.
- */
+ /*
+ * Return bits.
+ */
#ifdef DEBUG_POLAR_ENCODER
- for (int i=0; i< polarParams->encoderLength;i++) printf("f[%d]=%d\n", i, polarParams->nr_polar_E[i]);
+ for (int i=0; i< polarParams->encoderLength;i++) printf("f[%d]=%d\n", i, polarParams->nr_polar_E[i]);
#endif
- nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
+ nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
}
void polar_encoder_dci(uint32_t *in,
- uint32_t *out,
- t_nrPolar_paramsPtr polarParams,
- uint16_t n_RNTI)
+ uint32_t *out,
+ t_nrPolar_paramsPtr polarParams,
+ uint16_t n_RNTI)
{
#ifdef DEBUG_POLAR_ENCODER_DCI
- printf("[polar_encoder_dci] in: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", in[0], in[1], in[2], in[3]);
+ printf("[polar_encoder_dci] in: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", in[0], in[1], in[2], in[3]);
#endif
- /*
- * Bytewise operations
- */
- //(a to a')
- nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
- for (int i=0; i<polarParams->crcParityBits; i++) polarParams->nr_polar_APrime[i]=1;
- for (int i=0; i<polarParams->payloadBits; i++) polarParams->nr_polar_APrime[i+(polarParams->crcParityBits)]=polarParams->nr_polar_A[i];
+ /*
+ * Bytewise operations
+ */
+ //(a to a')
+ nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
+ for (int i=0; i<polarParams->crcParityBits; i++) polarParams->nr_polar_APrime[i]=1;
+ for (int i=0; i<polarParams->payloadBits; i++) polarParams->nr_polar_APrime[i+(polarParams->crcParityBits)]=polarParams->nr_polar_A[i];
#ifdef DEBUG_POLAR_ENCODER_DCI
- printf("[polar_encoder_dci] A: ");
- for (int i=0; i<polarParams->payloadBits; i++) printf("%d-", polarParams->nr_polar_A[i]);
- printf("\n");
- printf("[polar_encoder_dci] APrime: ");
- for (int i=0; i<polarParams->K; i++) printf("%d-", polarParams->nr_polar_APrime[i]);
- printf("\n");
- printf("[polar_encoder_dci] GP: ");
- for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->crc_generator_matrix[0][i]);
- printf("\n");
+ printf("[polar_encoder_dci] A: ");
+ for (int i=0; i<polarParams->payloadBits; i++) printf("%d-", polarParams->nr_polar_A[i]);
+ printf("\n");
+ printf("[polar_encoder_dci] APrime: ");
+ for (int i=0; i<polarParams->K; i++) printf("%d-", polarParams->nr_polar_APrime[i]);
+ printf("\n");
+ printf("[polar_encoder_dci] GP: ");
+ for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->crc_generator_matrix[0][i]);
+ printf("\n");
#endif
- //Calculate CRC.
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_APrime,
- polarParams->crc_generator_matrix,
- polarParams->nr_polar_crc,
- polarParams->K,
- polarParams->crcParityBits);
- for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
+ //Calculate CRC.
+ nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_APrime,
+ polarParams->crc_generator_matrix,
+ polarParams->nr_polar_crc,
+ polarParams->K,
+ polarParams->crcParityBits);
+ for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
#ifdef DEBUG_POLAR_ENCODER_DCI
- printf("[polar_encoder_dci] CRC: ");
- for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->nr_polar_crc[i]);
- printf("\n");
+ printf("[polar_encoder_dci] CRC: ");
+ for (int i=0; i<polarParams->crcParityBits; i++) printf("%d-", polarParams->nr_polar_crc[i]);
+ printf("\n");
#endif
- //Attach CRC to the Transport Block. (a to b)
- for (uint16_t i = 0; i < polarParams->payloadBits; i++)
- polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
- for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
- polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
- //Scrambling (b to c)
- for (int i=0; i<16; i++) {
- polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
- ( polarParams->nr_polar_B[polarParams->payloadBits+8+i] + ((n_RNTI>>(15-i))&1) ) % 2;
- }
-
-/* //(a to a')
+ //Attach CRC to the Transport Block. (a to b)
+ for (uint16_t i = 0; i < polarParams->payloadBits; i++)
+ polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
+ for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
+ polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
+ //Scrambling (b to c)
+ for (int i=0; i<16; i++) {
+ polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
+ ( polarParams->nr_polar_B[polarParams->payloadBits+8+i] + ((n_RNTI>>(15-i))&1) ) % 2;
+ }
+
+ /* //(a to a')
nr_crc_bit2bit_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_aPrime);
//Parity bits computation (p)
polarParams->crcBit = crc24c(polarParams->nr_polar_aPrime, (polarParams->payloadBits+polarParams->crcParityBits));
-#ifdef DEBUG_POLAR_ENCODER_DCI
+ #ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] crc: 0x%08x\n", polarParams->crcBit);
for (int i=0; i<32; i++)
{
- printf("%d\n",((polarParams->crcBit)>>i)&1);
+ printf("%d\n",((polarParams->crcBit)>>i)&1);
}
-#endif
+ #endif
//(a to b)
//
// Bytewise operations
//
uint8_t arrayInd = ceil(polarParams->payloadBits / 8.0);
for (int i=0; i<arrayInd-1; i++){
- for (int j=0; j<8; j++) {
- polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
- }
+ for (int j=0; j<8; j++) {
+ polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
+ }
}
for (int i=0; i<((polarParams->payloadBits)%8); i++) {
- polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
+ polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
}
for (int i=0; i<8; i++) {
- polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
+ polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
}
//Scrambling (b to c)
for (int i=0; i<16; i++) {
- polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
- ( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2;
+ polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
+ ( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2;
}*/
#ifdef DEBUG_POLAR_ENCODER_DCI
- printf("[polar_encoder_dci] B: ");
- for (int i = 0; i < polarParams->K; i++) printf("%d-", polarParams->nr_polar_B[i]);
- printf("\n");
+ printf("[polar_encoder_dci] B: ");
+ for (int i = 0; i < polarParams->K; i++) printf("%d-", polarParams->nr_polar_B[i]);
+ printf("\n");
#endif
- //Interleaving (c to c')
- nr_polar_interleaver(polarParams->nr_polar_B,
- polarParams->nr_polar_CPrime,
- polarParams->interleaving_pattern,
- polarParams->K);
-
- //Bit insertion (c' to u)
- nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
- polarParams->nr_polar_U,
- polarParams->N,
- polarParams->K,
- polarParams->Q_I_N,
- polarParams->Q_PC_N,
- polarParams->n_pc);
-
- //Encoding (u to d)
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U,
- polarParams->G_N,
- polarParams->nr_polar_D,
- polarParams->N,
- polarParams->N);
- for (uint16_t i = 0; i < polarParams->N; i++)
- polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
-
- //Rate matching
- //Sub-block interleaving (d to y) and Bit selection (y to e)
- nr_polar_interleaver(polarParams->nr_polar_D,
- polarParams->nr_polar_E,
- polarParams->rate_matching_pattern,
- polarParams->encoderLength);
-
- /*
- * Return bits.
- */
- nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
+ //Interleaving (c to c')
+ nr_polar_interleaver(polarParams->nr_polar_B,
+ polarParams->nr_polar_CPrime,
+ polarParams->interleaving_pattern,
+ polarParams->K);
+
+ //Bit insertion (c' to u)
+ nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
+ polarParams->nr_polar_U,
+ polarParams->N,
+ polarParams->K,
+ polarParams->Q_I_N,
+ polarParams->Q_PC_N,
+ polarParams->n_pc);
+
+ //Encoding (u to d)
+ nr_matrix_multiplication_uint8_1D_uint8_2D(polarParams->nr_polar_U,
+ polarParams->G_N,
+ polarParams->nr_polar_D,
+ polarParams->N,
+ polarParams->N);
+ for (uint16_t i = 0; i < polarParams->N; i++)
+ polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
+
+ //Rate matching
+ //Sub-block interleaving (d to y) and Bit selection (y to e)
+ nr_polar_interleaver(polarParams->nr_polar_D,
+ polarParams->nr_polar_E,
+ polarParams->rate_matching_pattern,
+ polarParams->encoderLength);
+
+ /*
+ * Return bits.
+ */
+ nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
#ifdef DEBUG_POLAR_ENCODER_DCI
- printf("[polar_encoder_dci] E: ");
- for (int i = 0; i < polarParams->encoderLength; i++) printf("%d-", polarParams->nr_polar_E[i]);
- uint8_t outputInd = ceil(polarParams->encoderLength / 32.0);
- printf("\n[polar_encoder_dci] out: ");
- for (int i = 0; i < outputInd; i++) {
- printf("[%d]->0x%08x\t", i, out[i]);
- }
+ printf("[polar_encoder_dci] E: ");
+ for (int i = 0; i < polarParams->encoderLength; i++) printf("%d-", polarParams->nr_polar_E[i]);
+ uint8_t outputInd = ceil(polarParams->encoderLength / 32.0);
+ printf("\n[polar_encoder_dci] out: ");
+ for (int i = 0; i < outputInd; i++) {
+ printf("[%d]->0x%08x\t", i, out[i]);
+ }
#endif
}
-void polar_encoder_timing(uint32_t *in,
- uint32_t *out,
- t_nrPolar_paramsPtr polarParams,
- double cpuFreqGHz,
- FILE* logFile)
-{
- //Initiate timing.
- time_stats_t timeEncoderCRCByte, timeEncoderCRCBit, timeEncoderInterleaver, timeEncoderBitInsertion, timeEncoder1, timeEncoder2, timeEncoderRateMatching, timeEncoderByte2Bit;
- reset_meas(&timeEncoderCRCByte); reset_meas(&timeEncoderCRCBit); reset_meas(&timeEncoderInterleaver); reset_meas(&timeEncoderBitInsertion); reset_meas(&timeEncoder1); reset_meas(&timeEncoder2); reset_meas(&timeEncoderRateMatching); reset_meas(&timeEncoderByte2Bit);
- uint16_t n_RNTI=0x0000;
-
- start_meas(&timeEncoderCRCByte);
- nr_crc_bit2bit_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_aPrime); //(a to a')
- polarParams->crcBit = crc24c(polarParams->nr_polar_aPrime, (polarParams->payloadBits+polarParams->crcParityBits)); //Parity bits computation (p)
- uint8_t arrayInd = ceil(polarParams->payloadBits / 8.0); //(a to b)
- for (int i=0; i<arrayInd-1; i++)
- for (int j=0; j<8; j++)
- polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
- for (int i=0; i<((polarParams->payloadBits)%8); i++) polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
- for (int i=0; i<8; i++) polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
- for (int i=0; i<16; i++) polarParams->nr_polar_B[polarParams->payloadBits+8+i] = ( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2; //Scrambling (b to c)
- stop_meas(&timeEncoderCRCByte);
-
+static inline void polar_rate_matching(t_nrPolar_paramsPtr polarParams,void *in,void *out) __attribute__((always_inline));
- start_meas(&timeEncoderCRCBit);
- nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_A, polarParams->crc_generator_matrix, polarParams->nr_polar_crc, polarParams->payloadBits, polarParams->crcParityBits); //Calculate CRC.
- for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
- for (uint16_t i = 0; i < polarParams->payloadBits; i++) polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i]; //Attach CRC to the Transport Block. (a to b)
- for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++) polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
- stop_meas(&timeEncoderCRCBit);
+static inline void polar_rate_matching(t_nrPolar_paramsPtr polarParams,void *in,void *out) {
+ if (polarParams->groupsize == 8)
+ for (int i=0;i<polarParams->encoderLength>>3;i++) ((uint8_t*)out)[i] = ((uint8_t *)in)[polarParams->rm_tab[i]];
+ else
+ for (int i=0;i<polarParams->encoderLength>>4;i++) {
+ ((uint16_t*)out)[i] = ((uint16_t *)in)[polarParams->rm_tab[i]];
+ }
+}
- start_meas(&timeEncoderInterleaver); //Interleaving (c to c')
- nr_polar_interleaver(polarParams->nr_polar_B, polarParams->nr_polar_CPrime, polarParams->interleaving_pattern, polarParams->K);
- stop_meas(&timeEncoderInterleaver);
-
-
- start_meas(&timeEncoderBitInsertion); //Bit insertion (c' to u)
- nr_polar_bit_insertion(polarParams->nr_polar_CPrime, polarParams->nr_polar_U, polarParams->N, polarParams->K, polarParams->Q_I_N, polarParams->Q_PC_N, polarParams->n_pc);
- stop_meas(&timeEncoderBitInsertion);
-
-
- start_meas(&timeEncoder1); //Encoding (u to d)
- nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U, polarParams->G_N, polarParams->nr_polar_D, polarParams->N, polarParams->N);
- stop_meas(&timeEncoder1);
-
-
- start_meas(&timeEncoder2);
- for (uint16_t i = 0; i < polarParams->N; i++) polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
- stop_meas(&timeEncoder2);
-
+void build_polar_tables(t_nrPolar_paramsPtr polarParams) {
+
+ // build table b -> c'
+
+ AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
+ AssertFatal(polarParams->K < 129, "K = %d > 64, is not supported yet\n",polarParams->K);
+
+ int bit_i,ip;
+
+ int numbytes = polarParams->K>>3;
+ int residue = polarParams->K&7;
+ int numbits;
+ if (residue>0) numbytes++;
+ for (int byte=0;byte<numbytes;byte++) {
+ if (byte<(polarParams->K>>3)) numbits=8;
+ else numbits=residue;
+ for (int val=0;val<256;val++) {
+ polarParams->cprime_tab0[byte][val] = 0;
+ polarParams->cprime_tab1[byte][val] = 0;
+ for (int i=0;i<numbits;i++) {
+ // flip bit endian of B bitstring
+ ip=polarParams->deinterleaving_pattern[polarParams->K-1-((8*byte)+i)];
+ AssertFatal(ip<128,"ip = %d\n",ip);
+ bit_i=(val>>i)&1;
+ if (ip<64) polarParams->cprime_tab0[byte][val] |= (((uint64_t)bit_i)<<ip);
+ else polarParams->cprime_tab1[byte][val] |= (((uint64_t)bit_i)<<(ip&63));
+ }
+ }
+ }
+
+ AssertFatal(polarParams->N==512,"N = %d, not done yet\n",polarParams->N);
+
+ // build G bit vectors for information bit positions and convert the bit as bytes tables in nr_polar_kronecker_power_matrices.c to 64 bit packed vectors.
+ // keep only rows of G which correspond to information/crc bits
+ polarParams->G_N_tab = (uint64_t**)malloc(polarParams->K * sizeof(int64_t*));
+ int k=0;
+ for (int i=0;i<polarParams->N;i++) {
+ if (polarParams->information_bit_pattern[i] > 0) {
+ polarParams->G_N_tab[k] = (uint64_t*)memalign(32,(polarParams->N/64)*sizeof(uint64_t));
+ memset((void*)polarParams->G_N_tab[k],0,(polarParams->N/64)*sizeof(uint64_t));
+ for (int j=0;j<polarParams->N;j++)
+ polarParams->G_N_tab[k][j/64] |= ((uint64_t)polarParams->G_N[i][j])<<(j&63);
+#ifdef DEBUG_POLAR_ENCODER
+ printf("Bit %d Selecting row %d of G : ",k,i);
+ for (int j=0;j<polarParams->N;j+=4) printf("%1x",polarParams->G_N[i][j]+(polarParams->G_N[i][j+1]*2)+(polarParams->G_N[i][j+2]*4)+(polarParams->G_N[i][j+3]*8));
+ printf("\n");
+#endif
+ k++;
+ }
+ }
+
+ // rate matching table
+ int iplast=polarParams->rate_matching_pattern[0];
+ int ccnt=0;
+ int groupcnt=0;
+ int firstingroup_out=0;
+ int firstingroup_in=iplast;
+ int mingroupsize = 1024;
+ // compute minimum group size of rate-matching pattern
+ for (int outpos=1; outpos<polarParams->encoderLength; outpos++) {
+
+ ip=polarParams->rate_matching_pattern[outpos];
+ if ((ip - iplast) == 1) ccnt++;
+ else {
+ groupcnt++;
+#ifdef DEBUG_POLAR_ENCODER
+ printf("group %d (size %d): (%d:%d) => (%d:%d)\n",groupcnt,ccnt+1,
+ firstingroup_in,firstingroup_in+ccnt,
+ firstingroup_out,firstingroup_out+ccnt);
+#endif
+ if ((ccnt+1)<mingroupsize) mingroupsize=ccnt+1;
+ ccnt=0;
+ firstingroup_out=outpos;
+ firstingroup_in=ip;
+ }
+ iplast=ip;
+ }
+ AssertFatal(mingroupsize==8 || mingroupsize==16,"mingroupsize %d, needs to be handled\n",mingroupsize);
+ polarParams->groupsize=mingroupsize;
+ int shift=3;
+ if (mingroupsize == 16) shift=4;
+ polarParams->rm_tab=(int*)malloc(sizeof(int)*polarParams->encoderLength/mingroupsize);
+ // rerun again to create groups
+ int tcnt=0;
+ for (int outpos=0;outpos<polarParams->encoderLength; outpos+=mingroupsize,tcnt++)
+ polarParams->rm_tab[tcnt] = polarParams->rate_matching_pattern[outpos]>>shift;
+
+}
- start_meas(&timeEncoderRateMatching);//Rate matching //Sub-block interleaving (d to y) and Bit selection (y to e)
- nr_polar_interleaver(polarParams->nr_polar_D, polarParams->nr_polar_E, polarParams->rate_matching_pattern, polarParams->encoderLength);
- stop_meas(&timeEncoderRateMatching);
+void polar_encoder_fast(uint64_t *A,
+ uint32_t *out,
+ int32_t crcmask,
+ t_nrPolar_paramsPtr polarParams) {
+
+ AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
+ AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K);
+ AssertFatal(polarParams->payloadBits < 65, "payload bits = %d > 64, is not supported yet\n",polarParams->payloadBits);
+
+ uint64_t B[4]={0,0,0,0},Cprime[4]={0,0,0,0};
+ int bitlen = polarParams->payloadBits;
+
+ // append crc
+
+ AssertFatal(bitlen<129,"support for payloads <= 128 bits\n");
+ AssertFatal(polarParams->crcParityBits == 24,"support for 24-bit crc only for now\n");
+
+ //int bitlen0=bitlen;
+
+ uint64_t tcrc=0;
+
+ // A bitstring should be stored as a_{N-1} a_{N-2} ... a_{N-A} 0 .... 0, where N=64,128,192,..., N is smallest multiple of 64 greater than or equal to A
+
+ // First flip A bitstring byte endian for CRC routines (optimized for DLSCH/ULSCH, not PBCH/PDCCH)
+ // CRC reads in each byte in bit positions 7 downto 0, for PBCH/PDCCH we need to read in a_{A-1} downto a_{0}, A = length of bit string (e.g. 32 for PBCH)
+ if (bitlen<=32) {
+ uint8_t A32_flip[4];
+ uint32_t Aprime= (uint32_t)(((uint32_t)*A)<<(32-bitlen));
+ A32_flip[0]=((uint8_t*)&Aprime)[3];
+ A32_flip[1]=((uint8_t*)&Aprime)[2];
+ A32_flip[2]=((uint8_t*)&Aprime)[1];
+ A32_flip[3]=((uint8_t*)&Aprime)[0];
+ tcrc = (uint64_t)((crcmask^(crc24c(A32_flip,bitlen)>>8)));
+ }
+ else if (bitlen<=64) {
+ uint8_t A64_flip[8];
+ uint64_t Aprime= (uint32_t)(((uint64_t)*A)<<(64-bitlen));
+ A64_flip[0]=((uint8_t*)&Aprime)[7];
+ A64_flip[1]=((uint8_t*)&Aprime)[6];
+ A64_flip[2]=((uint8_t*)&Aprime)[5];
+ A64_flip[3]=((uint8_t*)&Aprime)[4];
+ A64_flip[4]=((uint8_t*)&Aprime)[3];
+ A64_flip[5]=((uint8_t*)&Aprime)[2];
+ A64_flip[6]=((uint8_t*)&Aprime)[1];
+ A64_flip[7]=((uint8_t*)&Aprime)[0];
+ tcrc = (uint64_t)((crcmask^(crc24c(A64_flip,bitlen)>>8)));
+ }
+
+ int n;
+ // this is number of quadwords in the bit string
+ int quadwlen = (polarParams->K>>6);
+ if ((polarParams->K&63) > 0) quadwlen++;
+
+ // Create the B bitstring as
+ // b_{N'-1} b_{N'-2} ... b_{N'-A} b_{N'-A-1} ... b_{N'-A-Nparity} = a_{N-1} a_{N-2} ... a_{N-A} p_{N_parity-1} ... p_0
+
+ for (n=0;n<quadwlen;n++) if (n==0) B[n] = (A[n] << polarParams->crcParityBits) | tcrc;
+ else B[n] = (A[n] << polarParams->crcParityBits) | (A[n-1]>>(64-polarParams->crcParityBits));
+
+
+ uint8_t *Bbyte = (uint8_t*)B;
+ // for each byte of B, lookup in corresponding table for 64-bit word corresponding to that byte and its position
+ if (polarParams->K<65)
+ Cprime[0] = polarParams->cprime_tab0[0][Bbyte[0]] |
+ polarParams->cprime_tab0[1][Bbyte[1]] |
+ polarParams->cprime_tab0[2][Bbyte[2]] |
+ polarParams->cprime_tab0[3][Bbyte[3]] |
+ polarParams->cprime_tab0[4][Bbyte[4]] |
+ polarParams->cprime_tab0[5][Bbyte[5]] |
+ polarParams->cprime_tab0[6][Bbyte[6]] |
+ polarParams->cprime_tab0[7][Bbyte[7]];
+
+ else if (polarParams->K < 129) {
+ for (int i=0;i<1+(polarParams->K/8);i++) {
+ Cprime[0] |= polarParams->cprime_tab0[i][Bbyte[i]];
+ Cprime[1] |= polarParams->cprime_tab1[i][Bbyte[i]];
+ }
+ }
+#ifdef DEBUG_POLAR_ENCODER
+ if (polarParams->K<65)
+ printf("A %llx B %llx Cprime %llx (payload bits %d,crc %x)\n",
+ (unsigned long long)(A[0]&(((uint64_t)1<<bitlen)-1)),
+ (unsigned long long)(B[0]),
+ (unsigned long long)(Cprime[0]),
+ polarParams->payloadBits,
+ tcrc);
+ else if (polarParams->K<129) {
+ if (bitlen<64)
+ printf("A %llx B %llx|%llx Cprime %llx|%llx (payload bits %d,crc %x)\n",
+ (unsigned long long)(A[0]&(((uint64_t)1<<bitlen)-1)),
+ (unsigned long long)(B[1]),(unsigned long long)(B[0]),
+ (unsigned long long)(Cprime[1]),(unsigned long long)(Cprime[0]),
+ polarParams->payloadBits,
+ tcrc);
+ else
+ printf("A %llx|%llx B %llx|%llx Cprime %llx|%llx (payload bits %d,crc %x)\n",
+ (unsigned long long)(A[1]&(((uint64_t)1<<(bitlen-64))-1)),(unsigned long long)(A[0]),
+ (unsigned long long)(B[1]),(unsigned long long)(B[0]),
+ (unsigned long long)(Cprime[1]),(unsigned long long)(Cprime[0]),
+ polarParams->payloadBits,
+ crc24c((uint8_t*)A,bitlen)>>8);
+ }
+#endif
+ /* printf("Bbytes : %x.%x.%x.%x.%x.%x.%x.%x\n",Bbyte[0],Bbyte[1],Bbyte[2],Bbyte[3],Bbyte[4],Bbyte[5],Bbyte[6],Bbyte[7]);
+ printf("%llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",polarParams->cprime_tab[0][Bbyte[0]] ,
+ polarParams->cprime_tab[1][Bbyte[1]] ,
+ polarParams->cprime_tab[2][Bbyte[2]] ,
+ polarParams->cprime_tab[3][Bbyte[3]] ,
+ polarParams->cprime_tab[4][Bbyte[4]] ,
+ polarParams->cprime_tab[5][Bbyte[5]] ,
+ polarParams->cprime_tab[6][Bbyte[6]] ,
+ polarParams->cprime_tab[7][Bbyte[7]]);*/
+
+ // now do Gu product (here using 64-bit XORs, we can also do with SIMD after)
+ // here we're reading out the bits LSB -> MSB, is this correct w.r.t. 3GPP ?
+
+ uint64_t Cprime_i;
+ /* printf("%llx Cprime_0 (%llx) G %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",Cprime_i,Cprime &1,
+ polarParams->G_N_tab[0][0],
+ polarParams->G_N_tab[0][1],
+ polarParams->G_N_tab[0][2],
+ polarParams->G_N_tab[0][3],
+ polarParams->G_N_tab[0][4],
+ polarParams->G_N_tab[0][5],
+ polarParams->G_N_tab[0][6],
+ polarParams->G_N_tab[0][7]);*/
+ uint64_t D[8]={0,0,0,0,0,0,0,0};
+ int off=0;
+ int len=polarParams->K;
+ for (int j=0;j<(1+(polarParams->K>>6));j++,off+=64,len-=64) {
+ for (int i=0;i<((len>63) ? 64 : len);i++) {
+
+ Cprime_i = -((Cprime[j]>>i)&1); // this converts bit 0 as, 0 => 0000x00, 1 => 1111x11
+ /*
+#ifdef DEBUG_POLAR_ENCODER
+ printf("%llx Cprime_%d (%llx) G %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",
+ Cprime_i,off+i,(Cprime[j]>>i) &1,
+ polarParams->G_N_tab[off+i][0],
+ polarParams->G_N_tab[off+i][1],
+ polarParams->G_N_tab[off+i][2],
+ polarParams->G_N_tab[off+i][3],
+ polarParams->G_N_tab[off+i][4],
+ polarParams->G_N_tab[off+i][5],
+ polarParams->G_N_tab[off+i][6],
+ polarParams->G_N_tab[off+i][7]);
+#endif
+ */
+ uint64_t *Gi=polarParams->G_N_tab[off+i];
+ D[0] ^= (Cprime_i & Gi[0]);
+ D[1] ^= (Cprime_i & Gi[1]);
+ D[2] ^= (Cprime_i & Gi[2]);
+ D[3] ^= (Cprime_i & Gi[3]);
+ D[4] ^= (Cprime_i & Gi[4]);
+ D[5] ^= (Cprime_i & Gi[5]);
+ D[6] ^= (Cprime_i & Gi[6]);
+ D[7] ^= (Cprime_i & Gi[7]);
+ }
+ }
+#ifdef DEBUG_POLAR_ENCODER
+ printf("D %llx,%llx,%llx,%llx,%llx,%llx,%llx,%llx\n",
+ D[0],
+ D[1],
+ D[2],
+ D[3],
+ D[4],
+ D[5],
+ D[6],
+ D[7]);
+#endif
- start_meas(&timeEncoderByte2Bit); //Return bits.
- nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
- stop_meas(&timeEncoderByte2Bit);
+ polar_rate_matching(polarParams,(void*)D,(void*)out);
- fprintf(logFile,",%f,%f,%f,%f,%f,%f,%f,%f\n",
- (timeEncoderCRCByte.diff/(cpuFreqGHz*1000.0)),
- (timeEncoderCRCBit.diff/(cpuFreqGHz*1000.0)),
- (timeEncoderInterleaver.diff/(cpuFreqGHz*1000.0)),
- (timeEncoderBitInsertion.diff/(cpuFreqGHz*1000.0)),
- (timeEncoder1.diff/(cpuFreqGHz*1000.0)),
- (timeEncoder2.diff/(cpuFreqGHz*1000.0)),
- (timeEncoderRateMatching.diff/(cpuFreqGHz*1000.0)),
- (timeEncoderByte2Bit.diff/(cpuFreqGHz*1000.0)));
}
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
index 81c4125faf2d7fbe3b61a85c3e176a37be8f2861..c4c68e4e0e4a0a9827cc1c2c49df2bb7f2682de9 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
@@ -32,7 +32,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
-void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1, uint8_t **matrix2,
+void nr_matrix_multiplication_uint8_1D_uint8_2D(uint8_t *matrix1, uint8_t **matrix2,
uint8_t *output, uint16_t row, uint16_t col) {
for (uint16_t i = 0; i < col; i++) {
@@ -43,12 +43,12 @@ void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1, uint8_t **
}
}
-uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen) {
+uint8_t ***nr_alloc_uint8_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen) {
uint8_t ***output;
int i, j;
if ((output = malloc(xlen * sizeof(*output))) == NULL) {
- perror("[nr_alloc_uint8_t_3D_array] Problem at 1D allocation");
+ perror("[nr_alloc_uint8_3D_array] Problem at 1D allocation");
return NULL;
}
for (i = 0; i < xlen; i++)
@@ -57,8 +57,8 @@ uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen
for (i = 0; i < xlen; i++)
if ((output[i] = malloc(ylen * sizeof *output[i])) == NULL) {
- perror("[nr_alloc_uint8_t_3D_array] Problem at 2D allocation");
- nr_free_uint8_t_3D_array(output, xlen, ylen);
+ perror("[nr_alloc_uint8_3D_array] Problem at 2D allocation");
+ nr_free_uint8_3D_array(output, xlen, ylen);
return NULL;
}
for (i = 0; i < xlen; i++)
@@ -69,14 +69,39 @@ uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen
for (i = 0; i < xlen; i++)
for (j = 0; j < ylen; j++)
if ((output[i][j] = malloc(zlen * sizeof *output[i][j])) == NULL) {
- perror("[nr_alloc_uint8_t_3D_array] Problem at 3D allocation");
- nr_free_uint8_t_3D_array(output, xlen, ylen);
+ perror("[nr_alloc_uint8_3D_array] Problem at 3D allocation");
+ nr_free_uint8_3D_array(output, xlen, ylen);
return NULL;
}
return output;
}
+uint8_t **nr_alloc_uint8_2D_array(uint16_t xlen, uint16_t ylen) {
+ uint8_t **output;
+ int i, j;
+
+ if ((output = malloc(xlen * sizeof(*output))) == NULL) {
+ perror("[nr_alloc_uint8_2D_array] Problem at 1D allocation");
+ return NULL;
+ }
+ for (i = 0; i < xlen; i++)
+ output[i] = NULL;
+
+
+ for (i = 0; i < xlen; i++)
+ if ((output[i] = malloc(ylen * sizeof *output[i])) == NULL) {
+ perror("[nr_alloc_uint8_2D_array] Problem at 2D allocation");
+ nr_free_uint8_2D_array(output, xlen);
+ return NULL;
+ }
+ for (i = 0; i < xlen; i++)
+ for (j = 0; j < ylen; j++)
+ output[i][j] = 0;
+
+ return output;
+}
+
double ***nr_alloc_double_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen) {
double ***output;
int i, j;
@@ -137,31 +162,6 @@ double **nr_alloc_double_2D_array(uint16_t xlen, uint16_t ylen) {
return output;
}
-uint8_t **nr_alloc_uint8_t_2D_array(uint16_t xlen, uint16_t ylen) {
- uint8_t **output;
- int i, j;
-
- if ((output = malloc(xlen * sizeof(*output))) == NULL) {
- perror("[nr_alloc_uint8_t_2D_array] Problem at 1D allocation");
- return NULL;
- }
- for (i = 0; i < xlen; i++)
- output[i] = NULL;
-
-
- for (i = 0; i < xlen; i++)
- if ((output[i] = malloc(ylen * sizeof *output[i])) == NULL) {
- perror("[nr_alloc_uint8_t_2D_array] Problem at 2D allocation");
- nr_free_uint8_t_2D_array(output, xlen);
- return NULL;
- }
- for (i = 0; i < xlen; i++)
- for (j = 0; j < ylen; j++)
- output[i][j] = 0;
-
- return output;
-}
-
void nr_free_double_3D_array(double ***input, uint16_t xlen, uint16_t ylen) {
int i, j;
@@ -174,7 +174,16 @@ void nr_free_double_3D_array(double ***input, uint16_t xlen, uint16_t ylen) {
free(input);
}
-void nr_free_uint8_t_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen) {
+void nr_free_double_2D_array(double **input, uint16_t xlen) {
+ int i;
+
+ for (i = 0; i < xlen; i++) {
+ free(input[i]);
+ }
+ free(input);
+}
+
+void nr_free_uint8_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen) {
int i, j;
for (i = 0; i < xlen; i++) {
@@ -186,20 +195,11 @@ void nr_free_uint8_t_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen) {
free(input);
}
-void nr_free_uint8_t_2D_array(uint8_t **input, uint16_t xlen) {
+void nr_free_uint8_2D_array(uint8_t **input, uint16_t xlen) {
for (int i = 0; i < xlen; i++) free(input[i]);
free(input);
}
-void nr_free_double_2D_array(double **input, uint16_t xlen) {
- int i;
-
- for (i = 0; i < xlen; i++) {
- free(input[i]);
- }
- free(input);
-}
-
// Modified Bubble Sort.
void nr_sort_asc_double_1D_array_ind(double *matrix, uint8_t *ind, uint8_t len) {
int swaps;
diff --git a/openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c b/openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
index 95fc79ecb1f6705576aabe1800d3ce5cfc26f087..985266447b6bb8b57eeea6fd069e6706a4bc1cbe 100644
--- a/openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
+++ b/openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
@@ -33,15 +33,15 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_bit_insertion(uint8_t *input,
- uint8_t *output,
- uint16_t N,
- uint16_t K,
- int16_t *Q_I_N,
- int16_t *Q_PC_N,
- uint8_t n_PC)
+ uint8_t *output,
+ uint16_t N,
+ uint16_t K,
+ int16_t *Q_I_N,
+ int16_t *Q_PC_N,
+ uint8_t n_PC)
{
- uint16_t k=0;
- uint8_t flag;
+ uint16_t k=0;
+ uint8_t flag;
if (n_PC>0) {
/*
@@ -325,7 +325,7 @@ void nr_polar_rate_matching_int16(int16_t *input, int16_t *output, uint16_t *rmp
if ( (K/(double)E) <= (7.0/16) ) { //puncturing
for (int i=0; i<=N-1; i++) output[i]=0;
} else { //shortening
- for (int i=0; i<=N-1; i++) output[i]=INFINITY;
+ for (int i=0; i<=N-1; i++) output[i]=32767;//instead of INFINITY, to prevent [-Woverflow]
}
for (int i=0; i<=E-1; i++){
diff --git a/openair1/PHY/CODING/nr_polar_init.c b/openair1/PHY/CODING/nr_polar_init.c
index 895bace829a5a6bf50e487c77378302d277c17b0..93bcdecd6ef6387a02cb908657e37691e7a756d4 100644
--- a/openair1/PHY/CODING/nr_polar_init.c
+++ b/openair1/PHY/CODING/nr_polar_init.c
@@ -36,20 +36,27 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
+static int intcmp(const void *p1,const void *p2) {
+
+ return(*(int16_t*)p1 > *(int16_t*)p2);
+}
+
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
- int8_t messageType,
- uint16_t messageLength,
- uint8_t aggregation_level)
+ int8_t messageType,
+ uint16_t messageLength,
+ uint8_t aggregation_level)
{
t_nrPolar_paramsPtr currentPtr = *polarParams;
uint16_t aggregation_prime = nr_polar_aggregation_prime(aggregation_level);
//Parse the list. If the node is already created, return without initialization.
while (currentPtr != NULL) {
- if (currentPtr->idx == (messageType * messageLength * aggregation_prime)) return;
- else currentPtr = currentPtr->nextPtr;
+ //printf("currentPtr->idx %d, (%d,%d)\n",currentPtr->idx,currentPtr->payloadBits,currentPtr->encoderLength);
+ if (currentPtr->idx == (messageType * messageLength * aggregation_prime)) return;
+ else currentPtr = currentPtr->nextPtr;
}
+ // printf("currentPtr %p (polarParams %p)\n",currentPtr,polarParams);
//Else, initialize and add node to the end of the linked list.
t_nrPolar_paramsPtr newPolarInitNode = malloc(sizeof(t_nrPolar_params));
@@ -57,6 +64,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->idx = (messageType * messageLength * aggregation_prime);
newPolarInitNode->nextPtr = NULL;
+ //printf("newPolarInitNode->idx %d, (%d,%d,%d:%d)\n",newPolarInitNode->idx,messageType,messageLength,aggregation_prime,aggregation_level);
if (messageType == 0) { //PBCH
newPolarInitNode->n_max = NR_POLAR_PBCH_N_MAX;
@@ -70,6 +78,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->encoderLength = NR_POLAR_PBCH_E;
newPolarInitNode->crcCorrectionBits = NR_POLAR_PBCH_CRC_ERROR_CORRECTION_BITS;
newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits);//G_P
+ //printf("Initializing polar parameters for PBCH (K %d, E %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength);
} else if (messageType == 1) { //DCI
newPolarInitNode->n_max = NR_POLAR_DCI_N_MAX;
newPolarInitNode->i_il = NR_POLAR_DCI_I_IL;
@@ -82,6 +91,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->encoderLength = aggregation_level*108;
newPolarInitNode->crcCorrectionBits = NR_POLAR_DCI_CRC_ERROR_CORRECTION_BITS;
newPolarInitNode->crc_generator_matrix=crc24c_generator_matrix(newPolarInitNode->payloadBits+newPolarInitNode->crcParityBits);//G_P
+ //printf("Initializing polar parameters for DCI (K %d, E %d, L %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength,aggregation_level);
} else if (messageType == -1) { //UCI
} else {
@@ -115,6 +125,10 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->i_il,
newPolarInitNode->interleaving_pattern);
+ newPolarInitNode->deinterleaving_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->K);
+ for (int i=0;i<newPolarInitNode->K;i++)
+ newPolarInitNode->deinterleaving_pattern[newPolarInitNode->interleaving_pattern[i]] = i;
+
newPolarInitNode->rate_matching_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->encoderLength);
uint16_t *J = malloc(sizeof(uint16_t) * newPolarInitNode->N);
nr_polar_rate_matching_pattern(newPolarInitNode->rate_matching_pattern,
@@ -139,7 +153,9 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->N,
newPolarInitNode->encoderLength,
newPolarInitNode->n_pc);
-
+ // sort the Q_I_N array in ascending order (first K positions)
+ qsort((void*)newPolarInitNode->Q_I_N,newPolarInitNode->K,sizeof(int16_t),intcmp);
+
newPolarInitNode->channel_interleaver_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->encoderLength);
nr_polar_channel_interleaver_pattern(newPolarInitNode->channel_interleaver_pattern,
newPolarInitNode->i_bil,
@@ -148,6 +164,9 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
free(J);
build_decoder_tree(newPolarInitNode);
+ build_polar_tables(newPolarInitNode);
+ init_polar_deinterleaver_table(newPolarInitNode);
+
//printf("decoder tree nodes %d\n",newPolarInitNode->tree.num_nodes);
} else {
@@ -159,13 +178,18 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
if (currentPtr == NULL)
{
*polarParams = newPolarInitNode;
+ //printf("Creating first polarParams entry index %d, %p\n",newPolarInitNode->idx,*polarParams);
return;
}
//Else, add node to the end of the linked list.
while (currentPtr->nextPtr != NULL) {
- currentPtr = currentPtr->nextPtr;
+ currentPtr = currentPtr->nextPtr;
}
currentPtr->nextPtr= newPolarInitNode;
+ printf("Adding new polarParams entry to list index %d,%p\n",
+ newPolarInitNode->idx,
+ currentPtr->nextPtr);
+
return;
}
diff --git a/openair1/PHY/CODING/nr_rate_matching.c b/openair1/PHY/CODING/nr_rate_matching.c
index 245f3b9b751ffc5c430eab8595737d66ac5e2881..01390f1f2ff991817ee443960fc5af7f9d7b351a 100644
--- a/openair1/PHY/CODING/nr_rate_matching.c
+++ b/openair1/PHY/CODING/nr_rate_matching.c
@@ -78,7 +78,7 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
- uint8_t *e2;
+ //uint8_t *e2;
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
@@ -110,7 +110,7 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("nr_rate_matching: E %d, k0 %d Cprime %d modcprime %d\n",E,ind, Cprime,((G/(Nl*Qm))%Cprime));
#endif
- e2 = e;
+ //e2 = e;
k=0;
@@ -120,7 +120,8 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
- if (w[ind] != NR_NULL) e2[k++]=w[ind];
+ //if (w[ind] != NR_NULL) e2[k++]=w[ind];
+ if (w[ind] != NR_NULL) e[k++]=w[ind];
}
while(k<E) {
@@ -130,7 +131,8 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
- if (w[ind] != NR_NULL) e2[k++]=w[ind];
+ //if (w[ind] != NR_NULL) e2[k++]=w[ind];
+ if (w[ind] != NR_NULL) e[k++]=w[ind];
}
}
diff --git a/openair1/PHY/INIT/nr_init.c b/openair1/PHY/INIT/nr_init.c
index 50bb7a765238f123c624075f1cbec10e164abb9a..1866eac96d54e71d030d57fd899c9bab2943ecad 100644
--- a/openair1/PHY/INIT/nr_init.c
+++ b/openair1/PHY/INIT/nr_init.c
@@ -37,8 +37,8 @@
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "SCHED_NR/fapi_nr_l1.h"
-extern uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn);
-extern int32_t get_uldl_offset(int eutra_bandP);
+extern uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn);
+extern int32_t get_uldl_offset(int nr_bandP);
int l1_north_init_gNB() {
@@ -125,10 +125,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
// PBCH DMRS gold sequences generation
nr_init_pbch_dmrs(gNB);
// Polar encoder init for PBCH
+
nr_polar_init(&gNB->nrPolar_params,
- NR_POLAR_PBCH_MESSAGE_TYPE,
- NR_POLAR_PBCH_PAYLOAD_BITS,
- NR_POLAR_PBCH_AGGREGATION_LEVEL);
+ NR_POLAR_PBCH_MESSAGE_TYPE,
+ NR_POLAR_PBCH_PAYLOAD_BITS,
+ NR_POLAR_PBCH_AGGREGATION_LEVEL);
//PDCCH DMRS init
gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
@@ -186,20 +187,16 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
common_vars->rxdata = (int32_t **)NULL;
- common_vars->txdataF = (int32_t **)malloc16(NB_ANTENNA_PORTS_ENB*sizeof(int32_t*));
+ common_vars->txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*));
- LOG_D(PHY,"[INIT] NB_ANTENNA_PORTS_ENB:%d fp->nb_antenna_ports_gNB:%d\n", NB_ANTENNA_PORTS_ENB, cfg->rf_config.tx_antenna_ports.value);
-
- for (i=0; i<NB_ANTENNA_PORTS_ENB; i++) {
- if (i<cfg->rf_config.tx_antenna_ports.value || i==5) {
+ for (i=0;i<15;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t) );
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
- }
- }
+ }
// Channel estimates for SRS
@@ -317,8 +314,8 @@ void phy_config_request(PHY_Config_t *phy_config) {
void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
-// NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+ //NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
+ //nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON* const common_vars = &gNB->common_vars;
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
@@ -327,11 +324,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
int i, UE_id;
- for (i = 0; i < NB_ANTENNA_PORTS_ENB; i++) {
- if (i < cfg->rf_config.tx_antenna_ports.value || i == 5) {
- free_and_zero(common_vars->txdataF[i]);
+ for (i = 0; i < 15; i++) {
+ free_and_zero(common_vars->txdataF[i]);
/* rxdataF[i] is not allocated -> don't free */
- }
}
free_and_zero(common_vars->txdataF);
free_and_zero(common_vars->rxdataF);
@@ -392,28 +387,28 @@ void install_schedule_handlers(IF_Module_t *if_inst)
/// this function is a temporary addition for NR configuration
-void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
+void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
//overwrite for new NR parameters
- gNB_config->nfapi_config.rf_bands.rf_band[0] = 22;
- gNB_config->nfapi_config.earfcn.value = 6600;
+ gNB_config->nfapi_config.rf_bands.rf_band[0] = 78;
+ gNB_config->nfapi_config.nrarfcn.value = 620000;
gNB_config->subframe_config.numerology_index_mu.value = mu;
gNB_config->subframe_config.duplex_mode.value = TDD;
- gNB_config->rf_config.tx_antenna_ports.value = 1;
gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20);
gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
+ gNB_config->sch_config.physical_cell_id.value=Nid_cell;
gNB->mac_enabled = 1;
- fp->dl_CarrierFreq = from_earfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.earfcn.value);
+ fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->threequarter_fs = 0;
@@ -435,9 +430,8 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
- gNB_config->nfapi_config.earfcn.value = phy_config->cfg->nfapi_config.earfcn.value; //6600
+ gNB_config->nfapi_config.nrarfcn.value = phy_config->cfg->nfapi_config.nrarfcn.value; //6600
gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
- gNB_config->rf_config.tx_antenna_ports.value = phy_config->cfg->rf_config.tx_antenna_ports.value; //1
gNB_config->rf_config.dl_carrier_bandwidth.value = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106;
gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
gNB_config->sch_config.half_frame_index.value = 0;
@@ -454,20 +448,19 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
RC.gNB[Mod_id][CC_id]->mac_enabled = 1;
- fp->dl_CarrierFreq = from_earfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.earfcn.value);
+ fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->threequarter_fs = 0;
- LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,DL freq %u)\n",
- Mod_id,
- CC_id,
- gNB_config->nfapi_config.rf_bands.rf_band[0],
- gNB_config->rf_config.dl_carrier_bandwidth.value,
- gNB_config->rf_config.ul_carrier_bandwidth.value,
- gNB_config->sch_config.physical_cell_id.value,
- gNB_config->rf_config.tx_antenna_ports.value,
- fp->dl_CarrierFreq );
-
+ LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %u)\n",
+ Mod_id,
+ CC_id,
+ gNB_config->nfapi_config.rf_bands.rf_band[0],
+ gNB_config->rf_config.dl_carrier_bandwidth.value,
+ gNB_config->rf_config.ul_carrier_bandwidth.value,
+ gNB_config->sch_config.physical_cell_id.value,
+ fp->dl_CarrierFreq );
+
nr_init_frame_parms(gNB_config, fp);
if (RC.gNB[Mod_id][CC_id]->configured == 1){
diff --git a/openair1/PHY/INIT/nr_init_ru.c b/openair1/PHY/INIT/nr_init_ru.c
index 7cd1f1b58ffa9ca5f10ceb2d45e0f56836e4e444..3ff24e343a7a18e7915c342b224b74b4fe3850cb 100644
--- a/openair1/PHY/INIT/nr_init_ru.c
+++ b/openair1/PHY/INIT/nr_init_ru.c
@@ -107,9 +107,7 @@ int nr_phy_init_RU(RU_t *ru) {
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<15;p++) {
- LOG_D(PHY,"[INIT] %s() nb_antenna_ports_eNB:%d \n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value);
- if (p<ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p==5) {
- LOG_D(PHY,"[INIT] %s() DO BEAM WEIGHTS nb_antenna_ports_eNB:%d nb_tx:%d\n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value, ru->nb_tx);
+ if (p == 0|| p==5) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
@@ -180,7 +178,7 @@ void nr_phy_free_RU(RU_t *ru)
for (i = 0; i < RC.nb_nr_L1_inst; i++) {
for (p = 0; p < 15; p++) {
- if (p < ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p == 5) {
+ if (p == 0 || p == 5) {
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
free_and_zero(ru->beam_weights[i][p]);
}
diff --git a/openair1/PHY/INIT/nr_init_ue.c b/openair1/PHY/INIT/nr_init_ue.c
index 51d881b13e6ef1fe1d1384218f5e2b2ed21fd292..fc207cee84da43da75376648a858fd0a7c4dc0b9 100644
--- a/openair1/PHY/INIT/nr_init_ue.c
+++ b/openair1/PHY/INIT/nr_init_ue.c
@@ -656,6 +656,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
int eNB_id;
int th_id;
int n_ssb_crb=(fp->N_RB_DL-20);
+ int k_ssb=0;
abstraction_flag = 0;
fp->nb_antennas_tx = 1;
fp->nb_antennas_rx=1;
@@ -664,7 +665,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
- nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,0);
+ nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,k_ssb);
phy_init_nr_top(ue);
// many memory allocation sizes are hard coded
@@ -816,10 +817,10 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
// 100 PRBs * 12 REs/PRB * 4 PDCCH SYMBOLS * 2 LLRs/RE
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
- (*pdcch_vars_th)[th_id][eNB_id]->llr = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
- (*pdcch_vars_th)[th_id][eNB_id]->llr16 = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
- (*pdcch_vars_th)[th_id][eNB_id]->wbar = (uint16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
- (*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int8_t*)malloc16_clear( 4*2*100*12 );
+ (*pdcch_vars_th)[th_id][eNB_id]->llr = (int16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
+ (*pdcch_vars_th)[th_id][eNB_id]->llr16 = (int16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
+ (*pdcch_vars_th)[th_id][eNB_id]->wbar = (int16_t*)malloc16_clear( 2*4*100*12*sizeof(uint16_t) );
+ (*pdcch_vars_th)[th_id][eNB_id]->e_rx = (int16_t*)malloc16_clear( 4*2*100*12 );
(*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
@@ -952,12 +953,7 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue)
generate_ul_reference_signal_sequences(SHRT_MAX);
// Polar encoder init for PBCH
-
- ue->nrPolar_params = NULL;
- nr_polar_init(&ue->nrPolar_params,
- NR_POLAR_PBCH_MESSAGE_TYPE,
- NR_POLAR_PBCH_PAYLOAD_BITS,
- NR_POLAR_PBCH_AGGREGATION_LEVEL);
+
//lte_sync_time_init(frame_parms);
//generate_ul_ref_sigs();
@@ -987,8 +983,6 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106;
config->rf_config.ul_carrier_bandwidth.value = 106;
- config->rf_config.tx_antenna_ports.value = 1;
- config->rf_config.rx_antenna_ports.value = 1;
config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD;
diff --git a/openair1/PHY/INIT/nr_parms.c b/openair1/PHY/INIT/nr_parms.c
index 6b2b09ba0cd08008b993d9dda75196ed9abfa993..f37883b38814344e4611f5ff243d2d03a256205f 100644
--- a/openair1/PHY/INIT/nr_parms.c
+++ b/openair1/PHY/INIT/nr_parms.c
@@ -159,6 +159,8 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
fp->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
fp->samples_per_subframe_wCP = fp->ofdm_symbol_size * fp->symbols_per_slot * fp->slots_per_subframe;
fp->samples_per_frame_wCP = 10 * fp->samples_per_subframe_wCP;
+ fp->samples_per_slot_wCP = fp->symbols_per_slot*fp->ofdm_symbol_size;
+ fp->samples_per_slot = fp->nb_prefix_samples0 + ((fp->symbols_per_slot-1)*fp->nb_prefix_samples) + (fp->symbols_per_slot*fp->ofdm_symbol_size);
fp->samples_per_subframe = (fp->samples_per_subframe_wCP + (fp->nb_prefix_samples0 * fp->slots_per_subframe) +
(fp->nb_prefix_samples * fp->slots_per_subframe * (fp->symbols_per_slot - 1)));
fp->samples_per_frame = 10 * fp->samples_per_subframe;
@@ -176,7 +178,9 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
}
int nr_init_frame_parms(nfapi_nr_config_request_t* config,
- NR_DL_FRAME_PARMS *fp) {
+ NR_DL_FRAME_PARMS *fp)
+{
+
return nr_init_frame_parms0(fp,
config->subframe_config.numerology_index_mu.value,
@@ -191,10 +195,9 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
int n_ssb_crb,
int ssb_subcarrier_offset)
{
-
+ /*n_ssb_crb and ssb_subcarrier_offset are given in 15kHz SCS*/
nr_init_frame_parms0(fp,mu,Ncp,N_RB_DL);
- int start_rb = n_ssb_crb / (1<<mu);
- fp->ssb_start_subcarrier = 12 * start_rb + ssb_subcarrier_offset;
+ fp->ssb_start_subcarrier = (12 * n_ssb_crb + ssb_subcarrier_offset)/(1<<mu);
return 0;
}
diff --git a/openair1/PHY/INIT/phy_init.h b/openair1/PHY/INIT/phy_init.h
index fdb7fab1b74db5752f86fe487f464662c645f07c..2a7dcf88fdce516e7449d55193e3e4e6974b43e4 100644
--- a/openair1/PHY/INIT/phy_init.h
+++ b/openair1/PHY/INIT/phy_init.h
@@ -379,10 +379,11 @@ void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
+void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
-void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu);
+void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu,int Nid_cell);
void phy_free_nr_gNB(PHY_VARS_gNB *gNB);
int l1_north_init_gNB(void);
void init_nr_transport(PHY_VARS_gNB *gNB);
diff --git a/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c b/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
index 30c106b16bdabfff7d1671588a94c24eb6519e38..a7e4b33c16a5c9d88a2bb8e27d95272835b9dc6e 100644
--- a/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
+++ b/openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
@@ -703,7 +703,7 @@ int dlsch_encoding_all(PHY_VARS_eNB *eNB,
int dlsch_encoding(PHY_VARS_eNB *eNB,
- unsigned char *a,
+ unsigned char *a,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch,
int frame,
diff --git a/openair1/PHY/MODULATION/slot_fep_nr.c b/openair1/PHY/MODULATION/slot_fep_nr.c
index b2ecb6917e3f2715732278c3ea7ad6bfc51e0a21..8ef29d016d11d5f820f8397a8c4633503d22980e 100644
--- a/openair1/PHY/MODULATION/slot_fep_nr.c
+++ b/openair1/PHY/MODULATION/slot_fep_nr.c
@@ -29,6 +29,11 @@
#define SOFFSET 0
+/*#ifdef LOG_I
+#undef LOG_I
+#define LOG_I(A,B...) printf(A)
+#endif*/
+
int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned char l,
unsigned char Ns,
@@ -49,8 +54,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
//int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
- //NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
- uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516;
+ NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
+ uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_pdsch = 50;
@@ -123,6 +128,12 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
// Align with 256 bit
// rx_offset = rx_offset&0xfffffff8;
+#ifdef DEBUG_FEP
+ // if (ue->frame <100)
+ /*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
+ nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples);
+#endif
+
if (l==0) {
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
@@ -151,12 +162,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// +
// (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1);
-//#ifdef DEBUG_FEP
- // if (ue->frame <100)
- LOG_D(PHY,"slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
- nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
-//#endif
-
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((void *)&common_vars->rxdata[aa][frame_length_samples],
(void *)&common_vars->rxdata[aa][0],
diff --git a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
index 2dae7ab6b53cc59e26ee55d918ecbdbe6852a2e3..2e5ad47d9172fe1356fb53ef78d8acab1a5d6547 100644
--- a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+++ b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
@@ -20,15 +20,15 @@
*/
/*! \file PHY/NR_REFSIG/nr_dl_dmrs.c
-* \brief Top-level routines for generating DMRS from 38-211
-* \author
-* \date 2018
-* \version 0.1
-* \company Eurecom
-* \email:
-* \note
-* \warning
-*/
+ * \brief Top-level routines for generating DMRS from 38-211
+ * \author
+ * \date 2018
+ * \version 0.1
+ * \company Eurecom
+ * \email:
+ * \note
+ * \warning
+ */
//#define NR_PBCH_DMRS_LENGTH_DWORD 5
//#define NR_PBCH_DMRS_LENGTH 144
@@ -47,6 +47,7 @@ short nr_rx_mod_table[14] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,2
short nr_rx_nmod_table[14] = {0,0,-23170,23170,23170,-23170,-23170,23170,-23170,-23170,23170,23170,23170,-23170};
+
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int Ns,
unsigned int *nr_gold_pdsch,
@@ -69,7 +70,7 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
wt = (config_type==0) ? wt1 : wt2;
if (config_type > 1)
- LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
+ LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==0) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
@@ -100,32 +101,32 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
- uint8_t eNB_offset,
- unsigned int Ns,
- unsigned int *nr_gold_pdcch,
- int32_t *output,
- unsigned short p,
- unsigned short nb_rb_coreset)
+ uint8_t eNB_offset,
+ unsigned int Ns,
+ unsigned int *nr_gold_pdcch,
+ int32_t *output,
+ unsigned short p,
+ unsigned short nb_rb_coreset)
{
- uint8_t idx=0;
- //uint8_t pdcch_rb_offset =0;
- //nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
-
- if (p==2000) {
- for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
- idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
- ((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
- ((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
+ uint8_t idx=0;
+ //uint8_t pdcch_rb_offset =0;
+ //nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
+
+ if (p==2000) {
+ for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
+ idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
+ ((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
+ ((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH
if (i<8)
- printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
- (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
+ printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
+ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
#endif
- }
- }
+ }
+ }
- return(0);
+ return(0);
}
int nr_pbch_dmrs_rx(int symbol,unsigned int *nr_gold_pbch,int32_t *output )
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.c b/openair1/PHY/NR_TRANSPORT/nr_dci.c
index bc1ed5896c1d082f2567f0926e7c498df6b6f483..bd2abebdf0f0fd4dbf90b3c4226e0f915e219d1c 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dci.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dci.c
@@ -37,15 +37,15 @@
//#define DEBUG_CHANNEL_CODING
#define PDCCH_TEST_POLAR_TEMP_FIX
+
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
- NR_BWP_PARMS* bwp,
+ uint16_t N_RB,
nfapi_nr_config_request_t* config)
{
uint16_t size = 0;
- uint16_t N_RB = bwp->N_RB;
switch(format) {
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
@@ -53,7 +53,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
- size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, bwp, config) - size; // Padding to match 1_0 size
+ size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, config) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
break;
@@ -149,11 +149,12 @@ void nr_pdcch_scrambling(uint32_t *in,
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
if (i){
- in++;
- out++;
- }
+ in++;
+ out++;
+ }
}
(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
+ // printf("nr_pdcch_scrambling: in %d => out %d\n",((*in)>>(i&0x1f))&1,((*out)>>(i&0x1f))&1);
}
}
@@ -161,7 +162,7 @@ void nr_pdcch_scrambling(uint32_t *in,
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
- int32_t** txdataF,
+ int32_t* txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config)
@@ -169,7 +170,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
uint8_t idx=0;
- uint16_t a;
+ //uint16_t a;
int k,l,k_prime,dci_idx, dmrs_idx;
nr_cce_t cce;
nr_reg_t reg;
@@ -185,10 +186,12 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
* in time: by its first slot and its first symbol*/
uint16_t cset_start_sc = frame_parms.first_carrier_offset + ((int)floor(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_params.rb_offset)*NR_NB_SC_PER_RB;
- uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol;
+ // uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol;
+ uint8_t cset_start_symb = pdcch_params.first_symbol;
uint8_t cset_nsymb = pdcch_params.n_symb;
dci_idx = 0;
+
/// DMRS QPSK modulation
/*There is a need to shift from which index the pregenerated DMRS sequence is used
* see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/
@@ -213,16 +216,16 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
-#ifdef PDCCH_TEST_POLAR_TEMP_FIX
- t_nrPolar_paramsPtr currentPtr = NULL;//, polarParams = NULL;
- nr_polar_init(¤tPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
+//#ifdef PDCCH_TEST_POLAR_TEMP_FIX
+// nr_polar_init(¤tPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
-#else
+//#else
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
-#endif
+//#endif
-polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
+ //polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
+ polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti,currentPtr);
#ifdef DEBUG_CHANNEL_CODING
printf("polar rnti %d\n",pdcch_params.rnti);
@@ -257,10 +260,7 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
}
/// Resource mapping
- a = (config.rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
- for (int aa = 0; aa < config.rf_config.tx_antenna_ports.value; aa++)
- {
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
@@ -277,20 +277,23 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
}
}
#ifdef DEBUG_DCI
-printf("\n Ordered REG list:\n");
-for (int i=0; i<nb_regs; i++)
- printf("%d\t",reg_mapping_list[i].reg_idx );
-printf("\n");
+ printf("\n Ordered REG list:\n");
+ for (int i=0; i<nb_regs; i++)
+ printf("%d\t",reg_mapping_list[i].reg_idx );
+ printf("\n");
#endif
-
+
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
/*in this case the DMRS are mapped on all the coreset*/
for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
dmrs_idx = 0;
k = cset_start_sc + 1;
while (dmrs_idx<3*pdcch_params.n_rb) {
- ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+#ifdef DEBUG_PDCCH_DMRS
+ printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
+#endif
k+=4;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
@@ -312,15 +315,18 @@ printf("\n");
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
- ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
+#ifdef DEBUG_PDCCH_DMRS
+ printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
+#endif
k_prime++;
dmrs_idx++;
}
}
else { // DCI payload
- ((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
//printf("dci output %d %d\n",(a * mod_dci[dci_idx<<1]) >> 15, (a * mod_dci[(dci_idx<<1) + 1]) >> 15);
dci_idx++;
}
@@ -329,7 +335,6 @@ printf("\n");
k -= frame_parms.ofdm_symbol_size;
}
}
- }
return 0;
}
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci.h b/openair1/PHY/NR_TRANSPORT/nr_dci.h
index 4da0864f33bc5771adff969c234962e171d59b20..4bf250dbff2cb2c7c3fb749a2c63041542c6edda 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dci.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_dci.h
@@ -29,13 +29,13 @@ typedef unsigned __int128 uint128_t;
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
- NR_BWP_PARMS* bwp,
+ uint16_t N_RB,
nfapi_nr_config_request_t* config);
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
- int32_t** txdataF,
+ int32_t* txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
index 3c34bda867d0b5a419627ed7b4e00f18ab9e0f76..1d29b057fc16a277f4ade82790b867f9bd6e2d74 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
@@ -31,6 +31,9 @@
*/
#include "nr_dci.h"
+
+//#define DEBUG_FILL_DCI
+
#include "nr_dlsch.h"
@@ -114,422 +117,329 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
nfapi_nr_dl_config_dci_dl_pdu *pdcch_pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu)
{
- NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
+
uint8_t n_shift;
- uint32_t *dci_pdu = dci_alloc->dci_pdu;
- memset((void*)dci_pdu,0,4*sizeof(uint32_t));
- nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdcch_pdu->dci_dl_pdu_rel15;
+
+
+ uint64_t *dci_pdu = (uint64_t*)dci_alloc->dci_pdu;
+ memset((void*)dci_pdu,0,2*sizeof(uint64_t));
+ nfapi_nr_dl_config_dci_dl_pdu_rel15_t *pdu_rel15 = &pdcch_pdu->dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t *params_rel15 = &pdcch_pdu->pdcch_params_rel15;
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
+
+
+ nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_DLSCH_t *dlsch = gNB->dlsch[0][0];
NR_DL_gNB_HARQ_t **harq = dlsch->harq_processes;
- uint16_t N_RB = fp->initial_bwp_dl.N_RB;
- uint16_t N_RB_UL = fp->initial_bwp_ul.N_RB;
- uint8_t fsize=0, pos=0, pos2=0,cand_idx=0;
+ uint16_t N_RB = params_rel15->n_RB_BWP;
+ uint8_t fsize=0, pos=0, cand_idx=0;
+
+
+ dci_alloc->L = 8;
+ memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
+ dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
+ dci_alloc->pdcch_params.rnti_type,
+ N_RB,
+ cfg);
+
+ AssertFatal(dci_alloc->size<=64, "DCI sizes above 64 bits not yet supported");
+ n_shift = (dci_alloc->pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
+ cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
+ nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
/// Payload generation
switch(params_rel15->dci_format) {
- case NFAPI_NR_DL_DCI_FORMAT_1_0:
- switch(params_rel15->rnti_type) {
- case NFAPI_NR_RNTI_RA:
- // Freq domain assignment
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- printf("fsize = %d\n",fsize);
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
- // Time domain assignment
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
- // VRB to PRB mapping
- *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
- // MCS
- for (int i=0; i<5; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
- // TB scaling
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos++;
-
- printf("***************************\n");
- break;
-
- case NFAPI_NR_RNTI_C:
+
+ case NFAPI_NR_DL_DCI_FORMAT_1_0:
+ switch(params_rel15->rnti_type) {
+ case NFAPI_NR_RNTI_RA:
+ // printf("dci_pdu %llx\n",(unsigned long long int)*dci_pdu);
+ // Freq domain assignment
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ pos=fsize;
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
+#ifdef DEBUG_FILL_DCI
+ printf("frequency-domain assignment %d (%d bits)=> %d (%llx)\n",pdu_rel15->frequency_domain_assignment,fsize,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
+#endif
+ // Time domain assignment
+ pos+=4;
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
+#ifdef DEBUG_FILL_DCI
+ printf("time-domain assignment %d (3 bits)=> %d (%llx)\n",pdu_rel15->time_domain_assignment,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
+#endif
+ // VRB to PRB mapping
+
+ pos++;
+ *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_alloc->size-pos);
+#ifdef DEBUG_FILL_DCI
+ printf("vrb to prb mapping %d (1 bits)=> %d (%llx)\n",pdu_rel15->vrb_to_prb_mapping,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
+#endif
+ // MCS
+ pos+=5;
+ *dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
+#ifdef DEBUG_FILL_DCI
+ printf("mcs %d (5 bits)=> %d (%llx)\n",pdu_rel15->mcs,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
+#endif
+ // TB scaling
+ pos+=2;
+ *dci_pdu |= (pdu_rel15->tb_scaling&0x3)<<(dci_alloc->size-pos);
+#ifdef DEBUG_FILL_DCI
+ printf("tb_scaling %d (2 bits)=> %d (%llx)\n",pdu_rel15->tb_scaling,dci_alloc->size-pos,(unsigned long long int)*dci_pdu);
+#endif
+ break;
+
+ case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
- *dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
+ pos++;
+ *dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos);
// Freq domain assignment (275rb >> fsize = 16)
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ pos+=fsize;
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_alloc->size-pos));
if (((pdu_rel15->frequency_domain_assignment+1)&1) ==0) //fsize are all 1 38.212 p86
- {
- printf("***************************\n");
+ {
+ // ra_preamble_index 6 bits
+ pos+=6;
+ *dci_pdu |= ((pdu_rel15->ra_preamble_index&0x3f)<<(dci_alloc->size-pos));
+
+ // UL/SUL indicator 1 bit
+ pos++;
+ *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos);
- // ra_preamble_index 6bit
- for (int i=0; i<6; i++)
- *dci_pdu |= ((pdu_rel15->ra_preamble_index>>(5-i-1))&1)<<pos++;
-
- // UL/SUL indicator 1bit
- *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<pos++;
+ // SS/PBCH index 6 bits
+ pos+=6;
+ *dci_pdu |= ((pdu_rel15->ss_pbch_index&0x3f)<<(dci_alloc->size-pos));
- // SS/PBCH index 6bit
- for (int i=0; i<6; i++)
- *dci_pdu |= ((pdu_rel15->ss_pbch_index>>(5-i))&1)<<pos++;
-
- // prach_mask_index "2"+2bit // cause it 32bit and bit over 32 ,so dci_pdu ++
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->prach_mask_index>>(3-i))&1)<<pos++;
-
- //--------------------------dci_pdu ++------------------------------
-
- // prach_mask_index 2+"2"bit //
- for (int i=2; i<4; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->prach_mask_index>>(3-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->prach_mask_index>>(3-i))&1)<<pos++;
- }
-
-
- } //end if
- else
-
- {
- // Time domain assignment 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
+ // prach_mask_index 4 bits
+ pos+=4;
+ *dci_pdu |= ((pdu_rel15->prach_mask_index&0xf)<<(dci_alloc->size-pos));
+
+ } //end if
+
+ else {
+
+ // Time domain assignment 4bit
+
+ pos+=4;
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment&0xf) << (dci_alloc->size-pos));
+
- // VRB to PRB mapping 1bit
- *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
+ // VRB to PRB mapping 1bit
+ pos++;
+ *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos);
- // MCS 5bit //bit over 32, so dci_pdu ++
- for (int i=0; i<5; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
+ // MCS 5bit //bit over 32, so dci_pdu ++
+ pos+=5;
+ *dci_pdu |= (pdu_rel15->mcs&0x1f)<<(dci_alloc->size-pos);
- // New data indicator 1bit
- *dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
+ // New data indicator 1bit
+ pos++;
+ *dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos);
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
-
- // HARQ process number 4bit "2"+2
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
+ // Redundancy version 2bit
+ pos+=2;
+ *dci_pdu |= (pdu_rel15->rv&0x3)<<(dci_alloc->size-pos);
- //--------------------------dci_pdu ++------------------------------
-
- // HARQ process number 4bit 2+"2"
- for (int i=2; i<4; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
- }
-
- // Downlink assignment index 2bit
- for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->dai>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->dai>>(1-i))&1)<<pos++;
- }
- // TPC command for scheduled PUCCH 2bit
- for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
- }
- // PUCCH resource indicator 3bit
- for (int i=0; i<3; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos++;
- }
- // PDSCH-to-HARQ_feedback timing indicator 3bit
- for (int i=0; i<3; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos++;
- }
-
- } //end else
+ // HARQ process number 4bit
+ pos+=4;
+ *dci_pdu |= ((pdu_rel15->harq_pid&0xf)<<(dci_alloc->size-pos));
+
+ // Downlink assignment index 2bit
+ pos+=2;
+ *dci_pdu |= ((pdu_rel15->dai&3)<<(dci_alloc->size-pos));
+
+ // TPC command for scheduled PUCCH 2bit
+ pos+=2;
+ *dci_pdu |= ((pdu_rel15->tpc&3)<<(dci_alloc->size-pos));
+
+ // PUCCH resource indicator 3bit
+ pos+=3;
+ *dci_pdu |= ((pdu_rel15->pucch_resource_indicator&0x7)<<(dci_alloc->size-pos));
+
+ // PDSCH-to-HARQ_feedback timing indicator 3bit
+ pos+=3;
+ *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator&0x7)<<(dci_alloc->size-pos));
+ } //end else
break;
- case NFAPI_NR_RNTI_P:
+ case NFAPI_NR_RNTI_P:
// Short Messages Indicator – 2 bits
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->short_messages_indicator>>(1-i))&1)<<pos++;
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->short_messages_indicator>>(1-i))&1)<<(dci_alloc->size-pos++);
// Short Messages – 8 bits
- for (int i=0; i<8; i++)
- *dci_pdu |= ((pdu_rel15->short_messages>>(7-i))&1)<<pos++;
+ for (int i=0; i<8; i++)
+ *dci_pdu |= ((pdu_rel15->short_messages>>(7-i))&1)<<(dci_alloc->size-pos++);
// Freq domain assignment 0-16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
- // Time domain assignment 4 bit
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
- // VRB to PRB mapping 1 bit
- *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
- // MCS "1"+4 = 5 bit
- for (int i=0; i<1; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
- // MCS 1+"4" = 5 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; i<fsize; i++)
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
+ // Time domain assignment 4 bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
+ // VRB to PRB mapping 1 bit
+ *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
+ // MCS 5 bit
+ for (int i=0; i<5; i++)
+ *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
- for (int i=1; i<4; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->mcs>>(4-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
- }
- // TB scaling 2 bit
- for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos++;
- }
+ // TB scaling 2 bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<(dci_alloc->size-pos++);
+
+
break;
- case NFAPI_NR_RNTI_SI:
+ case NFAPI_NR_RNTI_SI:
// Freq domain assignment 0-16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
- // Time domain assignment 4 bit
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
- // VRB to PRB mapping 1 bit
- *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; i<fsize; i++)
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
+ // Time domain assignment 4 bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
+ // VRB to PRB mapping 1 bit
+ *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
- for (int i=0; i<5; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
+ for (int i=0; i<5; i++)
+ *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
break;
- case NFAPI_NR_RNTI_TC:
+ case NFAPI_NR_RNTI_TC:
// indicating a DL DCI format 1bit
- *dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
+ *dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
// Freq domain assignment 0-16 bit
- fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; i<fsize; i++)
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
// Time domain assignment 4 bit
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
// VRB to PRB mapping 1 bit
- *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
+ *dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<(dci_alloc->size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
- for (int i=0; i<5; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
+ for (int i=0; i<5; i++)
+ *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
// New data indicator 1bit
- *dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
+ *dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
// Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
// HARQ process number 4bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
- // HARQ process number 4bit
- for (int i=2; i<4; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
- }
-
// Downlink assignment index – 2 bits
- for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->dai>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->dai>>(1-i))&1)<<pos++;
- }
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->dai>>(1-i))&1)<<(dci_alloc->size-pos++);
+
// TPC command for scheduled PUCCH – 2 bits
- for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
- }
- // PUCCH resource indicator – 3 bits
- for (int i=0; i<3; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->pucch_resource_indicator>>(2-i))&1)<<pos++;
- }
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
+
+
+ // LOG_I(PHY, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
+ // dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
+
+
// PDSCH-to-HARQ_feedback timing indicator – 3 bits
- for (int i=0; i<3; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<pos++;
- }
+ for (int i=0; i<3; i++)
+ *dci_pdu |= ((pdu_rel15->pdsch_to_harq_feedback_timing_indicator>>(2-i))&1)<<(dci_alloc->size-pos++);
- ///-----------------------------------?????????????????????------------------------
- break;
- }
break;
+ }
- case NFAPI_NR_UL_DCI_FORMAT_0_0:
- switch(params_rel15->rnti_type)
- {
+ case NFAPI_NR_UL_DCI_FORMAT_0_0:
+ switch(params_rel15->rnti_type)
+ {
case NFAPI_NR_RNTI_C:
- // indicating a DL DCI format 1bit
- *dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
- // Freq domain assignment max 16 bit
- fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
- // Time domain assignment 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
- // Frequency hopping flag – 1 bit
- *dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<pos++;
- // MCS 5 bit
- for (int i=0; i<5; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
- // New data indicator 1bit
- *dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
- // HARQ process number 4bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
+ // indicating a DL DCI format 1bit
+ *dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
+ // Freq domain assignment max 16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; i<fsize; i++)
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
+ // Time domain assignment 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
+ // Frequency hopping flag – 1 bit
+ *dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
+ // MCS 5 bit
+ for (int i=0; i<5; i++)
+ *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
+ // New data indicator 1bit
+ *dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
+ // Redundancy version 2bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
+ // HARQ process number 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
- // HARQ process number 4bit
- for (int i=2; i<4; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
- }
- // TPC command for scheduled PUSCH – 2 bits
+ // TPC command for scheduled PUSCH – 2 bits
for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
- }
- // Padding bits
- if (pos<32)
- {
+ *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
+
+ // Padding bits
for(int a = pos;a<32;a++)
- *dci_pdu |= (pdu_rel15->padding&1)<<pos++;
- }
- // UL/SUL indicator – 1 bit
+ *dci_pdu |= (pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
+
+ // UL/SUL indicator – 1 bit
if (cfg->pucch_config.pucch_GroupHopping.value)
- {
- if (pos>31)
- *(dci_pdu+1) |= (pdu_rel15->ul_sul_indicator&1)<<pos2++;
- else
- *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<pos++;
- }
+ *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
- break;
+ break;
case NFAPI_NR_RNTI_TC:
- // indicating a DL DCI format 1bit
- *dci_pdu |= (pdu_rel15->format_indicator&1)<<pos++;
- // Freq domain assignment max 16 bit
- fsize = (int)ceil( log2( (N_RB_UL*(N_RB_UL+1))>>1 ) );
- for (int i=0; i<fsize; i++)
- *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
- // Time domain assignment 4bit
- for (int i=0; i<4; i++)
- *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
- // Frequency hopping flag – 1 bit
- *dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<pos++;
- // MCS 5 bit
- for (int i=0; i<5; i++)
- *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
- // New data indicator 1bit
- *dci_pdu |= (pdu_rel15->ndi&1)<<pos++;
- // Redundancy version 2bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<pos++;
- // HARQ process number 4bit
- for (int i=0; i<2; i++)
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
-
- // HARQ process number 4bit
- for (int i=2; i<4; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<pos++;
- }
+ // indicating a DL DCI format 1bit
+ *dci_pdu |= (pdu_rel15->format_indicator&1)<<(dci_alloc->size-pos++);
+ // Freq domain assignment max 16 bit
+ fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
+ for (int i=0; i<fsize; i++)
+ *dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<(dci_alloc->size-pos++);
+ // Time domain assignment 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<(dci_alloc->size-pos++);
+ // Frequency hopping flag – 1 bit
+ *dci_pdu |= (pdu_rel15->frequency_hopping_flag&1)<<(dci_alloc->size-pos++);
+ // MCS 5 bit
+ for (int i=0; i<5; i++)
+ *dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<(dci_alloc->size-pos++);
+ // New data indicator 1bit
+ *dci_pdu |= (pdu_rel15->ndi&1)<<(dci_alloc->size-pos++);
+ // Redundancy version 2bit
+ for (int i=0; i<2; i++)
+ *dci_pdu |= ((pdu_rel15->rv>>(1-i))&1)<<(dci_alloc->size-pos++);
+ // HARQ process number 4bit
+ for (int i=0; i<4; i++)
+ *dci_pdu |= ((pdu_rel15->harq_pid>>(3-i))&1)<<(dci_alloc->size-pos++);
+
// TPC command for scheduled PUSCH – 2 bits
for (int i=0; i<2; i++)
- {
- if (pos>31)
- *(dci_pdu+1) |= ((pdu_rel15->tpc>>(1-i))&1)<<pos2++;
- else
- *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<pos++;
- }
+ *dci_pdu |= ((pdu_rel15->tpc>>(1-i))&1)<<(dci_alloc->size-pos++);
+
// Padding bits
- if (pos<32)
- {
for(int a = pos;a<32;a++)
- *dci_pdu |= (pdu_rel15->padding&1)<<pos++;
- }
+ *dci_pdu |= (pdu_rel15->padding&1)<<(dci_alloc->size-pos++);
+
// UL/SUL indicator – 1 bit
if (cfg->pucch_config.pucch_GroupHopping.value)
- {
- if (pos>31)
- *(dci_pdu+1) |= (pdu_rel15->ul_sul_indicator&1)<<pos2++;
- else
- *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<pos++;
- }
+ *dci_pdu |= (pdu_rel15->ul_sul_indicator&1)<<(dci_alloc->size-pos++);
+
break;
}
- break;
+ break;
}
-
- LOG_I(PHY, "DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
- dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
-
- /// rest of DCI alloc
- dci_alloc->L = 8;
- memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
- dci_alloc->size = nr_get_dci_size(dci_alloc->pdcch_params.dci_format,
- dci_alloc->pdcch_params.rnti_type,
- &fp->initial_bwp_dl,
- cfg);
- n_shift = (dci_alloc->pdcch_params.config_type == NFAPI_NR_CSET_CONFIG_MIB_SIB1)?
- cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
- nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
+ LOG_I(PHY, "DCI PDU: [0]->0x%16llxx \t [1]->0x%16llx \n",(long long unsigned int)dci_pdu[0], (long long unsigned int)dci_pdu[1]);
LOG_I(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
/// DLSCH struct
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c
index 348af30cf4f7a17c3bfe2fa2793b7a60c574c2c0..b65b48c39e4bc78336def28e1d7ee2ff752c7c3e 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.c
@@ -196,7 +196,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint32_t ***pdsch_dmrs,
int32_t** txdataF,
int16_t amp,
- uint8_t subframe,
+ uint8_t slot,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config) {
@@ -212,7 +212,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
uint16_t encoded_length = nb_symbols*Qm;
/// CRC, coding, interleaving and rate matching
- nr_dlsch_encoding(harq->pdu, subframe, &dlsch, &frame_parms);
+ nr_dlsch_encoding(harq->pdu, slot, &dlsch, &frame_parms);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<TBS>>7; i++) {
@@ -305,8 +305,7 @@ for (int i=0; i<n_dmrs>>4; i++) {
#endif
/// Resource mapping
- AssertFatal(rel15->nb_layers<=config.rf_config.tx_antenna_ports.value, "Not enough Tx antennas (%d) for %d layers\n",\
- config.rf_config.tx_antenna_ports.value, rel15->nb_layers);
+
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms.first_carrier_offset + frame_parms.ssb_start_subcarrier;
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h
index 745b92f5fe5da7597977042e295f6cf27e41a6f8..205eae7f8e57e046d1bdec54e6870cc312559098 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch.h
@@ -90,6 +90,10 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
@param nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs,uint8_t Qm, uint8_t Nl);
+void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
+
+void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
+
int nr_dlsch_encoding(unsigned char *a,
uint8_t subframe,
NR_gNB_DLSCH_t *dlsch,
diff --git a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
index d5b905bcf00cbae188f1079dac0ae603fdb5f3d9..0d59207480643ab4a9dd9220f27869670668f2ad 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
@@ -142,9 +142,9 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
dlsch->Nsoft = Nsoft;
for (layer=0; layer<NR_MAX_NB_LAYERS; layer++) {
- dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(config->rf_config.tx_antenna_ports.value*sizeof(int32_t*));
+ dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*));
- for (aa=0; aa<config->rf_config.tx_antenna_ports.value; aa++) {
+ for (aa=0; aa<64; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
@@ -157,8 +157,8 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
for (int q=0; q<NR_MAX_NB_CODEWORDS; q++)
dlsch->mod_symbs[q] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH>>1)*sizeof(int32_t*));
- dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(config->rf_config.tx_antenna_ports.value*sizeof(int32_t*));
- for (aa=0; aa<config->rf_config.tx_antenna_ports.value; aa++) {
+ dlsch->calib_dl_ch_estimates = (int32_t**)malloc16(64*sizeof(int32_t*));
+ for (aa=0; aa<64; aa++) {
dlsch->calib_dl_ch_estimates[aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
}
@@ -265,7 +265,7 @@ void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
}
int nr_dlsch_encoding(unsigned char *a,
- uint8_t subframe,
+ uint8_t slot,
NR_gNB_DLSCH_t *dlsch,
NR_DL_FRAME_PARMS* frame_parms)
{
@@ -273,7 +273,7 @@ int nr_dlsch_encoding(unsigned char *a,
unsigned int G;
unsigned int crc=1;
- uint8_t harq_pid = dlsch->harq_ids[subframe];
+ uint8_t harq_pid = dlsch->harq_ids[slot];
nfapi_nr_dl_config_dlsch_pdu_rel15_t rel15 = dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
uint16_t nb_rb = rel15.n_prb;
uint8_t nb_symb_sch = rel15.nb_symbols;
@@ -379,7 +379,8 @@ int nr_dlsch_encoding(unsigned char *a,
}
printf("\n");*/
- ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
+ //ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
+ ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
//stop_meas(te_stats);
//printf("end ldpc encoder -- output\n");
diff --git a/openair1/PHY/NR_TRANSPORT/nr_pbch.c b/openair1/PHY/NR_TRANSPORT/nr_pbch.c
index 0256f8935242bba9a142c7e5435d75f3e2977f55..2e2c99f106f496a178bbd682e675989c29b4d41f 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_pbch.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_pbch.c
@@ -46,14 +46,14 @@ uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
{
int k,l;
- int16_t a;
+ //int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3;
@@ -72,10 +72,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
}
/// Resource mapping
- a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
- for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
- {
// PBCH DMRS are mapped within the SSB block on every fourth subcarrier starting from nushift of symbols 1, 2, 3
///symbol 1 [0+nushift:4:236+nushift] -- 60 mod symbols
@@ -86,12 +83,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
@@ -107,12 +104,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=(m==71)?148:4; // Jump from 44+nu to 192+nu
@@ -128,12 +125,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
@@ -141,7 +138,6 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
k-=frame_parms->ofdm_symbol_size;
}
- }
#ifdef DEBUG_PBCH_DMRS
@@ -225,13 +221,14 @@ void nr_init_pbch_interleaver(uint8_t *interleaver) {
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_hrf);
else // Ssb bits:3
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_ssb++);
+
}
int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
@@ -243,12 +240,13 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
{
int k,l,m;
- int16_t a;
+ //int16_t a;
int16_t mod_pbch_e[NR_POLAR_PBCH_E];
uint8_t idx=0;
uint16_t M;
uint8_t nushift;
uint32_t unscrambling_mask;
+ uint64_t a_reversed=0;
LOG_I(PHY, "PBCH generation started\n");
@@ -303,8 +301,13 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime);
#endif
+// Encoder reversal
+ for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
+ a_reversed |= (((uint64_t)pbch->pbch_a_prime>>i)&1)<<(31-i);
+
+
/// CRC, coding and rate matching
- polar_encoder (&pbch->pbch_a_prime, pbch->pbch_e, polar_params);
+ polar_encoder_fast (&a_reversed, (uint32_t*)pbch->pbch_e, 0, polar_params);
#ifdef DEBUG_PBCH_ENCODING
printf("Channel coding:\n");
for (int i=0; i<NR_POLAR_PBCH_E_DWORD; i++)
@@ -336,10 +339,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Resource mapping
nushift = config->sch_config.physical_cell_id.value &3;
- a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
- for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
- {
// PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS
///symbol 1 [0:239] -- 180 mod symbols
@@ -357,8 +357,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -382,8 +382,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -408,8 +408,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -433,8 +433,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
- ((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
- ((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
+ ((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
+ ((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
@@ -443,7 +443,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
k-=frame_parms->ofdm_symbol_size;
}
- }
return 0;
}
diff --git a/openair1/PHY/NR_TRANSPORT/nr_pss.c b/openair1/PHY/NR_TRANSPORT/nr_pss.c
index f91f14f8a21ff9bfa0ad50355a84eca79c228736..29dbe4ec99fd723efc6886fcce03170748aa5706 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_pss.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_pss.c
@@ -25,7 +25,7 @@
//#define NR_PSS_DEBUG
int nr_generate_pss( int16_t *d_pss,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -48,7 +48,7 @@ int nr_generate_pss( int16_t *d_pss,
for (i=0; i < NR_PSS_LENGTH; i++) {
m = (i + 43*Nid2)%(NR_PSS_LENGTH);
- d_pss[i] = (1 - 2*x[m]) * 32767;
+ d_pss[i] = (1 - 2*x[m]) * 23170;
}
#ifdef NR_PSS_DEBUG
@@ -57,10 +57,8 @@ int nr_generate_pss( int16_t *d_pss,
#endif
/// Resource mapping
- a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
+ a = amp;
- for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
- {
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
@@ -70,13 +68,12 @@ int nr_generate_pss( int16_t *d_pss,
for (m = 0; m < NR_PSS_LENGTH; m++) {
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
- ((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
+ ((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
- }
#ifdef NR_PSS_DEBUG
LOG_M("pss_0.m", "pss_0",
diff --git a/openair1/PHY/NR_TRANSPORT/nr_sss.c b/openair1/PHY/NR_TRANSPORT/nr_sss.c
index 023279f39ebf852612c4429649e815a16e8e9dbc..154aca9ffec5af610499ff4c2f4283dbcc51d7f8 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_sss.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_sss.c
@@ -24,7 +24,7 @@
//#define NR_SSS_DEBUG
int nr_generate_sss( int16_t *d_sss,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -33,7 +33,7 @@ int nr_generate_sss( int16_t *d_sss,
int i,k,l;
int m0, m1;
int Nid, Nid1, Nid2;
- int16_t a;
+ //int16_t a;
int16_t x0[NR_SSS_LENGTH], x1[NR_SSS_LENGTH];
const int x0_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
@@ -57,7 +57,7 @@ int nr_generate_sss( int16_t *d_sss,
m1 = Nid1 % 112;
for (i = 0; i < NR_SSS_LENGTH ; i++) {
- d_sss[i] = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 32767;
+ d_sss[i] = (1 - 2*x0[(i + m0) % NR_SSS_LENGTH] ) * (1 - 2*x1[(i + m1) % NR_SSS_LENGTH] ) * 23170;
}
#ifdef NR_SSS_DEBUG
@@ -65,23 +65,18 @@ int nr_generate_sss( int16_t *d_sss,
#endif
/// Resource mapping
- a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
-
- for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
- {
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
l = ssb_start_symbol + 2;
for (int m = 0; m < NR_SSS_LENGTH; m++) {
- ((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_sss[m]) >> 15;
+ ((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (amp * d_sss[m]) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
- }
#ifdef NR_SSS_DEBUG
// write_output("sss_0.m", "sss_0", (void*)txdataF[0][l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1);
#endif
diff --git a/openair1/PHY/NR_TRANSPORT/nr_transport.h b/openair1/PHY/NR_TRANSPORT/nr_transport.h
index ba551f755238a24a4657b2931f5111f8a6d8cee5..c1a4052191d8d6c0c6ee1435c2af1de884014e5d 100644
--- a/openair1/PHY/NR_TRANSPORT/nr_transport.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_transport.h
@@ -33,7 +33,7 @@
@returns 0 on success
*/
int nr_generate_pss( int16_t *d_pss,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -46,7 +46,7 @@ int nr_generate_pss( int16_t *d_pss,
@returns 0 on success
*/
int nr_generate_sss( int16_t *d_sss,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -59,7 +59,7 @@ int nr_generate_sss( int16_t *d_sss,
@returns 0 on success
*/
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
@@ -88,7 +88,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
- int32_t **txdataF,
+ int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
diff --git a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
index a4a9ab028ecb20bbb8d37fbc75288426c665caf6..942bf8c0ba22275c9a1a824c68b33f05f484b3e0 100644
--- a/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+++ b/openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
@@ -295,8 +295,10 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fm = filt16a_m1;
fr = filt16a_r1;
- // generate pilot
- nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns>>1][symbol], &pilot[0],2000,nb_rb_coreset);
+
+ // generate pilot
+ nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
+
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -313,10 +315,10 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
printf("pdcch ch est pilot addr %p RB_DL %d\n",&pilot[0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
- printf("dl_ch addr %p nushift %d\n",dl_ch,nushift);
-#endif
- if ((ue->frame_parms.N_RB_DL&1)==0) {
+ printf("dl_ch addr %p\n",dl_ch);
+#endif
+ // if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
@@ -421,7 +423,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
}
- }
+ //}
}
diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
index dffa6e3f8c5cdbd60b01d7882cdb75224d8652da..cf419b0904e0b5c00bf60a5d46c66b6df9eed119 100755
--- a/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
@@ -55,53 +55,60 @@
#define PDCCH_TEST_POLAR_TEMP_FIX
-
+#ifdef LOG_I
+#undef LOG_I
+#define LOG_I(A,B...) printf(B)
+#endif
#ifdef NR_PDCCH_DCI_RUN
-void nr_pdcch_demapping_deinterleaving(uint16_t *llr,
- uint16_t *z,
+
+//static const int16_t conjugate[8]__attribute__((aligned(32))) = {-1,1,-1,1,-1,1,-1,1};
+
+
+void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
+ uint32_t *z,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t coreset_time_dur,
uint32_t coreset_nbr_rb,
uint8_t reg_bundle_size_L,
uint8_t coreset_interleaver_size_R,
uint8_t n_shift){
-/*
- * This function will do demapping and deinterleaving from llr containing demodulated symbols
- * Demapping will regroup in REG and bundles
- * Deinterleaving will order the bundles
- *
- * In the following example we can see the process. The llr contains the demodulated IQs, but they are not ordered from REG 0,1,2,..
- * In e_rx (z) we will order the REG ids and group them into bundles.
- * Then we will put the bundles in the correct order as indicated in subclause 7.3.2.2
- *
- llr --------------------------> e_rx (z) ----> e_rx (z)
- | ...
- | ...
- | REG 26
-symbol 2 | ...
- | ...
- | REG 5
- | REG 2
+ /*
+ * This function will do demapping and deinterleaving from llr containing demodulated symbols
+ * Demapping will regroup in REG and bundles
+ * Deinterleaving will order the bundles
+ *
+ * In the following example we can see the process. The llr contains the demodulated IQs, but they are not ordered from REG 0,1,2,..
+ * In e_rx (z) we will order the REG ids and group them into bundles.
+ * Then we will put the bundles in the correct order as indicated in subclause 7.3.2.2
+ *
+ llr --------------------------> e_rx (z) ----> e_rx (z)
+ | ...
+ | ...
+ | REG 26
+ symbol 2 | ...
+ | ...
+ | REG 5
+ | REG 2
- | ...
- | ...
- | REG 25
-symbol 1 | ...
- | ...
- | REG 4
- | REG 1
+ | ...
+ | ...
+ | REG 25
+ symbol 1 | ...
+ | ...
+ | REG 4
+ | REG 1
- | ...
- | ... ... ...
- | REG 24 (bundle 7) ... ...
-symbol 0 | ... bundle 3 bundle 6
- | ... bundle 2 bundle 1
- | REG 3 bundle 1 bundle 7
- | REG 0 (bundle 0) bundle 0 bundle 0
-
-*/
+ | ...
+ | ... ... ...
+ | REG 24 (bundle 7) ... ...
+ symbol 0 | ... bundle 3 bundle 6
+ | ... bundle 2 bundle 1
+ | REG 3 bundle 1 bundle 7
+ | REG 0 (bundle 0) bundle 0 bundle 0
+
+ */
int c=0,r=0;
uint16_t bundle_j=0, f_bundle_j=0,f_reg=0;
uint32_t coreset_C=0;
@@ -124,9 +131,10 @@ symbol 0 | ... bundle 3 bundle 6
bundle_j = (c*coreset_interleaver_size_R)+r;
f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L);
if (coreset_interleaved==0) f_bundle_j=bundle_j;
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_demapping_deinterleaving)-> [r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
- #endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_demapping_deinterleaving)-> [r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
+#endif
}
f_reg = (f_bundle_j*reg_bundle_size_L)+(reg%reg_bundle_size_L);
//index_z = 9*reg;
@@ -135,11 +143,12 @@ symbol 0 | ... bundle 3 bundle 6
index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb)));
for (int i=0; i<9; i++){
z[index_z + i] = llr[index_llr + i];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_demapping_deinterleaving)-> [reg=%d,bundle_j=%d] z[%d]=(%d,%d) <-> \t[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d) \n",
- reg,bundle_j,(index_z + i),*(char*) &z[index_z + i],*(1 + (char*) &z[index_z + i]),
- f_reg,f_bundle_j,(index_llr + i),*(char*) &llr[index_llr + i], *(1 + (char*) &llr[index_llr + i]));
- #endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_demapping_deinterleaving)-> [reg=%d,bundle_j=%d] z[%d]=(%d,%d) <-> \t[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d) \n",
+ reg,bundle_j,(index_z + i),*(int16_t*) &z[index_z + i],*(1 + (int16_t*) &z[index_z + i]),
+ f_reg,f_bundle_j,(index_llr + i),*(int16_t*) &llr[index_llr + i], *(1 + (int16_t*) &llr[index_llr + i]));
+#endif
}
if ((reg%reg_bundle_size_L) == 0) r++;
}
@@ -149,38 +158,39 @@ symbol 0 | ... bundle 3 bundle 6
#ifdef NR_PDCCH_DCI_RUN
int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
- char *pdcch_llr, uint8_t symbol,uint32_t coreset_nbr_rb) {
+ int16_t *pdcch_llr, uint8_t symbol,uint32_t coreset_nbr_rb) {
+
+ int16_t *rxF = (int16_t*) &rxdataF_comp[0][(symbol * coreset_nbr_rb * 12)];
+ int32_t i;
+ int16_t *pdcch_llrp;
- int16_t *rxF = (int16_t*) &rxdataF_comp[0][(symbol * coreset_nbr_rb * 12)];
- int32_t i;
- char *pdcch_llr8;
+ pdcch_llrp = &pdcch_llr[2 * symbol * coreset_nbr_rb * 9];
- pdcch_llr8 = &pdcch_llr[2 * symbol * coreset_nbr_rb * 9];
- if (!pdcch_llr8) {
- printf("pdcch_qpsk_llr: llr is null, symbol %d\n", symbol);
- return (-1);
- }
+ if (!pdcch_llrp) {
+ printf("pdcch_qpsk_llr: llr is null, symbol %d\n", symbol);
+ return (-1);
+ }
#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: pdcch qpsk llr for symbol %d (pos %d), llr offset %d\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llr8-pdcch_llr);
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: pdcch qpsk llr for symbol %d (pos %d), llr offset %d\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llrp-pdcch_llr);
#endif
- //for (i = 0; i < (frame_parms->N_RB_DL * ((symbol == 0) ? 16 : 24)); i++) {
- for (i = 0; i < (coreset_nbr_rb * ((symbol == 0) ? 18 : 18)); i++) {
+ //for (i = 0; i < (frame_parms->N_RB_DL * ((symbol == 0) ? 16 : 24)); i++) {
+ for (i = 0; i < (coreset_nbr_rb * ((symbol == 0) ? 18 : 18)); i++) {
- if (*rxF > 31)
- *pdcch_llr8 = 31;
- else if (*rxF < -32)
- *pdcch_llr8 = -32;
- else
- *pdcch_llr8 = (char) (*rxF);
+ if (*rxF > 31)
+ *pdcch_llrp = 31;
+ else if (*rxF < -32)
+ *pdcch_llrp = -32;
+ else
+ *pdcch_llrp = (*rxF);
#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: rb=%d i=%d *rxF:%d => *pdcch_llr8:%d\n",i/18,i,*rxF,*pdcch_llr8);
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: rb=%d i=%d *rxF:%d => *pdcch_llrp:%d\n",i/18,i,*rxF,*pdcch_llrp);
#endif
- rxF++;
- pdcch_llr8++;
- }
+ rxF++;
+ pdcch_llrp++;
+ }
- return (0);
+ return (0);
}
#endif
@@ -234,7 +244,7 @@ void pdcch_channel_level(int32_t **dl_ch_estimates_ext,
{
int16_t rb;
- uint8_t aatx,aarx;
+ uint8_t aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i *dl_ch128;
__m128i avg128P;
@@ -242,42 +252,42 @@ void pdcch_channel_level(int32_t **dl_ch_estimates_ext,
int16x8_t *dl_ch128;
int32x4_t *avg128P;
#endif
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++)
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
- //clear average level
+ for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
+ //clear average level
#if defined(__x86_64__) || defined(__i386__)
- avg128P = _mm_setzero_si128();
- dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][0];
+ avg128P = _mm_setzero_si128();
+ dl_ch128=(__m128i *)&dl_ch_estimates_ext[aarx][0];
#elif defined(__arm__)
-
+
#endif
- for (rb=0; rb<nb_rb; rb++) {
-
+ for (rb=0; rb<(nb_rb*3)>>2; rb++) {
+
#if defined(__x86_64__) || defined(__i386__)
- avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
- avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
- avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
+ avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
+ avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
+ avg128P = _mm_add_epi32(avg128P,_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
#elif defined(__arm__)
-
+
#endif
- dl_ch128+=3;
- /*
- if (rb==0) {
- print_shorts("dl_ch128",&dl_ch128[0]);
- print_shorts("dl_ch128",&dl_ch128[1]);
- print_shorts("dl_ch128",&dl_ch128[2]);
- }
- */
- }
-
- DevAssert( nb_rb );
- avg[(aatx<<1)+aarx] = (((int32_t*)&avg128P)[0] +
- ((int32_t*)&avg128P)[1] +
- ((int32_t*)&avg128P)[2] +
- ((int32_t*)&avg128P)[3])/(nb_rb*12);
-
- // printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
+ // for (int i=0;i<24;i+=2) printf("pdcch channel re %d (%d,%d)\n",(rb*12)+(i>>1),((int16_t*)dl_ch128)[i],((int16_t*)dl_ch128)[i+1]);
+ dl_ch128+=3;
+ /*
+ if (rb==0) {
+ print_shorts("dl_ch128",&dl_ch128[0]);
+ print_shorts("dl_ch128",&dl_ch128[1]);
+ print_shorts("dl_ch128",&dl_ch128[2]);
+ }
+ */
}
+
+ DevAssert( nb_rb );
+ avg[aarx] = (((int32_t*)&avg128P)[0] +
+ ((int32_t*)&avg128P)[1] +
+ ((int32_t*)&avg128P)[2] +
+ ((int32_t*)&avg128P)[3])/(nb_rb*9);
+
+ // printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
+ }
#if defined(__x86_64__) || defined(__i386__)
_mm_empty();
@@ -293,89 +303,6 @@ __m128i mmtmpPD0,mmtmpPD1,mmtmpPD2,mmtmpPD3;
#endif
-void pdcch_detection_mrc_i(NR_DL_FRAME_PARMS *frame_parms,
- int32_t **rxdataF_comp,
- int32_t **rxdataF_comp_i,
- int32_t **rho,
- int32_t **rho_i,
- uint8_t symbol)
-{
-
- uint8_t aatx;
-
-#if defined(__x86_64__) || defined(__i386__)
- __m128i *rxdataF_comp128_0,*rxdataF_comp128_1,*rxdataF_comp128_i0,*rxdataF_comp128_i1,*rho128_0,*rho128_1,*rho128_i0,*rho128_i1;
-#elif defined(__arm__)
- int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1,*rxdataF_comp128_i0,*rxdataF_comp128_i1,*rho128_0,*rho128_1,*rho128_i0,*rho128_i1;
-#endif
- int32_t i;
-
- if (frame_parms->nb_antennas_rx>1) {
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
- //if (frame_parms->mode1_flag && (aatx>0)) break;
-
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
-#endif
- // MRC on each re of rb on MF output
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
-#elif defined(__arm__)
- rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
-#endif
- }
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- rho128_0 = (__m128i *) &rho[0][symbol*frame_parms->N_RB_DL*12];
- rho128_1 = (__m128i *) &rho[1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rho128_0 = (int16x8_t *) &rho[0][symbol*frame_parms->N_RB_DL*12];
- rho128_1 = (int16x8_t *) &rho[1][symbol*frame_parms->N_RB_DL*12];
-#endif
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rho128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rho128_0[i],1),_mm_srai_epi16(rho128_1[i],1));
-#elif defined(__arm__)
- rho128_0[i] = vhaddq_s16(rho128_0[i],rho128_1[i]);
-#endif
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- rho128_i0 = (__m128i *) &rho_i[0][symbol*frame_parms->N_RB_DL*12];
- rho128_i1 = (__m128i *) &rho_i[1][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i0 = (__m128i *)&rxdataF_comp_i[0][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i1 = (__m128i *)&rxdataF_comp_i[1][symbol*frame_parms->N_RB_DL*12];
-#elif defined(__arm__)
- rho128_i0 = (int16x8_t*) &rho_i[0][symbol*frame_parms->N_RB_DL*12];
- rho128_i1 = (int16x8_t*) &rho_i[1][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i0 = (int16x8_t *)&rxdataF_comp_i[0][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_i1 = (int16x8_t *)&rxdataF_comp_i[1][symbol*frame_parms->N_RB_DL*12];
-
-#endif
- // MRC on each re of rb on MF and rho
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
-#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_i0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_i0[i],1),_mm_srai_epi16(rxdataF_comp128_i1[i],1));
- rho128_i0[i] = _mm_adds_epi16(_mm_srai_epi16(rho128_i0[i],1),_mm_srai_epi16(rho128_i1[i],1));
-#elif defined(__arm__)
- rxdataF_comp128_i0[i] = vhaddq_s16(rxdataF_comp128_i0[i],rxdataF_comp128_i1[i]);
- rho128_i0[i] = vhaddq_s16(rho128_i0[i],rho128_i1[i]);
-
-#endif
- }
- }
-
-#if defined(__x86_64__) || defined(__i386__)
- _mm_empty();
- _m_empty();
-#endif
-}
#ifdef NR_PDCCH_DCI_RUN
@@ -391,23 +318,23 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
uint32_t coreset_nbr_rb,
uint32_t n_BWP_start) {
-/*
- * This function is demapping DM-RS PDCCH RE
- * Implementing 38.211 Section 7.4.1.3.2 Mapping to physical resources
- * PDCCH DM-RS signals are mapped on RE a_k_l where:
- * k = 12*n + 4*kprime + 1
- * n=0,1,..
- * kprime=0,1,2
- * According to this equations, DM-RS PDCCH are mapped on k where k%12==1 || k%12==5 || k%12==9
- *
- */
+ /*
+ * This function is demapping DM-RS PDCCH RE
+ * Implementing 38.211 Section 7.4.1.3.2 Mapping to physical resources
+ * PDCCH DM-RS signals are mapped on RE a_k_l where:
+ * k = 12*n + 4*kprime + 1
+ * n=0,1,..
+ * kprime=0,1,2
+ * According to this equations, DM-RS PDCCH are mapped on k where k%12==1 || k%12==5 || k%12==9
+ *
+ */
// the bitmap coreset_frq_domain contains 45 bits
- #define CORESET_FREQ_DOMAIN_BITMAP_SIZE 45
+#define CORESET_FREQ_DOMAIN_BITMAP_SIZE 45
// each bit is associated to 6 RBs
- #define BIT_TO_NBR_RB_CORESET_FREQ_DOMAIN 6
- #define NBR_RE_PER_RB_WITH_DMRS 12
+#define BIT_TO_NBR_RB_CORESET_FREQ_DOMAIN 6
+#define NBR_RE_PER_RB_WITH_DMRS 12
// after removing the 3 DMRS RE, the RB contains 9 RE with PDCCH
- #define NBR_RE_PER_RB_WITHOUT_DMRS 9
+#define NBR_RE_PER_RB_WITHOUT_DMRS 9
uint16_t c_rb, nb_rb = 0;
// this variable will be incremented by 1 each time a bit set to '0' is found in coreset_freq_dom bitmap
@@ -420,59 +347,59 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
symbol_mod = (symbol >= (7 - frame_parms->Ncp)) ? symbol - (7 - frame_parms->Ncp) : symbol;
c_rb = n_BWP_start; // c_rb is the common resource block: RB within the BWP
- #ifdef DEBUG_DCI_DECODING
- LOG_I(PHY, "extract_rbs_single: symbol_mod %d\n",symbol_mod);
- #endif
+#ifdef DEBUG_DCI_DECODING
+ LOG_I(PHY, "extract_rbs_single: symbol_mod %d\n",symbol_mod);
+#endif
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
if (high_speed_flag == 1){
dl_ch0 = &dl_ch_estimates[aarx][(symbol * (frame_parms->ofdm_symbol_size))];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0 = &dl_ch_estimates[aarx = (%d)][ (symbol * (frame_parms->ofdm_symbol_size (%d))) = (%d)]\n",
- aarx,frame_parms->ofdm_symbol_size,(symbol * (frame_parms->ofdm_symbol_size)));
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0 = &dl_ch_estimates[aarx = (%d)][ (symbol * (frame_parms->ofdm_symbol_size (%d))) = (%d)]\n",
+ aarx,frame_parms->ofdm_symbol_size,(symbol * (frame_parms->ofdm_symbol_size)));
+#endif
} else {
dl_ch0 = &dl_ch_estimates[aarx][0];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0 = &dl_ch_estimates[aarx = (%d)][0]\n",aarx);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0 = &dl_ch_estimates[aarx = (%d)][0]\n",aarx);
+#endif
}
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS)];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
- aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS));
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
+ aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS));
+#endif
rxF_ext = &rxdataF_ext[aarx][symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS)];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
- aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS));
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> (for symbol=%d, aarx=%d), symbol_mod=%d, nushiftmod3=%d \n",symbol,aarx,symbol_mod,nushiftmod3);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
+ aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS));
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> (for symbol=%d, aarx=%d), symbol_mod=%d, nushiftmod3=%d \n",symbol,aarx,symbol_mod,nushiftmod3);
+#endif
-/*
- * The following for loop handles treatment of PDCCH contained in table rxdataF (in frequency domain)
- * In NR the PDCCH IQ symbols are contained within RBs in the CORESET defined by higher layers which is located within the BWP
- * Lets consider that the first RB to be considered as part of the CORESET and part of the PDCCH is n_BWP_start
- * Several cases have to be handled differently as IQ symbols are situated in different parts of rxdataF:
- * 1. Number of RBs in the system bandwidth is even
- * 1.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
- * 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0)
- * 2. Number of RBs in the system bandwidth is odd
- * (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF)
- * 2.1 The RB is <= than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
- * 2.2 The RB is > than the N_RB_DL/2+1 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB containing DC)
- * 2.3 The RB is == N_RB_DL/2+1 -> IQ symbols are in the lower border of the rxdataF for first 6 IQ element and the upper border of the rxdataF for the last 6 IQ elements
- * If the first RB containing PDCCH within the UE BWP and within the CORESET is higher than half of the system bandwidth (N_RB_DL),
- * then the IQ symbol is going to be found at the position 0+c_rb-N_RB_DL/2 in rxdataF and
- * we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
- */
+ /*
+ * The following for loop handles treatment of PDCCH contained in table rxdataF (in frequency domain)
+ * In NR the PDCCH IQ symbols are contained within RBs in the CORESET defined by higher layers which is located within the BWP
+ * Lets consider that the first RB to be considered as part of the CORESET and part of the PDCCH is n_BWP_start
+ * Several cases have to be handled differently as IQ symbols are situated in different parts of rxdataF:
+ * 1. Number of RBs in the system bandwidth is even
+ * 1.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
+ * 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0)
+ * 2. Number of RBs in the system bandwidth is odd
+ * (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF)
+ * 2.1 The RB is <= than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
+ * 2.2 The RB is > than the N_RB_DL/2+1 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB containing DC)
+ * 2.3 The RB is == N_RB_DL/2+1 -> IQ symbols are in the lower border of the rxdataF for first 6 IQ element and the upper border of the rxdataF for the last 6 IQ elements
+ * If the first RB containing PDCCH within the UE BWP and within the CORESET is higher than half of the system bandwidth (N_RB_DL),
+ * then the IQ symbol is going to be found at the position 0+c_rb-N_RB_DL/2 in rxdataF and
+ * we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
+ */
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> n_BWP_start=%d, coreset_nbr_rb=%d\n",n_BWP_start,coreset_nbr_rb);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> n_BWP_start=%d, coreset_nbr_rb=%d\n",n_BWP_start,coreset_nbr_rb);
+#endif
for (c_rb = n_BWP_start; c_rb < (n_BWP_start + coreset_nbr_rb + (BIT_TO_NBR_RB_CORESET_FREQ_DOMAIN * offset_discontiguous)); c_rb++) {
//c_rb_tmp = 0;
@@ -484,33 +411,34 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
//c_rb_tmp = c_rb_tmp + 6;
c_rb = c_rb + BIT_TO_NBR_RB_CORESET_FREQ_DOMAIN;
offset_discontiguous ++;
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> we entered here as coreset_freq_dom=%lx (bit %d) is 0, coreset_freq_domain is discontiguous\n",coreset_freq_dom,(46 - bitcnt_coreset_freq_dom));
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> we entered here as coreset_freq_dom=%lx (bit %d) is 0, coreset_freq_domain is discontiguous\n",coreset_freq_dom,(46 - bitcnt_coreset_freq_dom));
+#endif
}
}
//c_rb = c_rb + c_rb_tmp;
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> c_rb=%d\n",c_rb);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> c_rb=%d\n",c_rb);
+#endif
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
- c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
- #endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
+ c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
+#endif
}
if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))));
- #endif
+#endif
//rxF = &rxdataF[aarx][(1 + 12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
//#ifdef NR_PDCCH_DCI_DEBUG
// printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(1 + 12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
@@ -520,41 +448,43 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)){
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
- c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
- #endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
+ c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
+#endif
}
if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)){
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - frame_parms->N_RB_DL) - 5 + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
- c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size))));
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - frame_parms->N_RB_DL) - 5 + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
+ c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size))));
+#endif
}
if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)){ // treatment of RB containing the DC
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
- c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
- #endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
+ c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
+#endif
/*if (symbol_mod > 300) { // this if is going to be removed as DM-RS signals are present in all symbols of PDCCH
for (i = 0; i < 6; i++) {
- dl_ch0_ext[i] = dl_ch0[i];
- rxF_ext[i] = rxF[i];
+ dl_ch0_ext[i] = dl_ch0[i];
+ rxF_ext[i] = rxF[i];
}
rxF = &rxdataF[aarx][(symbol * (frame_parms->ofdm_symbol_size))]; // we point at the 1st part of the rxdataF in symbol
#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(symbol * (frame_parms->ofdm_symbol_size)) = (%d)]\n",
- c_rb,aarx,(symbol * (frame_parms->ofdm_symbol_size)));
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(symbol * (frame_parms->ofdm_symbol_size)) = (%d)]\n",
+ c_rb,aarx,(symbol * (frame_parms->ofdm_symbol_size)));
#endif
for (; i < 12; i++) {
- dl_ch0_ext[i] = dl_ch0[i];
- rxF_ext[i] = rxF[(1 + i - 6)];
+ dl_ch0_ext[i] = dl_ch0[i];
+ rxF_ext[i] = rxF[(1 + i - 6)];
}
nb_rb++;
dl_ch0_ext += 12;
@@ -573,10 +503,10 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
}
// then we point at the begining of the symbol part of rxdataF do process second part of RB
rxF = &rxdataF[aarx][((symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(symbol * (frame_parms->ofdm_symbol_size)) = (%d)]\n",
- c_rb,aarx,(symbol * (frame_parms->ofdm_symbol_size)));
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(symbol * (frame_parms->ofdm_symbol_size)) = (%d)]\n",
+ c_rb,aarx,(symbol * (frame_parms->ofdm_symbol_size)));
+#endif
for (; i < 12; i++) {
if ((i != 9)) {
dl_ch0_ext[j] = dl_ch0[i];
@@ -588,48 +518,49 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
dl_ch0_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
rxF_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
dl_ch0 += 12;
- //rxF += 7;
- //c_rb++;
- //n_BWP_start++; // We have to increment this variable here to be consequent in the for loop afterwards
+ //rxF += 7;
+ //c_rb++;
+ //n_BWP_start++; // We have to increment this variable here to be consequent in the for loop afterwards
//}
} else { // treatment of any RB that does not contain the DC
/*if (symbol_mod > 300) {
memcpy(dl_ch0_ext, dl_ch0, 12 * sizeof(int32_t));
for (i = 0; i < 12; i++) {
- rxF_ext[i] = rxF[i];
+ rxF_ext[i] = rxF[i];
}
nb_rb++;
dl_ch0_ext += 12;
rxF_ext += 12;
dl_ch0 += 12;
//rxF += 12;
- } else {*/
+ } else {*/
j = 0;
for (i = 0; i < 12; i++) {
if ((i != 1) && (i != 5) && (i != 9)) {
rxF_ext[j] = rxF[i];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)",
- c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short*) &rxF_ext[j]), i,
- *(short *) &rxF[i], *(1 + (short*) &rxF[i]));
- #endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n",
+ c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short*) &rxF_ext[j]), i,
+ *(short *) &rxF[i], *(1 + (short*) &rxF[i]));
+#endif
dl_ch0_ext[j] = dl_ch0[i];
//printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> ch %d => dl_ch0(%d,%d)\n", i, *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i]));
//printf("\t-> dl_ch0[%d] => dl_ch0_ext[%d](%d,%d)\n", i,j, *(short *) &dl_ch0[i], *(1 + (short*) &dl_ch0[i]));
j++;
} else {
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
- c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short*) &rxF_ext[j]), i,
- *(short *) &rxF[i], *(1 + (short*) &rxF[i]));
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
+ c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short*) &rxF_ext[j]), i,
+ *(short *) &rxF[i], *(1 + (short*) &rxF[i]));
+#endif
}
}
nb_rb++;
dl_ch0_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
rxF_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
dl_ch0 += 12;
- //rxF += 12;
+ //rxF += 12;
//}
}
}
@@ -651,12 +582,12 @@ void nr_pdcch_channel_compensation(int32_t **rxdataF_ext,
{
uint16_t rb; //,nb_rb=20;
- uint8_t aatx,aarx;
+ uint8_t aarx;
#if defined(__x86_64__) || defined(__i386__)
-__m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
+ __m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
#elif defined(__arm__)
-int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
+ int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
#endif
#if defined(__x86_64__) || defined(__i386__)
@@ -665,99 +596,100 @@ int16x8_t mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
#endif
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB;aatx++)
- for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
-
+ for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
+
#if defined(__x86_64__) || defined(__i386__)
- dl_ch128 = (__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*coreset_nbr_rb*12];
- rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12];
- rxdataF_comp128 = (__m128i *)&rxdataF_comp[(aatx<<1)+aarx][symbol*coreset_nbr_rb*12];
- //printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]);
- //printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
- //printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]);
-
+ dl_ch128 = (__m128i *)&dl_ch_estimates_ext[aarx][symbol*coreset_nbr_rb*12];
+ rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12];
+ rxdataF_comp128 = (__m128i *)&rxdataF_comp[aarx][symbol*coreset_nbr_rb*12];
+ //printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]);
+ //printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
+ //printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]);
+
#elif defined(__arm__)
-// to be filled in
+ // to be filled in
#endif
-
- for (rb=0; rb<coreset_nbr_rb; rb++) {
- //printf("rb %d\n",rb);
+
+ for (rb=0; rb<(coreset_nbr_rb*3)>>2; rb++) {
+ //printf("rb %d\n",rb);
#if defined(__x86_64__) || defined(__i386__)
- // multiply by conjugated channel
- mmtmpP0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
- // print_ints("re",&mmtmpP0);
- // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
- // print_ints("im",&mmtmpP1);
- mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[0]);
- // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
- // print_ints("re(shift)",&mmtmpP0);
- mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
- // print_ints("im(shift)",&mmtmpP1);
- mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
- mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
- // print_ints("c0",&mmtmpP2);
- // print_ints("c1",&mmtmpP3);
- rxdataF_comp128[0] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
- //print_shorts("rx:",rxdataF128);
- //print_shorts("ch:",dl_ch128);
- //print_shorts("pack:",rxdataF_comp128);
-
- // multiply by conjugated channel
- mmtmpP0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
- // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
- mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[1]);
- // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
- mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
- mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
- mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
- rxdataF_comp128[1] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
- //print_shorts("rx:",rxdataF128+1);
- //print_shorts("ch:",dl_ch128+1);
- //print_shorts("pack:",rxdataF_comp128+1);
-
- // multiply by conjugated channel
- mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
- // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
- mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
- mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
- mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[2]);
- // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
- mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
- mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
- mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
- mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
- rxdataF_comp128[2] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
- ///////////////////////////////////////////////////////////////////////////////////////////////
- //print_shorts("rx:",rxdataF128+2);
- //print_shorts("ch:",dl_ch128+2);
- //print_shorts("pack:",rxdataF_comp128+2);
-
-#ifdef NR_PDCCH_DCI_DEBUG
- for (int i=0; i<20 ; i++)
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> rb=%d rxdataF128[%d]=(%d,%d) rxdataF_comp128[%d]=(%d,%d)\n",
- rb, i, *(short *) &rxdataF128[i],*(1 + (short*) &rxdataF128[i]),
- i,*(short *) &rxdataF_comp128[i], *(1 + (short*) &rxdataF_comp128[i]));
-
-#endif
-
- dl_ch128+=3;
- rxdataF128+=3;
- rxdataF_comp128+=3;
-
+ // multiply by conjugated channel
+ mmtmpP0 = _mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
+ // print_ints("re",&mmtmpP0);
+ // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
+ mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[0],_MM_SHUFFLE(2,3,0,1));
+ mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
+ mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
+ // print_ints("im",&mmtmpP1);
+ mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[0]);
+ // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
+ mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
+ // print_ints("re(shift)",&mmtmpP0);
+ mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
+ // print_ints("im(shift)",&mmtmpP1);
+ mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
+ mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
+ // print_ints("c0",&mmtmpP2);
+ // print_ints("c1",&mmtmpP3);
+ rxdataF_comp128[0] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
+ //print_shorts("rx:",rxdataF128);
+ //print_shorts("ch:",dl_ch128);
+ //print_shorts("pack:",rxdataF_comp128);
+
+ // multiply by conjugated channel
+ mmtmpP0 = _mm_madd_epi16(dl_ch128[1],rxdataF128[1]);
+ // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
+ mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[1],_MM_SHUFFLE(2,3,0,1));
+ mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
+ mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
+ mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[1]);
+ // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
+ mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
+ mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
+ mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
+ mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
+ rxdataF_comp128[1] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
+ //print_shorts("rx:",rxdataF128+1);
+ //print_shorts("ch:",dl_ch128+1);
+ //print_shorts("pack:",rxdataF_comp128+1);
+
+ // multiply by conjugated channel
+ mmtmpP0 = _mm_madd_epi16(dl_ch128[2],rxdataF128[2]);
+ // mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
+ mmtmpP1 = _mm_shufflelo_epi16(dl_ch128[2],_MM_SHUFFLE(2,3,0,1));
+ mmtmpP1 = _mm_shufflehi_epi16(mmtmpP1,_MM_SHUFFLE(2,3,0,1));
+ mmtmpP1 = _mm_sign_epi16(mmtmpP1,*(__m128i*)&conjugate[0]);
+ mmtmpP1 = _mm_madd_epi16(mmtmpP1,rxdataF128[2]);
+ // mmtmpP1 contains imag part of 4 consecutive outputs (32-bit)
+ mmtmpP0 = _mm_srai_epi32(mmtmpP0,output_shift);
+ mmtmpP1 = _mm_srai_epi32(mmtmpP1,output_shift);
+ mmtmpP2 = _mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
+ mmtmpP3 = _mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
+ rxdataF_comp128[2] = _mm_packs_epi32(mmtmpP2,mmtmpP3);
+ ///////////////////////////////////////////////////////////////////////////////////////////////
+ //print_shorts("rx:",rxdataF128+2);
+ //print_shorts("ch:",dl_ch128+2);
+ //print_shorts("pack:",rxdataF_comp128+2);
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ for (int i=0; i<12 ; i++)
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_channel_compensation)-> rxdataF128[%d]=(%d,%d) X dlch[%d]=(%d,%d) rxdataF_comp128[%d]=(%d,%d)\n",
+ (rb*12)+i, ((short *)rxdataF128)[i<<1],((short*)rxdataF128)[1+(i<<1)],
+ (rb*12)+i, ((short *)dl_ch128)[i<<1],((short*)dl_ch128)[1+(i<<1)],
+ (rb*12)+i, ((short *)rxdataF_comp128)[i<<1],((short*)rxdataF_comp128)[1+(i<<1)]);
+
+#endif
+
+ dl_ch128+=3;
+ rxdataF128+=3;
+ rxdataF_comp128+=3;
+
+
#elif defined(__arm__)
-// to be filled in
+ // to be filled in
#endif
- }
}
+ }
#if defined(__x86_64__) || defined(__i386__)
_mm_empty();
_m_empty();
@@ -770,32 +702,29 @@ void pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol)
{
- uint8_t aatx;
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
#elif defined(__arm__)
- int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1;
+ int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1;
#endif
int32_t i;
if (frame_parms->nb_antennas_rx>1) {
- for (aatx=0; aatx<frame_parms->nb_antenna_ports_eNB; aatx++) {
#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
+ rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
+ rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12];
#elif defined(__arm__)
- rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[(aatx<<1)][symbol*frame_parms->N_RB_DL*12];
- rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[(aatx<<1)+1][symbol*frame_parms->N_RB_DL*12];
+ rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
+ rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12];
#endif
- // MRC on each re of rb
- for (i=0; i<frame_parms->N_RB_DL*3; i++) {
+ // MRC on each re of rb
+ for (i=0; i<frame_parms->N_RB_DL*3; i++) {
#if defined(__x86_64__) || defined(__i386__)
- rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
+ rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
#elif defined(__arm__)
- rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
+ rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
#endif
- }
}
}
@@ -828,7 +757,6 @@ void pdcch_siso(NR_DL_FRAME_PARMS *frame_parms,
}
-int32_t avgP[4];
@@ -845,10 +773,6 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint16_t symbol_mon,
NR_SEARCHSPACE_TYPE_t searchSpaceType) {
- #ifdef MU_RECEIVER
- uint8_t eNB_id_i=eNB_id+1; //add 1 to eNB_id to separate from wanted signal, chosen as the B/F'd pilots from the SeNB are shifted by 1
-#endif
-
NR_UE_COMMON *common_vars = &ue->common_vars;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
@@ -857,8 +781,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
int do_common;
if (searchSpaceType == common) do_common=1;
if (searchSpaceType == ue_specific) do_common=0;
- uint8_t log2_maxh, aatx, aarx;
+ uint8_t log2_maxh, aarx;
int32_t avgs;
+ int32_t avgP[4];
// number of RB (1 symbol) or REG (12 RE) in one CORESET: higher-layer parameter CORESET-freq-dom
// (bit map 45 bits: each bit indicates 6 RB in CORESET -> 1 bit MSB indicates PRB 0..6 are part of CORESET)
@@ -880,7 +805,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
//uint32_t n_BWP_start = 0;
//uint32_t n_rb_offset = 0;
- uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+43; //to be removed 43
+ uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset+(int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB);
// start time position for CORESET
// parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
uint8_t start_symbol = 0;
@@ -897,7 +822,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=(%d)\n",symbol_mon,start_symbol);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
- coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R);
+ coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R);
#endif
//
@@ -919,31 +844,32 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// for (int j=0; j < coreset_nbr_act; j++) {
// for each active CORESET (max number of active CORESETs in a BWP is 3),
// we calculate the number of RB for each CORESET bitmap
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld)\n",coreset_freq_dom);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld)\n",coreset_freq_dom);
+#endif
int i; //for each bit in the coreset_freq_dom bitmap
for (i = 0; i < 45; i++) {
// this loop counts each bit of the bit map coreset_freq_dom, and increments nbr_RB_coreset for each bit set to '1'
if (((coreset_freq_dom & 0x1FFFFFFFFFFF) >> i) & 0x1) coreset_nbr_rb++;
}
coreset_nbr_rb = 6 * coreset_nbr_rb; // coreset_nbr_rb has to be multiplied by 6 to indicate the number of PRB or REG(=12 RE) within the CORESET
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld,%lx), coreset_nbr_rb=%d\n", coreset_freq_dom,coreset_freq_dom,coreset_nbr_rb);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld,%lx), coreset_nbr_rb=%d\n", coreset_freq_dom,coreset_freq_dom,coreset_nbr_rb);
+#endif
coreset_nbr_reg = coreset_time_dur * coreset_nbr_rb;
coreset_C = (uint32_t)(coreset_nbr_reg / (reg_bundle_size_L * coreset_interleaver_size_R));
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_nbr_rb=%d, coreset_nbr_reg=%d, coreset_C=(%d/(%d*%d))=%d\n",
- coreset_nbr_rb, coreset_nbr_reg, coreset_nbr_reg, reg_bundle_size_L,coreset_interleaver_size_R, coreset_C);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_nbr_rb=%d, coreset_nbr_reg=%d, coreset_C=(%d/(%d*%d))=%d\n",
+ coreset_nbr_rb, coreset_nbr_reg, coreset_nbr_reg, reg_bundle_size_L,coreset_interleaver_size_R, coreset_C);
+#endif
for (int s = start_symbol; s < (start_symbol + coreset_time_dur); s++) {
+
+
+
#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter process pdcch ofdm symbol s=%d where coreset_time_dur=%d\n",s,coreset_time_dur);
-
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",
- is_secondary_ue);
+ is_secondary_ue);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
#endif
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
@@ -957,37 +883,36 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
coreset_nbr_rb,
n_rb_offset);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",avgP);
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)\n");
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",avgP);
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)\n");
+#endif
// compute channel level based on ofdm symbol 0
pdcch_channel_level(pdcch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
avgP,
coreset_nbr_rb);
avgs = 0;
- for (aatx = 0; aatx < frame_parms->nb_antenna_ports_eNB; aatx++)
- for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++)
- avgs = cmax(avgs, avgP[(aarx << 1) + aatx]);
+ for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++)
+ avgs = cmax(avgs, avgP[aarx]);
log2_maxh = (log2_approx(avgs) / 2) + 5; //+frame_parms->nb_antennas_rx;
#ifdef UE_DEBUG_TRACE
-LOG_D(PHY,"nr_tti_rx %d: pdcch log2_maxh = %d (%d,%d)\n",nr_tti_rx,log2_maxh,avgP[0],avgs);
+ LOG_D(PHY,"nr_tti_rx %d: pdcch log2_maxh = %d (%d,%d)\n",nr_tti_rx,log2_maxh,avgP[0],avgs);
#endif
#if T_TRACER
-T(T_UE_PHY_PDCCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_tti_rx),
- T_INT(avgP[0]), T_INT(avgP[1]), T_INT(avgP[2]), T_INT(avgP[3]));
+ T(T_UE_PHY_PDCCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_tti_rx),
+ T_INT(avgP[0]), T_INT(avgP[1]), T_INT(avgP[2]), T_INT(avgP[3]));
+#endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_channel_compensation(log2_maxh=%d)\n",log2_maxh);
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)\n");
#endif
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_channel_compensation(log2_maxh=%d)\n",log2_maxh);
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)\n");
- #endif
// compute LLRs for ofdm symbol 0 only
nr_pdcch_channel_compensation(pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
pdcch_vars[eNB_id]->rxdataF_comp,
- (aatx > 1) ? pdcch_vars[eNB_id]->rho : NULL,
+ NULL,
frame_parms,
s,
log2_maxh,
@@ -996,134 +921,72 @@ T(T_UE_PHY_PDCCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_tt
#ifdef DEBUG_PHY
- if (nr_tti_rx==5)
- write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
+ if (nr_tti_rx==5)
+ write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
#endif
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- //get MF output for interfering stream
- pdcch_channel_compensation(pdcch_vars[eNB_id_i]->rxdataF_ext,
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- (aatx>1) ? pdcch_vars[eNB_id_i]->rho : NULL,
- frame_parms,
- 0,
- log2_maxh);// log2_maxh+I0_shift
-#ifdef DEBUG_PHY
- write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-#endif
- pdcch_dual_stream_correlation(frame_parms,
- 0,
- pdcch_vars[eNB_id]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- log2_maxh);
- }
-
-#endif //MU_RECEIVER
-
if (frame_parms->nb_antennas_rx > 1) {
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- pdcch_detection_mrc_i(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- pdcch_vars[eNB_id]->rho,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- 0);
-#ifdef DEBUG_PHY
- write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
- write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
-#endif
- } else
-#endif //MU_RECEIVER
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n",
- frame_parms->nb_antennas_rx);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n",
+ frame_parms->nb_antennas_rx);
+#endif
pdcch_detection_mrc(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
}
-#ifdef MU_RECEIVER
-
- if (is_secondary_ue) {
- pdcch_qpsk_qpsk_llr(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- pdcch_vars[eNB_id_i]->rxdataF_comp,
- pdcch_vars[eNB_id]->dl_ch_rho_ext,
- pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder)
- pdcch_vars[eNB_id]->llr,
- 0);
- /*
- #ifdef DEBUG_PHY
- if (subframe==5) {
- write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- write_output("llr16_seq.m","llr16",&pdcch_vars[eNB_id]->llr16[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
- }
- #endif*/
- } else {
-#endif //MU_RECEIVER
-
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_llr(rxdataF_comp -> llr)\n");
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_llr(rxdataF_comp -> llr)\n");
+#endif
nr_pdcch_llr(frame_parms,
- pdcch_vars[eNB_id]->rxdataF_comp,
- (char *) pdcch_vars[eNB_id]->llr,
- s,
- coreset_nbr_rb);
-
-#ifdef MU_RECEIVER
-}
-#endif //MU_RECEIVER
+ pdcch_vars[eNB_id]->rxdataF_comp,
+ pdcch_vars[eNB_id]->llr,
+ s,
+ coreset_nbr_rb);
+
#if T_TRACER
-/*
- T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
- T_INT(n_pdcch_symbols),
- T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
-*/
+ /*
+ T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
+ T_INT(n_pdcch_symbols),
+ T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
+ */
#endif
#ifdef DEBUG_DCI_DECODING
- printf("demapping: nr_tti_rx %d, mi %d, tdd_config %d\n",nr_tti_rx,get_mi(frame_parms,nr_tti_rx),frame_parms->tdd_config);
+ printf("demapping: nr_tti_rx %d, mi %d, tdd_config %d\n",nr_tti_rx,get_mi(frame_parms,nr_tti_rx),frame_parms->tdd_config);
#endif
}
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_demapping_deinterleaving()\n");
- #endif
-
-nr_pdcch_demapping_deinterleaving(pdcch_vars[eNB_id]->llr,
- (uint16_t*) pdcch_vars[eNB_id]->e_rx,
- frame_parms,
- coreset_time_dur,
- coreset_nbr_rb,
- reg_bundle_size_L,
- coreset_interleaver_size_R,
- n_shift);
-
-
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_demapping_deinterleaving()\n");
+#endif
+
+ nr_pdcch_demapping_deinterleaving((uint32_t*) pdcch_vars[eNB_id]->llr,
+ (uint32_t*) pdcch_vars[eNB_id]->e_rx,
+ frame_parms,
+ coreset_time_dur,
+ coreset_nbr_rb,
+ reg_bundle_size_L,
+ coreset_interleaver_size_R,
+ n_shift);
+
+
nr_pdcch_unscrambling(pdcch_vars[eNB_id]->crnti,
- frame_parms,
- nr_tti_rx,
- (uint16_t*) pdcch_vars[eNB_id]->e_rx,
- coreset_time_dur*coreset_nbr_rb*9*2,
- // get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
- pdcch_DMRS_scrambling_id,
- do_common);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we end nr_pdcch_unscrambling()\n");
- #endif
-
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> Ending nr_rx_pdcch() function\n");
- #endif
+ frame_parms,
+ nr_tti_rx,
+ pdcch_vars[eNB_id]->e_rx,
+ coreset_time_dur*coreset_nbr_rb*9*2,
+ // get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
+ pdcch_DMRS_scrambling_id,
+ do_common);
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we end nr_pdcch_unscrambling()\n");
+#endif
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> Ending nr_rx_pdcch() function\n");
+#endif
return (0);
}
#endif
@@ -1131,26 +994,25 @@ nr_pdcch_demapping_deinterleaving(pdcch_vars[eNB_id]->llr,
void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
- uint8_t nr_tti_rx,
- uint8_t *e,
- uint32_t length)
-{
+ uint8_t nr_tti_rx,
+ uint8_t *e,
+ uint32_t length) {
int i;
uint8_t reset;
uint32_t x1, x2, s=0;
-
+
reset = 1;
// x1 is set in lte_gold_generic
-
+
x2 = (nr_tti_rx<<9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
-
+
for (i=0; i<length; i++) {
if ((i&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
//printf("lte_gold[%d]=%x\n",i,s);
reset = 0;
}
-
+
// printf("scrambling %d : e %d, c %d\n",i,e[i],((s>>(i&0x1f))&1));
if (e[i] != 2) // <NIL> element is 2
e[i] = (e[i]&1) ^ ((s>>(i&0x1f))&1);
@@ -1161,58 +1023,69 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
#ifdef NR_PDCCH_DCI_RUN
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t nr_tti_rx,
- uint16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common) {
-
- int i;
- uint8_t reset;
- uint32_t x1, x2, s = 0;
+ int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common) {
+
+ int i;
+ uint8_t reset;
+ uint32_t x1, x2, s = 0;
uint16_t n_id; //{0,1,...,65535}
uint32_t n_rnti;
+
+ reset = 1;
+ // x1 is set in first call to lte_gold_generic
+ //do_common=1;
+ if (do_common){
+ n_id = frame_parms->Nid_cell;
+ n_rnti = 0;
+ } else {
+ n_id = pdcch_DMRS_scrambling_id;
+ n_rnti = (uint32_t)crnti;
+ }
+ //x2 = ((n_rnti * (1 << 16)) + n_id)%(1 << 31);
+ //uint32_t puissance_2_16 = ((1<<16)*n_rnti)+n_id;
+ //uint32_t puissance_2_31= (1<<30)*2;
+ //uint32_t calc_x2=puissance_2_16%puissance_2_31;
+ x2 = (((1<<16)*n_rnti)+n_id); //mod 2^31 is implicit //this is c_init in 38.211 v15.1.0 Section 7.3.2.3
+ // x2 = (nr_tti_rx << 9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length);
+#endif
+ for (i = 0; i < length; i++) {
+ if ((i & 0x1f) == 0) {
+ s = lte_gold_generic(&x1, &x2, reset);
+ //printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> lte_gold[%d]=%x\n",i,s);
+ reset = 0;
+ }
- reset = 1;
- // x1 is set in first call to lte_gold_generic
- //do_common=1;
-if (do_common){
- n_id = frame_parms->Nid_cell;
- n_rnti = 0;
-} else {
- n_id = pdcch_DMRS_scrambling_id;
- n_rnti = (uint32_t)crnti;
-}
-//x2 = ((n_rnti * (1 << 16)) + n_id)%(1 << 31);
-//uint32_t puissance_2_16 = ((1<<16)*n_rnti)+n_id;
-//uint32_t puissance_2_31= (1<<30)*2;
-//uint32_t calc_x2=puissance_2_16%puissance_2_31;
- x2 = (((1<<16)*n_rnti)+n_id); //mod 2^31 is implicit //this is c_init in 38.211 v15.1.0 Section 7.3.2.3
-// x2 = (nr_tti_rx << 9) + frame_parms->Nid_cell; //this is c_init in 36.211 Sec 6.8.2
-#ifdef NR_PDCCH_DCI_DEBUG
-printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d, n_rnti=%d, length=%d)\n",x2,n_id,n_rnti,length);
-#endif
- for (i = 0; i < length; i++) {
- if ((i & 0x1f) == 0) {
- s = lte_gold_generic(&x1, &x2, reset);
- //printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> lte_gold[%d]=%x\n",i,s);
- reset = 0;
- }
-
- #ifdef NR_PDCCH_DCI_DEBUG
- if (i%2 == 0) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
- i,*(char*) &z[(int)floor(i/2)]);
- if (i%2 == 1) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
- i,*(1 + (char*) &z[(int)floor(i/2)]));
- #endif
- if (((s >> (i % 32)) & 1) == 1){
- if (i%2 == 0) *(char*) &z[(int)floor(i/2)] = -(*(char*) &z[(int)floor(i/2)]);
- if (i%2 == 1) *(1 + (char*) &z[(int)floor(i/2)]) = -(*(1 + (char*) &z[(int)floor(i/2)]));
- }
- //llr[i] = -llr[i];
- //llr[i] = (-1)*llr[i];
- #ifdef NR_PDCCH_DCI_DEBUG
- if (i%2 == 0) printf("unscrambled_z=%d\n",*(char*) &z[(int)floor(i/2)]);
- if (i%2 == 1) printf("unscrambled_z=%d\n",*(1 + (char*) &z[(int)floor(i/2)]));
- #endif
- }
+ /*
+#ifdef NR_PDCCH_DCI_DEBUG
+ if (i%2 == 0) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
+ i,*(char*) &z[(int)floor(i/2)]);
+ if (i%2 == 1) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
+ i,*(1 + (char*) &z[(int)floor(i/2)]));
+#endif
+ if (((s >> (i % 32)) & 1) == 1){
+ if (i%2 == 0) *(char*) &z[(int)floor(i/2)] = -(*(char*) &z[(int)floor(i/2)]);
+ if (i%2 == 1) *(1 + (char*) &z[(int)floor(i/2)]) = -(*(1 + (char*) &z[(int)floor(i/2)]));
+ }
+ //llr[i] = -llr[i];
+ //llr[i] = (-1)*llr[i];
+#ifdef NR_PDCCH_DCI_DEBUG
+ if (i%2 == 0) printf("unscrambled_z=%d\n",*(char*) &z[(int)floor(i/2)]);
+ if (i%2 == 1) printf("unscrambled_z=%d\n",*(1 + (char*) &z[(int)floor(i/2)]));
+#endif
+ */
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> unscrambling %d : scrambled_z=%d, => ",
+ i,z[i]);
+#endif
+ if (((s >> (i % 32)) & 1) == 1) z[i] = -z[i];
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("unscrambled_z=%d\n",z[i]);
+#endif
+ }
+
}
#endif
@@ -1220,65 +1093,66 @@ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_unscrambling)-> (c_init=%d, n_id=%d,
#ifdef NR_PDCCH_DCI_RUN
void nr_dci_decoding_procedure0(int s,
- int p,
- int coreset_time_dur,
- uint16_t coreset_nbr_rb,
- NR_UE_PDCCH **pdcch_vars,
- int do_common,
- uint8_t nr_tti_rx,
- NR_DCI_ALLOC_t *dci_alloc,
- int16_t eNB_id,
- uint8_t current_thread_id,
- NR_DL_FRAME_PARMS *frame_parms,
- t_nrPolar_paramsPtr *nrPolar_params,
- //uint8_t mi,
- uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
- uint8_t L,
- NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t format_css,
- NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t format_uss,
- uint8_t sizeof_bits,
- uint8_t sizeof_bytes,
- uint8_t *dci_cnt,
- crc_scrambled_t *crc_scrambled,
- format_found_t *format_found,
- uint16_t pdcch_DMRS_scrambling_id,
- uint32_t *CCEmap0,
- uint32_t *CCEmap1,
- uint32_t *CCEmap2) {
-
+ int p,
+ int coreset_time_dur,
+ uint16_t coreset_nbr_rb,
+ NR_UE_PDCCH **pdcch_vars,
+ int do_common,
+ uint8_t nr_tti_rx,
+ NR_DCI_ALLOC_t *dci_alloc,
+ int16_t eNB_id,
+ uint8_t current_thread_id,
+ NR_DL_FRAME_PARMS *frame_parms,
+ //uint8_t mi,
+ uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
+ uint8_t L,
+ NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t format_css,
+ NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t format_uss,
+ uint8_t sizeof_bits,
+ uint8_t sizeof_bytes,
+ uint8_t *dci_cnt,
+ crc_scrambled_t *crc_scrambled,
+ format_found_t *format_found,
+ uint16_t pdcch_DMRS_scrambling_id,
+ uint32_t *CCEmap0,
+ uint32_t *CCEmap1,
+ uint32_t *CCEmap2) {
+
uint16_t crc, CCEind, nCCE[3];
uint32_t *CCEmap = NULL, CCEmap_mask = 0;
uint8_t L2 = (1 << L);
unsigned int Yk, nb_candidates = 0, i, m;
unsigned int CCEmap_cand;
- double *polar_input = malloc (sizeof(double) * 108*L2);
- int8_t decoderState=0;
+ int8_t decoderState=0;
+
// A[p], p is the current active CORESET
uint16_t A[3]={39827,39829,39839};
//Table 10.1-2: Maximum number of PDCCH candidates per slot and per serving cell as a function of the subcarrier spacing value 2^mu*15 KHz, mu {0,1,2,3}
uint8_t m_max_slot_pdcch_Table10_1_2 [4] = {44,36,22,20};
//Table 10.1-3: Maximum number of non-overlapped CCEs per slot and per serving cell as a function of the subcarrier spacing value 2^mu*15 KHz, mu {0,1,2,3}
- uint8_t cce_max_slot_pdcch_Table10_1_3 [4] = {56,56,48,32};
-
+ //uint8_t cce_max_slot_pdcch_Table10_1_3 [4] = {56,56,48,32};
+
int coreset_nbr_cce_per_symbol=0;
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found is %d \n", *format_found);
- #endif
-
- //if (mode == NO_DCI) {
- // #ifdef NR_PDCCH_DCI_DEBUG
+ t_nrPolar_paramsPtr nrPolar_params = pdcch_vars[eNB_id]->nrPolar_params;
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found is %d \n", *format_found);
+#endif
+
+ //if (mode == NO_DCI) {
+ // #ifdef NR_PDCCH_DCI_DEBUG
// printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> skip DCI decoding: expect no DCIs at nr_tti_rx %d in current searchSpace\n", nr_tti_rx);
// #endif
// return;
//}
-
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> frequencyDomainResources=%lx, duration=%d\n",
- pdcch_vars[eNB_id]->coreset[p].frequencyDomainResources, pdcch_vars[eNB_id]->coreset[p].duration);
- #endif
-
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> frequencyDomainResources=%lx, duration=%d\n",
+ pdcch_vars[eNB_id]->coreset[p].frequencyDomainResources, pdcch_vars[eNB_id]->coreset[p].duration);
+#endif
+
// nCCE = get_nCCE(pdcch_vars[eNB_id]->num_pdcch_symbols, frame_parms, mi);
for (int i = 0; i < 45; i++) {
// this loop counts each bit of the bit map coreset_freq_dom, and increments nbr_RB_coreset for each bit set to '1'
@@ -1290,59 +1164,59 @@ void nr_dci_decoding_procedure0(int s,
// the number of symbols in the CORESET (pdcch_vars[eNB_id]->coreset[p].duration)
// multiplied by the number of bits set to '1' in the frequencyDomainResources bitmap
// (1 bit set to '1' corresponds to 6 RB and 1 CCE = 6 RB)
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> nCCE[%d]=%d\n",p,nCCE[p]);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> nCCE[%d]=%d\n",p,nCCE[p]);
+#endif
-/* if (nCCE > get_nCCE(3, frame_parms, 1)) {
- LOG_D(PHY,
- "skip DCI decoding: nCCE=%d > get_nCCE(3,frame_parms,1)=%d\n",
- nCCE, get_nCCE(3, frame_parms, 1));
- return;
+ /* if (nCCE > get_nCCE(3, frame_parms, 1)) {
+ LOG_D(PHY,
+ "skip DCI decoding: nCCE=%d > get_nCCE(3,frame_parms,1)=%d\n",
+ nCCE, get_nCCE(3, frame_parms, 1));
+ return;
}
-
+
if (nCCE < L2) {
- LOG_D(PHY, "skip DCI decoding: nCCE=%d < L2=%d\n", nCCE, L2);
- return;
+ LOG_D(PHY, "skip DCI decoding: nCCE=%d < L2=%d\n", nCCE, L2);
+ return;
}
-
+
if (mode == NO_DCI) {
- LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_tti_rx %d\n",
- nr_tti_rx);
- return;
+ LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_tti_rx %d\n",
+ nr_tti_rx);
+ return;
}
-*/
+ */
if (do_common == 1) {
Yk = 0;
if (pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.common_dci_formats == cformat2_0) {
- // for dci_format_2_0, the nb_candidates is obtained from a different variable
- switch (L2) {
- case 1:
- nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel1;
- break;
- case 2:
- nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel2;
- break;
- case 4:
- nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel4;
- break;
- case 8:
- nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel8;
- break;
- case 16:
- nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel16;
- break;
- default:
- break;
- }
+ // for dci_format_2_0, the nb_candidates is obtained from a different variable
+ switch (L2) {
+ case 1:
+ nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel1;
+ break;
+ case 2:
+ nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel2;
+ break;
+ case 4:
+ nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel4;
+ break;
+ case 8:
+ nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel8;
+ break;
+ case 16:
+ nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.sfi_nrofCandidates_aggrlevel16;
+ break;
+ default:
+ break;
+ }
} else if (pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.common_dci_formats == cformat2_3) {
- // for dci_format_2_3, the nb_candidates is obtained from a different variable
- nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.srs_nrofCandidates;
+ // for dci_format_2_3, the nb_candidates is obtained from a different variable
+ nb_candidates = pdcch_vars[eNB_id]->searchSpace[s].searchSpaceType.srs_nrofCandidates;
} else {
nb_candidates = (L2 == 4) ? 4 : ((L2 == 8)? 2 : 1); // according to Table 10.1-1 (38.213 section 10.1)
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> we are in common searchSpace and nb_candidates=%d for L2=%d\n",nb_candidates,L2);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> we are in common searchSpace and nb_candidates=%d for L2=%d\n",nb_candidates,L2);
+#endif
}
} else {
switch (L2) {
@@ -1364,7 +1238,7 @@ void nr_dci_decoding_procedure0(int s,
default:
break;
}
-
+
// Find first available in ue specific search space
// according to procedure in Section 10.1 of 38.213
// compute Yk
@@ -1372,359 +1246,353 @@ void nr_dci_decoding_procedure0(int s,
for (i = 0; i <= nr_tti_rx; i++)
Yk = (Yk * A[p%3]) % 65537;
}
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> L2(%d) | nCCE[%d](%d) | Yk(%d) | nb_candidates(%d)\n",L2,p,nCCE[p],Yk,nb_candidates);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> L2(%d) | nCCE[%d](%d) | Yk(%d) | nb_candidates(%d)\n",L2,p,nCCE[p],Yk,nb_candidates);
+#endif
/* for (CCEind=0;
- CCEind<nCCE2;
- CCEind+=(1<<L)) {*/
-// if (nb_candidates * L2 > nCCE[p])
-// nb_candidates = nCCE[p] / L2;
-
-// In the next code line there is maybe a bug. The spec is not comparing Table 10.1-2 with nb_candidates, but with total number of candidates for all s and all p
+ CCEind<nCCE2;
+ CCEind+=(1<<L)) {*/
+ // if (nb_candidates * L2 > nCCE[p])
+ // nb_candidates = nCCE[p] / L2;
+
+ // In the next code line there is maybe a bug. The spec is not comparing Table 10.1-2 with nb_candidates, but with total number of candidates for all s and all p
int m_p_s_L_max = (m_max_slot_pdcch_Table10_1_2[1]<=nb_candidates ? m_max_slot_pdcch_Table10_1_2[1] : nb_candidates);
if (L==4) m_p_s_L_max=1; // Table 10.1-2 is not defined for L=4
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> m_max_slot_pdcch_Table10_1_2(%d)=%d\n",L,m_max_slot_pdcch_Table10_1_2[L]);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> m_max_slot_pdcch_Table10_1_2(%d)=%d\n",L,m_max_slot_pdcch_Table10_1_2[L]);
+#endif
for (m = 0; m < nb_candidates; m++) {
int n_ci = 0;
if (nCCE[p] < L2) return;
+
+#ifdef NR_PDCCH_DCI_DEBUG
int debug1 = nCCE[p] / L2;
int debug2 = L2*m_p_s_L_max;
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> debug1(%d)=nCCE[p]/L2 | nCCE[%d](%d) | L2(%d)\n",debug1,p,nCCE[p],L2);
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> debug2(%d)=L2*m_p_s_L_max | L2(%d) | m_p_s_L_max(%d)\n",debug2,L2,m_p_s_L_max);
- #endif
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> debug1(%d)=nCCE[p]/L2 | nCCE[%d](%d) | L2(%d)\n",debug1,p,nCCE[p],L2);
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> debug2(%d)=L2*m_p_s_L_max | L2(%d) | m_p_s_L_max(%d)\n",debug2,L2,m_p_s_L_max);
+#endif
CCEind = (((Yk + (uint16_t)(floor((m*nCCE[p])/(L2*m_p_s_L_max))) + n_ci) % (uint16_t)(floor(nCCE[p] / L2))) * L2);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> CCEind(%d) = (((Yk(%d) + ((m(%d)*nCCE[p](%d))/(L2(%d)*m_p_s_L_max(%d)))) % (nCCE[p] / L2)) * L2)\n",
- CCEind,Yk,m,nCCE[p],L2,m_p_s_L_max);
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> n_candidate(m)=%d | CCEind=%d |",m,CCEind);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> CCEind(%d) = (((Yk(%d) + ((m(%d)*nCCE[p](%d))/(L2(%d)*m_p_s_L_max(%d)))) % (nCCE[p] / L2)) * L2)\n",
+ CCEind,Yk,m,nCCE[p],L2,m_p_s_L_max);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> n_candidate(m)=%d | CCEind=%d |",m,CCEind);
+#endif
if (CCEind < 32)
CCEmap = CCEmap0;
else if (CCEind < 64)
CCEmap = CCEmap1;
else if (CCEind < 96)
CCEmap = CCEmap2;
- else {
- LOG_E(PHY, "Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind, Yk, m, nCCE, L2);
- //mac_xface->macphy_exit("Illegal CCEind\n");
- return; // not reached
- }
-
+ else AssertFatal(1==0,"Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind, Yk, m, nCCE[p], L2);
+
switch (L2) {
- case 1:
- CCEmap_mask = (1 << (CCEind & 0x1f));
- break;
- case 2:
- CCEmap_mask = (3 << (CCEind & 0x1f));
- break;
- case 4:
- CCEmap_mask = (0xf << (CCEind & 0x1f));
- break;
- case 8:
- CCEmap_mask = (0xff << (CCEind & 0x1f));
- break;
- case 16:
- CCEmap_mask = (0xfff << (CCEind & 0x1f));
- break;
- default:
- LOG_E(PHY, "Illegal L2 value %d\n", L2);
- //mac_xface->macphy_exit("Illegal L2\n");
- return; // not reached
+ case 1:
+ CCEmap_mask = (1 << (CCEind & 0x1f));
+ break;
+ case 2:
+ CCEmap_mask = (3 << (CCEind & 0x1f));
+ break;
+ case 4:
+ CCEmap_mask = (0xf << (CCEind & 0x1f));
+ break;
+ case 8:
+ CCEmap_mask = (0xff << (CCEind & 0x1f));
+ break;
+ case 16:
+ CCEmap_mask = (0xfff << (CCEind & 0x1f));
+ break;
+ default:
+ LOG_E(PHY, "Illegal L2 value %d\n", L2);
+ //mac_xface->macphy_exit("Illegal L2\n");
+ return; // not reached
}
CCEmap_cand = (*CCEmap) & CCEmap_mask;
// CCE is not allocated yet
- #ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> CCEmap_cand=%d \n",CCEmap_cand);
- #endif
-
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> CCEmap_cand=%d \n",CCEmap_cand);
+#endif
+
if (CCEmap_cand == 0) {
- #ifdef DEBUG_DCI_DECODING
- if (do_common == 1)
- LOG_I(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
- pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
- else
- LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
- pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
- #endif
- #ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we enter function dci_decoding(sizeof_bits=%d L=%d) -----\n",sizeof_bits,L);
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
- #endif
-
-
-// for (int m=0; m < (nCCE[p]*6*9*2); m++)
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: polar decoding)-> polar intput (with coreset_time_dur=%d, coreset_nbr_rb=%d, p=%d, CCEind=%d): \n",
- coreset_time_dur,coreset_nbr_rb,p,CCEind);
- #endif
+
+#ifdef DEBUG_DCI_DECODING
+ if (do_common == 1)
+ LOG_I(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
+ pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
+ else
+ LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
+ pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_uss);
+#endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we enter function dci_decoding(sizeof_bits=%d L=%d) -----\n",sizeof_bits,L);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
+#endif
+
+
+ // for (int m=0; m < (nCCE[p]*6*9*2); m++)
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: polar decoding)-> polar intput (with coreset_time_dur=%d, coreset_nbr_rb=%d, p=%d, CCEind=%d): \n",
+ coreset_time_dur,coreset_nbr_rb,p,CCEind);
+#endif
+ /*
int reg_p=0,reg_e=0;
for (int m=0; m < (L2*6); m++){
- reg_p = (((int)floor(m/coreset_time_dur))+((m%coreset_time_dur)*(L2*6/coreset_time_dur)))*9*2;
- reg_e = m*9*2;
- for (int i=0; i<9*2; i++){
- //polar_input[reg_p+i] = (pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]>0) ? (1.0):(-1.0);
- polar_input[reg_e+i] = (pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]>0) ? (1/sqrt(2)):((-1)/sqrt(2));
- //printf("\t m=%d \tpolar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,reg_e+i,polar_input[reg_e+i],
- // ((CCEind*9*6*2) + reg_e + i),pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]);
- //printf("\t m=%d \tpolar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,reg_p+i,polar_input[reg_p+i],
- // ((CCEind*9*6*2) + reg_e + i),pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]);
- }
- }
+ reg_p = (((int)floor(m/coreset_time_dur))+((m%coreset_time_dur)*(L2*6/coreset_time_dur)))*9*2;
+ reg_e = m*9*2;
+ for (int i=0; i<9*2; i++){
+ //polar_input[reg_p+i] = (pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]>0) ? (1.0):(-1.0);
+ polar_input[reg_e+i] = (pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]>0) ? (1/sqrt(2)):((-1)/sqrt(2));
+ //printf("\t m=%d \tpolar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,reg_e+i,polar_input[reg_e+i],
+ // ((CCEind*9*6*2) + reg_e + i),pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]);
+ //printf("\t m=%d \tpolar_input[%d]=%lf <-> e_rx[%d]=%d\n",m,reg_p+i,polar_input[reg_p+i],
+ // ((CCEind*9*6*2) + reg_e + i),pdcch_vars[eNB_id]->e_rx[((CCEind*9*6*2) + reg_e + i)]);
+ }
+ }
+
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\n");
+ int j=0;
+ uint32_t polar_hex[27] = {0};
+ for (int i=0; i<L2*9*6*2; i++){2
+ if ((i%32 == 0) && (i!=0)) j++;
+ //polar_hex[j] = (polar_hex[j]<<1) + ((polar_input[i]==-1)? 1:0);
+ polar_hex[j] = polar_hex[j] + (((polar_input[i]==((-1)/sqrt(2)))?1:0)<<(i%32));
+ }
+ for (j=0;j<27;j++) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: polar decoding input)-> polar_hex[%d]=%x\n",j,polar_hex[j]);
+#endif
+ */
+
+ uint32_t dci_estimation[4]={0};
+
+
+ nr_polar_init(&nrPolar_params, 1, sizeof_bits, L2);
+
+
+ t_nrPolar_paramsPtr currentPtrDCI=nr_polar_params(nrPolar_params, 1, sizeof_bits, L2);
+ decoderState = polar_decoder_int16(&pdcch_vars[eNB_id]->e_rx[CCEind*9*6*2],
+ (uint64_t*)dci_estimation,
+ currentPtrDCI);
+ crc = decoderState;
+ //crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits);
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%x\n",crc);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
+#endif
+#ifdef DEBUG_DCI_DECODING
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: crc =>%d\n",crc);
+#endif //uint16_t tc_rnti, uint16_t int_rnti, uint16_t sfi_rnti, uint16_t tpc_pusch_rnti, uint16_t tpc_pucch_rnti, uint16_t tpc_srs__rnti
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found=%d\n",*format_found);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> crc_scrambled=%d\n",*crc_scrambled);
+#endif
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\n");
- int j=0;
- uint32_t polar_hex[27] = {0};
- for (int i=0; i<L2*9*6*2; i++){
- if ((i%32 == 0) && (i!=0)) j++;
- //polar_hex[j] = (polar_hex[j]<<1) + ((polar_input[i]==-1)? 1:0);
- polar_hex[j] = polar_hex[j] + (((polar_input[i]==((-1)/sqrt(2)))?1:0)<<(i%32));
- }
- for (j=0;j<27;j++) printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: polar decoding input)-> polar_hex[%d]=%x\n",j,polar_hex[j]);
- #endif
-
-uint32_t dci_estimation[4]={0};
-uint16_t rnti=3;
- #ifdef PDCCH_TEST_POLAR_TEMP_FIX
- t_nrPolar_paramsPtr nrPolar_params = NULL;
- nr_polar_init(&nrPolar_params, 1, 41, 8);
- t_nrPolar_paramsPtr currentPtrDCI=nr_polar_params(nrPolar_params, 1, 41, 8);
- decoderState = polar_decoder_dci(polar_input,
- dci_estimation,
- currentPtrDCI,//nrPolar_params,
- 8,//NR_POLAR_DECODER_LISTSIZE,
- 0,//NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION,
- rnti); //rnti
- #endif
-#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: \t\tpolar decoding)-> decoderState %d\n", decoderState);
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: \t\tdci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
- dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
-#endif
-
- crc = rnti;
- //crc = (crc16(&dci_decoded_output[current_thread_id][0], sizeof_bits) >> 16) ^ extract_crc(&dci_decoded_output[current_thread_id][0], sizeof_bits);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we end function dci_decoding() with crc=%x\n",crc);
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> ... we have to replace this part of the code by polar decoding\n");
- #endif
- #ifdef DEBUG_DCI_DECODING
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: crc =>%d\n",crc);
- #endif //uint16_t tc_rnti, uint16_t int_rnti, uint16_t sfi_rnti, uint16_t tpc_pusch_rnti, uint16_t tpc_pucch_rnti, uint16_t tpc_srs__rnti
- #ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found=%d\n",*format_found);
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> crc_scrambled=%d\n",*crc_scrambled);
- #endif
if (crc == crc_scrambled_values[_C_RNTI_]) {
- *crc_scrambled =_c_rnti;
- *format_found=1;
+ *crc_scrambled =_c_rnti;
+ *format_found=1;
}
if (crc == crc_scrambled_values[_CS_RNTI_]) {
- *crc_scrambled =_cs_rnti;
- *format_found=1;
+ *crc_scrambled =_cs_rnti;
+ *format_found=1;
}
if (crc == crc_scrambled_values[_NEW_RNTI_]) {
- *crc_scrambled =_new_rnti;
- *format_found=1;
+ *crc_scrambled =_new_rnti;
+ *format_found=1;
}
if (crc == crc_scrambled_values[_TC_RNTI_]) {
- *crc_scrambled =_tc_rnti;
- *format_found=_format_1_0_found;
+ *crc_scrambled =_tc_rnti;
+ *format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_P_RNTI_]) {
- *crc_scrambled =_p_rnti;
- *format_found=_format_1_0_found;
+ *crc_scrambled =_p_rnti;
+ *format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_SI_RNTI_]) {
- *crc_scrambled =_si_rnti;
- *format_found=_format_1_0_found;
+ *crc_scrambled =_si_rnti;
+ *format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_RA_RNTI_]) {
- *crc_scrambled =_ra_rnti;
- *format_found=_format_1_0_found;
+ *crc_scrambled =_ra_rnti;
+ *format_found=_format_1_0_found;
}
if (crc == crc_scrambled_values[_SP_CSI_RNTI_]) {
- *crc_scrambled =_sp_csi_rnti;
- *format_found=_format_0_1_found;
+ *crc_scrambled =_sp_csi_rnti;
+ *format_found=_format_0_1_found;
}
if (crc == crc_scrambled_values[_SFI_RNTI_]) {
- *crc_scrambled =_sfi_rnti;
- *format_found=_format_2_0_found;
+ *crc_scrambled =_sfi_rnti;
+ *format_found=_format_2_0_found;
}
if (crc == crc_scrambled_values[_INT_RNTI_]) {
- *crc_scrambled =_int_rnti;
- *format_found=_format_2_1_found;
+ *crc_scrambled =_int_rnti;
+ *format_found=_format_2_1_found;
}
if (crc == crc_scrambled_values[_TPC_PUSCH_RNTI_]) {
- *crc_scrambled =_tpc_pusch_rnti;
- *format_found=_format_2_2_found;
+ *crc_scrambled =_tpc_pusch_rnti;
+ *format_found=_format_2_2_found;
}
if (crc == crc_scrambled_values[_TPC_PUCCH_RNTI_]) {
- *crc_scrambled =_tpc_pucch_rnti;
- *format_found=_format_2_2_found;
+ *crc_scrambled =_tpc_pucch_rnti;
+ *format_found=_format_2_2_found;
}
if (crc == crc_scrambled_values[_TPC_SRS_RNTI_]) {
- *crc_scrambled =_tpc_srs_rnti;
- *format_found=_format_2_3_found;
+ *crc_scrambled =_tpc_srs_rnti;
+ *format_found=_format_2_3_found;
}
#ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found=%d\n",*format_found);
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> crc_scrambled=%d\n",*crc_scrambled);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> format_found=%d\n",*format_found);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> crc_scrambled=%d\n",*crc_scrambled);
#endif
if (*format_found!=255) {
- dci_alloc[*dci_cnt].dci_length = sizeof_bits;
- dci_alloc[*dci_cnt].rnti = crc;
- dci_alloc[*dci_cnt].L = L;
- dci_alloc[*dci_cnt].firstCCE = CCEind;
- dci_alloc[*dci_cnt].dci_pdu[0] = dci_estimation[0];
- dci_alloc[*dci_cnt].dci_pdu[1] = dci_estimation[1];
- dci_alloc[*dci_cnt].dci_pdu[2] = dci_estimation[2];
- dci_alloc[*dci_cnt].dci_pdu[3] = dci_estimation[3];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> rnti matches -> DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",
- dci_alloc[*dci_cnt].rnti, dci_alloc[*dci_cnt].dci_length, sizeof_bytes);
- printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> dci_cnt %d (format_css %d crc_scrambled %d) L %d, firstCCE %d pdu[0] %x pdu[1] %x pdu[2] %x pdu[3] %x \n",
- *dci_cnt, format_css,*crc_scrambled,dci_alloc[*dci_cnt].L, dci_alloc[*dci_cnt].firstCCE,dci_alloc[*dci_cnt].dci_pdu[0],dci_alloc[*dci_cnt].dci_pdu[1],dci_alloc[*dci_cnt].dci_pdu[2],dci_alloc[*dci_cnt].dci_pdu[3]);
- #endif
- if ((format_css == cformat0_0_and_1_0) || (format_uss == uformat0_0_and_1_0)){
- if ((*crc_scrambled == _p_rnti) || (*crc_scrambled == _si_rnti) || (*crc_scrambled == _ra_rnti)){
- dci_alloc[*dci_cnt].format = format1_0;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_1_0_found;
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> a format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
- } else {
- if ((dci_estimation[0]&1) == 0){
- dci_alloc[*dci_cnt].format = format0_0;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_0_0_found;
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> b format0_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
- }
- if ((dci_estimation[0]&1) == 1){
- dci_alloc[*dci_cnt].format = format1_0;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_1_0_found;
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> c format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
- }
- }
- }
- if (format_css == cformat2_0){
- dci_alloc[*dci_cnt].format = format2_0;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_2_0_found;
- }
- if (format_css == cformat2_1){
- dci_alloc[*dci_cnt].format = format2_1;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_2_1_found;
- }
- if (format_css == cformat2_2){
- dci_alloc[*dci_cnt].format = format2_2;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_2_2_found;
- }
- if (format_css == cformat2_3){
- dci_alloc[*dci_cnt].format = format2_3;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_2_3_found;
- }
- if (format_uss == uformat0_1_and_1_1){
- if ((dci_estimation[0]&1) == 0){
- dci_alloc[*dci_cnt].format = format0_1;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_0_1_found;
- }
- if ((dci_estimation[0]&1) == 1){
- dci_alloc[*dci_cnt].format = format1_1;
- *dci_cnt = *dci_cnt + 1;
- *format_found=_format_1_1_found;
- }
- }
- // store first nCCE of group for PUCCH transmission of ACK/NAK
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
-/* if (crc == si_rnti) {
+ dci_alloc[*dci_cnt].dci_length = sizeof_bits;
+ dci_alloc[*dci_cnt].rnti = crc;
+ dci_alloc[*dci_cnt].L = L;
+ dci_alloc[*dci_cnt].firstCCE = CCEind;
+ dci_alloc[*dci_cnt].dci_pdu[0] = dci_estimation[0];
+ dci_alloc[*dci_cnt].dci_pdu[1] = dci_estimation[1];
+ dci_alloc[*dci_cnt].dci_pdu[2] = dci_estimation[2];
+ dci_alloc[*dci_cnt].dci_pdu[3] = dci_estimation[3];
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> rnti matches -> DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",
+ dci_alloc[*dci_cnt].rnti, dci_alloc[*dci_cnt].dci_length, sizeof_bytes);
+ printf ("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> dci_cnt %d (format_css %d crc_scrambled %d) L %d, firstCCE %d pdu[0] %x pdu[1] %x pdu[2] %x pdu[3] %x \n",
+ *dci_cnt, format_css,*crc_scrambled,dci_alloc[*dci_cnt].L, dci_alloc[*dci_cnt].firstCCE,dci_alloc[*dci_cnt].dci_pdu[0],dci_alloc[*dci_cnt].dci_pdu[1],dci_alloc[*dci_cnt].dci_pdu[2],dci_alloc[*dci_cnt].dci_pdu[3]);
+#endif
+ if ((format_css == cformat0_0_and_1_0) || (format_uss == uformat0_0_and_1_0)){
+ if ((*crc_scrambled == _p_rnti) || (*crc_scrambled == _si_rnti) || (*crc_scrambled == _ra_rnti)){
+ dci_alloc[*dci_cnt].format = format1_0;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_1_0_found;
+ // printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> a format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
+ } else {
+ if ((dci_estimation[0]&1) == 0){
+ dci_alloc[*dci_cnt].format = format0_0;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_0_0_found;
+ // printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> b format0_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
+ }
+ if ((dci_estimation[0]&1) == 1){
+ dci_alloc[*dci_cnt].format = format1_0;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_1_0_found;
+ // printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> c format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
+ }
+ }
+ }
+ if (format_css == cformat2_0){
+ dci_alloc[*dci_cnt].format = format2_0;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_2_0_found;
+ }
+ if (format_css == cformat2_1){
+ dci_alloc[*dci_cnt].format = format2_1;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_2_1_found;
+ }
+ if (format_css == cformat2_2){
+ dci_alloc[*dci_cnt].format = format2_2;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_2_2_found;
+ }
+ if (format_css == cformat2_3){
+ dci_alloc[*dci_cnt].format = format2_3;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_2_3_found;
+ }
+ if (format_uss == uformat0_1_and_1_1){
+ if ((dci_estimation[0]&1) == 0){
+ dci_alloc[*dci_cnt].format = format0_1;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_0_1_found;
+ }
+ if ((dci_estimation[0]&1) == 1){
+ dci_alloc[*dci_cnt].format = format1_1;
+ *dci_cnt = *dci_cnt + 1;
+ *format_found=_format_1_1_found;
+ }
+ }
+ // store first nCCE of group for PUCCH transmission of ACK/NAK
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
+ /* if (crc == si_rnti) {
dci_alloc[*dci_cnt].format = format_si;
*dci_cnt = *dci_cnt + 1;
- } else if (crc == p_rnti) {
+ } else if (crc == p_rnti) {
dci_alloc[*dci_cnt].format = format_p;
*dci_cnt = *dci_cnt + 1;
- } else if (crc == ra_rnti) {
+ } else if (crc == ra_rnti) {
dci_alloc[*dci_cnt].format = format_ra;
// store first nCCE of group for PUCCH transmission of ACK/NAK
pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
*dci_cnt = *dci_cnt + 1;
- } else if (crc == pdcch_vars[eNB_id]->crnti) {
+ } else if (crc == pdcch_vars[eNB_id]->crnti) {
if ((mode & UL_DCI) && (format_c == format0)
- && ((dci_decoded_output[current_thread_id][0] & 0x80)
- == 0)) { // check if pdu is format 0 or 1A
- if (*format0_found == 0) {
- dci_alloc[*dci_cnt].format = format0;
- *format0_found = 1;
- *dci_cnt = *dci_cnt + 1;
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
- }
+ && ((dci_decoded_output[current_thread_id][0] & 0x80)
+ == 0)) { // check if pdu is format 0 or 1A
+ if (*format0_found == 0) {
+ dci_alloc[*dci_cnt].format = format0;
+ *format0_found = 1;
+ *dci_cnt = *dci_cnt + 1;
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
+ }
} else if (format_c == format0) { // this is a format 1A DCI
- dci_alloc[*dci_cnt].format = format1A;
- *dci_cnt = *dci_cnt + 1;
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
+ dci_alloc[*dci_cnt].format = format1A;
+ *dci_cnt = *dci_cnt + 1;
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
} else {
- // store first nCCE of group for PUCCH transmission of ACK/NAK
- if (*format_c_found == 0) {
- dci_alloc[*dci_cnt].format = format_c;
- *dci_cnt = *dci_cnt + 1;
- *format_c_found = 1;
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
- }
+ // store first nCCE of group for PUCCH transmission of ACK/NAK
+ if (*format_c_found == 0) {
+ dci_alloc[*dci_cnt].format = format_c;
+ *dci_cnt = *dci_cnt + 1;
+ *format_c_found = 1;
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx] = CCEind;
}
- }*/
- //LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_tti_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_tti_rx, pdcch_vars[eNB_id]->nCCE[nr_tti_rx],L2);
- // memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
- switch (1 << L) {
- case 1:
- *CCEmap |= (1 << (CCEind & 0x1f));
- break;
- case 2:
- *CCEmap |= (1 << (CCEind & 0x1f));
- break;
- case 4:
- *CCEmap |= (1 << (CCEind & 0x1f));
- break;
- case 8:
- *CCEmap |= (1 << (CCEind & 0x1f));
- break;
- case 16:
- *CCEmap |= (1 << (CCEind & 0x1f));
- break;
- }
+ }
+ }*/
+ //LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_tti_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_tti_rx, pdcch_vars[eNB_id]->nCCE[nr_tti_rx],L2);
+ // memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
+ switch (1 << L) {
+ case 1:
+ *CCEmap |= (1 << (CCEind & 0x1f));
+ break;
+ case 2:
+ *CCEmap |= (1 << (CCEind & 0x1f));
+ break;
+ case 4:
+ *CCEmap |= (1 << (CCEind & 0x1f));
+ break;
+ case 8:
+ *CCEmap |= (1 << (CCEind & 0x1f));
+ break;
+ case 16:
+ *CCEmap |= (1 << (CCEind & 0x1f));
+ break;
+ }
#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %s in CCE %d (CCEmap %x) candidate %d / %d \n",
- *dci_cnt,crc,1<<L,sizeof_bits,dci_format_strings[dci_alloc[*dci_cnt-1].format],CCEind,*CCEmap,m,nb_candidates );
- dump_dci(frame_parms,&dci_alloc[*dci_cnt-1]);
+ LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %d in CCE %d (CCEmap %x) candidate %d / %d \n",
+ *dci_cnt,crc,1<<L,sizeof_bits,dci_alloc[*dci_cnt-1].format,CCEind,*CCEmap,m,nb_candidates );
+
+ // nr_extract_dci_into(
+ // dump_dci(frame_parms,&dci_alloc[*dci_cnt-1]);
#endif
- return;
+ return;
} // rnti match
} else { // CCEmap_cand == 0
printf("\n");
}
-/*
- if ( agregationLevel != 0xFF &&
- (format_c == format0 && m==0 && si_rnti != SI_RNTI))
- {
- //Only valid for OAI : Save some processing time when looking for DCI format0. From the log we see the DCI only on candidate 0.
- return;
- }
- */
+ /*
+ if ( agregationLevel != 0xFF &&
+ (format_c == format0 && m==0 && si_rnti != SI_RNTI))
+ {
+ //Only valid for OAI : Save some processing time when looking for DCI format0. From the log we see the DCI only on candidate 0.
+ return;
+ }
+ */
} // candidate loop
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> end candidate loop\n");
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> end candidate loop\n");
+#endif
}
#endif
@@ -1734,86 +1602,86 @@ uint16_t rnti=3;
/*void dci_decoding_procedure0(NR_UE_PDCCH **pdcch_vars,
- int do_common,
- dci_detect_mode_t mode,
- uint8_t nr_tti_rx,
- DCI_ALLOC_t *dci_alloc,
- int16_t eNB_id,
- uint8_t current_thread_id,
- NR_DL_FRAME_PARMS *frame_parms,
- uint8_t mi,
- uint16_t si_rnti,
- uint16_t ra_rnti,
- uint16_t p_rnti,
- uint8_t L,
- uint8_t format_si,
- uint8_t format_p,
- uint8_t format_ra,
- uint8_t format_c,
- uint8_t sizeof_bits,
- uint8_t sizeof_bytes,
- uint8_t *dci_cnt,
- uint8_t *format0_found,
- uint8_t *format_c_found,
- uint32_t *CCEmap0,
- uint32_t *CCEmap1,
- uint32_t *CCEmap2)
-{
+ int do_common,
+ dci_detect_mode_t mode,
+ uint8_t nr_tti_rx,
+ DCI_ALLOC_t *dci_alloc,
+ int16_t eNB_id,
+ uint8_t current_thread_id,
+ NR_DL_FRAME_PARMS *frame_parms,
+ uint8_t mi,
+ uint16_t si_rnti,
+ uint16_t ra_rnti,
+ uint16_t p_rnti,
+ uint8_t L,
+ uint8_t format_si,
+ uint8_t format_p,
+ uint8_t format_ra,
+ uint8_t format_c,
+ uint8_t sizeof_bits,
+ uint8_t sizeof_bytes,
+ uint8_t *dci_cnt,
+ uint8_t *format0_found,
+ uint8_t *format_c_found,
+ uint32_t *CCEmap0,
+ uint32_t *CCEmap1,
+ uint32_t *CCEmap2)
+ {
uint16_t crc,CCEind,nCCE;
uint32_t *CCEmap=NULL,CCEmap_mask=0;
int L2=(1<<L);
unsigned int Yk,nb_candidates = 0,i,m;
unsigned int CCEmap_cand;
-#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (dci_decoding_procedure0)-> \n");
-#endif
+ #ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (dci_decoding_procedure0)-> \n");
+ #endif
nCCE = get_nCCE(pdcch_vars[eNB_id]->num_pdcch_symbols,frame_parms,mi);
if (nCCE > get_nCCE(3,frame_parms,1)) {
- LOG_D(PHY,"skip DCI decoding: nCCE=%d > get_nCCE(3,frame_parms,1)=%d\n", nCCE, get_nCCE(3,frame_parms,1));
- return;
+ LOG_D(PHY,"skip DCI decoding: nCCE=%d > get_nCCE(3,frame_parms,1)=%d\n", nCCE, get_nCCE(3,frame_parms,1));
+ return;
}
if (nCCE<L2) {
- LOG_D(PHY,"skip DCI decoding: nCCE=%d < L2=%d\n", nCCE, L2);
- return;
+ LOG_D(PHY,"skip DCI decoding: nCCE=%d < L2=%d\n", nCCE, L2);
+ return;
}
if (mode == NO_DCI) {
- LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_tti_rx %d\n", nr_tti_rx);
- return;
+ LOG_D(PHY, "skip DCI decoding: expect no DCIs at nr_tti_rx %d\n", nr_tti_rx);
+ return;
}
if (do_common == 1) {
- nb_candidates = (L2==4) ? 4 : 2;
- Yk=0;
+ nb_candidates = (L2==4) ? 4 : 2;
+ Yk=0;
} else {
- // Find first available in ue specific search space
- // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
- // compute Yk
- Yk = (unsigned int)pdcch_vars[eNB_id]->crnti;
+ // Find first available in ue specific search space
+ // according to procedure in Section 9.1.1 of 36.213 (v. 8.6)
+ // compute Yk
+ Yk = (unsigned int)pdcch_vars[eNB_id]->crnti;
- for (i=0; i<=nr_tti_rx; i++)
- Yk = (Yk*39827)%65537;
+ for (i=0; i<=nr_tti_rx; i++)
+ Yk = (Yk*39827)%65537;
- Yk = Yk % (nCCE/L2);
+ Yk = Yk % (nCCE/L2);
- switch (L2) {
- case 1:
- case 2:
- nb_candidates = 6;
- break;
+ switch (L2) {
+ case 1:
+ case 2:
+ nb_candidates = 6;
+ break;
- case 4:
- case 8:
- nb_candidates = 2;
- break;
+ case 4:
+ case 8:
+ nb_candidates = 2;
+ break;
- default:
- DevParam(L2, do_common, eNB_id);
- break;
- }
+ default:
+ DevParam(L2, do_common, eNB_id);
+ break;
+ }
}
// for (CCEind=0;
@@ -1821,196 +1689,196 @@ uint16_t rnti=3;
// CCEind+=(1<<L)) {
if (nb_candidates*L2 > nCCE)
- nb_candidates = nCCE/L2;
+ nb_candidates = nCCE/L2;
for (m=0; m<nb_candidates; m++) {
- CCEind = (((Yk+m)%(nCCE/L2))*L2);
-
- if (CCEind<32)
- CCEmap = CCEmap0;
- else if (CCEind<64)
- CCEmap = CCEmap1;
- else if (CCEind<96)
- CCEmap = CCEmap2;
- else {
- LOG_E(PHY,"Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind,Yk,m,nCCE,L2);
- mac_xface->macphy_exit("Illegal CCEind\n");
- return; // not reached
- }
+ CCEind = (((Yk+m)%(nCCE/L2))*L2);
+
+ if (CCEind<32)
+ CCEmap = CCEmap0;
+ else if (CCEind<64)
+ CCEmap = CCEmap1;
+ else if (CCEind<96)
+ CCEmap = CCEmap2;
+ else {
+ LOG_E(PHY,"Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind,Yk,m,nCCE,L2);
+ mac_xface->macphy_exit("Illegal CCEind\n");
+ return; // not reached
+ }
- switch (L2) {
- case 1:
- CCEmap_mask = (1<<(CCEind&0x1f));
- break;
+ switch (L2) {
+ case 1:
+ CCEmap_mask = (1<<(CCEind&0x1f));
+ break;
- case 2:
- CCEmap_mask = (3<<(CCEind&0x1f));
- break;
+ case 2:
+ CCEmap_mask = (3<<(CCEind&0x1f));
+ break;
- case 4:
- CCEmap_mask = (0xf<<(CCEind&0x1f));
- break;
+ case 4:
+ CCEmap_mask = (0xf<<(CCEind&0x1f));
+ break;
- case 8:
- CCEmap_mask = (0xff<<(CCEind&0x1f));
- break;
+ case 8:
+ CCEmap_mask = (0xff<<(CCEind&0x1f));
+ break;
- default:
- LOG_E( PHY, "Illegal L2 value %d\n", L2 );
- mac_xface->macphy_exit( "Illegal L2\n" );
- return; // not reached
- }
+ default:
+ LOG_E( PHY, "Illegal L2 value %d\n", L2 );
+ mac_xface->macphy_exit( "Illegal L2\n" );
+ return; // not reached
+ }
- CCEmap_cand = (*CCEmap)&CCEmap_mask;
+ CCEmap_cand = (*CCEmap)&CCEmap_mask;
- // CCE is not allocated yet
+ // CCE is not allocated yet
- if (CCEmap_cand == 0) {
-#ifdef DEBUG_DCI_DECODING
+ if (CCEmap_cand == 0) {
+ #ifdef DEBUG_DCI_DECODING
- if (do_common == 1)
- LOG_I(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
- pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
- else
- LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
- pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
+ if (do_common == 1)
+ LOG_I(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
+ pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
+ else
+ LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
+ pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
-#endif
+ #endif
- dci_decoding(sizeof_bits,
- L,
- &pdcch_vars[eNB_id]->e_rx[CCEind*72],
- &dci_decoded_output[current_thread_id][0]);
+ dci_decoding(sizeof_bits,
+ L,
+ &pdcch_vars[eNB_id]->e_rx[CCEind*72],
+ &dci_decoded_output[current_thread_id][0]);
- // for (i=0;i<3+(sizeof_bits>>3);i++)
- // printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
+ // for (i=0;i<3+(sizeof_bits>>3);i++)
+ // printf("dci_decoded_output[%d] => %x\n",i,dci_decoded_output[i]);
- crc = (crc16(&dci_decoded_output[current_thread_id][0],sizeof_bits)>>16) ^ extract_crc(&dci_decoded_output[current_thread_id][0],sizeof_bits);
-#ifdef DEBUG_DCI_DECODING
- printf("crc =>%x\n",crc);
-#endif
-
- if (((L>1) && ((crc == si_rnti)|| (crc == p_rnti)|| (crc == ra_rnti)))||
- (crc == pdcch_vars[eNB_id]->crnti)) {
- dci_alloc[*dci_cnt].dci_length = sizeof_bits;
- dci_alloc[*dci_cnt].rnti = crc;
- dci_alloc[*dci_cnt].L = L;
- dci_alloc[*dci_cnt].firstCCE = CCEind;
-
- //printf("DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",crc, sizeof_bits, sizeof_bytes);
- if (sizeof_bytes<=4) {
- dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][0];
- dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][1];
- dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][2];
- dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][3];
-#ifdef DEBUG_DCI_DECODING
- printf("DCI => %x,%x,%x,%x\n",dci_decoded_output[current_thread_id][0],
- dci_decoded_output[current_thread_id][1],
- dci_decoded_output[current_thread_id][2],
- dci_decoded_output[current_thread_id][3]);
-#endif
- } else {
- dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0];
- dci_alloc[*dci_cnt].dci_pdu[6] = dci_decoded_output[current_thread_id][1];
- dci_alloc[*dci_cnt].dci_pdu[5] = dci_decoded_output[current_thread_id][2];
- dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];
- dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][4];
- dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][5];
- dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][6];
- dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][7];
-#ifdef DEBUG_DCI_DECODING
- printf("DCI => %x,%x,%x,%x,%x,%x,%x,%x\n",
- dci_decoded_output[current_thread_id][0],dci_decoded_output[current_thread_id][1],dci_decoded_output[current_thread_id][2],dci_decoded_output[current_thread_id][3],
- dci_decoded_output[current_thread_id][4],dci_decoded_output[current_thread_id][5],dci_decoded_output[current_thread_id][6],dci_decoded_output[current_thread_id][7]);
-#endif
- }
+ crc = (crc16(&dci_decoded_output[current_thread_id][0],sizeof_bits)>>16) ^ extract_crc(&dci_decoded_output[current_thread_id][0],sizeof_bits);
+ #ifdef DEBUG_DCI_DECODING
+ printf("crc =>%x\n",crc);
+ #endif
- if (crc==si_rnti) {
- dci_alloc[*dci_cnt].format = format_si;
- *dci_cnt = *dci_cnt+1;
- } else if (crc==p_rnti) {
- dci_alloc[*dci_cnt].format = format_p;
- *dci_cnt = *dci_cnt+1;
- } else if (crc==ra_rnti) {
- dci_alloc[*dci_cnt].format = format_ra;
- // store first nCCE of group for PUCCH transmission of ACK/NAK
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
- *dci_cnt = *dci_cnt+1;
- } else if (crc==pdcch_vars[eNB_id]->crnti) {
-
- if ((mode&UL_DCI)&&(format_c == format0)&&((dci_decoded_output[current_thread_id][0]&0x80)==0)) {// check if pdu is format 0 or 1A
- if (*format0_found == 0) {
- dci_alloc[*dci_cnt].format = format0;
- *format0_found = 1;
- *dci_cnt = *dci_cnt+1;
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
- }
- } else if (format_c == format0) { // this is a format 1A DCI
- dci_alloc[*dci_cnt].format = format1A;
- *dci_cnt = *dci_cnt+1;
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
- } else {
- // store first nCCE of group for PUCCH transmission of ACK/NAK
- if (*format_c_found == 0) {
- dci_alloc[*dci_cnt].format = format_c;
- *dci_cnt = *dci_cnt+1;
- *format_c_found = 1;
- pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
- }
- }
- }
+ if (((L>1) && ((crc == si_rnti)|| (crc == p_rnti)|| (crc == ra_rnti)))||
+ (crc == pdcch_vars[eNB_id]->crnti)) {
+ dci_alloc[*dci_cnt].dci_length = sizeof_bits;
+ dci_alloc[*dci_cnt].rnti = crc;
+ dci_alloc[*dci_cnt].L = L;
+ dci_alloc[*dci_cnt].firstCCE = CCEind;
+
+ //printf("DCI FOUND !!! crc =>%x, sizeof_bits %d, sizeof_bytes %d \n",crc, sizeof_bits, sizeof_bytes);
+ if (sizeof_bytes<=4) {
+ dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][0];
+ dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][1];
+ dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][2];
+ dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][3];
+ #ifdef DEBUG_DCI_DECODING
+ printf("DCI => %x,%x,%x,%x\n",dci_decoded_output[current_thread_id][0],
+ dci_decoded_output[current_thread_id][1],
+ dci_decoded_output[current_thread_id][2],
+ dci_decoded_output[current_thread_id][3]);
+ #endif
+ } else {
+ dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0];
+ dci_alloc[*dci_cnt].dci_pdu[6] = dci_decoded_output[current_thread_id][1];
+ dci_alloc[*dci_cnt].dci_pdu[5] = dci_decoded_output[current_thread_id][2];
+ dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];
+ dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][4];
+ dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][5];
+ dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][6];
+ dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][7];
+ #ifdef DEBUG_DCI_DECODING
+ printf("DCI => %x,%x,%x,%x,%x,%x,%x,%x\n",
+ dci_decoded_output[current_thread_id][0],dci_decoded_output[current_thread_id][1],dci_decoded_output[current_thread_id][2],dci_decoded_output[current_thread_id][3],
+ dci_decoded_output[current_thread_id][4],dci_decoded_output[current_thread_id][5],dci_decoded_output[current_thread_id][6],dci_decoded_output[current_thread_id][7]);
+ #endif
+ }
- //LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_tti_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_tti_rx, pdcch_vars[eNB_id]->nCCE[nr_tti_rx],L2);
- // memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
+ if (crc==si_rnti) {
+ dci_alloc[*dci_cnt].format = format_si;
+ *dci_cnt = *dci_cnt+1;
+ } else if (crc==p_rnti) {
+ dci_alloc[*dci_cnt].format = format_p;
+ *dci_cnt = *dci_cnt+1;
+ } else if (crc==ra_rnti) {
+ dci_alloc[*dci_cnt].format = format_ra;
+ // store first nCCE of group for PUCCH transmission of ACK/NAK
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
+ *dci_cnt = *dci_cnt+1;
+ } else if (crc==pdcch_vars[eNB_id]->crnti) {
+
+ if ((mode&UL_DCI)&&(format_c == format0)&&((dci_decoded_output[current_thread_id][0]&0x80)==0)) {// check if pdu is format 0 or 1A
+ if (*format0_found == 0) {
+ dci_alloc[*dci_cnt].format = format0;
+ *format0_found = 1;
+ *dci_cnt = *dci_cnt+1;
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
+ }
+ } else if (format_c == format0) { // this is a format 1A DCI
+ dci_alloc[*dci_cnt].format = format1A;
+ *dci_cnt = *dci_cnt+1;
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
+ } else {
+ // store first nCCE of group for PUCCH transmission of ACK/NAK
+ if (*format_c_found == 0) {
+ dci_alloc[*dci_cnt].format = format_c;
+ *dci_cnt = *dci_cnt+1;
+ *format_c_found = 1;
+ pdcch_vars[eNB_id]->nCCE[nr_tti_rx]=CCEind;
+ }
+ }
+ }
+ //LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[nr_tti_rx: %d]: %d ], AggregationLevel %d \n",format_c, nr_tti_rx, pdcch_vars[eNB_id]->nCCE[nr_tti_rx],L2);
+ // memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
- switch (1<<L) {
- case 1:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
- case 2:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
+ switch (1<<L) {
+ case 1:
+ *CCEmap|=(1<<(CCEind&0x1f));
+ break;
- case 4:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
+ case 2:
+ *CCEmap|=(1<<(CCEind&0x1f));
+ break;
- case 8:
- *CCEmap|=(1<<(CCEind&0x1f));
- break;
- }
+ case 4:
+ *CCEmap|=(1<<(CCEind&0x1f));
+ break;
-#ifdef DEBUG_DCI_DECODING
- LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %s in CCE %d (CCEmap %x) candidate %d / %d \n",
- *dci_cnt,crc,1<<L,sizeof_bits,dci_format_strings[dci_alloc[*dci_cnt-1].format],CCEind,*CCEmap,m,nb_candidates );
- dump_dci(frame_parms,&dci_alloc[*dci_cnt-1]);
+ case 8:
+ *CCEmap|=(1<<(CCEind&0x1f));
+ break;
+ }
-#endif
- return;
- } // rnti match
- } // CCEmap_cand == 0
+ #ifdef DEBUG_DCI_DECODING
+ LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %s in CCE %d (CCEmap %x) candidate %d / %d \n",
+ *dci_cnt,crc,1<<L,sizeof_bits,dci_format_strings[dci_alloc[*dci_cnt-1].format],CCEind,*CCEmap,m,nb_candidates );
+ dump_dci(frame_parms,&dci_alloc[*dci_cnt-1]);
+
+ #endif
+ return;
+ } // rnti match
+ } // CCEmap_cand == 0
-// if ( agregationLevel != 0xFF &&
-// (format_c == format0 && m==0 && si_rnti != SI_RNTI))
-// {
-// //Only valid for OAI : Save some processing time when looking for DCI format0. From the log we see the DCI only on candidate 0.
-// return;
-// }
+ // if ( agregationLevel != 0xFF &&
+ // (format_c == format0 && m==0 && si_rnti != SI_RNTI))
+ // {
+ // //Only valid for OAI : Save some processing time when looking for DCI format0. From the log we see the DCI only on candidate 0.
+ // return;
+ // }
} // candidate loop
-}
+ }
-uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_NR_UE *ue,
- DCI_ALLOC_t *dci_alloc,
- uint8_t DCIFormat,
- uint8_t agregationLevel,
- int16_t eNB_id,
- uint8_t nr_tti_rx)
-{
+ uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_NR_UE *ue,
+ DCI_ALLOC_t *dci_alloc,
+ uint8_t DCIFormat,
+ uint8_t agregationLevel,
+ int16_t eNB_id,
+ uint8_t nr_tti_rx)
+ {
uint8_t dci_cnt=0,old_dci_cnt=0;
uint32_t CCEmap0=0,CCEmap1=0,CCEmap2=0;
@@ -2027,181 +1895,181 @@ uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_NR_UE *ue,
switch (frame_parms->N_RB_DL) {
case 6:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_1_5MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_1_5MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
+ if (frame_type == TDD) {
+ format0_size_bits = sizeof_DCI0_1_5MHz_TDD_1_6_t;
+ format0_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
+ format1_size_bits = sizeof_DCI1_1_5MHz_TDD_t;
+ format1_size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
- } else {
- format0_size_bits = sizeof_DCI0_1_5MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_1_5MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
- }
+ } else {
+ format0_size_bits = sizeof_DCI0_1_5MHz_FDD_t;
+ format0_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
+ format1_size_bits = sizeof_DCI1_1_5MHz_FDD_t;
+ format1_size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
+ }
- break;
+ break;
case 25:
default:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_5MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_5MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_5MHz_TDD_t);
- } else {
- format0_size_bits = sizeof_DCI0_5MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
- }
+ if (frame_type == TDD) {
+ format0_size_bits = sizeof_DCI0_5MHz_TDD_1_6_t;
+ format0_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
+ format1_size_bits = sizeof_DCI1_5MHz_TDD_t;
+ format1_size_bytes = sizeof(DCI1_5MHz_TDD_t);
+ } else {
+ format0_size_bits = sizeof_DCI0_5MHz_FDD_t;
+ format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
+ format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
+ format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
+ }
- break;
+ break;
case 50:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_10MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_10MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_10MHz_TDD_t);
+ if (frame_type == TDD) {
+ format0_size_bits = sizeof_DCI0_10MHz_TDD_1_6_t;
+ format0_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
+ format1_size_bits = sizeof_DCI1_10MHz_TDD_t;
+ format1_size_bytes = sizeof(DCI1_10MHz_TDD_t);
- } else {
- format0_size_bits = sizeof_DCI0_10MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_10MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_10MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_10MHz_FDD_t);
- }
+ } else {
+ format0_size_bits = sizeof_DCI0_10MHz_FDD_t;
+ format0_size_bytes = sizeof(DCI0_10MHz_FDD_t);
+ format1_size_bits = sizeof_DCI1_10MHz_FDD_t;
+ format1_size_bytes = sizeof(DCI1_10MHz_FDD_t);
+ }
- break;
+ break;
case 100:
- if (frame_type == TDD) {
- format0_size_bits = sizeof_DCI0_20MHz_TDD_1_6_t;
- format0_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
- format1_size_bits = sizeof_DCI1_20MHz_TDD_t;
- format1_size_bytes = sizeof(DCI1_20MHz_TDD_t);
- } else {
- format0_size_bits = sizeof_DCI0_20MHz_FDD_t;
- format0_size_bytes = sizeof(DCI0_20MHz_FDD_t);
- format1_size_bits = sizeof_DCI1_20MHz_FDD_t;
- format1_size_bytes = sizeof(DCI1_20MHz_FDD_t);
- }
+ if (frame_type == TDD) {
+ format0_size_bits = sizeof_DCI0_20MHz_TDD_1_6_t;
+ format0_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
+ format1_size_bits = sizeof_DCI1_20MHz_TDD_t;
+ format1_size_bytes = sizeof(DCI1_20MHz_TDD_t);
+ } else {
+ format0_size_bits = sizeof_DCI0_20MHz_FDD_t;
+ format0_size_bytes = sizeof(DCI0_20MHz_FDD_t);
+ format1_size_bits = sizeof_DCI1_20MHz_FDD_t;
+ format1_size_bytes = sizeof(DCI1_20MHz_FDD_t);
+ }
- break;
+ break;
}
if (ue->prach_resources[eNB_id])
- ra_rnti = ue->prach_resources[eNB_id]->ra_RNTI;
+ ra_rnti = ue->prach_resources[eNB_id]->ra_RNTI;
// Now check UE_SPEC format0/1A ue_spec search spaces at aggregation 8
dci_decoding_procedure0(pdcch_vars,0,mode,
- nr_tti_rx,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[nr_tti_rx],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- agregationLevel,
- format1A,
- format1A,
- format1A,
- format0,
- format0_size_bits,
- format0_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
+ nr_tti_rx,
+ dci_alloc,
+ eNB_id,
+ ue->current_thread_id[nr_tti_rx],
+ frame_parms,
+ mi,
+ ((ue->decode_SIB == 1) ? SI_RNTI : 0),
+ ra_rnti,
+ P_RNTI,
+ agregationLevel,
+ format1A,
+ format1A,
+ format1A,
+ format0,
+ format0_size_bits,
+ format0_size_bytes,
+ &dci_cnt,
+ &format0_found,
+ &format_c_found,
+ &CCEmap0,
+ &CCEmap1,
+ &CCEmap2);
if ((CCEmap0==0xffff)||
- ((format0_found==1)&&(format_c_found==1)))
- return(dci_cnt);
+ ((format0_found==1)&&(format_c_found==1)))
+ return(dci_cnt);
if (DCIFormat == 1)
{
- if ((tmode < 3) || (tmode == 7)) {
- //printf("Crnti decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
+ if ((tmode < 3) || (tmode == 7)) {
+ //printf("Crnti decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
+
+ // Now check UE_SPEC format 1 search spaces at aggregation 1
+
+ //printf("[DCI search] Format 1/1A aggregation 1\n");
+
+ old_dci_cnt=dci_cnt;
+ dci_decoding_procedure0(pdcch_vars,0,mode,nr_tti_rx,
+ dci_alloc,
+ eNB_id,
+ ue->current_thread_id[nr_tti_rx],
+ frame_parms,
+ mi,
+ ((ue->decode_SIB == 1) ? SI_RNTI : 0),
+ ra_rnti,
+ P_RNTI,
+ 0,
+ format1A,
+ format1A,
+ format1A,
+ format1,
+ format1_size_bits,
+ format1_size_bytes,
+ &dci_cnt,
+ &format0_found,
+ &format_c_found,
+ &CCEmap0,
+ &CCEmap1,
+ &CCEmap2);
+
+ if ((CCEmap0==0xffff) ||
+ (format_c_found==1))
+ return(dci_cnt);
- // Now check UE_SPEC format 1 search spaces at aggregation 1
+ if (dci_cnt>old_dci_cnt)
+ return(dci_cnt);
- //printf("[DCI search] Format 1/1A aggregation 1\n");
+ //printf("Crnti 1 decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
- old_dci_cnt=dci_cnt;
- dci_decoding_procedure0(pdcch_vars,0,mode,nr_tti_rx,
- dci_alloc,
- eNB_id,
- ue->current_thread_id[nr_tti_rx],
- frame_parms,
- mi,
- ((ue->decode_SIB == 1) ? SI_RNTI : 0),
- ra_rnti,
- P_RNTI,
- 0,
- format1A,
- format1A,
- format1A,
- format1,
- format1_size_bits,
- format1_size_bytes,
- &dci_cnt,
- &format0_found,
- &format_c_found,
- &CCEmap0,
- &CCEmap1,
- &CCEmap2);
-
- if ((CCEmap0==0xffff) ||
- (format_c_found==1))
- return(dci_cnt);
-
- if (dci_cnt>old_dci_cnt)
- return(dci_cnt);
-
- //printf("Crnti 1 decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
-
- }
- else
- {
- AssertFatal(0,"Other Transmission mode not yet coded\n");
- }
}
else
{
- AssertFatal(0,"DCI format %d not yet implemented \n",DCIFormat);
+ AssertFatal(0,"Other Transmission mode not yet coded\n");
+ }
+ }
+ else
+ {
+ AssertFatal(0,"DCI format %d not yet implemented \n",DCIFormat);
}
return(dci_cnt);
-}
+ }
*/
#ifdef NR_PDCCH_DCI_RUN
uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
- uint16_t eNB_id,
- uint8_t nr_tti_rx,
- int p,
- crc_scrambled_t crc_scrambled,
- uint16_t n_RB_ULBWP,
- uint16_t n_RB_DLBWP,
- uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
- uint8_t format){
+ uint16_t eNB_id,
+ uint8_t nr_tti_rx,
+ int p,
+ crc_scrambled_t crc_scrambled,
+ uint16_t n_RB_ULBWP,
+ uint16_t n_RB_DLBWP,
+ uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
+ uint8_t format){
#ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> crc_scrambled=%d, n_RB_ULBWP=%d, n_RB_DLBWP=%d\n",crc_scrambled,n_RB_ULBWP,n_RB_DLBWP);
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> crc_scrambled=%d, n_RB_ULBWP=%d, n_RB_DLBWP=%d\n",crc_scrambled,n_RB_ULBWP,n_RB_DLBWP);
#endif
-/*
- * function nr_dci_format_size calculates and returns the size in bits of a determined format
- * it also returns an bi-dimensional array 'dci_fields_sizes' with x rows and y columns, where:
- * x is the number of fields defined in TS 38.212 subclause 7.3.1 (Each field is mapped in the order in which it appears in the description in the specification)
- * y is the number of formats
- * e.g.: dci_fields_sizes[10][0] contains the size in bits of the field FREQ_DOM_RESOURCE_ASSIGNMENT_UL for format 0_0
- */
+ /*
+ * function nr_dci_format_size calculates and returns the size in bits of a determined format
+ * it also returns an bi-dimensional array 'dci_fields_sizes' with x rows and y columns, where:
+ * x is the number of fields defined in TS 38.212 subclause 7.3.1 (Each field is mapped in the order in which it appears in the description in the specification)
+ * y is the number of formats
+ * e.g.: dci_fields_sizes[10][0] contains the size in bits of the field FREQ_DOM_RESOURCE_ASSIGNMENT_UL for format 0_0
+ */
// pdsch_config contains the PDSCH-Config IE is used to configure the UE specific PDSCH parameters (TS 38.331)
PDSCH_Config_t pdsch_config = ue->PDSCH_Config;
@@ -2216,7 +2084,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig= ue->PDSCH_ServingCellConfig;
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
-// 1 CARRIER_IN
+ // 1 CARRIER_IN
// crossCarrierSchedulingConfig from higher layers, variable crossCarrierSchedulingConfig indicates if 'cross carrier scheduling' is enabled or not:
// if No cross carrier scheduling: number of bits for CARRIER_IND is 0
// if Cross carrier scheduling: number of bits for CARRIER_IND is 3
@@ -2225,14 +2093,14 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
if (crossCarrierSchedulingConfig.schedulingCellInfo.other.cif_InSchedulingCell !=0 ) crossCarrierSchedulingConfig_ind=1;
-// 2 SUL_IND_0_1, // 40 SRS_REQUEST, // 50 SUL_IND_0_0
+ // 2 SUL_IND_0_1, // 40 SRS_REQUEST, // 50 SUL_IND_0_0
// UL/SUL indicator (TS 38.331, supplementary uplink is indicated in higher layer parameter ServCellAdd-SUL from IE ServingCellConfig and ServingCellConfigCommon):
// 0 bit for UEs not configured with SUL in the cell or UEs configured with SUL in the cell but only PUCCH carrier in the cell is configured for PUSCH transmission
// 1 bit for UEs configured with SUL in the cell as defined in Table 7.3.1.1.1-1
// sul_ind indicates whether SUL is configured in cell or not
uint8_t sul_ind=ue->supplementaryUplink.supplementaryUplink; // this value will be 0 or 1 depending on higher layer parameter ServCellAdd-SUL. FIXME!!!
-// 7 BANDWIDTH_PART_IND
+ // 7 BANDWIDTH_PART_IND
// number of UL BWPs configured by higher layers
uint8_t n_UL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
n_UL_BWP_RRC = ((n_UL_BWP_RRC > 3)?n_UL_BWP_RRC:(n_UL_BWP_RRC+1));
@@ -2241,7 +2109,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
n_DL_BWP_RRC = ((n_DL_BWP_RRC > 3)?n_DL_BWP_RRC:(n_DL_BWP_RRC+1));
-// 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL
+ // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL
// if format0_0, only resource allocation type 1 is allowed
// if format0_1, then resource allocation type 0 can be configured and N_RBG is defined in TS 38.214 subclause 6.1.2.2.1
@@ -2280,7 +2148,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
if ((ul_res_alloc_type_0 == 1) && (ul_res_alloc_type_1 == 1))
n_bits_freq_dom_res_assign_ul = ((n_bits_freq_dom_res_assign_ul>n_ul_RGB_tmp)?(n_bits_freq_dom_res_assign_ul+1):(n_ul_RGB_tmp+1));
-// 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL
+ // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL
// if format1_0, only resource allocation type 1 is allowed
// if format1_1, then resource allocation type 0 can be configured and N_RBG is defined in TS 38.214 subclause 5.1.2.2.1
dl_resourceAllocation_t dl_resource_allocation_type = pdsch_config.dl_resourceAllocation;
@@ -2305,61 +2173,61 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
}
if (dl_res_alloc_type_1 == 1) n_bits_freq_dom_res_assign_dl = (uint8_t)(ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)));
if ((dl_res_alloc_type_0 == 1) && (dl_res_alloc_type_1 == 1))
- n_bits_freq_dom_res_assign_dl = ((n_bits_freq_dom_res_assign_dl>n_dl_RGB_tmp)?(n_bits_freq_dom_res_assign_dl+1):(n_dl_RGB_tmp+1));
+ n_bits_freq_dom_res_assign_dl = ((n_bits_freq_dom_res_assign_dl>n_dl_RGB_tmp)?(n_bits_freq_dom_res_assign_dl+1):(n_dl_RGB_tmp+1));
-// 12 TIME_DOM_RESOURCE_ASSIGNMENT
+ // 12 TIME_DOM_RESOURCE_ASSIGNMENT
uint8_t pusch_alloc_list = pusch_config.n_push_alloc_list;
uint8_t pdsch_alloc_list = pdsch_config.n_pdsh_alloc_list;
-// 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
+ // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
static_bundleSize_t static_prb_BundlingType = pdsch_config.prbBundleType.staticBundling;
bundleSizeSet1_t dynamic_prb_BundlingType1 = pdsch_config.prbBundleType.dynamicBundlig.bundleSizeSet1;
bundleSizeSet2_t dynamic_prb_BundlingType2 = pdsch_config.prbBundleType.dynamicBundlig.bundleSizeSet2;
uint8_t prb_BundlingType_size=0;
if ((static_prb_BundlingType==st_n4)||(static_prb_BundlingType==st_wideband)) prb_BundlingType_size=0;
if ((dynamic_prb_BundlingType1==dy_1_n4)||(dynamic_prb_BundlingType1==dy_1_wideband)||(dynamic_prb_BundlingType1==dy_1_n2_wideband)||(dynamic_prb_BundlingType1==dy_1_n4_wideband)||
- (dynamic_prb_BundlingType2==dy_2_n4)||(dynamic_prb_BundlingType2==dy_2_wideband)) prb_BundlingType_size=1;
+ (dynamic_prb_BundlingType2==dy_2_n4)||(dynamic_prb_BundlingType2==dy_2_wideband)) prb_BundlingType_size=1;
-// 15 RATE_MATCHING_IND FIXME!!!
+ // 15 RATE_MATCHING_IND FIXME!!!
// according to TS 38.212: Rate matching indicator – 0, 1, or 2 bits according to higher layer parameter rateMatchPattern
uint8_t rateMatching_bits = pdsch_config.n_rateMatchPatterns;
-// 16 ZP_CSI_RS_TRIGGER FIXME!!!
+ // 16 ZP_CSI_RS_TRIGGER FIXME!!!
// 0, 1, or 2 bits as defined in Subclause 5.1.4.2 of [6, TS 38.214].
// is the number of ZP CSI-RS resource sets in the higher layer parameter zp-CSI-RS-Resource
uint8_t n_zp_bits = pdsch_config.n_zp_CSI_RS_ResourceId;
-// 17 FREQ_HOPPING_FLAG
+ // 17 FREQ_HOPPING_FLAG
// freqHopping is defined by higher layer parameter frequencyHopping from IE PUSCH-Config. Values are ENUMERATED{mode1, mode2}
frequencyHopping_t f_hopping = pusch_config.frequencyHopping;
uint8_t freqHopping = 0;
if ((f_hopping==f_hop_mode1)||(f_hopping==f_hop_mode2)) freqHopping = 1;
-// 28 DAI
+ // 28 DAI
pdsch_HARQ_ACK_Codebook_t pdsch_HARQ_ACK_Codebook = pdsch_config.pdsch_HARQ_ACK_Codebook;
uint8_t n_dai = 0;
uint8_t n_serving_cell_dl = 1; // this is hardcoded to 1 as we need to get this value from RRC higher layers parameters. FIXME!!!
if ((pdsch_HARQ_ACK_Codebook == dynamic) && (n_serving_cell_dl == 1)) n_dai = 2;
if ((pdsch_HARQ_ACK_Codebook == dynamic) && (n_serving_cell_dl > 1)) n_dai = 4;
-// 29 FIRST_DAI
+ // 29 FIRST_DAI
uint8_t codebook_HARQ_ACK = 0; // We need to get this value to calculate number of bits of fields 1st DAI and 2nd DAI.
if (pdsch_HARQ_ACK_Codebook == semiStatic) codebook_HARQ_ACK = 1;
if (pdsch_HARQ_ACK_Codebook == dynamic) codebook_HARQ_ACK = 2;
-// 30 SECOND_DAI
+ // 30 SECOND_DAI
uint8_t n_HARQ_ACK_sub_codebooks = 0; // We need to get this value to calculate number of bits of fields 1st DAI and 2nd DAI. FIXME!!!
-// 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND
+ // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND
uint8_t pdsch_harq_t_ind = (uint8_t)ceil(log2(pucch_config_dedicated.dl_DataToUL_ACK[0]));
-// 36 SRS_RESOURCE_IND
+ // 36 SRS_RESOURCE_IND
// n_SRS is the number of configured SRS resources in the SRS resource set associated with the higher layer parameter usage of value 'codeBook' or 'nonCodeBook'
// from SRS_ResourceSet_t type we should get the information of the usage parameter (with possible values beamManagement, codebook, nonCodebook, antennaSwitching)
// at frame_parms->srs_nr->p_SRS_ResourceSetList[]->usage
uint8_t n_SRS = ue->srs.number_srs_Resource_Set;
-// 37 PRECOD_NBR_LAYERS
-// 38 ANTENNA_PORTS
+ // 37 PRECOD_NBR_LAYERS
+ // 38 ANTENNA_PORTS
txConfig_t txConfig = pusch_config.txConfig;
transformPrecoder_t transformPrecoder = pusch_config.transformPrecoder;
codebookSubset_t codebookSubset = pusch_config.codebookSubset;
@@ -2371,24 +2239,24 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
if (txConfig == txConfig_codebook){
if (num_antenna_ports == 4) {
if ((transformPrecoder == transformPrecoder_disabled) && ((maxRank == 2)||(maxRank == 3)||(maxRank == 4))) { // Table 7.3.1.1.2-2
- if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=6;
- if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=5;
- if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=4;
+ if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=6;
+ if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=5;
+ if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=4;
}
if (((transformPrecoder == transformPrecoder_enabled)||(transformPrecoder == transformPrecoder_disabled)) && (maxRank == 1)) { // Table 7.3.1.1.2-3
- if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=5;
- if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=4;
- if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
+ if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=5;
+ if (codebookSubset == codebookSubset_partialAndNonCoherent) precond_nbr_layers_bits=4;
+ if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
}
}
if (num_antenna_ports == 2) {
if ((transformPrecoder == transformPrecoder_disabled) && (maxRank == 2)) { // Table 7.3.1.1.2-4
- if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=4;
- if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
+ if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=4;
+ if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=2;
}
if (((transformPrecoder == transformPrecoder_enabled)||(transformPrecoder == transformPrecoder_disabled)) && (maxRank == 1)) { // Table 7.3.1.1.2-5
- if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=3;
- if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=1;
+ if (codebookSubset == codebookSubset_fullyAndPartialAndNonCoherent) precond_nbr_layers_bits=3;
+ if (codebookSubset == codebookSubset_nonCoherent) precond_nbr_layers_bits=1;
}
}
}
@@ -2412,16 +2280,16 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type2) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len1)) antenna_ports_bits_dl = 5; // Table 7.3.1.2.2-3
if((dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type2) && (dmrs_DownlinkConfig.pdsch_maxLength == pdsch_len2)) antenna_ports_bits_dl = 6; // Table 7.3.1.2.2-4
-// 39 TCI
+ // 39 TCI
uint8_t tci_bits=0;
if (pdcch_vars2->coreset[p].tciPresentInDCI == tciPresentInDCI_enabled) tci_bits=3;
-// 42 CSI_REQUEST
+ // 42 CSI_REQUEST
// reportTriggerSize is defined in the CSI-MeasConfig IE (TS 38.331).
// Size of CSI request field in DCI (bits). Corresponds to L1 parameter 'ReportTriggerSize' (see 38.214, section 5.2)
uint8_t reportTriggerSize = csi_MeasConfig.reportTriggerSize; // value from 0..6
-// 43 CBGTI
+ // 43 CBGTI
// for format 0_1
uint8_t maxCodeBlockGroupsPerTransportBlock = 0;
if (PUSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock != 0)
@@ -2429,17 +2297,17 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
// for format 1_1, as defined in Subclause 5.1.7 of [6, TS38.214]
uint8_t maxCodeBlockGroupsPerTransportBlock_dl = 0;
if (PDSCH_ServingCellConfig.maxCodeBlockGroupsPerTransportBlock_dl != 0)
- maxCodeBlockGroupsPerTransportBlock_dl = pdsch_config.maxNrofCodeWordsScheduledByDCI; // FIXME!!!
+ maxCodeBlockGroupsPerTransportBlock_dl = pdsch_config.maxNrofCodeWordsScheduledByDCI; // FIXME!!!
-// 44 CBGFI
+ // 44 CBGFI
uint8_t cbgfi_bit = PDSCH_ServingCellConfig.codeBlockGroupFlushIndicator;
-// 45 PTRS_DMRS
+ // 45 PTRS_DMRS
// 0 bit if PTRS-UplinkConfig is not configured and transformPrecoder=disabled, or if transformPrecoder=enabled, or if maxRank=1
// 2 bits otherwise
uint8_t ptrs_dmrs_bits=0; //FIXME!!!
-// 46 BETA_OFFSET_IND
+ // 46 BETA_OFFSET_IND
// at IE PUSCH-Config, beta_offset indicator – 0 if the higher layer parameter betaOffsets = semiStatic; otherwise 2 bits
// uci-OnPUSCH
// Selection between and configuration of dynamic and semi-static beta-offset. If the field is absent or released, the UE applies the value 'semiStatic' and the BetaOffsets
@@ -2447,7 +2315,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
if (pusch_config.uci_onPusch.betaOffset_type == betaOffset_semiStatic);
if (pusch_config.uci_onPusch.betaOffset_type == betaOffset_dynamic) betaOffsets = 2;
-// 47 DMRS_SEQ_INI
+ // 47 DMRS_SEQ_INI
uint8_t dmrs_seq_ini_bits_ul = 0;
uint8_t dmrs_seq_ini_bits_dl = 0;
//1 bit if both scramblingID0 and scramblingID1 are configured in DMRS-UplinkConfig
@@ -2455,150 +2323,150 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
//1 bit if both scramblingID0 and scramblingID1 are configured in DMRS-DownlinkConfig
if ((dmrs_DownlinkConfig.scramblingID0 != 0) && (dmrs_DownlinkConfig.scramblingID0 != 0)) dmrs_seq_ini_bits_dl = 1;
-/*
- * For format 2_2
- *
- * This format supports power control commands for semi-persistent scheduling.
- * As we can already support power control commands dynamically with formats 0_0/0_1 (TPC PUSCH) and 1_0/1_1 (TPC PUCCH)
- *
- * This format will be implemented in the future FIXME!!!
- *
- */
-// 5 BLOCK_NUMBER: The parameter tpc-PUSCH or tpc-PUCCH provided by higher layers determines the index to the block number for an UL of a cell
-// The following fields are defined for each block: Closed loop indicator and TPC command
-// 6 CLOSE_LOOP_IND
-// 41 TPC_CMD
+ /*
+ * For format 2_2
+ *
+ * This format supports power control commands for semi-persistent scheduling.
+ * As we can already support power control commands dynamically with formats 0_0/0_1 (TPC PUSCH) and 1_0/1_1 (TPC PUCCH)
+ *
+ * This format will be implemented in the future FIXME!!!
+ *
+ */
+ // 5 BLOCK_NUMBER: The parameter tpc-PUSCH or tpc-PUCCH provided by higher layers determines the index to the block number for an UL of a cell
+ // The following fields are defined for each block: Closed loop indicator and TPC command
+ // 6 CLOSE_LOOP_IND
+ // 41 TPC_CMD
uint8_t tpc_cmd_bit_2_2 = 2;
-/*
- * For format 2_3
- *
- * This format is used for power control of uplink sounding reference signals for devices which have not coupled SRS power control to the PUSCH power control
- * either because independent control is desirable or because the device is configured without PUCCH and PUSCH
- *
- * This format will be implemented in the future FIXME!!!
- *
- */
-// 40 SRS_REQUEST
-// 41 TPC_CMD
+ /*
+ * For format 2_3
+ *
+ * This format is used for power control of uplink sounding reference signals for devices which have not coupled SRS power control to the PUSCH power control
+ * either because independent control is desirable or because the device is configured without PUCCH and PUSCH
+ *
+ * This format will be implemented in the future FIXME!!!
+ *
+ */
+ // 40 SRS_REQUEST
+ // 41 TPC_CMD
uint8_t tpc_cmd_bit_2_3 = 0;
uint8_t dci_field_size_table [NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = { // This table contains the number of bits for each field (row) contained in each dci format (column).
- // The values of the variables indicate field sizes in number of bits
-//Format0_0 Format0_1 Format1_0 Format1_1 Formats2_0/1/2/3
-{1, 1, (((crc_scrambled == _p_rnti) || (crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti)) ? 0:1),
- 1, 0,0,0,0}, // 0 IDENTIFIER_DCI_FORMATS:
-{0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
- 0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
- 0,0,0,0}, // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
-{0, (sul_ind == 0)?0:1, 0, 0, 0,0,0,0}, // 2 SUL_IND_0_1:
-{0, 0, 0, 0, 1,0,0,0}, // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
-{0, 0, 0, 0, 0,1,0,0}, // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
-{0, 0, 0, 0, 0,0,0,0}, // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
-{0, 0, 0, 0, 0,0,1,0}, // 6 CLOSE_LOOP_IND
-{0, (uint8_t)ceil(log2(n_UL_BWP_RRC)),
- 0, (uint8_t)ceil(log2(n_DL_BWP_RRC)),
- 0,0,0,0}, // 7 BANDWIDTH_PART_IND:
-{0, 0, ((crc_scrambled == _p_rnti) ? 2:0),
- 0, 0,0,0,0}, // 8 SHORT_MESSAGE_IND 2 bits if crc scrambled with P-RNTI
-{0, 0, ((crc_scrambled == _p_rnti) ? 8:0),
- 0, 0,0,0,0}, // 9 SHORT_MESSAGES 8 bit8 if crc scrambled with P-RNTI
-{(uint8_t)(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
- n_bits_freq_dom_res_assign_ul,
- 0, 0, 0,0,0,0}, // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
- // (NOTE 1) If DCI format 0_0 is monitored in common search space
- // and if the number of information bits in the DCI format 0_0 prior to padding
- // is larger than the payload size of the DCI format 1_0 monitored in common search space
- // the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
- // is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
-{0, 0, (uint8_t)ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
- n_bits_freq_dom_res_assign_dl,
- 0,0,0,0}, // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
-{4, (uint8_t)log2(pusch_alloc_list),
- 4, (uint8_t)log2(pdsch_alloc_list),
- 0,0,0,0}, // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
- // where I the number of entries in the higher layer parameter pusch-AllocationList
-{0, 0, 1, (((dl_res_alloc_type_0==1)&&(dl_res_alloc_type_1==0))?0:1),
- 0,0,0,0}, // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
-{0, 0, 0, prb_BundlingType_size, 0,0,0,0}, // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
-{0, 0, 0, rateMatching_bits, 0,0,0,0}, // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
-{0, 0, 0, n_zp_bits, 0,0,0,0}, // 16 ZP_CSI_RS_TRIGGER:
-{1, (((ul_res_alloc_type_0==1)&&(ul_res_alloc_type_1==0))||(freqHopping == 0))?0:1,
- 0, 0, 0,0,0,0}, // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
-{0, 0, 0, 5, 0,0,0,0}, // 18 TB1_MCS:
-{0, 0, 0, 1, 0,0,0,0}, // 19 TB1_NDI:
-{0, 0, 0, 2, 0,0,0,0}, // 20 TB1_RV:
-{0, 0, 0, 5, 0,0,0,0}, // 21 TB2_MCS:
-{0, 0, 0, 1, 0,0,0,0}, // 22 TB2_NDI:
-{0, 0, 0, 2, 0,0,0,0}, // 23 TB2_RV:
-{5, 5, 5, 0, 0,0,0,0}, // 24 MCS:
-{1, 1, (crc_scrambled == _c_rnti)?1:0,0, 0,0,0,0}, // 25 NDI:
-{2, 2, (((crc_scrambled == _c_rnti) || (crc_scrambled == _si_rnti)) ? 2:0),
- 0, 0,0,0,0}, // 26 RV:
-{4, 4, (crc_scrambled == _c_rnti)?4:0,4, 0,0,0,0}, // 27 HARQ_PROCESS_NUMBER:
-{0, 0, (crc_scrambled == _c_rnti)?2:0,n_dai, 0,0,0,0}, // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
- // 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
- // 0 otherwise
-{0, codebook_HARQ_ACK, 0, 0, 0,0,0,0}, // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
-{0, (((codebook_HARQ_ACK == 2) && (n_HARQ_ACK_sub_codebooks==2))?2:0),
- 0, 0, 0,0,0,0}, // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
-{0, 0, (((crc_scrambled == _p_rnti) || (crc_scrambled == _ra_rnti)) ? 2:0),
- 0, 0,0,0,0}, // 31 TB_SCALING
-{2, 2, 0, 0, 0,0,0,0}, // 32 TPC_PUSCH:
-{0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 33 TPC_PUCCH:
-{0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 34 PUCCH_RESOURCE_IND:
-{0, 0, (crc_scrambled == _c_rnti)?3:0,pdsch_harq_t_ind, 0,0,0,0}, // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
-{0, (uint8_t)log2(n_SRS), 0, 0, 0,0,0,0}, // 36 SRS_RESOURCE_IND:
-{0, precond_nbr_layers_bits, 0, 0, 0,0,0,0}, // 37 PRECOD_NBR_LAYERS:
-{0, antenna_ports_bits_ul, 0, antenna_ports_bits_dl, 0,0,0,0}, // 38 ANTENNA_PORTS:
-{0, 0, 0, tci_bits, 0,0,0,0}, // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
-{0, (sul_ind == 0)?2:3, 0, (sul_ind == 0)?2:3, 0,0,0,2}, // 40 SRS_REQUEST:
-{0, 0, 0, 0, 0,0,tpc_cmd_bit_2_2,
- tpc_cmd_bit_2_3},
- // 41 TPC_CMD:
-{0, reportTriggerSize, 0, 0, 0,0,0,0}, // 42 CSI_REQUEST:
-{0, maxCodeBlockGroupsPerTransportBlock,
- 0, maxCodeBlockGroupsPerTransportBlock_dl,
- 0,0,0,0}, // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
-{0, 0, 0, cbgfi_bit, 0,0,0,0}, // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
-{0, ptrs_dmrs_bits, 0, 0, 0,0,0,0}, // 45 PTRS_DMRS:
-{0, betaOffsets, 0, 0, 0,0,0,0}, // 46 BETA_OFFSET_IND:
-{0, dmrs_seq_ini_bits_ul, 0, dmrs_seq_ini_bits_dl, 0,0,0,0}, // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
- // is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
-{0, 1, 0, 0, 0,0,0,0}, // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
-{0, 0, 0, 0, 0,0,0,0}, // 49 PADDING_NR_DCI:
- // (NOTE 2) If DCI format 0_0 is monitored in common search space
- // and if the number of information bits in the DCI format 0_0 prior to padding
- // is less than the payload size of the DCI format 1_0 monitored in common search space
- // zeros shall be appended to the DCI format 0_0
- // until the payload size equals that of the DCI format 1_0
-{(sul_ind == 0)?0:1, 0, 0, 0, 0,0,0,0}, // 50 SUL_IND_0_0:
-{0, 0, 0, 0, 0,0,0,0}, // 51 RA_PREAMBLE_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
-{0, 0, 0, 0, 0,0,0,0}, // 52 SUL_IND_1_0 (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
-{0, 0, 0, 0, 0,0,0,0}, // 53 SS_PBCH_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
-{0, 0, 0, 0, 0,0,0,0}, // 54 PRACH_MASK_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
-{0, 0, ((crc_scrambled == _p_rnti)?6:(((crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti))?16:0)),
- 0, 0,0,0,0} // 55 RESERVED_NR_DCI
-};
-
-// NOTE 1: adjustments in freq_dom_resource_assignment_UL to be done if necessary
-// NOTE 2: adjustments in padding to be done if necessary
-
-uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
+ // The values of the variables indicate field sizes in number of bits
+ //Format0_0 Format0_1 Format1_0 Format1_1 Formats2_0/1/2/3
+ {1, 1, (((crc_scrambled == _p_rnti) || (crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti)) ? 0:1),
+ 1, 0,0,0,0}, // 0 IDENTIFIER_DCI_FORMATS:
+ {0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
+ 0, ((crossCarrierSchedulingConfig_ind == 0) ? 0:3),
+ 0,0,0,0}, // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
+ {0, (sul_ind == 0)?0:1, 0, 0, 0,0,0,0}, // 2 SUL_IND_0_1:
+ {0, 0, 0, 0, 1,0,0,0}, // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
+ {0, 0, 0, 0, 0,1,0,0}, // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
+ {0, 0, 0, 0, 0,0,0,0}, // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
+ {0, 0, 0, 0, 0,0,1,0}, // 6 CLOSE_LOOP_IND
+ {0, (uint8_t)ceil(log2(n_UL_BWP_RRC)),
+ 0, (uint8_t)ceil(log2(n_DL_BWP_RRC)),
+ 0,0,0,0}, // 7 BANDWIDTH_PART_IND:
+ {0, 0, ((crc_scrambled == _p_rnti) ? 2:0),
+ 0, 0,0,0,0}, // 8 SHORT_MESSAGE_IND 2 bits if crc scrambled with P-RNTI
+ {0, 0, ((crc_scrambled == _p_rnti) ? 8:0),
+ 0, 0,0,0,0}, // 9 SHORT_MESSAGES 8 bit8 if crc scrambled with P-RNTI
+ {(uint8_t)(ceil(log2(n_RB_ULBWP*(n_RB_ULBWP+1)/2)))-n_UL_hopping,
+ n_bits_freq_dom_res_assign_ul,
+ 0, 0, 0,0,0,0}, // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
+ // (NOTE 1) If DCI format 0_0 is monitored in common search space
+ // and if the number of information bits in the DCI format 0_0 prior to padding
+ // is larger than the payload size of the DCI format 1_0 monitored in common search space
+ // the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
+ // is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
+ {0, 0, (uint8_t)ceil(log2(n_RB_DLBWP*(n_RB_DLBWP+1)/2)),
+ n_bits_freq_dom_res_assign_dl,
+ 0,0,0,0}, // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
+ {4, (uint8_t)log2(pusch_alloc_list),
+ 4, (uint8_t)log2(pdsch_alloc_list),
+ 0,0,0,0}, // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
+ // where I the number of entries in the higher layer parameter pusch-AllocationList
+ {0, 0, 1, (((dl_res_alloc_type_0==1)&&(dl_res_alloc_type_1==0))?0:1),
+ 0,0,0,0}, // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
+ {0, 0, 0, prb_BundlingType_size, 0,0,0,0}, // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
+ {0, 0, 0, rateMatching_bits, 0,0,0,0}, // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
+ {0, 0, 0, n_zp_bits, 0,0,0,0}, // 16 ZP_CSI_RS_TRIGGER:
+ {1, (((ul_res_alloc_type_0==1)&&(ul_res_alloc_type_1==0))||(freqHopping == 0))?0:1,
+ 0, 0, 0,0,0,0}, // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
+ {0, 0, 0, 5, 0,0,0,0}, // 18 TB1_MCS:
+ {0, 0, 0, 1, 0,0,0,0}, // 19 TB1_NDI:
+ {0, 0, 0, 2, 0,0,0,0}, // 20 TB1_RV:
+ {0, 0, 0, 5, 0,0,0,0}, // 21 TB2_MCS:
+ {0, 0, 0, 1, 0,0,0,0}, // 22 TB2_NDI:
+ {0, 0, 0, 2, 0,0,0,0}, // 23 TB2_RV:
+ {5, 5, 5, 0, 0,0,0,0}, // 24 MCS:
+ {1, 1, (crc_scrambled == _c_rnti)?1:0,0, 0,0,0,0}, // 25 NDI:
+ {2, 2, (((crc_scrambled == _c_rnti) || (crc_scrambled == _si_rnti)) ? 2:0),
+ 0, 0,0,0,0}, // 26 RV:
+ {4, 4, (crc_scrambled == _c_rnti)?4:0,4, 0,0,0,0}, // 27 HARQ_PROCESS_NUMBER:
+ {0, 0, (crc_scrambled == _c_rnti)?2:0,n_dai, 0,0,0,0}, // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
+ // 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
+ // 0 otherwise
+ {0, codebook_HARQ_ACK, 0, 0, 0,0,0,0}, // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK // 2 bits for dynamic HARQ-ACK codebook with single HARQ-ACK codebook
+ {0, (((codebook_HARQ_ACK == 2) && (n_HARQ_ACK_sub_codebooks==2))?2:0),
+ 0, 0, 0,0,0,0}, // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks // 0 bits otherwise
+ {0, 0, (((crc_scrambled == _p_rnti) || (crc_scrambled == _ra_rnti)) ? 2:0),
+ 0, 0,0,0,0}, // 31 TB_SCALING
+ {2, 2, 0, 0, 0,0,0,0}, // 32 TPC_PUSCH:
+ {0, 0, (crc_scrambled == _c_rnti)?2:0,2, 0,0,0,0}, // 33 TPC_PUCCH:
+ {0, 0, (crc_scrambled == _c_rnti)?3:0,3, 0,0,0,0}, // 34 PUCCH_RESOURCE_IND:
+ {0, 0, (crc_scrambled == _c_rnti)?3:0,pdsch_harq_t_ind, 0,0,0,0}, // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
+ {0, (uint8_t)log2(n_SRS), 0, 0, 0,0,0,0}, // 36 SRS_RESOURCE_IND:
+ {0, precond_nbr_layers_bits, 0, 0, 0,0,0,0}, // 37 PRECOD_NBR_LAYERS:
+ {0, antenna_ports_bits_ul, 0, antenna_ports_bits_dl, 0,0,0,0}, // 38 ANTENNA_PORTS:
+ {0, 0, 0, tci_bits, 0,0,0,0}, // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
+ {0, (sul_ind == 0)?2:3, 0, (sul_ind == 0)?2:3, 0,0,0,2}, // 40 SRS_REQUEST:
+ {0, 0, 0, 0, 0,0,tpc_cmd_bit_2_2,
+ tpc_cmd_bit_2_3},
+ // 41 TPC_CMD:
+ {0, reportTriggerSize, 0, 0, 0,0,0,0}, // 42 CSI_REQUEST:
+ {0, maxCodeBlockGroupsPerTransportBlock,
+ 0, maxCodeBlockGroupsPerTransportBlock_dl,
+ 0,0,0,0}, // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
+ {0, 0, 0, cbgfi_bit, 0,0,0,0}, // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
+ {0, ptrs_dmrs_bits, 0, 0, 0,0,0,0}, // 45 PTRS_DMRS:
+ {0, betaOffsets, 0, 0, 0,0,0,0}, // 46 BETA_OFFSET_IND:
+ {0, dmrs_seq_ini_bits_ul, 0, dmrs_seq_ini_bits_dl, 0,0,0,0}, // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
+ // is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
+ {0, 1, 0, 0, 0,0,0,0}, // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
+ {0, 0, 0, 0, 0,0,0,0}, // 49 PADDING_NR_DCI:
+ // (NOTE 2) If DCI format 0_0 is monitored in common search space
+ // and if the number of information bits in the DCI format 0_0 prior to padding
+ // is less than the payload size of the DCI format 1_0 monitored in common search space
+ // zeros shall be appended to the DCI format 0_0
+ // until the payload size equals that of the DCI format 1_0
+ {(sul_ind == 0)?0:1, 0, 0, 0, 0,0,0,0}, // 50 SUL_IND_0_0:
+ {0, 0, 0, 0, 0,0,0,0}, // 51 RA_PREAMBLE_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
+ {0, 0, 0, 0, 0,0,0,0}, // 52 SUL_IND_1_0 (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
+ {0, 0, 0, 0, 0,0,0,0}, // 53 SS_PBCH_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
+ {0, 0, 0, 0, 0,0,0,0}, // 54 PRACH_MASK_INDEX (random access procedure initiated by a PDCCH order not implemented, FIXME!!!)
+ {0, 0, ((crc_scrambled == _p_rnti)?6:(((crc_scrambled == _si_rnti) || (crc_scrambled == _ra_rnti))?16:0)),
+ 0, 0,0,0,0} // 55 RESERVED_NR_DCI
+ };
+
+ // NOTE 1: adjustments in freq_dom_resource_assignment_UL to be done if necessary
+ // NOTE 2: adjustments in padding to be done if necessary
+
+ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
for (int i=0 ; i<NBR_NR_FORMATS ; i++) {
-//#ifdef NR_PDCCH_DCI_DEBUG
-// printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> i=%d, j=%d\n", i, j);
-//#endif
+ //#ifdef NR_PDCCH_DCI_DEBUG
+ // printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size)-> i=%d, j=%d\n", i, j);
+ //#endif
for (int j=0; j<NBR_NR_DCI_FIELDS; j++) {
dci_size [i] = dci_size [i] + dci_field_size_table[j][i]; // dci_size[i] contains the size in bits of the dci pdu format i
//if (i==(int)format-15) { // (int)format-15 indicates the position of each format in the table (e.g. format1_0=17 -> position in table is 2)
dci_fields_sizes[j][i] = dci_field_size_table[j][i]; // dci_fields_sizes[j] contains the sizes of each field (j) for a determined format i
//}
}
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[%d]=%d for n_RB_ULBWP=%d\n",
- i,dci_size[i],n_RB_ULBWP);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[%d]=%d for n_RB_ULBWP=%d\n",
+ i,dci_size[i],n_RB_ULBWP);
+#endif
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
@@ -2610,10 +2478,10 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
printf(" }\n");
#endif
#ifdef NR_PDCCH_DCI_DEBUG
- printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[0_0]=%d, dci_size[0_1]=%d, dci_size[1_0]=%d, dci_size[1_1]=%d,\n",dci_size[0],dci_size[1],dci_size[2],dci_size[3]);
+ printf("\n\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_size[0_0]=%d, dci_size[0_1]=%d, dci_size[1_0]=%d, dci_size[1_1]=%d,\n",dci_size[0],dci_size[1],dci_size[2],dci_size[3]);
#endif
-//UL/SUL indicator format0_0 (TS 38.212 subclause 7.3.1.1.1)
+ //UL/SUL indicator format0_0 (TS 38.212 subclause 7.3.1.1.1)
// - 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding is larger than the number of bits for DCI format 0_0 before padding;
// - 0 bit otherwise.
// The UL/SUL indicator, if present, locates in the last bit position of DCI format 0_0, after the padding bit(s)
@@ -2621,7 +2489,7 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
dci_field_size_table[SUL_IND_0_0][0] = 0;
dci_size[0]=dci_size[0]-1;
}
-// if ((format == format0_0) || (format == format1_0)) {
+ // if ((format == format0_0) || (format == format1_0)) {
// According to Section 7.3.1.1.1 in TS 38.212
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space for scheduling the same serving cell,
@@ -2630,9 +2498,9 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
//if (format == format0_0) {
dci_fields_sizes[PADDING_NR_DCI][0] = dci_size[2] - dci_size[0];
dci_size[0] = dci_size[2];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
+#endif
//}
}
// If DCI format 0_0 is monitored in common search space and if the number of information bits in the DCI format 0_0 prior to padding
@@ -2643,9 +2511,9 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
//if (format == format0_0) {
dci_fields_sizes[FREQ_DOM_RESOURCE_ASSIGNMENT_UL][0] -= (dci_size[0] - dci_size[2]);
dci_size[0] = dci_size[2];
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) new dci_size[format0_0]=%d\n",dci_size[0]);
+#endif
//}
}
@@ -2661,16 +2529,18 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
*
*/
-// }
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
- for (int j=0; j<NBR_NR_DCI_FIELDS; j++){
- printf("\t\t");
- for (int i=0; i<NBR_NR_FORMATS ; i++) printf("%d\t",dci_fields_sizes[j][i]);
- printf("\n");
- }
- printf(" }\n");
- #endif
+
+ // }
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_format_size) dci_fields_sizes[][] = { \n");
+ for (int j=0; j<NBR_NR_DCI_FIELDS; j++){
+ printf("\t\t");
+ for (int i=0; i<NBR_NR_FORMATS ; i++) printf("%d\t",dci_fields_sizes[j][i]);
+ printf("\n");
+ }
+ printf(" }\n");
+#endif
+
return dci_size[format];
}
@@ -2680,24 +2550,24 @@ uint8_t dci_size [8] = {0,0,0,0,0,0,0,0}; // will contain size for each format
#ifdef NR_PDCCH_DCI_RUN
uint8_t nr_dci_decoding_procedure(int s,
- int p,
- PHY_VARS_NR_UE *ue,
- NR_DCI_ALLOC_t *dci_alloc,
- NR_SEARCHSPACE_TYPE_t searchSpacetype,
- int16_t eNB_id,
- uint8_t nr_tti_rx,
- uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
- uint16_t n_RB_ULBWP,
- uint16_t n_RB_DLBWP,
- crc_scrambled_t *crc_scrambled,
- format_found_t *format_found,
- uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]) {
-// uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
+ int p,
+ PHY_VARS_NR_UE *ue,
+ NR_DCI_ALLOC_t *dci_alloc,
+ NR_SEARCHSPACE_TYPE_t searchSpacetype,
+ int16_t eNB_id,
+ uint8_t nr_tti_rx,
+ uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
+ uint16_t n_RB_ULBWP,
+ uint16_t n_RB_DLBWP,
+ crc_scrambled_t *crc_scrambled,
+ format_found_t *format_found,
+ uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]) {
+ // uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
- nr_tti_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
+ nr_tti_rx,n_RB_ULBWP,n_RB_DLBWP,*format_found);
+#endif
int do_common = (int)searchSpacetype;
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS];
@@ -2719,7 +2589,6 @@ uint8_t nr_dci_decoding_procedure(int s,
coreset_nbr_rb = 6 * coreset_nbr_rb;
// coreset_time_dur,coreset_nbr_rb,
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
- t_nrPolar_paramsPtr *nrPolar_params = &ue->nrPolar_params;
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
//uint8_t tmode = ue->transmission_mode[eNB_id];
@@ -2763,25 +2632,25 @@ uint8_t nr_dci_decoding_procedure(int s,
*/
//dci_detect_mode_t mode = 3; //dci_detect_mode_select(&ue->frame_parms, nr_tti_rx);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> searSpaceType=%d\n",do_common);
- if (do_common==0) {
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> css_dci_format=%d\n",css_dci_format);
- } else {
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> uss_dci_format=%d\n",uss_dci_format);
- }
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> searSpaceType=%d\n",do_common);
+ if (do_common==0) {
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> css_dci_format=%d\n",css_dci_format);
+ } else {
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> uss_dci_format=%d\n",uss_dci_format);
+ }
+#endif
// A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces
if (do_common==0) { // COMMON SearchSpaceType assigned to current SearchSpace/CORESET
// Type0-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
- // number of consecutive resource blocks and a number of consecutive symbols for
- // the control resource set of the Type0-PDCCH common search space from
- // the four most significant bits of RMSI-PDCCH-Config as described in Tables 13-1 through 13-10
- // and determines PDCCH monitoring occasions
- // from the four least significant bits of RMSI-PDCCH-Config,
- // included in MasterInformationBlock, as described in Tables 13-11 through 13-15
+ // number of consecutive resource blocks and a number of consecutive symbols for
+ // the control resource set of the Type0-PDCCH common search space from
+ // the four most significant bits of RMSI-PDCCH-Config as described in Tables 13-1 through 13-10
+ // and determines PDCCH monitoring occasions
+ // from the four least significant bits of RMSI-PDCCH-Config,
+ // included in MasterInformationBlock, as described in Tables 13-11 through 13-15
// Type0A-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
// Type1-PDCCH common search space for a DCI format with CRC scrambled by a RA-RNTI, or a TC-RNTI, or a C-RNTI
// Type2-PDCCH common search space for a DCI format with CRC scrambled by a P-RNTI
@@ -2802,32 +2671,32 @@ uint8_t nr_dci_decoding_procedure(int s,
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
- css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
+ css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
+#endif
for (int aggregationLevel = 3; aggregationLevel<4 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
- //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
- // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevel));
- #endif
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
- crc_scrambled_values, aggregationLevel,
- cformat0_0_and_1_0, uformat0_0_and_1_0,
- format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_, pdcch_DMRS_scrambling_id,&CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevel = 5;
- format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
+ //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
+ // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevel));
+#endif
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevel,
+ cformat0_0_and_1_0, uformat0_0_and_1_0,
+ format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_, pdcch_DMRS_scrambling_id,&CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevel = 5;
+ format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,crc_scrambled_,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0); // after decoding dci successfully we recalculate dci pdu size with correct crc scrambled to get the right field sizes
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
}
@@ -2837,120 +2706,120 @@ uint8_t nr_dci_decoding_procedure(int s,
// for format2_0, first we calculate dci pdu size
format_2_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_sfi_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,4);
format_2_0_size_bytes = (format_2_0_size_bits%8 == 0) ? (uint8_t)floor(format_2_0_size_bits/8) : (uint8_t)(floor(format_2_0_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_0_size_bits=%d, format2_0_size_bytes=%d\n",
- css_dci_format,format_2_0_size_bits,format_2_0_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_0_size_bits=%d, format2_0_size_bytes=%d\n",
+ css_dci_format,format_2_0_size_bits,format_2_0_size_bytes);
+#endif
for (int aggregationLevelSFI = 0; aggregationLevelSFI<5 ; aggregationLevelSFI++){
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevelSFI));
- #endif
- // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
- crc_scrambled_values, aggregationLevelSFI,
- cformat2_0, uformat0_0_and_1_0,
- format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevelSFI = 5;
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevelSFI));
+#endif
+ // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevelSFI,
+ cformat2_0, uformat0_0_and_1_0,
+ format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevelSFI = 5;
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
}
if (css_dci_format == cformat2_1) {
// for format2_1, first we calculate dci pdu size
format_2_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_int_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,5);
format_2_1_size_bytes = (format_2_1_size_bits%8 == 0) ? (uint8_t)floor(format_2_1_size_bits/8) : (uint8_t)(floor(format_2_1_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_1_size_bits=%d, format2_1_size_bytes=%d\n",
- css_dci_format,format_2_1_size_bits,format_2_1_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_1_size_bits=%d, format2_1_size_bytes=%d\n",
+ css_dci_format,format_2_1_size_bits,format_2_1_size_bytes);
+#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++){
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevel));
- #endif
- // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
- crc_scrambled_values, aggregationLevel,
- cformat2_1, uformat0_0_and_1_0,
- format_2_1_size_bits, format_2_1_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevel = 5;
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevel));
+#endif
+ // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevel,
+ cformat2_1, uformat0_0_and_1_0,
+ format_2_1_size_bits, format_2_1_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevel = 5;
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
}
if (css_dci_format == cformat2_2) {
// for format2_2, first we calculate dci pdu size
format_2_2_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_pucch_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,6);
format_2_2_size_bytes = (format_2_2_size_bits%8 == 0) ? (uint8_t)floor(format_2_2_size_bits/8) : (uint8_t)(floor(format_2_2_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_2_size_bits=%d, format2_2_size_bytes=%d\n",
- css_dci_format,format_2_2_size_bits,format_2_2_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_2_size_bits=%d, format2_2_size_bytes=%d\n",
+ css_dci_format,format_2_2_size_bits,format_2_2_size_bytes);
+#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++){
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevel));
- #endif
- // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
- crc_scrambled_values, aggregationLevel,
- cformat2_2, uformat0_0_and_1_0,
- format_2_2_size_bits, format_2_2_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevel = 5;
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevel));
+#endif
+ // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevel,
+ cformat2_2, uformat0_0_and_1_0,
+ format_2_2_size_bits, format_2_2_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevel = 5;
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
}
if (css_dci_format == cformat2_3) {
// for format2_1, first we calculate dci pdu size
format_2_3_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_tpc_srs_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,7);
format_2_3_size_bytes = (format_2_3_size_bits%8 == 0) ? (uint8_t)floor(format_2_3_size_bits/8) : (uint8_t)(floor(format_2_3_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_3_size_bits=%d, format2_3_size_bytes=%d\n",
- css_dci_format,format_2_3_size_bits,format_2_3_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for common searchSpaces with format css_dci_format=%d, format2_3_size_bits=%d, format2_3_size_bytes=%d\n",
+ css_dci_format,format_2_3_size_bits,format_2_3_size_bytes);
+#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++){
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevel));
- #endif
- // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
- crc_scrambled_values, aggregationLevel,
- cformat2_3, uformat0_0_and_1_0,
- format_2_3_size_bits, format_2_3_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevel = 5;
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevel));
+#endif
+ // for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevel,
+ cformat2_3, uformat0_0_and_1_0,
+ format_2_3_size_bits, format_2_3_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevel = 5;
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
}
@@ -2961,68 +2830,68 @@ uint8_t nr_dci_decoding_procedure(int s,
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_0_1_0_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,0);
format_0_0_1_0_size_bytes = (format_0_0_1_0_size_bits%8 == 0) ? (uint8_t)floor(format_0_0_1_0_size_bits/8) : (uint8_t)(floor(format_0_0_1_0_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
- css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_0_1_0_size_bits=%d, format_0_0_1_0_size_bytes=%d\n",
+ css_dci_format,format_0_0_1_0_size_bits,format_0_0_1_0_size_bytes);
+#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
- //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
- // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevel));
- #endif
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params,
- crc_scrambled_values, aggregationLevel,
- cformat0_0_and_1_0, uformat0_0_and_1_0,
- format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevel = 5;
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
- }
+ //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
+ // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevel));
+#endif
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevel,
+ cformat0_0_and_1_0, uformat0_0_and_1_0,
+ format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevel = 5;
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
+ }
if (uss_dci_format == uformat0_1_and_1_1) {
// for format0_0 and format1_0, first we calculate dci pdu size
format_0_1_1_1_size_bits = nr_dci_format_size(ue,eNB_id,nr_tti_rx,p,_c_rnti,n_RB_ULBWP,n_RB_DLBWP,dci_fields_sizes,1);
format_0_1_1_1_size_bytes = (format_0_1_1_1_size_bits%8 == 0) ? (uint8_t)floor(format_0_1_1_1_size_bits/8) : (uint8_t)(floor(format_0_1_1_1_size_bits/8) + 1);
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_1_1_1_size_bits=%d, format_0_1_1_1_size_bytes=%d\n",
- css_dci_format,format_0_1_1_1_size_bits,format_0_1_1_1_size_bytes);
- #endif
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> calculating dci format size for UE-specific searchSpaces with format uss_dci_format=%d, format_0_1_1_1_size_bits=%d, format_0_1_1_1_size_bytes=%d\n",
+ css_dci_format,format_0_1_1_1_size_bits,format_0_1_1_1_size_bytes);
+#endif
for (int aggregationLevel = 0; aggregationLevel<5 ; aggregationLevel++) { // We fix aggregationLevel to 3 for testing=> nbr of CCE=8
- //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
- // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
- #ifdef NR_PDCCH_DCI_DEBUG
- printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
- css_dci_format,(1<<aggregationLevel));
- #endif
- old_dci_cnt = dci_cnt;
- nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params,
- crc_scrambled_values, aggregationLevel,
- cformat0_0_and_1_0, uformat0_1_and_1_1,
- format_0_1_1_1_size_bits, format_0_1_1_1_size_bytes, &dci_cnt,
- &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
- if (dci_cnt != old_dci_cnt){
- // we will exit the loop as we have found the DCI
- aggregationLevel = 5;
- old_dci_cnt = dci_cnt;
- for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
- for (int j=0; j<NBR_NR_FORMATS; j++)
- dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
- }
- }
+ //for (int aggregationLevel = 2; aggregationLevel<5 ; aggregationLevel++) {
+ // for aggregation level aggregationLevel. The number of candidates (for L2= 2^aggregationLevel) will be calculated in function nr_dci_decoding_procedure0
+#ifdef NR_PDCCH_DCI_DEBUG
+ printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> common searchSpaces with format css_dci_format=%d and aggregation_level=%d\n",
+ css_dci_format,(1<<aggregationLevel));
+#endif
+ old_dci_cnt = dci_cnt;
+ nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,
+ crc_scrambled_values, aggregationLevel,
+ cformat0_0_and_1_0, uformat0_1_and_1_1,
+ format_0_1_1_1_size_bits, format_0_1_1_1_size_bytes, &dci_cnt,
+ &crc_scrambled_, &format_found_,pdcch_DMRS_scrambling_id, &CCEmap0, &CCEmap1, &CCEmap2);
+ if (dci_cnt != old_dci_cnt){
+ // we will exit the loop as we have found the DCI
+ aggregationLevel = 5;
+ old_dci_cnt = dci_cnt;
+ for (int i=0; i<NBR_NR_DCI_FIELDS; i++)
+ for (int j=0; j<NBR_NR_FORMATS; j++)
+ dci_fields_sizes_cnt[dci_cnt-1][i][j]=dci_fields_sizes[i][j];
+ }
}
}
- *crc_scrambled = crc_scrambled_;
- *format_found = format_found_;
+ }
+ *crc_scrambled = crc_scrambled_;
+ *format_found = format_found_;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure)-> at the end crc_scrambled=%d and format_found=%d\n",*crc_scrambled,*format_found);
#endif
diff --git a/openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c b/openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
index 61e40b82e4f5ed0385514ed581e3253580230839..1eafbfb7dcc1b5e355272c00145b252f92834142 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
@@ -30,6 +30,7 @@
* \warning
*/
//#include "PHY/defs.h"
+#include <stdint.h>
#include "PHY/defs_nr_UE.h"
//#include "PHY/NR_TRANSPORT/nr_dci.h"
//#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
@@ -67,18 +68,28 @@ uint16_t nr_dci_field(uint32_t dci_pdu[4],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS],
uint8_t dci_field)
{
- uint16_t field_value = 0 ;
+ // uint16_t field_value = 0 ;
// first_bit_position contains the position of the first bit of the corresponding field within the dci pdu payload
- uint16_t first_bit_position = 0;
+
// last_bit_position contains the position of the last bit of the corresponding field within the dci pdu payload
- uint16_t last_bit_position = 0;
- uint8_t bit=0;
+ // uint16_t last_bit_position = 0;
+ // uint8_t bit=0;
//printf("\tdci_field=%d, \tsize=%d \t|",dci_field,dci_fields_sizes[dci_field]);
- for (int i=0; i<dci_field ; i++){
- first_bit_position = first_bit_position + dci_fields_sizes[i];
+ int dci_size=0;
+
+ for (int i=0;i<NBR_NR_DCI_FIELDS;i++) dci_size+=dci_fields_sizes[i];
+
+ AssertFatal(dci_size<65,"DCI has %d > 64 bits, not supported for now\n",
+ dci_size);
+
+ uint16_t first_bit_position = dci_size;
+
+ for (int i=0; i<=dci_field ; i++){
+ first_bit_position = first_bit_position - dci_fields_sizes[i];
}
- last_bit_position = first_bit_position + dci_fields_sizes[dci_field];
+ // last_bit_position = first_bit_position + dci_fields_sizes[dci_field];
//printf("\tfirst_bit=%d,\tlast_bit=%d",first_bit_position,last_bit_position);
+ /*
for (int i=0; i<4; i++)
for (int j=0; j<32; j++){
if ((((i*32)+j) >= first_bit_position) && (((i*32)+j) < last_bit_position)){
@@ -87,7 +98,14 @@ uint16_t nr_dci_field(uint32_t dci_pdu[4],
//printf(" bit(%d)=%d[%d] ",(i*32)+j,bit,field_value);
}
}
- return field_value;
+ */
+
+ uint64_t *dci_pdu64=(uint64_t*)&dci_pdu[0];
+ /*
+ printf("pdu %llx, field %d, pos %d, size %d => %u\n",(long long unsigned int)*dci_pdu64,dci_field,first_bit_position,dci_fields_sizes[dci_field],
+ (unsigned int)((*dci_pdu64>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1)));*/
+
+ return (uint16_t)((*dci_pdu64>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1));
}
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
index 02ea89eb5508bcc9afb3231a52c2d66eb5ad4dfb..610b8305df8a014cca0f26d7f7d3fe2fb2cc2741 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
@@ -35,6 +35,7 @@
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/coding_defs.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
+#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "SCHED_NR_UE/defs.h"
#include "SIMULATION/TOOLS/sim.h"
@@ -196,7 +197,7 @@ void nr_dlsch_unscrambling(int16_t* llr,
}
-uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
+uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
index 2e00c128b3c914dae4546a3f6f410eb5c50ea69c..a9f6b02567c171a59225472bcd6412f62a7056d0 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
@@ -131,10 +131,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_pdsch = 50;
int16_t *pllr_symbol_cw0;
int16_t *pllr_symbol_cw1;
- int16_t *pllr_symbol_cw0_deint;
- int16_t *pllr_symbol_cw1_deint;
+ //int16_t *pllr_symbol_cw0_deint;
+ //int16_t *pllr_symbol_cw1_deint;
uint32_t llr_offset_symbol;
- uint16_t bundle_L = 2;
+ //uint16_t bundle_L = 2;
uint8_t l0 =2;
switch (type) {
@@ -2001,7 +2001,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
unsigned short k,rb;
- unsigned char i,aarx,l; //,nsymb,sss_symb,pss_symb=0;
+ unsigned char i,aarx; //,nsymb,sss_symb,pss_symb=0,l;
int *dl_ch0,*dl_ch0_ext,*rxF,*rxF_ext;
@@ -2010,7 +2010,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
//symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pilots = (symbol==2) ? 1 : 0; //to updated from config
- l=symbol;
+ //l=symbol;
//nsymb = (frame_parms->Ncp==NORMAL) ? 14:12;
k = frame_parms->first_carrier_offset + 516; //0
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
index 50a283f465e815ca8a0306139af4df7b267866cb..4a6e6423f61698c7d7375a0385ae2b8a645ddb44 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
@@ -140,7 +140,7 @@ char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
- int32_t sync_pos, sync_pos2, sync_pos_slot; // k_ssb, N_ssb_crb,
+ int32_t sync_pos, sync_pos_slot; // k_ssb, N_ssb_crb, sync_pos2,
int32_t metric_tdd_ncp=0;
uint8_t phase_tdd_ncp;
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c b/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
index 2fdbd288b82282d5ffc410df3e896cd4a62d58ca..a0b150eda14add4a657f2deb0ae85d02855872ae 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
@@ -51,8 +51,8 @@ uint16_t nr_pbch_extract(int **rxdataF,
int **rxdataF_ext,
int **dl_ch_estimates_ext,
uint32_t symbol,
+ uint32_t s_offset,
uint32_t high_speed_flag,
- int is_synchronized,
NR_DL_FRAME_PARMS *frame_parms)
{
@@ -65,18 +65,15 @@ uint16_t nr_pbch_extract(int **rxdataF,
unsigned int rx_offset = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier; //and
if (rx_offset>= frame_parms->ofdm_symbol_size) rx_offset-=frame_parms->ofdm_symbol_size;
- int s_offset=0;
AssertFatal(symbol>=1 && symbol<5,
"symbol %d illegal for PBCH extraction\n",
symbol);
- if (is_synchronized==1) s_offset=4;
-
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
rxF = &rxdataF[aarx][(symbol+s_offset)*frame_parms->ofdm_symbol_size];
- rxF_ext = &rxdataF_ext[aarx][(symbol+s_offset)*(20*12)];
+ rxF_ext = &rxdataF_ext[aarx][symbol*20*12];
#ifdef DEBUG_PBCH
printf("extract_rbs (nushift %d): rx_offset=%d, symbol %d\n",frame_parms->nushift,
(rx_offset + ((symbol+s_offset)*(frame_parms->ofdm_symbol_size))),symbol);
@@ -143,7 +140,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
//printf("dl_ch0 addr %p\n",dl_ch0);
- dl_ch0_ext = &dl_ch_estimates_ext[aarx][(symbol+s_offset)*(20*12)];
+ dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol*20*12];
for (rb=0; rb<20; rb++) {
j=0;
@@ -268,8 +265,7 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
int **dl_ch_estimates_ext,
int **rxdataF_comp,
NR_DL_FRAME_PARMS *frame_parms,
- uint8_t symbol,
- int is_synchronized,
+ uint32_t symbol,
uint8_t output_shift)
{
@@ -290,14 +286,11 @@ void nr_pbch_channel_compensation(int **rxdataF_ext,
#endif
- AssertFatal((symbol > 0 && symbol < 4 && is_synchronized == 0) ||
- (symbol > 4 && symbol < 8 && is_synchronized == 1),
- "symbol %d is illegal for PBCH DM-RS (is_synchronized %d)\n",
- symbol,is_synchronized);
-
-
+ AssertFatal((symbol > 0 && symbol < 4),
+ "symbol %d is illegal for PBCH DM-RS\n",
+ symbol);
- if (symbol == 2 || symbol == 6) nb_re = 72;
+ if (symbol == 2) nb_re = 72;
// printf("comp: symbol %d : nb_re %d\n",symbol,nb_re);
@@ -516,7 +509,7 @@ unsigned char sign(int8_t x) {
*/
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,7,29,25,27,5,8,24,9,10,11,12,13,1,4,3,14,15,16,17,2,26,18,19,20,21,22,6,23};
-
+
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
@@ -530,10 +523,10 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int max_h=0;
- int symbol,i;
+ int symbol;
//uint8_t pbch_a[64];
uint8_t *pbch_a = malloc(sizeof(uint8_t) * 32);
- uint32_t pbch_a_prime;
+ //uint32_t pbch_a_prime;
int16_t *pbch_e_rx;
uint8_t *decoded_output = nr_ue_pbch_vars->decoded_output;
uint8_t nushift;
@@ -541,12 +534,12 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t Lmax=8; //to update
uint8_t ssb_index=0;
//uint16_t crc;
- unsigned short idx_demod =0;
- int8_t decoderState=0;
- uint8_t decoderListSize = 8, pathMetricAppr = 0;
+ //unsigned short idx_demod =0;
+ uint32_t decoderState=0;
+ //uint8_t decoderListSize = 8, pathMetricAppr = 0;
- time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
- time_stats_t path_metric,sorting,update_LLR;
+ //time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
+ //time_stats_t path_metric,sorting,update_LLR;
memset(&pbch_a[0], 0, sizeof(uint8_t) * NR_POLAR_PBCH_PAYLOAD_BITS);
//printf("nr_pbch_ue nid_cell %d\n",frame_parms->Nid_cell);
@@ -559,31 +552,35 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
// clear LLR buffer
memset(nr_ue_pbch_vars->llr,0,NR_POLAR_PBCH_E);
- int first_symbol=1;
- if (ue->is_synchronized > 0) first_symbol+=4;
+ int symbol_offset=1;
+ if (ue->is_synchronized > 0)
+ symbol_offset=4;
+ else
+ symbol_offset=0;
#ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch",
- &nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF[0][first_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
+ &nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif
- for (symbol=first_symbol; symbol<(first_symbol+3); symbol++) {
+ // symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
+ for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,
nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].dl_ch_estimates[eNB_id],
nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext,
- symbol-first_symbol+1,
+ symbol,
+ symbol_offset,
high_speed_flag,
- ue->is_synchronized,
frame_parms);
#ifdef DEBUG_PBCH
LOG_I(PHY,"[PHY] PBCH Symbol %d ofdm size %d\n",symbol, frame_parms->ofdm_symbol_size );
LOG_I(PHY,"[PHY] PBCH starting channel_level\n");
#endif
- if (symbol == 1 || symbol == 5) {
+ if (symbol == 1) {
max_h = nr_pbch_channel_level(nr_ue_pbch_vars->dl_ch_estimates_ext,
frame_parms,
symbol);
@@ -599,7 +596,6 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_ue_pbch_vars->rxdataF_comp,
frame_parms,
symbol,
- ue->is_synchronized,
nr_ue_pbch_vars->log2_maxh); // log2_maxh+I0_shift
/*if (frame_parms->nb_antennas_rx > 1)
@@ -615,7 +611,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
return(-1);
}
*/
- if (symbol==(first_symbol+1)) {
+ if (symbol==1) {
nr_pbch_quantize(pbch_e_rx,
(short*)&(nr_ue_pbch_vars->rxdataF_comp[0][symbol*240]),
144);
@@ -633,7 +629,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
}
#ifdef DEBUG_PBCH
- write_output("rxdataF_comp.m","rxFcomp",&nr_ue_pbch_vars->rxdataF_comp[0][240*first_symbol],240*3,1,1);
+ write_output("rxdataF_comp.m","rxFcomp",&nr_ue_pbch_vars->rxdataF_comp[0][240],240*3,1,1);
#endif
@@ -644,7 +640,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#ifdef DEBUG_PBCH
//pbch_e_rx = &nr_ue_pbch_vars->llr[0];
- short *p = (short *)&(nr_ue_pbch_vars->rxdataF_comp[0][first_symbol*20*12]);
+ short *p = (short *)&(nr_ue_pbch_vars->rxdataF_comp[0][20*12]);
for (int cnt = 0; cnt < 864 ; cnt++)
printf("pbch rx llr %d\n",*(pbch_e_rx+cnt));
@@ -661,18 +657,27 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//polar decoding de-rate matching
+ nr_polar_init(&nr_ue_pbch_vars->nrPolar_params,
+ NR_POLAR_PBCH_MESSAGE_TYPE,
+ NR_POLAR_PBCH_PAYLOAD_BITS,
+ NR_POLAR_PBCH_AGGREGATION_LEVEL);
- AssertFatal(ue->nrPolar_params != NULL,"ue->nrPolar_params is null\n");
+ AssertFatal(nr_ue_pbch_vars->nrPolar_params != NULL,"nr_ue_pbch_vars->nrPolar_params is null\n");
- t_nrPolar_params *currentPtr = nr_polar_params(ue->nrPolar_params, NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
+ t_nrPolar_params *currentPtr = nr_polar_params(nr_ue_pbch_vars->nrPolar_params, NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL);
- decoderState = polar_decoder_int16(pbch_e_rx,(uint8_t*)&nr_ue_pbch_vars->pbch_a_prime,currentPtr);
+ decoderState = polar_decoder_int16(pbch_e_rx,(uint64_t*)&nr_ue_pbch_vars->pbch_a_prime,currentPtr);
+
+ if(decoderState) return(decoderState);
+
+ // printf("polar decoder output 0x%08x\n",nr_ue_pbch_vars->pbch_a_prime);
+ // Decoder reversal
+ uint32_t a_reversed=0;
+ for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
+ a_reversed |= (((uint64_t)nr_ue_pbch_vars->pbch_a_prime>>i)&1)<<(31-i);
- if(decoderState == -1)
- return(decoderState);
-
- //printf("polar decoder output 0x%08x\n",nr_ue_pbch_vars->pbch_a_prime);
+ nr_ue_pbch_vars->pbch_a_prime = a_reversed;
//payload un-scrambling
memset(&nr_ue_pbch_vars->pbch_a_interleaved, 0, sizeof(uint32_t) );
@@ -711,14 +716,13 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
- ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
- ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
- ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
- ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[0];
- ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = xtra_byte;
- ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
- ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
- ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
+ ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
+ ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0];
+ ue->rx_ind.rx_indication_body[0].mib_pdu.additional_bits = xtra_byte;
+ ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_index = ssb_index; // confirm with TCL
+ ue->rx_ind.rx_indication_body[0].mib_pdu.ssb_length = Lmax; // confirm with TCL
+ ue->rx_ind.rx_indication_body[0].mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
+ ue->rx_ind.number_pdus = 1;
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&ue->dl_indication);
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_prach.c b/openair1/PHY/NR_UE_TRANSPORT/nr_prach.c
index 0a662304dd84d57f6961b2ecd4d4a656dba02dfa..9c7146ca036a70c35eaac960b21a83ff790f9e2f 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_prach.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_prach.c
@@ -40,6 +40,7 @@
//#include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/NR_UE_TRANSPORT/nr_prach.h"
+#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
//#include "PHY/extern.h"
//#include "LAYER2/MAC/extern.h"
//#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
@@ -574,7 +575,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
uint8_t restricted_set = ue->frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag;
//uint8_t n_ra_prboffset = ue->frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset;
uint8_t preamble_index = ue->prach_resources[eNB_id]->ra_PreambleIndex;
- uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
+ //uint8_t tdd_mapindex = ue->prach_resources[eNB_id]->ra_TDD_map_index;
int16_t *prachF = ue->prach_vars[eNB_id]->prachF;
static int16_t prach_tmp[45600*2] __attribute__((aligned(32)));
int16_t *prach = prach_tmp;
@@ -582,7 +583,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
int16_t amp = ue->prach_vars[eNB_id]->amp;
int16_t Ncp;
uint8_t n_ra_prb;
- uint16_t NCS;
+ uint16_t NCS=0;
uint16_t *prach_root_sequence_map;
uint16_t preamble_offset,preamble_shift;
uint16_t preamble_index0,n_shift_ra,n_shift_ra_bar;
@@ -599,7 +600,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
int32_t Xu_re,Xu_im;
uint16_t offset,offset2;
int prach_start;
- int i, prach_len;
+ int i, prach_len=0;
uint16_t first_nonzero_root_idx=0;
#if defined(EXMIMO) || defined(OAI_USRP)
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
index 6f824e050f9bb6f3815e0183818678666e676be3..3c272b9c17341183ba3fe71a5ab8d7a9c2b1feed 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
@@ -1652,7 +1652,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t tdd_mapindex, uint16_t Nf);
void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8_t nr_tti_rx,
- uint16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common);
+ int16_t *z, uint32_t length, uint16_t pdcch_DMRS_scrambling_id, int do_common);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
diff --git a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
index 5ac83b52808a5531c229a7d87ad57340c107ac2c..01481d36120049a81cfa6a060f3b1bebe0d6ac73 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
@@ -862,8 +862,8 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
//((short*)pss_corr_ue[pss_index])[2*n] += ((short*) &result)[0]; /* real part */
//((short*)pss_corr_ue[pss_index])[2*n+1] += ((short*) &result)[1]; /* imaginary part */
- //((short*)&synchro_out)[0] += ((short*) &result)[0]; /* real part */
- //((short*)&synchro_out)[1] += ((short*) &result)[1]; /* imaginary part */
+ //((short*)&synchro_out)[0] += ((int*) &result)[0]; /* real part */
+ //((short*)&synchro_out)[1] += ((int*) &result)[1]; /* imaginary part */
}
}
diff --git a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
index e2accc340b56d8c9dba75e8fa4c98e24a2a6ce13..05ab023b00acc381f26a60bd1330c70c8b671a92 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
@@ -36,6 +36,7 @@
//#include "PHY/extern.h"
//#include "LAYER2/MAC/extern.h"
#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
+#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
@@ -129,7 +130,7 @@ double nr_cyclic_shift_hopping(PHY_VARS_NR_UE *ue,
*/
// alpha_init initialized to 2*PI/12=0.5235987756
double alpha = 0.5235987756;
- uint16_t c_init = ue->pucch_config_common_nr->hoppingId; // we initialize c_init again to calculate n_cs
+ uint32_t c_init = ue->pucch_config_common_nr->hoppingId; // we initialize c_init again to calculate n_cs
#ifdef DEBUG_NR_PUCCH_TX
// initialization to be removed
@@ -181,9 +182,9 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
// alpha is cyclic shift
double alpha;
// lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission
- uint8_t lnormal;
+ //uint8_t lnormal;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
- uint8_t lprime;
+ //uint8_t lprime;
// mcs is provided by TC 38.213 subclauses 9.2.3, 9.2.4, 9.2.5 FIXME!
//uint8_t mcs;
@@ -198,7 +199,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
* x(l*12+n) = r_u_v_alpha_delta(n)
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
- uint8_t u=0,v=0,delta=0;
+ uint8_t u=0,v=0;//,delta=0;
// if frequency hopping is disabled by the higher-layer parameter PUCCH-frequency-hopping
// n_hop = 0
// if frequency hopping is enabled by the higher-layer parameter PUCCH-frequency-hopping
@@ -236,8 +237,8 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
/*
* Implementing TS 38.211 Subclause 6.3.2.3.2 Mapping to physical resources FIXME!
*/
- int32_t *txptr;
- uint32_t re_offset;
+ //int32_t *txptr;
+ uint32_t re_offset=0;
for (int l=0; l<nrofSymbols; l++) {
if ((startingPRB < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset;
@@ -254,7 +255,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
if ((startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*startingPRB) + frame_parms->first_carrier_offset;
}
- txptr = &txdataF[0][re_offset];
+ //txptr = &txdataF[0][re_offset];
for (int n=0; n<12; n++){
if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) {
// if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB)
@@ -299,7 +300,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
*
*/
// complex-valued symbol d_re, d_im containing complex-valued symbol d(0):
- int16_t d_re, d_im;
+ int16_t d_re=0, d_im=0;
if (nr_bit == 1) { // using BPSK if M_bit=1 according to TC 38.211 Subclause 5.1.2
d_re = (payload&1)==0 ? (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15) : -(int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
d_im = (payload&1)==0 ? (int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15) : -(int16_t)(((int32_t)amp*ONE_OVER_SQRT2)>>15);
@@ -332,7 +333,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
// alpha is cyclic shift
double alpha;
// lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission
- uint8_t lnormal = 0 ;
+ //uint8_t lnormal = 0 ;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
uint8_t lprime = startingSymbolIndex;
// mcs = 0 except for PUCCH format 0
@@ -350,7 +351,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
* the complex-valued symbol d_0 shall be multiplied with a sequence r_u_v_alpha_delta(n): y(n) = d_0 * r_u_v_alpha_delta(n)
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
- uint8_t u=0,v=0,delta=0;
+ uint8_t u=0,v=0;//,delta=0;
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -371,8 +372,8 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
/*
* Implementing TS 38.211 Subclause 6.3.2.4.2 Mapping to physical resources
*/
- int32_t *txptr;
- uint32_t re_offset;
+ //int32_t *txptr;
+ uint32_t re_offset=0;
int i=0;
#define MAX_SIZE_Z 168 // this value has to be calculated from mprime*12*table_6_3_2_4_1_1_N_SF_mprime_PUCCH_1_noHop[pucch_symbol_length]+m*12+n
int16_t z_re[MAX_SIZE_Z],z_im[MAX_SIZE_Z];
@@ -552,7 +553,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
}
- txptr = &txdataF[0][re_offset];
+ //txptr = &txdataF[0][re_offset];
for (int n=0; n<12; n++){
if ((n==6) && (startingPRB == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) {
// if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB)
@@ -904,7 +905,7 @@ void nr_uci_encoding(uint64_t payload,
// L is the CRC size
uint8_t L;
// E is the rate matching output sequence length as given in TS 38.212 subclause 6.3.1.4.1
- uint16_t E,E_init;
+ uint16_t E=0,E_init;
if (fmt == pucch_format2_nr) E = 16*nrofSymbols*nrofPRB;
if (fmt == pucch_format3_nr){
E_init = (is_pi_over_2_bpsk_enabled == 0) ? 24:12;
@@ -1061,8 +1062,8 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
/*
* Implementing TS 38.211 Subclause 6.3.2.5.3 Mapping to physical resources
*/
- int32_t *txptr;
- uint32_t re_offset;
+ //int32_t *txptr;
+ uint32_t re_offset=0;
uint32_t x1, x2, s=0;
int i=0;
int m=0;
@@ -1086,7 +1087,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
if (((rb+startingPRB) == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) { // if number RBs in bandwidth is odd and current PRB contains DC
re_offset = ((l+startingSymbolIndex)*frame_parms->ofdm_symbol_size) + (12*(rb+startingPRB)) + frame_parms->first_carrier_offset;
}
- txptr = &txdataF[0][re_offset];
+ //txptr = &txdataF[0][re_offset];
int k=0;
int kk=0;
for (int n=0; n<12; n++){
@@ -1286,7 +1287,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
{0, 0, 0,-1,-1,-1, 0, 0, 0, 1, 1, 1},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 1, 1, 1, 0, 0, 0,-1,-1,-1}};
- uint8_t occ_Length = occ_length_format4; // higher layer parameter occ-Length
+ //uint8_t occ_Length = occ_length_format4; // higher layer parameter occ-Length
uint8_t occ_Index = occ_index_format4; // higher layer parameter occ-Index
//occ_Index = 1; //only for testing purposes; to be removed FIXME!!!
if (fmt == pucch_format3_nr){ // no block-wise spreading for format 3
@@ -1377,7 +1378,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
* Implementing TS 38.211 Subclauses 6.3.2.5.3 and 6.3.2.6.5 Mapping to physical resources
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
- uint8_t u=0,v=0,delta=0;
+ uint8_t u=0,v=0;//,delta=0;
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -1385,9 +1386,9 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
// n_hop = 1 for second hop
uint8_t n_hop = 0;
// lnormal is the OFDM symbol number in the PUCCH transmission where l=0 corresponds to the first OFDM symbol of the PUCCH transmission
- uint8_t lnormal = 0 ;
+ //uint8_t lnormal = 0 ;
// lprime is the index of the OFDM symbol in the slot that corresponds to the first OFDM symbol of the PUCCH transmission in the slot given by [5, TS 38.213]
- uint8_t lprime = startingSymbolIndex;
+ //uint8_t lprime = startingSymbolIndex;
// m0 is the cyclic shift index calculated depending on the Orthogonal sequence index n, according to table 6.4.1.3.3.1-1 from TS 38.211 subclause 6.4.1.3.3.1
uint8_t m0;
uint8_t mcs=0;
@@ -1404,13 +1405,13 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
uint8_t N_ZC = 12*nrofPRB;
int16_t *r_u_v_base_re = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_base_im = malloc(sizeof(int16_t)*12*nrofPRB);
- int16_t *r_u_v_alpha_delta_re = malloc(sizeof(int16_t)*12*nrofPRB);
- int16_t *r_u_v_alpha_delta_im = malloc(sizeof(int16_t)*12*nrofPRB);
+ //int16_t *r_u_v_alpha_delta_re = malloc(sizeof(int16_t)*12*nrofPRB);
+ //int16_t *r_u_v_alpha_delta_im = malloc(sizeof(int16_t)*12*nrofPRB);
// Next we proceed to mapping to physical resources according to TS 38.211, subclause 6.3.2.6.5 dor PUCCH formats 3 and 4 and subclause 6.4.1.3.3.2 for DM-RS
- int32_t *txptr;
- uint32_t re_offset;
- uint32_t x1, x2, s=0;
+ //int32_t *txptr;
+ uint32_t re_offset=0;
+ //uint32_t x1, x2, s=0;
// intraSlotFrequencyHopping
// uint8_t intraSlotFrequencyHopping = 0;
uint8_t table_6_4_1_3_3_2_1_dmrs_positions[11][14] ={
@@ -1513,7 +1514,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_NR_PUCCH_TX
printf("re_offset=%d,(rb+startingPRB)=%d\n",re_offset,(rb+startingPRB));
#endif
- txptr = &txdataF[0][re_offset];
+ //txptr = &txdataF[0][re_offset];
for (int n=0; n<12; n++){
if ((n==6) && ((rb+startingPRB) == (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 1)) {
// if number RBs in bandwidth is odd and current PRB contains DC, we need to recalculate the offset when n=6 (for second half PRB)
diff --git a/openair1/PHY/defs_RU.h b/openair1/PHY/defs_RU.h
index 3ad007813e5dbcb0b2a2c63fd5cac26628964bc5..585f28f90fbce0e0f421d8b17564b4c6a1a1eb81 100644
--- a/openair1/PHY/defs_RU.h
+++ b/openair1/PHY/defs_RU.h
@@ -120,10 +120,10 @@ typedef struct RU_proc_t_s {
openair0_timestamp timestamp_rx;
/// timestamp to send to "slave rru"
openair0_timestamp timestamp_tx;
- /// subframe to act upon for reception
- int subframe_rx;
- /// subframe to act upon for transmission
- int subframe_tx;
+ /// subframe (LTE) / slot (NR) to act upon for reception
+ int tti_rx;
+ /// subframe (LTE) / slot (NR) to act upon for transmission
+ int tti_tx;
/// subframe to act upon for reception of prach
int subframe_prach;
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
@@ -420,7 +420,7 @@ typedef struct RU_t_s{
/// function pointer to NB entry routine
void (*eNB_top)(struct PHY_VARS_eNB_s *eNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru);
- void (*gNB_top)(struct PHY_VARS_gNB_s *gNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru);
+ void (*gNB_top)(struct PHY_VARS_gNB_s *gNB, int frame_rx, int slot_rx, char *string, struct RU_t_s *ru);
/// Timing statistics
time_stats_t ofdm_demod_stats;
diff --git a/openair1/PHY/defs_gNB.h b/openair1/PHY/defs_gNB.h
index d28f650da6f7c39d075694d1172736ad5a0d2a3d..24a9fd45c825494f535f507f12f6b8ce3cb4971d 100644
--- a/openair1/PHY/defs_gNB.h
+++ b/openair1/PHY/defs_gNB.h
@@ -69,7 +69,7 @@ typedef struct {
/// CCE list
nr_cce_t cce_list[NR_MAX_PDCCH_AGG_LEVEL];
/// DCI pdu
- uint32_t dci_pdu[4];
+ uint64_t dci_pdu[2];
} NR_gNB_DCI_ALLOC_t;
typedef struct {
@@ -178,16 +178,16 @@ typedef struct {
} NR_gNB_COMMON;
-/// Context data structure for RX/TX portion of subframe processing
+/// Context data structure for RX/TX portion of slot processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
- /// subframe to act upon for transmission
- int subframe_tx;
- /// subframe to act upon for reception
- int subframe_rx;
+ /// slot to act upon for transmission
+ int slot_tx;
+ /// slot to act upon for reception
+ int slot_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
@@ -215,7 +215,7 @@ typedef struct {
} gNB_L1_rxtx_proc_t;
-/// Context data structure for eNB subframe processing
+/// Context data structure for eNB slot processing
typedef struct gNB_L1_proc_t_s {
/// Component Carrier index
uint8_t CC_id;
@@ -225,10 +225,10 @@ typedef struct gNB_L1_proc_t_s {
openair0_timestamp timestamp_rx;
/// timestamp to send to "slave rru"
openair0_timestamp timestamp_tx;
- /// subframe to act upon for reception
- int subframe_rx;
- /// subframe to act upon for PRACH
- int subframe_prach;
+ /// slot to act upon for reception
+ int slot_rx;
+ /// slot to act upon for PRACH
+ int slot_prach;
/// frame to act upon for reception
int frame_rx;
/// frame to act upon for transmission
@@ -392,7 +392,6 @@ typedef struct PHY_VARS_gNB_s {
NR_gNB_PDCCH pdcch_vars;
NR_gNB_PBCH pbch;
t_nrPolar_paramsPtr nrPolar_params;
- nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_type0_params;
LTE_eNB_PHICH phich_vars[2];
NR_gNB_COMMON common_vars;
@@ -490,7 +489,7 @@ typedef struct PHY_VARS_gNB_s {
/// cba_last successful reception for each group, used for collision detection
uint8_t cba_last_reception[4];
- // Pointers for active physicalConfigDedicated to be applied in current subframe
+ // Pointers for active physicalConfigDedicated to be applied in current slot
struct PhysicalConfigDedicated *physicalConfigDedicated[NUMBER_OF_UE_MAX];
diff --git a/openair1/PHY/defs_nr_UE.h b/openair1/PHY/defs_nr_UE.h
index 9dfcacb6114495ed06609d6e505ccb50a28fe61b..c11ba8933f561c9a3cf75128da013185ef6e5e97 100644
--- a/openair1/PHY/defs_nr_UE.h
+++ b/openair1/PHY/defs_nr_UE.h
@@ -863,16 +863,16 @@ typedef struct {
int32_t **rho;
/// \brief Pointer to llrs, 4-bit resolution.
/// - first index: ? [0..48*N_RB_DL[
- uint16_t *llr;
+ int16_t *llr;
/// \brief Pointer to llrs, 16-bit resolution.
/// - first index: ? [0..96*N_RB_DL[
- uint16_t *llr16;
+ int16_t *llr16;
/// \brief \f$\overline{w}\f$ from 36-211.
/// - first index: ? [0..48*N_RB_DL[
- uint16_t *wbar;
+ int16_t *wbar;
/// \brief PDCCH/DCI e-sequence (input to rate matching).
/// - first index: ? [0..96*N_RB_DL[
- int8_t *e_rx;
+ int16_t *e_rx;
/// number of PDCCH symbols in current subframe
uint8_t num_pdcch_symbols;
/// Allocated CRNTI for UE
@@ -892,6 +892,7 @@ typedef struct {
//Check for specific DCIFormat and AgregationLevel
uint8_t dciFormat;
uint8_t agregationLevel;
+ t_nrPolar_paramsPtr nrPolar_params;
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
@@ -900,6 +901,7 @@ typedef struct {
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
+ int n_RB_BWP[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
} NR_UE_PDCCH;
@@ -931,6 +933,8 @@ typedef struct {
/// \brief Pointer to PBCH decoded output.
/// - first index: ? [0..63] (hard coded)
uint8_t *decoded_output;
+ /// polar decoder parameters
+ t_nrPolar_paramsPtr nrPolar_params;
/// \brief Total number of PDU errors.
uint32_t pdu_errors;
/// \brief Total number of PDU errors 128 frames ago.
@@ -1017,7 +1021,12 @@ typedef struct {
nr_ue_if_module_t *if_inst;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
+ /// UE FAPI DCI request
+ nr_dcireq_t dcireq;
+
+ /// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind;
+ /// UE FAPI indication for DCI reception
fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
@@ -1061,7 +1070,7 @@ typedef struct {
uint32_t dmrs_pbch_bitmap_nr[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE];
#endif
- t_nrPolar_params *nrPolar_params;
+
/// PBCH DMRS sequence
uint32_t nr_gold_pbch[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
diff --git a/openair1/PHY/defs_nr_common.h b/openair1/PHY/defs_nr_common.h
index 25280d18ca56cc561d8448b666c77171062ae668..58a8833b18aa0d4cc0ba3066e3de583a4a5451ac 100644
--- a/openair1/PHY/defs_nr_common.h
+++ b/openair1/PHY/defs_nr_common.h
@@ -40,6 +40,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#define nr_subframe_t lte_subframe_t
+#define nr_slot_t lte_subframe_t
#define MAX_NUM_SUBCARRIER_SPACING 5
@@ -256,15 +257,19 @@ typedef struct NR_DL_FRAME_PARMS {
uint16_t slots_per_frame;
/// Number of samples in a subframe
uint32_t samples_per_subframe;
+ /// Number of samples in a slot
+ uint32_t samples_per_slot;
/// Number of OFDM/SC-FDMA symbols in one subframe (to be modified to account for potential different in UL/DL)
uint16_t symbols_per_tti;
/// Number of samples in a radio frame
uint32_t samples_per_frame;
/// Number of samples in a subframe without CP
uint32_t samples_per_subframe_wCP;
+ /// Number of samples in a slot without CP
+ uint32_t samples_per_slot_wCP;
/// Number of samples in a radio frame without CP
uint32_t samples_per_frame_wCP;
- /// Number of samples in a tti (same as subrame in LTE, depending on numerology in NR)
+ /// Number of samples in a tti (same as subrame in LTE, slot in NR)
uint32_t samples_per_tti;
/// NR numerology index [0..5] as specified in 38.211 Section 4 (mu). 0=15khZ SCS, 1=30khZ, 2=60kHz, etc
uint8_t numerology_index;
diff --git a/openair1/SCHED/ru_procedures.c b/openair1/SCHED/ru_procedures.c
index 94882c64fd36901ec384c1662dc355f865109d42..f30f09859cbd665dbe6296deb59a2a5d61f8d92a 100644
--- a/openair1/SCHED/ru_procedures.c
+++ b/openair1/SCHED/ru_procedures.c
@@ -61,7 +61,7 @@ void feptx0(RU_t *ru,int slot) {
unsigned int aa,slot_offset;
int slot_sizeF = (fp->ofdm_symbol_size)*
((fp->Ncp==1) ? 6 : 7);
- int subframe = ru->proc.subframe_tx;
+ int subframe = ru->proc.tti_tx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
@@ -172,7 +172,7 @@ void feptx_ofdm_2thread(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp=ru->frame_parms;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
- int subframe = ru->proc.subframe_tx;
+ int subframe = ru->proc.tti_tx;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
@@ -239,7 +239,7 @@ void feptx_ofdm(RU_t *ru) {
((fp->Ncp==1) ? 6 : 7);
int len,len2;
int16_t *txdata;
- int subframe = ru->proc.subframe_tx;
+ int subframe = ru->proc.tti_tx;
// int CC_id = ru->proc.CC_id;
@@ -374,7 +374,7 @@ void feptx_prec(RU_t *ru) {
PHY_VARS_eNB **eNB_list = ru->eNB_list,*eNB;
LTE_DL_FRAME_PARMS *fp;
int32_t ***bw;
- int subframe = ru->proc.subframe_tx;
+ int subframe = ru->proc.tti_tx;
if (ru->num_eNB == 1) {
eNB = eNB_list[0];
@@ -420,7 +420,7 @@ void fep0(RU_t *ru,int slot) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+slot, 1);
- remove_7_5_kHz(ru,(slot&1)+(proc->subframe_rx<<1));
+ remove_7_5_kHz(ru,(slot&1)+(proc->tti_rx<<1));
for (l=0; l<fp->symbols_per_tti/2; l++) {
slot_fep_ul(ru,
l,
@@ -537,7 +537,7 @@ void ru_fep_full_2thread(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp=ru->frame_parms;
if ((fp->frame_type == TDD) &&
- (subframe_select(fp,proc->subframe_rx) != SF_UL)) return;
+ (subframe_select(fp,proc->tti_rx) != SF_UL)) return;
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
@@ -580,7 +580,7 @@ void ru_fep_full_2thread(RU_t *ru) {
stop_meas(&ru->ofdm_demod_wait_stats);
if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.p_time>30*3000){
print_meas_now(&ru->ofdm_demod_wakeup_stats,"fep wakeup",stderr);
- printf("delay in fep wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
+ printf("delay in fep wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->tti_rx);
}
stop_meas(&ru->ofdm_demod_stats);
@@ -596,13 +596,13 @@ void fep_full(RU_t *ru) {
LTE_DL_FRAME_PARMS *fp=ru->frame_parms;
if ((fp->frame_type == TDD) &&
- (subframe_select(fp,proc->subframe_rx) != SF_UL)) return;
+ (subframe_select(fp,proc->tti_rx) != SF_UL)) return;
start_meas(&ru->ofdm_demod_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
- remove_7_5_kHz(ru,proc->subframe_rx<<1);
- remove_7_5_kHz(ru,1+(proc->subframe_rx<<1));
+ remove_7_5_kHz(ru,proc->tti_rx<<1);
+ remove_7_5_kHz(ru,1+(proc->tti_rx<<1));
for (l=0; l<fp->symbols_per_tti/2; l++) {
slot_fep_ul(ru,
diff --git a/openair1/SCHED_NR/fapi_nr_l1.c b/openair1/SCHED_NR/fapi_nr_l1.c
index 13140a1d275a5b972040186def0133427b385994..d663a95c358c0da965b11aa41c7ff318a7904e28 100644
--- a/openair1/SCHED_NR/fapi_nr_l1.c
+++ b/openair1/SCHED_NR/fapi_nr_l1.c
@@ -55,20 +55,20 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
- int frame, int subframe,
+ int frame, int slot,
gNB_L1_rxtx_proc_t *proc,
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu,
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu)
{
- int idx = subframe&1;
+ int idx = slot&1;
NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars;
- LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,subframe, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
+ LOG_I(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
// copy dci configuration into gNB structure
- nr_fill_dci_and_dlsch(gNB,frame,subframe,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],&dl_config_pdu->dci_dl_pdu, &dl_config_dlsch_pdu->dlsch_pdu);
+ nr_fill_dci_and_dlsch(gNB,frame,slot,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],&dl_config_pdu->dci_dl_pdu,&dl_config_dlsch_pdu->dlsch_pdu);
- LOG_D(PHY,"Frame %d, Subframe %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:subframe_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->subframe_tx, pdcch_vars->num_dci, proc->subframe_tx, idx, pdcch_vars->num_dci);
+ LOG_I(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->slot_tx, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
}
@@ -81,7 +81,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req;
nfapi_tx_request_t *TX_req = Sched_INFO->TX_req;
frame_t frame = Sched_INFO->frame;
- sub_frame_t subframe = Sched_INFO->subframe;
+ sub_frame_t slot = Sched_INFO->slot;
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
@@ -98,7 +98,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
int i;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d \n",
- frame,subframe,
+ frame,slot,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus);
@@ -107,9 +107,12 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
gNB->pdcch_vars.num_dci = 0;
gNB->pdcch_vars.num_pdsch_rnti = 0;
+ gNB->pdcch_vars.num_dci=0;
+
for (i=0;i<number_dl_pdu;i++) {
dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
- //LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
+ LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
+ printf("NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
switch (dl_config_pdu->pdu_type) {
case NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE:
AssertFatal(dl_config_pdu->bch_pdu_rel15.pdu_index < TX_req->tx_request_body.number_of_pdus,
@@ -128,7 +131,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
case NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE:
dl_config_dlsch_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[++i];
handle_nfapi_nr_dci_dl_pdu(gNB,
- frame, subframe,
+ frame, slot,
proc,
dl_config_pdu,
dl_config_dlsch_pdu);
diff --git a/openair1/SCHED_NR/nr_ru_procedures.c b/openair1/SCHED_NR/nr_ru_procedures.c
index c2b1bb8800f7ee39e0240709a77585bda2069520..65dfb64734b683f8a1b6eef5df3ef9c40a0451ef 100644
--- a/openair1/SCHED_NR/nr_ru_procedures.c
+++ b/openair1/SCHED_NR/nr_ru_procedures.c
@@ -58,38 +58,58 @@ extern openair0_config_t openair0_cfg[MAX_CARDS];
extern int oai_exit;
-void nr_feptx0(RU_t *ru,int slot) {
+void nr_feptx0(RU_t *ru,int first_symbol, int num_symbols) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
- unsigned int aa,slot_offset;
- int slot_sizeF = fp->ofdm_symbol_size * fp->symbols_per_slot;
- int subframe = ru->proc.subframe_tx;
+ unsigned int aa,slot_offset,slot_offsetF;
+ int slot = ru->proc.tti_tx;
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0) , 1 );
- slot_offset = subframe*fp->samples_per_subframe + (slot*(fp->samples_per_subframe / fp->slots_per_subframe));
+ slot_offset = slot*fp->samples_per_slot;
+ slot_offsetF = first_symbol*fp->ofdm_symbol_size;
- LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d\n",ru->proc.frame_tx, ru->proc.subframe_tx,slot);
+ if (first_symbol>0) slot_offset += (fp->ofdm_symbol_size*first_symbol) + (fp->nb_prefix_samples0) + (fp->nb_prefix_samples*(first_symbol-1));
+
+ LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d (first_symbol %d num_symbols %d)\n",ru->proc.frame_tx, ru->proc.tti_tx,slot,first_symbol,num_symbols);
for (aa=0; aa<ru->nb_tx; aa++) {
if (fp->Ncp == 1) {
- PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
+ PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
+ (int*)&ru->common.txdata[aa][slot_offset],
+ fp->ofdm_symbol_size,
+ num_symbols,
+ fp->nb_prefix_samples,
+ CYCLIC_PREFIX);
+ }
+ else {
+ if (first_symbol==0) {
+ PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
(int*)&ru->common.txdata[aa][slot_offset],
fp->ofdm_symbol_size,
- 12,
+ 1,
+ fp->nb_prefix_samples0,
+ CYCLIC_PREFIX);
+ PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF+fp->ofdm_symbol_size],
+ (int*)&ru->common.txdata[aa][slot_offset+fp->nb_prefix_samples0+fp->ofdm_symbol_size],
+ fp->ofdm_symbol_size,
+ num_symbols-1,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
- }
- else {
- nr_normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
- (int*)&ru->common.txdata[aa][slot_offset],
- fp->symbols_per_slot,
- fp);
+ }
+ else {
+ PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot_offsetF],
+ (int*)&ru->common.txdata[aa][slot_offset],
+ fp->ofdm_symbol_size,
+ num_symbols,
+ fp->nb_prefix_samples,
+ CYCLIC_PREFIX);
+ }
}
}
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 0);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0), 0);
}
void nr_feptx_ofdm_2thread(RU_t *ru) {
@@ -98,24 +118,25 @@ void nr_feptx_ofdm_2thread(RU_t *ru) {
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc;
struct timespec wait;
- int subframe = ru->proc.subframe_tx;
+ int slot = ru->proc.tti_tx;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
start_meas(&ru->ofdm_mod_stats);
- if (nr_subframe_select(cfg,subframe) == SF_UL) return;
+ if (nr_slot_select(cfg,slot) == SF_UL) return;
// this copy should be done in the precoding thread (currently inactive)
for (int aa=0;aa<ru->nb_tx;aa++)
memcpy((void*)ru->common.txdataF_BF[aa],
- (void*)ru->gNB_list[0]->common_vars.txdataF[aa],fp->samples_per_subframe_wCP*sizeof(int32_t));
+
+ (void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_slot_wCP*sizeof(int32_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
- if (nr_subframe_select(cfg,subframe)==SF_DL) {
- // If this is not an S-subframe
+ if (nr_slot_select(cfg,slot)==SF_DL) {
+ // If this is not an S-tti
if (pthread_mutex_timedlock(&proc->mutex_feptx,&wait) != 0) {
printf("[RU] ERROR pthread_mutex_lock for feptx thread (IC %d)\n", proc->instance_cnt_feptx);
exit_fun( "error locking mutex_feptx" );
@@ -141,8 +162,8 @@ void nr_feptx_ofdm_2thread(RU_t *ru) {
pthread_mutex_unlock( &proc->mutex_feptx );
}
- // call first slot in this thread
- nr_feptx0(ru,0);
+ // call first half-slot in this thread
+ nr_feptx0(ru,0,fp->symbols_per_slot>>1);
wait_on_busy_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"NR feptx thread");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
@@ -163,7 +184,7 @@ static void *nr_feptx_thread(void *param) {
while (!oai_exit) {
if (wait_on_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"NR feptx thread")<0) break;
- nr_feptx0(ru,1);
+ nr_feptx0(ru,ru->nr_frame_parms->symbols_per_slot>>1,ru->nr_frame_parms->symbols_per_slot>>1);
if (release_thread(&proc->mutex_feptx,&proc->instance_cnt_feptx,"NR feptx thread")<0) break;
if (pthread_cond_signal(&proc->cond_feptx) != 0) {
@@ -196,11 +217,11 @@ void nr_feptx_ofdm(RU_t *ru) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
- unsigned int aa=0,slot=0;
+ unsigned int aa=0;
int slot_sizeF = (fp->ofdm_symbol_size)*
((cfg->subframe_config.dl_cyclic_prefix_type.value == 1) ? 12 : 14);
- int subframe = ru->proc.subframe_tx;
- int *txdata = &ru->common.txdata[aa][subframe*fp->samples_per_subframe];
+ int slot = ru->proc.tti_tx;
+ int *txdata = &ru->common.txdata[aa][slot*fp->samples_per_slot];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
start_meas(&ru->ofdm_mod_stats);
@@ -208,22 +229,21 @@ void nr_feptx_ofdm(RU_t *ru) {
// this copy should be done in the precoding thread (currently inactive)
for (int aa=0;aa<ru->nb_tx;aa++)
memcpy((void*)ru->common.txdataF_BF[aa],
- (void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_subframe_wCP*sizeof(int32_t));
+ (void*)ru->gNB_list[0]->common_vars.txdataF[aa], fp->samples_per_slot_wCP*sizeof(int32_t));
- if ((nr_subframe_select(cfg,subframe)==SF_DL)||
- ((nr_subframe_select(cfg,subframe)==SF_S))) {
+ if ((nr_slot_select(cfg,slot)==SF_DL)||
+ ((nr_slot_select(cfg,slot)==SF_S))) {
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
- for (slot=0; slot<fp->slots_per_subframe;slot++)
- nr_feptx0(ru,slot);
+ nr_feptx0(ru,0,fp->symbols_per_slot);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
stop_meas(&ru->ofdm_mod_stats);
- LOG_D(PHY,"feptx_ofdm (TXPATH): frame %d, subframe %d: txp (time %p) %d dB, txp (freq) %d dB\n",
- ru->proc.frame_tx,subframe,txdata,dB_fixed(signal_energy((int32_t*)txdata,fp->samples_per_subframe)),
+ LOG_D(PHY,"feptx_ofdm (TXPATH): frame %d, slot %d: txp (time %p) %d dB, txp (freq) %d dB\n",
+ ru->proc.frame_tx,slot,txdata,dB_fixed(signal_energy((int32_t*)txdata,fp->samples_per_slot)),
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[aa],2*slot_sizeF)));
}
diff --git a/openair1/SCHED_NR/phy_procedures_nr_common.c b/openair1/SCHED_NR/phy_procedures_nr_common.c
index 44f56a22b01bc02c861f242c05aec6161225af5d..1a0a02f22df0aad6c9e001e43bc03d62ab4ce093 100644
--- a/openair1/SCHED_NR/phy_procedures_nr_common.c
+++ b/openair1/SCHED_NR/phy_procedures_nr_common.c
@@ -32,151 +32,8 @@
#include "sched_nr.h"
-
-/// LUT for the number of symbols in the coreset indexed by coreset index (4 MSB rmsi_pdcch_config)
-uint8_t nr_coreset_nsymb_pdcch_type_0_b40Mhz[16] = {2,2,2,2,2,3,3,3,3,3,1,1,1,2,2,2}; // below 40Mhz bw
-uint8_t nr_coreset_nsymb_pdcch_type_0_a40Mhz[10] = {2,2,3,3,1,1,2,2,3,3}; // above 40Mhz bw
-/// LUT for the number of RBs in the coreset indexed by coreset index
-uint8_t nr_coreset_rb_offset_pdcch_type_0_b40Mhz[16] = {0,1,2,3,4,0,1,2,3,4,12,14,16,12,14,16};
-uint8_t nr_coreset_rb_offset_pdcch_type_0_a40Mhz[10] = {0,4,0,4,0,28,0,28,0,28};
-/// LUT for monitoring occasions param O indexed by ss index (4 LSB rmsi_pdcch_config)
-uint8_t nr_ss_param_O_type_0_mux1_FR1[16] = {0,0,2,2,5,5,7,7,0,5,0,0,2,2,5,5};
-uint8_t nr_ss_param_O_type_0_mux1_FR2[14] = {0,0,2.5,2.5,5,5,0,2.5,5,7.5,7.5,7.5,0,5};
-/// LUT for number of SS sets per slot indexed by ss index
-uint8_t nr_ss_sets_per_slot_type_0_FR1[16] = {1,2,1,2,1,2,1,2,1,1,1,1,1,1,1,1};
-uint8_t nr_ss_sets_per_slot_type_0_FR2[14] = {1,2,1,2,1,2,2,2,2,1,2,2,1,1};
-/// LUT for monitoring occasions param M indexed by ss index
-uint8_t nr_ss_param_M_type_0_mux1_FR1[16] = {1,0.5,1,0.5,1,0.5,1,0.5,2,2,1,1,1,1,1,1};
-uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5,0.5,2,2};
-/// LUT for SS first symbol index indexed by ss index
-uint8_t nr_ss_first_symb_idx_type_0_mux1_FR1[8] = {0,0,1,2,1,2,1,2};
-
-
-
-nr_subframe_t nr_subframe_select(nfapi_nr_config_request_t *cfg,unsigned char subframe)
+nr_subframe_t nr_slot_select(nfapi_nr_config_request_t *cfg,unsigned char slot)
{
if (cfg->subframe_config.duplex_mode.value == FDD)
return(SF_DL);
}
-
-
-void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
- nr_scs_e scs_common,
- nr_scs_e pdcch_scs,
- nr_frequency_range_e freq_range,
- uint8_t rmsi_pdcch_config,
- uint8_t ssb_idx,
- uint16_t nb_slots_per_frame,
- uint16_t N_RB)
-{
- uint8_t O, M;
- uint8_t ss_idx = rmsi_pdcch_config&0xf;
- uint8_t cset_idx = (rmsi_pdcch_config>>4)&0xf;
- uint8_t mu;
-
- /// Coreset params
- switch(scs_common) {
-
- case kHz15:
- mu = 0;
- break;
-
- case kHz30:
- mu = 1;
-
- if (N_RB < 106) { // Minimum 40Mhz bandwidth not satisfied
- switch(pdcch_scs) {
- case kHz15:
- break;
-
- case kHz30:
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 10)? 24 : 48;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
- break;
-
- default:
- AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
- }
- }
-
- else {
- AssertFatal(ss_idx<10 ,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
- switch(pdcch_scs) {
- case kHz15:
- break;
-
- case kHz30:
- pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
- pdcch_params->n_rb = (cset_idx < 4)? 24 : 48;
- pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
- pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
- break;
-
- default:
- AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
- }
- }
-
- case kHz60:
- mu = 2;
- break;
-
- case kHz120:
- mu = 3;
- break;
-
- default:
- AssertFatal(1==0,"Invalid common subcarrier spacing %d\n", scs_common);
-
- }
-
- /// Search space params
- switch(pdcch_params->mux_pattern) {
-
- case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1:
- if (freq_range == nr_FR1) {
- O = nr_ss_param_O_type_0_mux1_FR1[ss_idx];
- pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
- M = nr_ss_param_M_type_0_mux1_FR1[ss_idx];
- pdcch_params->first_symbol = (ss_idx < 8)? ( (ss_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
- }
-
- else {
- AssertFatal(ss_idx<14 ,"Invalid search space index for multiplexing type 1 and FR2 %d\n", ss_idx);
- O = nr_ss_param_O_type_0_mux1_FR2[ss_idx];
- pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
- M = nr_ss_param_M_type_0_mux1_FR2[ss_idx];
- pdcch_params->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
- }
- pdcch_params->nb_slots = 2;
- pdcch_params->sfn_mod2 = ((uint8_t)(floor( (O*pow(2, mu) + floor(ssb_idx*M)) / nb_slots_per_frame )) & 1)? 1 : 0;
- pdcch_params->first_slot = (uint8_t)(O*pow(2, mu) + floor(ssb_idx*M)) % nb_slots_per_frame;
-
- break;
-
- case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2:
- break;
-
- case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3:
- break;
-
- default:
- AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_params->mux_pattern);
- }
- pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
- pdcch_params->search_space_type = NFAPI_NR_SEARCH_SPACE_TYPE_COMMON;
- pdcch_params->common_search_space_type = NFAPI_NR_COMMON_SEARCH_SPACE_TYPE_0;
- pdcch_params->cr_mapping_type = NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED;
- pdcch_params->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
- pdcch_params->reg_bundle_size = 6;
- pdcch_params->interleaver_size = 2;
-}
-
-void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
- nfapi_nr_coreset_t* coreset,
- nfapi_nr_search_space_t* search_space) {
-
-
-}
diff --git a/openair1/SCHED_NR/phy_procedures_nr_gNB.c b/openair1/SCHED_NR/phy_procedures_nr_gNB.c
index a9bc8cd62b2f27de5493adc140e0de3cd27e8f1f..7cbb70242efb939ed510d23a4db715ece84bc647 100644
--- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c
+++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c
@@ -112,46 +112,45 @@ int nr_get_ssb_start_symbol(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *f
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp)
{
- int start_rb = cfg->sch_config.n_ssb_crb.value / (1<<cfg->subframe_config.numerology_index_mu.value);
- fp->ssb_start_subcarrier = 12 * start_rb + cfg->sch_config.ssb_subcarrier_offset.value;
- LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,start_rb,cfg->sch_config.ssb_subcarrier_offset.value);
+ fp->ssb_start_subcarrier = (12 * cfg->sch_config.n_ssb_crb.value + cfg->sch_config.ssb_subcarrier_offset.value)/(1<<cfg->subframe_config.numerology_index_mu.value);
+ LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->sch_config.n_ssb_crb.value,cfg->sch_config.ssb_subcarrier_offset.value);
}
-void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
+void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF;
uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
- int ss_subframe = (cfg->sch_config.half_frame_index.value)? 5 : 0;
+ int ss_slot = (cfg->sch_config.half_frame_index.value)? 10 : 0;
uint8_t Lmax, ssb_index=0, n_hf=0;
- LOG_D(PHY,"common_signal_procedures: frame %d, subframe %d\n",frame,subframe);
+ LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
int ssb_start_symbol = nr_get_ssb_start_symbol(cfg, fp);
nr_set_ssb_first_subcarrier(cfg, fp);
Lmax = (fp->dl_CarrierFreq < 3e9)? 4:8;
- if (subframe == ss_subframe)
+ if (slot == ss_slot)
{
// Current implementation is based on SSB in first half frame, first candidate
- LOG_D(PHY,"SS TX: frame %d, subframe %d, start_symbol %d\n",frame,subframe, ssb_start_symbol);
+ LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
- nr_generate_pss(gNB->d_pss, txdataF, AMP, ssb_start_symbol, cfg, fp);
- nr_generate_sss(gNB->d_sss, txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
+ nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
+ nr_generate_sss(gNB->d_sss, txdataF[0], AMP_OVER_2, ssb_start_symbol, cfg, fp);
if (!(frame&7)){
- LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,subframe,gNB->pbch_configured);
+ LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,slot,gNB->pbch_configured);
if (gNB->pbch_configured != 1)return;
gNB->pbch_configured = 0;
}
- nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
+ nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP_OVER_2, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
gNB->nrPolar_params,
pbch_pdu,
gNB->nr_pbch_interleaver,
- txdataF,
+ txdataF[0],
AMP_OVER_2,
ssb_start_symbol,
n_hf,Lmax,ssb_index,
@@ -161,56 +160,56 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
}
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
- gNB_L1_rxtx_proc_t *proc,
- int do_meas)
+ gNB_L1_rxtx_proc_t *proc,
+ int do_meas)
{
int aa;
int frame=proc->frame_tx;
- int subframe=proc->subframe_tx;
- uint8_t num_dci=0, num_pdsch_rnti;
+
+ int slot=proc->slot_tx;
+ uint8_t num_dci=0,num_pdsch_rnti;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id;
- if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_subframe_select(cfg,subframe)==SF_UL)) return;
+ if ((cfg->subframe_config.duplex_mode.value == TDD) && (nr_slot_select(cfg,slot)==SF_UL)) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
if (do_meas==1) start_meas(&gNB->phy_proc_tx);
// clear the transmit data array for the current subframe
- for (aa=0; aa<cfg->rf_config.tx_antenna_ports.value; aa++) {
- memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_subframe_wCP*sizeof(int32_t));
+ for (aa=0; aa<1/*15*/; aa++) {
+ memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
if (nfapi_mode == 0 || nfapi_mode == 1) {
- nr_common_signal_procedures(gNB,frame, subframe);
+ nr_common_signal_procedures(gNB,frame, slot);
//if (frame == 9)
//write_output("txdataF.m","txdataF",gNB->common_vars.txdataF[aa],fp->samples_per_frame_wCP, 1, 1);
}
num_dci = gNB->pdcch_vars.num_dci;
- num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
- if (num_dci && (subframe==1)) {
- LOG_I(PHY, "[gNB %d] Frame %d subframe %d \
- Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, subframe, num_dci);
- uint8_t slot_idx = gNB->pdcch_vars.dci_alloc[0].pdcch_params.first_slot + subframe*fp->slots_per_subframe;
+ num_pdsch_rnti = gNB->pdcch_vars.num_pdsch_rnti;
+ if (num_dci) {
+ LOG_I(PHY, "[gNB %d] Frame %d slot %d \
+ Calling nr_generate_dci_top (number of DCI %d)\n", gNB->Mod_id, frame, slot, num_dci);
if (nfapi_mode == 0 || nfapi_mode == 1){
nr_generate_dci_top(gNB->pdcch_vars,
&gNB->nrPolar_params,
- gNB->nr_gold_pdcch_dmrs[slot_idx],
- gNB->common_vars.txdataF,
+ gNB->nr_gold_pdcch_dmrs[slot],
+ gNB->common_vars.txdataF[0],
AMP, *fp, *cfg);
if (num_pdsch_rnti) {
LOG_I(PHY, "PDSCH generation started (%d)\n", num_pdsch_rnti);
nr_generate_pdsch(*gNB->dlsch[0][0],
gNB->pdcch_vars.dci_alloc[0],
- gNB->nr_gold_pdsch_dmrs[slot_idx],
+ gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF,
- AMP, subframe, *fp, *cfg);
+ AMP, slot, *fp, *cfg);
}
}
}
diff --git a/openair1/SCHED_NR/sched_nr.h b/openair1/SCHED_NR/sched_nr.h
index 17354d4fb35db26137b5885921c0a7f7aaf94d8c..9b53dd050ce6035e9ff5675d3c104f7ba1401abf 100644
--- a/openair1/SCHED_NR/sched_nr.h
+++ b/openair1/SCHED_NR/sched_nr.h
@@ -34,22 +34,22 @@
#include "PHY/NR_TRANSPORT/nr_dci.h"
-lte_subframe_t nr_subframe_select (nfapi_nr_config_request_t *cfg, unsigned char subframe);
+nr_slot_t nr_slot_select (nfapi_nr_config_request_t *cfg, unsigned char slot);
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, gNB_L1_rxtx_proc_t *proc, int do_meas);
-void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe);
+void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot);
void nr_init_feptx_thread(RU_t *ru,pthread_attr_t *attr_feptx);
void nr_feptx_ofdm(RU_t *ru);
void nr_feptx_ofdm_2thread(RU_t *ru);
-void nr_feptx0(RU_t *ru,int slot);
+void nr_feptx0(RU_t *ru,int first_symbol, int num_symbols);
-void nr_configure_css_dci_from_mib(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
- nr_scs_e scs_common,
- nr_scs_e pdcch_scs,
- nr_frequency_range_e freq_range,
- uint8_t rmsi_pdcch_config,
- uint8_t ssb_idx,
- uint16_t nb_slots_per_frame,
- uint16_t N_RB);
+void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+ nr_scs_e scs_common,
+ nr_scs_e pdcch_scs,
+ nr_frequency_range_e freq_range,
+ uint8_t rmsi_pdcch_config,
+ uint8_t ssb_idx,
+ uint16_t nb_slots_per_frame,
+ uint16_t N_RB);
#endif
diff --git a/openair1/SCHED_NR_UE/defs.h b/openair1/SCHED_NR_UE/defs.h
index 915b85b602c1c9273253d7343c91f80d031552ca..5a8dc96fab08e6c53b524a78490df751af18687d 100644
--- a/openair1/SCHED_NR_UE/defs.h
+++ b/openair1/SCHED_NR_UE/defs.h
@@ -123,9 +123,10 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t e
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
-int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
+int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t do_pdcch_flag,runmode_t mode);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
+
#ifdef UE_SLOT_PARALLELISATION
void *UE_thread_slot1_dl_processing(void *arg);
#endif
diff --git a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
index 36bc44c08394f7faacba7fa851949f9ce3dbdb42..1daaf90cd6715c12f504971589cc3101eda6c16d 100644
--- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
@@ -42,211 +42,216 @@ extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
- /// module id
- module_id_t module_id = scheduled_response->module_id;
- /// component carrier id
- uint8_t cc_id = scheduled_response->CC_id;
- uint32_t i;
-
- if(scheduled_response != NULL){
- NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
- NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0];
- NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
- NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
- PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
+
+ /// module id
+ module_id_t module_id = scheduled_response->module_id;
+ /// component carrier id
+ uint8_t cc_id = scheduled_response->CC_id;
+ uint32_t i;
+
+ if(scheduled_response != NULL){
+ // Note: we have to handle the thread IDs for this. To be revisited completely.
+ NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
+ NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0][0];
+ NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
+ NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
+ PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
-// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
-// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
+ // PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
+ // PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
- if(scheduled_response->dl_config != NULL){
- fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
+ if(scheduled_response->dl_config != NULL){
+ fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
- for(i=0; i<dl_config->number_pdus; ++i){
- if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
- pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
- fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
-
- pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
+ for(i=0; i<dl_config->number_pdus; ++i){
+ if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
+ pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
+ fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
+
+ pdcch_vars2->n_RB_BWP[i] = dci_config->N_RB_BWP;
+ pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
- pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
- pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
- pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
- pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
- pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
+ pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
+ pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
+ pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
+ pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
+ pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
- pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
+ pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
- pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
- pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
-
- if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
- pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
- pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
- pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
- }else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
- pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
- pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
- pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
- }
+ pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
+ pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
+
+ if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
+ pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
+ pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
+ pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
+ }else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
+ pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
+ pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
+ pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
+ }
- pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
- //pdcch_vars2->coreset[i].tciStatesPDCCH;
- //pdcch_vars2->coreset[i].tciPresentInDCI;
- pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
-
- }else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
- // dlsch config pdu
-
- fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
- uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
- dlsch0->current_harq_pid = current_harq_pid;
- dlsch0->active = 1;
+ pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
+ //pdcch_vars2->coreset[i].tciStatesPDCCH;
+ //pdcch_vars2->coreset[i].tciPresentInDCI;
+ pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
+
+ }else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
+ // dlsch config pdu
+
+ fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
+ uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
+ dlsch0->current_harq_pid = current_harq_pid;
+ dlsch0->active = 1;
- //dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs;
+ //dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs;
- NR_DL_UE_HARQ_t dlsch0_harq = *(dlsch0->harq_processes[current_harq_pid]);
+ NR_DL_UE_HARQ_t dlsch0_harq = *(dlsch0->harq_processes[current_harq_pid]);
+
- //dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs;
+ //dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs;
- dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs;
- dlsch0_harq.start_rb = dlsch_config_pdu->start_rb;
- dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols;
- dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol;
- dlsch0_harq.mcs = dlsch_config_pdu->mcs;
- dlsch0_harq.DCINdi = dlsch_config_pdu->ndi;
- dlsch0_harq.rvidx = dlsch_config_pdu->rv;
- dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
- dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
- dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
- printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs);
- //for (int j = 0 ; j<1000; j++) printf("\nk = %d",j);
-
- #if 0
- dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs;
- dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
- //pdlsch0->rnti = rnti;
- #endif
- }
- }
- }else{
- pdcch_vars2->nb_search_space = 0;
- }
-
- if(scheduled_response->ul_config != NULL){
- fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
- for(i=0; i<ul_config->number_pdus; ++i){
- if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){
- // pusch config pdu
- fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
- uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
- ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
- ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
- ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols;
- ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
- ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
- ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
- ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
- ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
- }
- if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
- // pucch config pdu
- fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
- uint8_t pucch_resource_id = 0; //FIXME!!!
- uint8_t format = 1; // FIXME!!!
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
- PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
-/* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
- pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
- pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
- pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
- pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
- pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
- pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
- }
- if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
- // prach config pdu
- fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
- frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
- frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
- frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
- frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
- frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;
- prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
- }
- }
- }else{
+ dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs;
+ dlsch0_harq.start_rb = dlsch_config_pdu->start_rb;
+ dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols;
+ dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol;
+ dlsch0_harq.mcs = dlsch_config_pdu->mcs;
+ dlsch0_harq.DCINdi = dlsch_config_pdu->ndi;
+ dlsch0_harq.rvidx = dlsch_config_pdu->rv;
+ dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
+ dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
+ dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
+ printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs);
+ //for (int j = 0 ; j<1000; j++) printf("\nk = %d",j);
+
+#if 0
+ dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs;
+ dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
+ //pdlsch0->rnti = rnti;
+#endif
+ }
+ }
+ }else{
+ pdcch_vars2->nb_search_space = 0;
+ }
+
+ if(scheduled_response->ul_config != NULL){
+ fapi_nr_ul_config_request_t *ul_config = scheduled_response->ul_config;
+ for(i=0; i<ul_config->number_pdus; ++i){
+ if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH){
+ // pusch config pdu
+ fapi_nr_ul_config_pusch_pdu_rel15_t *pusch_config_pdu = &ul_config->ul_config_list[i].ulsch_config_pdu.ulsch_pdu_rel15;
+ uint8_t current_harq_pid = pusch_config_pdu->harq_process_nbr;
+ ulsch0->harq_processes[current_harq_pid]->nb_rb = pusch_config_pdu->number_rbs;
+ ulsch0->harq_processes[current_harq_pid]->first_rb = pusch_config_pdu->start_rb;
+ ulsch0->harq_processes[current_harq_pid]->nb_symbols = pusch_config_pdu->number_symbols;
+ ulsch0->harq_processes[current_harq_pid]->start_symbol = pusch_config_pdu->start_symbol;
+ ulsch0->harq_processes[current_harq_pid]->mcs = pusch_config_pdu->mcs;
+ ulsch0->harq_processes[current_harq_pid]->DCINdi = pusch_config_pdu->ndi;
+ ulsch0->harq_processes[current_harq_pid]->rvidx = pusch_config_pdu->rv;
+ ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
+ }
+ if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUCCH){
+ // pucch config pdu
+ fapi_nr_ul_config_pucch_pdu *pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
+ uint8_t pucch_resource_id = 0; //FIXME!!!
+ uint8_t format = 1; // FIXME!!!
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0].formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].hoppingId = pucch_config_pdu->hoppingId;
+ PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0].p0_nominal = pucch_config_pdu->p0_nominal;
+ /* pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.initialCyclicShift = pucch_config_pdu->initialCyclicShift;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofSymbols = pucch_config_pdu->nrofSymbols;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.startingSymbolIndex = pucch_config_pdu->startingSymbolIndex;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.nrofPRBs = pucch_config_pdu->nrofPRBs;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->startingPRB = pucch_config_pdu->startingPRB;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.timeDomainOCC = pucch_config_pdu->timeDomainOCC;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_length = pucch_config_pdu->occ_length;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->format_parameters.occ_Index = pucch_config_pdu->occ_Index;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->intraSlotFrequencyHopping = pucch_config_pdu->intraSlotFrequencyHopping;
+ pucch_config_dedicated->PUCCH_Resource[pucch_resource_id]->secondHopPRB = pucch_config_pdu->secondHopPRB; // Not sure this parameter is used
+ pucch_config_dedicated->formatConfig[format-1]->additionalDMRS = pucch_config_pdu->additionalDMRS; // At this point we need to know which format is going to be used
+ pucch_config_dedicated->formatConfig[format-1]->pi2PBSK = pucch_config_pdu->pi2PBSK;
+ pucch_config_common->pucch_GroupHopping = pucch_config_pdu->pucch_GroupHopping;
+ pucch_config_common->hoppingId = pucch_config_pdu->hoppingId;
+ pucch_config_common->p0_nominal = pucch_config_pdu->p0_nominal;*/
+ }
+ if(ul_config->ul_config_list[i].pdu_type == FAPI_NR_UL_CONFIG_TYPE_PRACH){
+ // prach config pdu
+ fapi_nr_ul_config_prach_pdu *prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
+ frame_parms.prach_config_common.rootSequenceIndex = prach_config_pdu->root_sequence_index;
+ frame_parms.prach_config_common.prach_ConfigInfo.prach_ConfigIndex = prach_config_pdu->prach_configuration_index;
+ frame_parms.prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig = prach_config_pdu->zero_correlation_zone_config;
+ frame_parms.prach_config_common.prach_ConfigInfo.highSpeedFlag = prach_config_pdu->restrictedset_config;
+ frame_parms.prach_config_common.prach_ConfigInfo.prach_FreqOffset = prach_config_pdu->prach_freq_offset;
+ prach_resources->ra_PreambleIndex = prach_config_pdu->preamble_index;
+ }
+ }
+ }else{
- }
+ }
- if(scheduled_response->tx_request != NULL){
+ if(scheduled_response->tx_request != NULL){
- }else{
+ }else{
- }
}
+ }
- return 0;
+ return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
- if(phy_config != NULL){
- if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
- printf("[L1][IF module][PHY CONFIG]\n");
- printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
- printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
- printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
- printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
- printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
- printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
- printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
- printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
- printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
- printf("-------------------------------\n");
-
- PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
- }
+ if(phy_config != NULL){
+ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
+ printf("[L1][IF module][PHY CONFIG]\n");
+ printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
+ printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
+ printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
+ printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
+ printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
+ printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
+ printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
+ printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
+ printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
+ printf("-------------------------------\n");
+
+ PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
+ }
- if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
+ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
- }
+ }
- if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
+ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
- }
+ }
- if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
+ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
- }
+ }
- if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
+ if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
- }
}
+ }
- return 0;
+ return 0;
}
+
diff --git a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
index 4331258b69ca537071674792b38383db8c78f664..a4d627823fae3f6899decf729d896b905a1df60c 100644
--- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
@@ -56,7 +56,7 @@
//#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
-//#define NR_PDCCH_SCHED_DEBUG
+#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG
@@ -94,6 +94,52 @@ char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
extern double cpuf;
+int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
+ uint32_t frame,
+ uint8_t nr_tti_rx,
+ uint8_t eNB_id,
+ MIMO_mode_t mimo_mode,
+ uint32_t high_speed_flag,
+ uint8_t is_secondary_ue,
+ int nb_coreset_active,
+ uint16_t symbol_mon,
+ NR_SEARCHSPACE_TYPE_t searchSpaceType);
+
+uint8_t nr_dci_decoding_procedure(int s,
+ int p,
+ PHY_VARS_NR_UE *ue,
+ NR_DCI_ALLOC_t *dci_alloc,
+ NR_SEARCHSPACE_TYPE_t searchSpacetype,
+ int16_t eNB_id,
+ uint8_t nr_tti_rx,
+ uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
+ uint16_t n_RB_ULBWP,
+ uint16_t n_RB_DLBWP,
+ crc_scrambled_t *crc_scrambled,
+ format_found_t *format_found,
+ uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
+
+int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
+ uint8_t eNB_id,
+ int frame,
+ uint8_t nr_tti_rx,
+ uint32_t dci_pdu[4],
+ uint16_t rnti,
+ uint8_t dci_length,
+ NR_DCI_format_t dci_format,
+ NR_UE_PDCCH *pdcch_vars,
+ NR_UE_PDSCH *pdsch_vars,
+ NR_UE_DLSCH_t **dlsch,
+ NR_UE_ULSCH_t *ulsch,
+ NR_DL_FRAME_PARMS *frame_parms,
+ PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
+ uint8_t beamforming_mode,
+ uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
+ uint16_t n_RB_ULBWP,
+ uint16_t n_RB_DLBWP,
+ uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
+ NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted);
+
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
@@ -113,8 +159,8 @@ void nr_dump_dlsch(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uin
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[harq_pid]->Nl,
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->num_pdcch_symbols,
proc->frame_rx,
- nr_tti_rx,
- ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id]);
+ nr_tti_rx,
+ ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id]);
write_output("rxsigF0.m","rxsF0", ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,2,1);
write_output("rxsigF0_ext.m","rxsF0_ext", ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][0]->rxdataF_ext[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,1,1);
@@ -144,12 +190,12 @@ void nr_dump_dlsch_SI(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
1,
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->num_pdcch_symbols,
proc->frame_rx,
- nr_tti_rx,
- 0);
+ nr_tti_rx,
+ 0);
LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
ue->Mod_id,
- ue->frame_parms.ofdm_symbol_size,
- nsymb,
+ ue->frame_parms.ofdm_symbol_size,
+ nsymb,
ue->dlsch_SI[eNB_id]->harq_processes[0]->nb_rb,
ue->dlsch_SI[eNB_id]->harq_processes[0]->mcs,
ue->dlsch_SI[eNB_id]->harq_processes[0]->nb_rb,
@@ -249,8 +295,8 @@ void nr_dump_dlsch_ra(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
1,
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->num_pdcch_symbols,
proc->frame_rx,
- nr_tti_rx,
- 0);
+ nr_tti_rx,
+ 0);
LOG_D(PHY,"[UE %d] Dumping dlsch_ra : nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
ue->Mod_id,
ue->dlsch_ra[eNB_id]->harq_processes[0]->nb_rb,
@@ -286,37 +332,37 @@ void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
//[NUMBER_OF_RX_THREAD=2][NUMBER_OF_CONNECTED_eNB_MAX][2];
for(int l=0; l<RX_NB_TH; l++) {
- for(i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
- for(j=0; j<2; j++) {
- //DL HARQ
- if(ue->dlsch[l][i][j]) {
- for(k=0; k<NUMBER_OF_HARQ_PID_MAX && ue->dlsch[l][i][j]->harq_processes[k]; k++) {
- ue->dlsch[l][i][j]->harq_processes[k]->status = SCH_IDLE;
- for (s=0; s<10; s++) {
- // reset ACK/NACK bit to DTX for all nr_tti_rxs s = 0..9
- ue->dlsch[l][i][j]->harq_ack[s].ack = 2;
- ue->dlsch[l][i][j]->harq_ack[s].send_harq_status = 0;
- ue->dlsch[l][i][j]->harq_ack[s].vDAI_UL = 0xff;
- ue->dlsch[l][i][j]->harq_ack[s].vDAI_DL = 0xff;
- }
- }
- }
- }
+ for(i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
+ for(j=0; j<2; j++) {
+ //DL HARQ
+ if(ue->dlsch[l][i][j]) {
+ for(k=0; k<NUMBER_OF_HARQ_PID_MAX && ue->dlsch[l][i][j]->harq_processes[k]; k++) {
+ ue->dlsch[l][i][j]->harq_processes[k]->status = SCH_IDLE;
+ for (s=0; s<10; s++) {
+ // reset ACK/NACK bit to DTX for all nr_tti_rxs s = 0..9
+ ue->dlsch[l][i][j]->harq_ack[s].ack = 2;
+ ue->dlsch[l][i][j]->harq_ack[s].send_harq_status = 0;
+ ue->dlsch[l][i][j]->harq_ack[s].vDAI_UL = 0xff;
+ ue->dlsch[l][i][j]->harq_ack[s].vDAI_DL = 0xff;
+ }
+ }
+ }
+ }
- //UL HARQ
- if(ue->ulsch[i]) {
- for(k=0; k<NUMBER_OF_HARQ_PID_MAX && ue->ulsch[i]->harq_processes[k]; k++) {
- ue->ulsch[i]->harq_processes[k]->status = SCH_IDLE;
- //Set NDIs for all UL HARQs to 0
- // ue->ulsch[i]->harq_processes[k]->Ndi = 0;
+ //UL HARQ
+ if(ue->ulsch[i]) {
+ for(k=0; k<NUMBER_OF_HARQ_PID_MAX && ue->ulsch[i]->harq_processes[k]; k++) {
+ ue->ulsch[i]->harq_processes[k]->status = SCH_IDLE;
+ //Set NDIs for all UL HARQs to 0
+ // ue->ulsch[i]->harq_processes[k]->Ndi = 0;
- }
- }
+ }
+ }
- // flush Msg3 buffer
- ue->ulsch_Msg3_active[i] = 0;
+ // flush Msg3 buffer
+ ue->ulsch_Msg3_active[i] = 0;
- }
+ }
}
}
@@ -470,14 +516,14 @@ void compute_cqi_ri_resources(PHY_VARS_NR_UE *ue,
uint8_t cqi_status,
uint8_t ri_status)
{
- //PHY_MEASUREMENTS *meas = &ue->measurements;
- //uint8_t transmission_mode = ue->transmission_mode[eNB_id];
+ //PHY_MEASUREMENTS *meas = &ue->measurements;
+ //uint8_t transmission_mode = ue->transmission_mode[eNB_id];
- //LOG_I(PHY,"compute_cqi_ri_resources O_RI %d O %d uci format %d \n",ulsch->O_RI,ulsch->O,ulsch->uci_format);
- if (cqi_status == 1 || ri_status == 1)
+ //LOG_I(PHY,"compute_cqi_ri_resources O_RI %d O %d uci format %d \n",ulsch->O_RI,ulsch->O,ulsch->uci_format);
+ if (cqi_status == 1 || ri_status == 1)
{
- ulsch->O = 4;
+ ulsch->O = 4;
}
}
@@ -499,77 +545,77 @@ void ue_compute_srs_occasion(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t
if (isSubframeSRS) {
LOG_D(PHY," SrsDedicatedSetup: %d \n",pSoundingrs_ul_config_dedicated->srsConfigDedicatedSetup);
- if(pSoundingrs_ul_config_dedicated->srsConfigDedicatedSetup)
+ if(pSoundingrs_ul_config_dedicated->srsConfigDedicatedSetup)
{
- nr_compute_srs_pos(frame_parms->frame_type, pSoundingrs_ul_config_dedicated->srs_ConfigIndex, &srsPeriodicity, &srsOffset);
+ nr_compute_srs_pos(frame_parms->frame_type, pSoundingrs_ul_config_dedicated->srs_ConfigIndex, &srsPeriodicity, &srsOffset);
- LOG_D(PHY," srsPeriodicity: %d srsOffset: %d isSubframeSRS %d \n",srsPeriodicity,srsOffset,isSubframeSRS);
+ LOG_D(PHY," srsPeriodicity: %d srsOffset: %d isSubframeSRS %d \n",srsPeriodicity,srsOffset,isSubframeSRS);
- // transmit SRS if the four following constraints are respected:
- // - UE is configured to transmit SRS
- // - SRS are configured in current nr_tti_rx
- // - UE is configured to send SRS in this nr_tti_tx
+ // transmit SRS if the four following constraints are respected:
+ // - UE is configured to transmit SRS
+ // - SRS are configured in current nr_tti_rx
+ // - UE is configured to send SRS in this nr_tti_tx
- // 36.213 8.2
- // 1- A UE shall not transmit SRS whenever SRS and PUCCH format 2/2a/2b transmissions happen to coincide in the same nr_tti_rx
- // 2- A UE shall not transmit SRS whenever SRS transmit
- // on and PUCCH transmission carrying ACK/NACK and/or
- // positive SR happen to coincide in the same nr_tti_rx if the parameter
- // Simultaneous-AN-and-SRS is FALSE
+ // 36.213 8.2
+ // 1- A UE shall not transmit SRS whenever SRS and PUCCH format 2/2a/2b transmissions happen to coincide in the same nr_tti_rx
+ // 2- A UE shall not transmit SRS whenever SRS transmit
+ // on and PUCCH transmission carrying ACK/NACK and/or
+ // positive SR happen to coincide in the same nr_tti_rx if the parameter
+ // Simultaneous-AN-and-SRS is FALSE
- // check PUCCH format 2/2a/2b transmissions
- is_pucch2_subframe = is_cqi_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0);
- is_pucch2_subframe = (is_ri_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0)) || is_pucch2_subframe;
+ // check PUCCH format 2/2a/2b transmissions
+ is_pucch2_subframe = is_cqi_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0);
+ is_pucch2_subframe = (is_ri_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0)) || is_pucch2_subframe;
- // check ACK/SR transmission
- if(frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission == FALSE)
+ // check ACK/SR transmission
+ if(frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission == FALSE)
{
- if(nr_is_SR_TXOp(ue,proc,eNB_id))
+ if(nr_is_SR_TXOp(ue,proc,eNB_id))
{
- uint32_t SR_payload = 0;
- if (ue->mac_enabled==1)
+ uint32_t SR_payload = 0;
+ if (ue->mac_enabled==1)
{
- int Mod_id = ue->Mod_id;
- int CC_id = ue->CC_id;
- SR_payload = mac_xface->ue_get_SR(Mod_id,
- CC_id,
- frame_tx,
- eNB_id,
- ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->crnti,
- nr_tti_tx); // nr_tti_tx used for meas gap
-
- if (SR_payload > 0)
- is_sr_an_subframe = 1;
+ int Mod_id = ue->Mod_id;
+ int CC_id = ue->CC_id;
+ SR_payload = mac_xface->ue_get_SR(Mod_id,
+ CC_id,
+ frame_tx,
+ eNB_id,
+ ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->crnti,
+ nr_tti_tx); // nr_tti_tx used for meas gap
+
+ if (SR_payload > 0)
+ is_sr_an_subframe = 1;
}
}
- uint8_t pucch_ack_payload[2];
- if (nr_get_ack(&ue->frame_parms,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
- nr_tti_tx,proc->nr_tti_rx,pucch_ack_payload,0) > 0)
+ uint8_t pucch_ack_payload[2];
+ if (nr_get_ack(&ue->frame_parms,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
+ nr_tti_tx,proc->nr_tti_rx,pucch_ack_payload,0) > 0)
{
- is_sr_an_subframe = 1;
+ is_sr_an_subframe = 1;
}
}
- // check SRS UE opportunity
- if( isSubframeSRS &&
- (((10*frame_tx+nr_tti_tx) % srsPeriodicity) == srsOffset)
- )
+ // check SRS UE opportunity
+ if( isSubframeSRS &&
+ (((10*frame_tx+nr_tti_tx) % srsPeriodicity) == srsOffset)
+ )
{
- if ((is_pucch2_subframe == 0) && (is_sr_an_subframe == 0))
+ if ((is_pucch2_subframe == 0) && (is_sr_an_subframe == 0))
{
- pSoundingrs_ul_config_dedicated->srsUeSubframe = 1;
- ue->ulsch[eNB_id]->srs_active = 1;
- ue->ulsch[eNB_id]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)- ue->ulsch[eNB_id]->srs_active;
+ pSoundingrs_ul_config_dedicated->srsUeSubframe = 1;
+ ue->ulsch[eNB_id]->srs_active = 1;
+ ue->ulsch[eNB_id]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)- ue->ulsch[eNB_id]->srs_active;
}
- else
+ else
{
- LOG_I(PHY,"DROP UE-SRS-TX for this nr_tti_tx %d.%d: collision with PUCCH2 or SR/AN: PUCCH2-occasion: %d, SR-AN-occasion[simSRS-SR-AN %d]: %d \n", frame_tx, nr_tti_tx, is_pucch2_subframe, frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission, is_sr_an_subframe);
+ LOG_I(PHY,"DROP UE-SRS-TX for this nr_tti_tx %d.%d: collision with PUCCH2 or SR/AN: PUCCH2-occasion: %d, SR-AN-occasion[simSRS-SR-AN %d]: %d \n", frame_tx, nr_tti_tx, is_pucch2_subframe, frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission, is_sr_an_subframe);
}
}
}
- LOG_D(PHY," srsCellSubframe: %d, srsUeSubframe: %d, Nsymb-pusch: %d \n", pSoundingrs_ul_config_dedicated->srsCellSubframe, pSoundingrs_ul_config_dedicated->srsUeSubframe, ue->ulsch[eNB_id]->Nsymb_pusch);
+ LOG_D(PHY," srsCellSubframe: %d, srsUeSubframe: %d, Nsymb-pusch: %d \n", pSoundingrs_ul_config_dedicated->srsCellSubframe, pSoundingrs_ul_config_dedicated->srsUeSubframe, ue->ulsch[eNB_id]->Nsymb_pusch);
}
}
@@ -606,42 +652,42 @@ void nr_get_cqipmiri_params(PHY_VARS_NR_UE *ue,uint8_t eNB_id)
else if (cqi_PMI_ConfigIndex > 317) {
if (cqi_PMI_ConfigIndex <= 349) { // 32 ms CQI_PMI period
- cqirep->Npd = 32;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-318;
+ cqirep->Npd = 32;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-318;
}
else if (cqi_PMI_ConfigIndex <= 413) { // 64 ms CQI_PMI period
- cqirep->Npd = 64;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-350;
+ cqirep->Npd = 64;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-350;
}
else if (cqi_PMI_ConfigIndex <= 541) { // 128 ms CQI_PMI period
- cqirep->Npd = 128;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-414;
+ cqirep->Npd = 128;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-414;
}
}
}
else { // TDD
- if (cqi_PMI_ConfigIndex == 0) { // all UL subframes
- cqirep->Npd = 1;
- cqirep->N_OFFSET_CQI = 0;
- } else if (cqi_PMI_ConfigIndex <= 6) { // 5 ms CQI_PMI period
- cqirep->Npd = 5;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-1;
- } else if (cqi_PMI_ConfigIndex <=16) { // 10ms CQI_PMI period
- cqirep->Npd = 10;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-6;
- } else if (cqi_PMI_ConfigIndex <= 36) { // 20 ms CQI_PMI period
- cqirep->Npd = 20;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-16;
- } else if (cqi_PMI_ConfigIndex <= 76) { // 40 ms CQI_PMI period
- cqirep->Npd = 40;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-36;
- } else if (cqi_PMI_ConfigIndex <= 156) { // 80 ms CQI_PMI period
- cqirep->Npd = 80;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-76;
- } else if (cqi_PMI_ConfigIndex <= 316) { // 160 ms CQI_PMI period
- cqirep->Npd = 160;
- cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-156;
- }
+ if (cqi_PMI_ConfigIndex == 0) { // all UL subframes
+ cqirep->Npd = 1;
+ cqirep->N_OFFSET_CQI = 0;
+ } else if (cqi_PMI_ConfigIndex <= 6) { // 5 ms CQI_PMI period
+ cqirep->Npd = 5;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-1;
+ } else if (cqi_PMI_ConfigIndex <=16) { // 10ms CQI_PMI period
+ cqirep->Npd = 10;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-6;
+ } else if (cqi_PMI_ConfigIndex <= 36) { // 20 ms CQI_PMI period
+ cqirep->Npd = 20;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-16;
+ } else if (cqi_PMI_ConfigIndex <= 76) { // 40 ms CQI_PMI period
+ cqirep->Npd = 40;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-36;
+ } else if (cqi_PMI_ConfigIndex <= 156) { // 80 ms CQI_PMI period
+ cqirep->Npd = 80;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-76;
+ } else if (cqi_PMI_ConfigIndex <= 316) { // 160 ms CQI_PMI period
+ cqirep->Npd = 160;
+ cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-156;
+ }
}
}
@@ -654,72 +700,72 @@ PUCCH_FMT_t get_pucch_format(lte_frame_type_t frame_type,
uint8_t bundling_flag)
{
if((cqi_status == 0) && (ri_status==0))
- {
+ {
// PUCCH Format 1 1a 1b
// 1- SR only ==> PUCCH format 1
// 2- 1bit Ack/Nack with/without SR ==> PUCCH format 1a
// 3- 2bits Ack/Nack with/without SR ==> PUCCH format 1b
if((nb_cw == 1)&&(bundling_flag==bundling))
- {
+ {
return pucch_format1a;
- }
+ }
if((nb_cw == 1)&&(bundling_flag==multiplexing))
- {
+ {
return pucch_format1b;
- }
+ }
if(nb_cw == 2)
- {
+ {
return pucch_format1b;
- }
+ }
if(SR_payload == 1)
- {
+ {
return pucch_format1;
/*
- if (frame_type == FDD) {
- return pucch_format1;
- } else if (frame_type == TDD) {
- return pucch_format1b;
- } else {
- AssertFatal(1==0,"Unknown frame_type");
- }*/
- }
- }
+ if (frame_type == FDD) {
+ return pucch_format1;
+ } else if (frame_type == TDD) {
+ return pucch_format1b;
+ } else {
+ AssertFatal(1==0,"Unknown frame_type");
+ }*/
+ }
+ }
else
- {
+ {
// PUCCH Format 2 2a 2b
// 1- CQI only or RI only ==> PUCCH format 2
// 2- CQI or RI + 1bit Ack/Nack for normal CP ==> PUCCH format 2a
// 3- CQI or RI + 2bits Ack/Nack for normal CP ==> PUCCH format 2b
// 4- CQI or RI + Ack/Nack for extended CP ==> PUCCH format 2
if(nb_cw == 0)
- {
+ {
return pucch_format2;
- }
+ }
if(cyclic_prefix_type == NORMAL)
- {
+ {
if(nb_cw == 1)
- {
+ {
return pucch_format2a;
- }
+ }
if(nb_cw == 2)
- {
+ {
return pucch_format2b;
- }
- }
+ }
+ }
else
- {
+ {
return pucch_format2;
- }
- }
+ }
+ }
return pucch_format1a;
}
uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
- UE_nr_rxtx_proc_t *proc,
- nr_harq_status_t *harq_ack,
- uint8_t eNB_id,
- uint8_t *b,
- uint8_t SR)
+ UE_nr_rxtx_proc_t *proc,
+ nr_harq_status_t *harq_ack,
+ uint8_t eNB_id,
+ uint8_t *b,
+ uint8_t SR)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
@@ -799,9 +845,9 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
}
LOG_D(PHY,"SFN/SF %d/%d calculating n1_pucch0 from last_dl=%d\n",
- proc->frame_tx%1024,
- proc->nr_tti_tx,
- last_dl);
+ proc->frame_tx%1024,
+ proc->nr_tti_tx,
+ last_dl);
// i=0
nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[last_dl];
@@ -814,11 +860,11 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
if (SR == 0) { // last paragraph pg 68 from 36.213 (v8.6), m=0
b[0]=(M==2) ? 1-harq_ack0 : harq_ack0;
b[1]=harq_ack0; // in case we use pucch format 1b (subframes 2,7)
- ue->pucch_sel[nr_tti_tx] = 0;
+ ue->pucch_sel[nr_tti_tx] = 0;
return(n1_pucch0);
} else { // SR and only 0 or 1 ACKs (first 2 entries in Table 7.3-1 of 36.213)
b[0]=harq_ack0;
- return(ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
+ return(ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
}
} else {
if (SR == 0) {
@@ -860,10 +906,10 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
harq_ack0 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[5+last_dl].ack;
LOG_D(PHY,"SFN/SF %d/%d calculating n1_pucch cce0=%d n1_pucch0=%d cce1=%d n1_pucch1=%d\n",
- proc->frame_tx%1024,
- proc->nr_tti_tx,
- nCCE0,n1_pucch0,
- nCCE1,n1_pucch1);
+ proc->frame_tx%1024,
+ proc->nr_tti_tx,
+ nCCE0,n1_pucch0,
+ nCCE1,n1_pucch1);
if (harq_ack1!=2) { // n-6 // nr_tti_tx 6,8,0 and maybe 5,7,9 is to be ACK/NAKed
@@ -921,294 +967,294 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
break;
case 4: // DL:S:UL:UL:DL:DL:DL:DL:DL:DL
- // in this configuration we have M=4 from pg 68 of 36.213 (v8.6)
- // Note: this doesn't allow using nr_tti_tx 1 for PDSCH transmission!!! (i.e. SF 1 cannot be acked in SF 2)
- // set ACK/NAKs to DTX
- harq_ack3 = 2; // DTX
- harq_ack2 = 2; // DTX
- harq_ack1 = 2; // DTX
- harq_ack0 = 2; // DTX
- // This is the offset for a particular nr_tti_tx (2,3,4) => (0,2,4)
- //last_dl = (nr_tti_tx-2)<<1;
- if (nr_tti_tx == 2) {
- // i=0
- //nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[2+nr_tti_tx];
- nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(8+nr_tti_tx)%10];
- n1_pucch0 = 2*nr_get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
- // i=1
- nCCE1 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[2+nr_tti_tx];
- n1_pucch1 = nr_get_Np(frame_parms->N_RB_DL,nCCE1,0) + nr_get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
- // i=2
- nCCE2 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(8+nr_tti_tx)%10];
-
- n1_pucch2 = 2*nr_get_Np(frame_parms->N_RB_DL,nCCE2,1) + nCCE2+ frame_parms->pucch_config_common.n1PUCCH_AN;
- // i=3
- //nCCE3 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(9+nr_tti_tx)%10];
- //n1_pucch3 = nr_get_Np(frame_parms->N_RB_DL,nCCE3,1) + nCCE3 + frame_parms->pucch_config_common.n1PUCCH_AN;
-
- // set ACK/NAK to values if not DTX
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(8+nr_tti_tx)%10].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
- harq_ack0 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(8+nr_tti_tx)%10].ack;
-
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[2+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
- harq_ack1 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[2+nr_tti_tx].ack;
-
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[3+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
- harq_ack2 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[3+nr_tti_tx].ack;
-
- //if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(9+nr_tti_tx)%10].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
- //harq_ack3 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(9+nr_tti_tx)%10].ack;
- //LOG_I(PHY,"SFN/SF %d/%d calculating n1_pucch cce0=%d n1_pucch0=%d cce1=%d n1_pucch1=%d cce2=%d n1_pucch2=%d\n",
- // proc->frame_tx%1024,
- // proc->nr_tti_tx_tx,
- // nCCE0,n1_pucch0,
- // nCCE1,n1_pucch1, nCCE2, n1_pucch2);
- }else if (nr_tti_tx == 3) {
- // i=0
-
- nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[4+nr_tti_tx];
- n1_pucch0 = 3*nr_get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
- // i=1
- nCCE1 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[5+nr_tti_tx];
- n1_pucch1 = 2*nr_get_Np(frame_parms->N_RB_DL,nCCE1,0) + nr_get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
- // i=2
- nCCE2 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(6+nr_tti_tx)];
- n1_pucch2 = nr_get_Np(frame_parms->N_RB_DL,nCCE2,0) + 2*nr_get_Np(frame_parms->N_RB_DL,nCCE2,1) + nCCE2+ frame_parms->pucch_config_common.n1PUCCH_AN;
- // i=3
- nCCE3 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(3+nr_tti_tx)];
- n1_pucch3 = 3*nr_get_Np(frame_parms->N_RB_DL,nCCE3,1) + nCCE3 + frame_parms->pucch_config_common.n1PUCCH_AN;
-
- // set ACK/NAK to values if not DTX
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[4+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
+ // in this configuration we have M=4 from pg 68 of 36.213 (v8.6)
+ // Note: this doesn't allow using nr_tti_tx 1 for PDSCH transmission!!! (i.e. SF 1 cannot be acked in SF 2)
+ // set ACK/NAKs to DTX
+ harq_ack3 = 2; // DTX
+ harq_ack2 = 2; // DTX
+ harq_ack1 = 2; // DTX
+ harq_ack0 = 2; // DTX
+ // This is the offset for a particular nr_tti_tx (2,3,4) => (0,2,4)
+ //last_dl = (nr_tti_tx-2)<<1;
+ if (nr_tti_tx == 2) {
+ // i=0
+ //nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[2+nr_tti_tx];
+ nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(8+nr_tti_tx)%10];
+ n1_pucch0 = 2*nr_get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
+ // i=1
+ nCCE1 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[2+nr_tti_tx];
+ n1_pucch1 = nr_get_Np(frame_parms->N_RB_DL,nCCE1,0) + nr_get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
+ // i=2
+ nCCE2 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(8+nr_tti_tx)%10];
+
+ n1_pucch2 = 2*nr_get_Np(frame_parms->N_RB_DL,nCCE2,1) + nCCE2+ frame_parms->pucch_config_common.n1PUCCH_AN;
+ // i=3
+ //nCCE3 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(9+nr_tti_tx)%10];
+ //n1_pucch3 = nr_get_Np(frame_parms->N_RB_DL,nCCE3,1) + nCCE3 + frame_parms->pucch_config_common.n1PUCCH_AN;
+
+ // set ACK/NAK to values if not DTX
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(8+nr_tti_tx)%10].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
+ harq_ack0 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(8+nr_tti_tx)%10].ack;
+
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[2+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
+ harq_ack1 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[2+nr_tti_tx].ack;
+
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[3+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
+ harq_ack2 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[3+nr_tti_tx].ack;
+
+ //if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(9+nr_tti_tx)%10].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
+ //harq_ack3 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(9+nr_tti_tx)%10].ack;
+ //LOG_I(PHY,"SFN/SF %d/%d calculating n1_pucch cce0=%d n1_pucch0=%d cce1=%d n1_pucch1=%d cce2=%d n1_pucch2=%d\n",
+ // proc->frame_tx%1024,
+ // proc->nr_tti_tx_tx,
+ // nCCE0,n1_pucch0,
+ // nCCE1,n1_pucch1, nCCE2, n1_pucch2);
+ }else if (nr_tti_tx == 3) {
+ // i=0
+
+ nCCE0 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[4+nr_tti_tx];
+ n1_pucch0 = 3*nr_get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
+ // i=1
+ nCCE1 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[5+nr_tti_tx];
+ n1_pucch1 = 2*nr_get_Np(frame_parms->N_RB_DL,nCCE1,0) + nr_get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
+ // i=2
+ nCCE2 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(6+nr_tti_tx)];
+ n1_pucch2 = nr_get_Np(frame_parms->N_RB_DL,nCCE2,0) + 2*nr_get_Np(frame_parms->N_RB_DL,nCCE2,1) + nCCE2+ frame_parms->pucch_config_common.n1PUCCH_AN;
+ // i=3
+ nCCE3 = ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->nCCE[(3+nr_tti_tx)];
+ n1_pucch3 = 3*nr_get_Np(frame_parms->N_RB_DL,nCCE3,1) + nCCE3 + frame_parms->pucch_config_common.n1PUCCH_AN;
+
+ // set ACK/NAK to values if not DTX
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[4+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
harq_ack0 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[4+nr_tti_tx].ack;
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[5+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[5+nr_tti_tx].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
harq_ack1 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[5+nr_tti_tx].ack;
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(6+nr_tti_tx)].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(6+nr_tti_tx)].send_harq_status>0) // n-6 // nr_tti_tx 6 is to be ACK/NAKed
harq_ack2 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(6+nr_tti_tx)].ack;
- if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(3+nr_tti_tx)].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
+ if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(3+nr_tti_tx)].send_harq_status>0) // n-6 // nr_tti_tx 5 is to be ACK/NAKed
harq_ack3 = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack[(3+nr_tti_tx)].ack;
- }
+ }
- //LOG_I(PHY,"SFN/SF %d/%d calculating n1_pucch cce0=%d n1_pucch0=%d harq_ack0=%d cce1=%d n1_pucch1=%d harq_ack1=%d cce2=%d n1_pucch2=%d harq_ack2=%d cce3=%d n1_pucch3=%d harq_ack3=%d bundling_flag=%d\n",
- // proc->frame_tx%1024,
- // proc->nr_tti_tx,
- // nCCE0,n1_pucch0,harq_ack0,
- // nCCE1,n1_pucch1,harq_ack1, nCCE2, n1_pucch2, harq_ack2,
- // nCCE3, n1_pucch3, harq_ack3, bundling_flag);
-
- if ((bundling_flag==bundling)&&(SR == 0)) { // This is for bundling without SR,
- b[0] = 1;
- ack_counter = 0;
-
- if ((harq_ack3!=2) ) {
- b[0] = b[0]&harq_ack3;
- n1_pucch_inter = n1_pucch3;
- ack_counter ++;
- }
- if ((harq_ack0!=2) ) {
- b[0] = b[0]&harq_ack0;
- n1_pucch_inter = n1_pucch0;
- ack_counter ++;
- }
- if ((harq_ack1!=2) ) {
- b[0] = b[0]&harq_ack1;
- n1_pucch_inter = n1_pucch1;
- ack_counter ++;
- }
- if ((harq_ack2!=2) ) {
- b[0] = b[0]&harq_ack2;
- n1_pucch_inter = n1_pucch2;
- ack_counter ++;
- }
-
- if (ack_counter == 0)
- b[0] = 0;
-
- /*if (nr_tti_tx == 3) {
- n1_pucch_inter = n1_pucch2;
- } else if (nr_tti_tx == 2) {
- n1_pucch_inter = n1_pucch1;
- }*/
-
- //LOG_I(PHY,"SFN/SF %d/%d calculating n1_pucch n1_pucch_inter=%d b[0]=%d b[1]=%d \n",
- // proc->frame_tx%1024,
- // proc->nr_tti_tx,n1_pucch_inter,
- // b[0],b[1]);
-
- return(n1_pucch_inter);
-
- } else if ((bundling_flag==multiplexing)&&(SR==0)) { // Table 10.1
-
- if (nr_tti_tx == 3) {
- LOG_I(PHY, "sbuframe=%d \n",nr_tti_tx);
- if ((harq_ack0 == 1) && (harq_ack1 == 1) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
- b[0] = 1;
- b[1] = 1;
- return(n1_pucch1);
- } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch1);
- } else if (((harq_ack0 == 0) || (harq_ack0 == 2)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 0) && (harq_ack3 == 2)) {
- b[0] = 1;
- b[1] = 1;
- return(n1_pucch2);
- } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 1)) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch1);
- } else if ((harq_ack0 == 0) && (harq_ack1 == 2) && (harq_ack2 == 2) && (harq_ack3 == 2)) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch0);
- } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch1);
- } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch3);
- } else if (((harq_ack0 == 0) || (harq_ack0 == 2)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 0)) {
- b[0] = 1;
- b[1] = 1;
- return(n1_pucch3);
- } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch2);
- } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 1)) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch0);
- } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch0);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch3);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 0) && (harq_ack2 == 2) && (harq_ack3 == 2)) {
- b[0] = 0;
- b[1] = 0;
- return(n1_pucch1);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch2);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 1)) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch3);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch1);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch3);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
- b[0] = 0;
- b[1] = 0;
- return(n1_pucch2);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack3 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
- b[0] = 0;
- b[1] = 0;
- return(n1_pucch3);
- }
- } else if (nr_tti_tx == 2) {
- if ((harq_ack0 == 1) && (harq_ack1 == 1) && (harq_ack2 == 1)) {
- b[0] = 1;
- b[1] = 1;
- return(n1_pucch2);
- } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
- b[0] = 1;
- b[1] = 1;
- return(n1_pucch1);
- } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1)) {
- b[0] = 1;
- b[1] = 1;
- return(n1_pucch0);
- } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch0);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && (harq_ack2 == 1)) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch2);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
- b[1] = 0;
- b[0] = 0;
- return(n1_pucch1);
- } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1)) {
- b[0] = 0;
- b[1] = 0;
- return(n1_pucch2);
- } else if ((harq_ack0 == 2) && (harq_ack1 == 2) && (harq_ack2 == 0)) {
- b[0] = 0;
- b[1] = 1;
- return(n1_pucch2);
- } else if ((harq_ack0 == 2) && (harq_ack1 == 0) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch1);
- } else if ((harq_ack0 == 0) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
- b[0] = 1;
- b[1] = 0;
- return(n1_pucch0);
- }
-
- }
- } else if (SR==1) { // SR and 0,1,or 2 ACKS, (first 3 entries in Table 7.3-1 of 36.213)
- // this should be number of ACKs (including
- ack_counter = 0;
- if (harq_ack0==1)
- ack_counter ++;
- if (harq_ack1==1)
- ack_counter ++;
- if (harq_ack2==1)
- ack_counter ++;
- if (harq_ack3==1)
- ack_counter ++;
-
- switch (ack_counter) {
- case 0:
- b[0] = 0;
- b[1] = 0;
- break;
-
- case 1:
- b[0] = 1;
- b[1] = 1;
- break;
-
- case 2:
- b[0] = 1;
- b[1] = 0;
- break;
-
- case 3:
- b[0] = 0;
- b[1] = 1;
- break;
-
- case 4:
- b[0] = 1;
- b[1] = 1;
- break;
- }
-
- ack_counter = 0;
- return(ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
- }
+ //LOG_I(PHY,"SFN/SF %d/%d calculating n1_pucch cce0=%d n1_pucch0=%d harq_ack0=%d cce1=%d n1_pucch1=%d harq_ack1=%d cce2=%d n1_pucch2=%d harq_ack2=%d cce3=%d n1_pucch3=%d harq_ack3=%d bundling_flag=%d\n",
+ // proc->frame_tx%1024,
+ // proc->nr_tti_tx,
+ // nCCE0,n1_pucch0,harq_ack0,
+ // nCCE1,n1_pucch1,harq_ack1, nCCE2, n1_pucch2, harq_ack2,
+ // nCCE3, n1_pucch3, harq_ack3, bundling_flag);
+
+ if ((bundling_flag==bundling)&&(SR == 0)) { // This is for bundling without SR,
+ b[0] = 1;
+ ack_counter = 0;
+
+ if ((harq_ack3!=2) ) {
+ b[0] = b[0]&harq_ack3;
+ n1_pucch_inter = n1_pucch3;
+ ack_counter ++;
+ }
+ if ((harq_ack0!=2) ) {
+ b[0] = b[0]&harq_ack0;
+ n1_pucch_inter = n1_pucch0;
+ ack_counter ++;
+ }
+ if ((harq_ack1!=2) ) {
+ b[0] = b[0]&harq_ack1;
+ n1_pucch_inter = n1_pucch1;
+ ack_counter ++;
+ }
+ if ((harq_ack2!=2) ) {
+ b[0] = b[0]&harq_ack2;
+ n1_pucch_inter = n1_pucch2;
+ ack_counter ++;
+ }
- break;
+ if (ack_counter == 0)
+ b[0] = 0;
+
+ /*if (nr_tti_tx == 3) {
+ n1_pucch_inter = n1_pucch2;
+ } else if (nr_tti_tx == 2) {
+ n1_pucch_inter = n1_pucch1;
+ }*/
+
+ //LOG_I(PHY,"SFN/SF %d/%d calculating n1_pucch n1_pucch_inter=%d b[0]=%d b[1]=%d \n",
+ // proc->frame_tx%1024,
+ // proc->nr_tti_tx,n1_pucch_inter,
+ // b[0],b[1]);
+
+ return(n1_pucch_inter);
+
+ } else if ((bundling_flag==multiplexing)&&(SR==0)) { // Table 10.1
+
+ if (nr_tti_tx == 3) {
+ LOG_I(PHY, "sbuframe=%d \n",nr_tti_tx);
+ if ((harq_ack0 == 1) && (harq_ack1 == 1) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
+ b[0] = 1;
+ b[1] = 1;
+ return(n1_pucch1);
+ } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch1);
+ } else if (((harq_ack0 == 0) || (harq_ack0 == 2)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 0) && (harq_ack3 == 2)) {
+ b[0] = 1;
+ b[1] = 1;
+ return(n1_pucch2);
+ } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 1)) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch1);
+ } else if ((harq_ack0 == 0) && (harq_ack1 == 2) && (harq_ack2 == 2) && (harq_ack3 == 2)) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch0);
+ } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch1);
+ } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch3);
+ } else if (((harq_ack0 == 0) || (harq_ack0 == 2)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 0)) {
+ b[0] = 1;
+ b[1] = 1;
+ return(n1_pucch3);
+ } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch2);
+ } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 1)) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch0);
+ } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch0);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch3);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 0) && (harq_ack2 == 2) && (harq_ack3 == 2)) {
+ b[0] = 0;
+ b[1] = 0;
+ return(n1_pucch1);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch2);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && (harq_ack3 == 1)) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch3);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0)) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch1);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && (harq_ack3 == 1)) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch3);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1) && ((harq_ack3 == 2) || (harq_ack3 == 0))) {
+ b[0] = 0;
+ b[1] = 0;
+ return(n1_pucch2);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack3 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
+ b[0] = 0;
+ b[1] = 0;
+ return(n1_pucch3);
+ }
+ } else if (nr_tti_tx == 2) {
+ if ((harq_ack0 == 1) && (harq_ack1 == 1) && (harq_ack2 == 1)) {
+ b[0] = 1;
+ b[1] = 1;
+ return(n1_pucch2);
+ } else if ((harq_ack0 == 1) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
+ b[0] = 1;
+ b[1] = 1;
+ return(n1_pucch1);
+ } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1)) {
+ b[0] = 1;
+ b[1] = 1;
+ return(n1_pucch0);
+ } else if ((harq_ack0 == 1) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch0);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && (harq_ack2 == 1)) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch2);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && (harq_ack1 == 1) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
+ b[1] = 0;
+ b[0] = 0;
+ return(n1_pucch1);
+ } else if (((harq_ack0 == 2) || (harq_ack0 == 0)) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && (harq_ack2 == 1)) {
+ b[0] = 0;
+ b[1] = 0;
+ return(n1_pucch2);
+ } else if ((harq_ack0 == 2) && (harq_ack1 == 2) && (harq_ack2 == 0)) {
+ b[0] = 0;
+ b[1] = 1;
+ return(n1_pucch2);
+ } else if ((harq_ack0 == 2) && (harq_ack1 == 0) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch1);
+ } else if ((harq_ack0 == 0) && ((harq_ack1 == 2) || (harq_ack1 == 0)) && ((harq_ack2 == 2) || (harq_ack2 == 0))) {
+ b[0] = 1;
+ b[1] = 0;
+ return(n1_pucch0);
+ }
+
+ }
+ } else if (SR==1) { // SR and 0,1,or 2 ACKS, (first 3 entries in Table 7.3-1 of 36.213)
+ // this should be number of ACKs (including
+ ack_counter = 0;
+ if (harq_ack0==1)
+ ack_counter ++;
+ if (harq_ack1==1)
+ ack_counter ++;
+ if (harq_ack2==1)
+ ack_counter ++;
+ if (harq_ack3==1)
+ ack_counter ++;
+
+ switch (ack_counter) {
+ case 0:
+ b[0] = 0;
+ b[1] = 0;
+ break;
+
+ case 1:
+ b[0] = 1;
+ b[1] = 1;
+ break;
+
+ case 2:
+ b[0] = 1;
+ b[1] = 0;
+ break;
+
+ case 3:
+ b[0] = 0;
+ b[1] = 1;
+ break;
+
+ case 4:
+ b[0] = 1;
+ b[1] = 1;
+ break;
+ }
+
+ ack_counter = 0;
+ return(ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
+ }
+
+ break;
} // switch tdd_config
}
@@ -1220,33 +1266,33 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
#ifdef EMOS
- void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
+void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
uint8_t harq_pid;
if (next_slot%2==0) {
- // get harq_pid from nr_tti_tx relationship
- harq_pid = nr_subframe2harq_pid(&ue->frame_parms,ue->frame,(next_slot>>1));
- if (harq_pid==255) {
- LOG_E(PHY,"[UE%d] Frame %d : FATAL ERROR: illegal harq_pid, returning\n",
- 0,ue->frame);
- return;
- }
+ // get harq_pid from nr_tti_tx relationship
+ harq_pid = nr_subframe2harq_pid(&ue->frame_parms,ue->frame,(next_slot>>1));
+ if (harq_pid==255) {
+ LOG_E(PHY,"[UE%d] Frame %d : FATAL ERROR: illegal harq_pid, returning\n",
+ 0,ue->frame);
+ return;
+ }
- if (ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
- emos_dump_UE.uci_cnt[next_slot>>1] = 1;
- memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o,ulsch[eNB_id]->o,MAX_CQI_BITS*sizeof(char));
- emos_dump_UE.UCI_data[0][next_slot>>1].O = ulsch[eNB_id]->O;
- memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_RI,ulsch[eNB_id]->o_RI,2*sizeof(char));
- emos_dump_UE.UCI_data[0][next_slot>>1].O_RI = ulsch[eNB_id]->O_RI;
- memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_ACK,ulsch[eNB_id]->o_ACK,4*sizeof(char));
- emos_dump_UE.UCI_data[0][next_slot>>1].O_ACK = ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK;
- }
- else {
- emos_dump_UE.uci_cnt[next_slot>>1] = 0;
- }
- }
+ if (ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
+ emos_dump_UE.uci_cnt[next_slot>>1] = 1;
+ memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o,ulsch[eNB_id]->o,MAX_CQI_BITS*sizeof(char));
+ emos_dump_UE.UCI_data[0][next_slot>>1].O = ulsch[eNB_id]->O;
+ memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_RI,ulsch[eNB_id]->o_RI,2*sizeof(char));
+ emos_dump_UE.UCI_data[0][next_slot>>1].O_RI = ulsch[eNB_id]->O_RI;
+ memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_ACK,ulsch[eNB_id]->o_ACK,4*sizeof(char));
+ emos_dump_UE.UCI_data[0][next_slot>>1].O_ACK = ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK;
+ }
+ else {
+ emos_dump_UE.uci_cnt[next_slot>>1] = 0;
+ }
}
+}
#endif
@@ -1273,88 +1319,88 @@ void ulsch_common_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)//this is the EXPRESS MIMO case
ulsch_start = (ue->rx_offset+nr_tti_tx*frame_parms->samples_per_subframe-
- ue->hw_timing_advance-
- ue->timing_advance-
- ue->N_TA_offset+5);
+ ue->hw_timing_advance-
+ ue->timing_advance-
+ ue->N_TA_offset+5);
//LOG_E(PHY,"ul-signal [nr_tti_rx: %d, ulsch_start %d]\n",nr_tti_tx, ulsch_start);
if(ulsch_start < 0)
- ulsch_start = ulsch_start + (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe);
+ ulsch_start = ulsch_start + (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe);
if (ulsch_start > (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe))
- ulsch_start = ulsch_start % (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe);
+ ulsch_start = ulsch_start % (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe);
//LOG_E(PHY,"ul-signal [nr_tti_rx: %d, ulsch_start %d]\n",nr_tti_tx, ulsch_start);
#else //this is the normal case
ulsch_start = (frame_parms->samples_per_subframe*nr_tti_tx)-ue->N_TA_offset; //-ue->timing_advance;
#endif //else EXMIMO
-//#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
+ //#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
if (empty_subframe)
- {
-//#if 1
+ {
+ //#if 1
overflow = ulsch_start - 9*frame_parms->samples_per_subframe;
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
- if (overflow > 0)
- {
- memset(&ue->common_vars.txdata[aa][ulsch_start],0,4*(frame_parms->samples_per_subframe-overflow));
- memset(&ue->common_vars.txdata[aa][0],0,4*overflow);
- }
- else
- {
- memset(&ue->common_vars.txdata[aa][ulsch_start],0,4*frame_parms->samples_per_subframe);
- }
+ if (overflow > 0)
+ {
+ memset(&ue->common_vars.txdata[aa][ulsch_start],0,4*(frame_parms->samples_per_subframe-overflow));
+ memset(&ue->common_vars.txdata[aa][0],0,4*overflow);
+ }
+ else
+ {
+ memset(&ue->common_vars.txdata[aa][ulsch_start],0,4*frame_parms->samples_per_subframe);
+ }
}
-/*#else
- overflow = ulsch_start - 9*frame_parms->samples_per_subframe;
- for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
- for (k=ulsch_start; k<cmin(frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,ulsch_start+frame_parms->samples_per_subframe); k++) {
- ((short*)ue->common_vars.txdata[aa])[2*k] = 0;
- ((short*)ue->common_vars.txdata[aa])[2*k+1] = 0;
- }
+ /*#else
+ overflow = ulsch_start - 9*frame_parms->samples_per_subframe;
+ for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
+ for (k=ulsch_start; k<cmin(frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,ulsch_start+frame_parms->samples_per_subframe); k++) {
+ ((short*)ue->common_vars.txdata[aa])[2*k] = 0;
+ ((short*)ue->common_vars.txdata[aa])[2*k+1] = 0;
+ }
- for (k=0; k<overflow; k++) {
- ((short*)ue->common_vars.txdata[aa])[2*k] = 0;
- ((short*)ue->common_vars.txdata[aa])[2*k+1] = 0;
- }
- }
-endif*/
+ for (k=0; k<overflow; k++) {
+ ((short*)ue->common_vars.txdata[aa])[2*k] = 0;
+ ((short*)ue->common_vars.txdata[aa])[2*k+1] = 0;
+ }
+ }
+ endif*/
return;
- }
+ }
if ((frame_tx%100) == 0)
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: ulsch_start = %d (rxoff %d, HW TA %d, timing advance %d, TA_offset %d\n",
- ue->Mod_id,frame_tx,nr_tti_tx,
- ulsch_start,
- ue->rx_offset,
- ue->hw_timing_advance,
- ue->timing_advance,
- ue->N_TA_offset);
+ ue->Mod_id,frame_tx,nr_tti_tx,
+ ulsch_start,
+ ue->rx_offset,
+ ue->hw_timing_advance,
+ ue->timing_advance,
+ ue->N_TA_offset);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
if (frame_parms->Ncp == 1)
PHY_ofdm_mod(&ue->common_vars.txdataF[aa][nr_tti_tx*nsymb*frame_parms->ofdm_symbol_size],
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
- dummy_tx_buffer,
+ dummy_tx_buffer,
#else
- &ue->common_vars.txdata[aa][ulsch_start],
+ &ue->common_vars.txdata[aa][ulsch_start],
#endif
- frame_parms->ofdm_symbol_size,
- nsymb,
- frame_parms->nb_prefix_samples,
- CYCLIC_PREFIX);
+ frame_parms->ofdm_symbol_size,
+ nsymb,
+ frame_parms->nb_prefix_samples,
+ CYCLIC_PREFIX);
else
normal_prefix_mod(&ue->common_vars.txdataF[aa][nr_tti_tx*nsymb*frame_parms->ofdm_symbol_size],
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
- dummy_tx_buffer,
+ dummy_tx_buffer,
#else
- &ue->common_vars.txdata[aa][ulsch_start],
+ &ue->common_vars.txdata[aa][ulsch_start],
#endif
- nsymb,
- &ue->frame_parms);
+ nsymb,
+ &ue->frame_parms);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
@@ -1383,28 +1429,28 @@ endif*/
// handle switch before 1st TX nr_tti_rx, guarantee that the slot prior to transmission is switch on
for (k=ulsch_start - (frame_parms->samples_per_subframe>>1) ; k<ulsch_start ; k++) {
if (k<0)
- ue->common_vars.txdata[aa][k+frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
+ ue->common_vars.txdata[aa][k+frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else if (k>(frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
- ue->common_vars.txdata[aa][k-frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
+ ue->common_vars.txdata[aa][k-frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else
- ue->common_vars.txdata[aa][k] &= 0xFFFEFFFE;
+ ue->common_vars.txdata[aa][k] &= 0xFFFEFFFE;
}
#endif
#endif
/*
- only for debug
- LOG_I(PHY,"ul-signal [nr_tti_rx: %d, ulsch_start %d, TA: %d, rxOffset: %d, timing_advance: %d, hw_timing_advance: %d]\n",nr_tti_tx, ulsch_start, ue->N_TA_offset, ue->rx_offset, ue->timing_advance, ue->hw_timing_advance);
- if( (crash == 1) && (nr_tti_tx == 0) )
- {
+ only for debug
+ LOG_I(PHY,"ul-signal [nr_tti_rx: %d, ulsch_start %d, TA: %d, rxOffset: %d, timing_advance: %d, hw_timing_advance: %d]\n",nr_tti_tx, ulsch_start, ue->N_TA_offset, ue->rx_offset, ue->timing_advance, ue->hw_timing_advance);
+ if( (crash == 1) && (nr_tti_tx == 0) )
+ {
LOG_E(PHY,"***** DUMP TX Signal [ulsch_start %d] *****\n",ulsch_start);
write_output("txBuff.m","txSignal",&ue->common_vars.txdata[aa][ulsch_start],frame_parms->samples_per_subframe,1,1);
- }
+ }
*/
} //nb_antennas_tx
#if UE_TIMING_TRACE
- stop_meas(&ue->ofdm_mod_stats);
+ stop_meas(&ue->ofdm_mod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_ULSCH_COMMON,VCD_FUNCTION_OUT);
@@ -1433,113 +1479,113 @@ void ue_prach_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) {
LOG_D(PHY,"Getting PRACH resources\n");
//ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(ue->Mod_id,
- ue->CC_id,
- frame_tx,
- eNB_id,
- nr_tti_tx);
- LOG_D(PHY,"Got prach_resources for eNB %d address %p, RRCCommon %p\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[ue->Mod_id].radioResourceConfigCommon);
- LOG_D(PHY,"Prach resources %p\n",ue->prach_resources[eNB_id]);
- }
+ ue->CC_id,
+ frame_tx,
+ eNB_id,
+ nr_tti_tx);
+ LOG_D(PHY,"Got prach_resources for eNB %d address %p, RRCCommon %p\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[ue->Mod_id].radioResourceConfigCommon);
+ LOG_D(PHY,"Prach resources %p\n",ue->prach_resources[eNB_id]);
}
+}
- if (ue->prach_resources[eNB_id]!=NULL) {
+if (ue->prach_resources[eNB_id]!=NULL) {
- ue->generate_prach=1;
- ue->prach_cnt=0;
+ ue->generate_prach=1;
+ ue->prach_cnt=0;
#ifdef SMBV
- ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
+ ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
#endif
#ifdef OAI_EMU
- ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex;
+ ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex;
#endif
- if (abstraction_flag == 0) {
+ if (abstraction_flag == 0) {
- LOG_I(PHY,"mode %d\n",mode);
+ LOG_I(PHY,"mode %d\n",mode);
- if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) {
- ue->tx_power_dBm[nr_tti_tx] = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id);
- }
- else {
- ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm;
- ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
- }
+ if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) {
+ ue->tx_power_dBm[nr_tti_tx] = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id);
+ }
+ else {
+ ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm;
+ ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
+ }
- LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : Generating PRACH, preamble %d,PL %d, P0_PRACH %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n",
- ue->Mod_id,
- frame_tx,
- nr_tti_tx,
- ue->prach_resources[eNB_id]->ra_PreambleIndex,
- get_PL(ue->Mod_id,ue->CC_id,eNB_id),
- ue->tx_power_dBm[nr_tti_tx],
- ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER,
- ue->prach_resources[eNB_id]->ra_TDD_map_index,
- ue->prach_resources[eNB_id]->ra_RNTI);
+ LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : Generating PRACH, preamble %d,PL %d, P0_PRACH %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n",
+ ue->Mod_id,
+ frame_tx,
+ nr_tti_tx,
+ ue->prach_resources[eNB_id]->ra_PreambleIndex,
+ get_PL(ue->Mod_id,ue->CC_id,eNB_id),
+ ue->tx_power_dBm[nr_tti_tx],
+ ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER,
+ ue->prach_resources[eNB_id]->ra_TDD_map_index,
+ ue->prach_resources[eNB_id]->ra_RNTI);
- ue->tx_total_RE[nr_tti_tx] = 96;
+ ue->tx_total_RE[nr_tti_tx] = 96;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
- ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx],
- ue->tx_power_max_dBm,
- ue->frame_parms.N_RB_UL,
- 6);
+ ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx],
+ ue->tx_power_max_dBm,
+ ue->frame_parms.N_RB_UL,
+ 6);
#else
- ue->prach_vars[eNB_id]->amp = AMP;
-#endif
- if ((mode == calib_prach_tx) && (((proc->frame_tx&0xfffe)%100)==0))
- LOG_D(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : PRACH TX power %d dBm, amp %d\n",
- ue->Mod_id,
- proc->frame_rx,
- proc->nr_tti_tx,
- ue->tx_power_dBm[nr_tti_tx],
- ue->prach_vars[eNB_id]->amp);
-
-
- // start_meas(&ue->tx_prach);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN);
- prach_power = generate_prach(ue,eNB_id,nr_tti_tx,frame_tx);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT);
- // stop_meas(&ue->tx_prach);
- LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n",
- ue->Mod_id,
- get_PL(ue->Mod_id,ue->CC_id,eNB_id),
- ue->tx_power_dBm[nr_tti_tx],
- dB_fixed(prach_power),
- ue->prach_vars[eNB_id]->amp);
- } else {
- UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_flag=1;
- UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex;
- }
+ ue->prach_vars[eNB_id]->amp = AMP;
+#endif
+ if ((mode == calib_prach_tx) && (((proc->frame_tx&0xfffe)%100)==0))
+ LOG_D(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d : PRACH TX power %d dBm, amp %d\n",
+ ue->Mod_id,
+ proc->frame_rx,
+ proc->nr_tti_tx,
+ ue->tx_power_dBm[nr_tti_tx],
+ ue->prach_vars[eNB_id]->amp);
+
+
+ // start_meas(&ue->tx_prach);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN);
+ prach_power = generate_prach(ue,eNB_id,nr_tti_tx,frame_tx);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT);
+ // stop_meas(&ue->tx_prach);
+ LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n",
+ ue->Mod_id,
+ get_PL(ue->Mod_id,ue->CC_id,eNB_id),
+ ue->tx_power_dBm[nr_tti_tx],
+ dB_fixed(prach_power),
+ ue->prach_vars[eNB_id]->amp);
+ } else {
+ UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_flag=1;
+ UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex;
+ }
- if (ue->mac_enabled==1){
- //mac_xface->Msg1_transmitted(ue->Mod_id,
- ue->CC_id,
- frame_tx,
- eNB_id);
- }
+ if (ue->mac_enabled==1){
+ //mac_xface->Msg1_transmitted(ue->Mod_id,
+ ue->CC_id,
+ frame_tx,
+ eNB_id);
+ }
- LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n",
- ue->Mod_id,frame_tx,nr_tti_tx,eNB_id,
- ue->prach_resources[eNB_id]->ra_PreambleIndex,
- ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id),
- get_PL(ue->Mod_id,ue->CC_id,eNB_id));
+LOG_I(PHY,"[UE %d][RAPROC] Frame %d, nr_tti_rx %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n",
+ ue->Mod_id,frame_tx,nr_tti_tx,eNB_id,
+ ue->prach_resources[eNB_id]->ra_PreambleIndex,
+ ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id),
+ get_PL(ue->Mod_id,ue->CC_id,eNB_id));
- }
+}
- // if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue
- if (mode == calib_prach_tx)
- ue->prach_resources[eNB_id]=NULL;
+// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue
+if (mode == calib_prach_tx)
+ ue->prach_resources[eNB_id]=NULL;
- LOG_D(PHY,"[UE %d] frame %d nr_tti_rx %d : generate_prach %d, prach_cnt %d\n",
- ue->Mod_id,frame_tx,nr_tti_tx,ue->generate_prach,ue->prach_cnt);
+LOG_D(PHY,"[UE %d] frame %d nr_tti_rx %d : generate_prach %d, prach_cnt %d\n",
+ ue->Mod_id,frame_tx,nr_tti_tx,ue->generate_prach,ue->prach_cnt);
- ue->prach_cnt++;
+ue->prach_cnt++;
- if (ue->prach_cnt==3)
- ue->generate_prach=0;
+if (ue->prach_cnt==3)
+ ue->generate_prach=0;
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_OUT);
+VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PRACH, VCD_FUNCTION_OUT);
}
#endif
@@ -1577,33 +1623,33 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
if (ue->mac_enabled == 1) {
if ((ue->ulsch_Msg3_active[eNB_id] == 1) &&
- (ue->ulsch_Msg3_frame[eNB_id] == frame_tx) &&
- (ue->ulsch_Msg3_subframe[eNB_id] == nr_tti_tx)) { // Initial Transmission of Msg3
+ (ue->ulsch_Msg3_frame[eNB_id] == frame_tx) &&
+ (ue->ulsch_Msg3_subframe[eNB_id] == nr_tti_tx)) { // Initial Transmission of Msg3
ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->round==0)
- generate_ue_ulsch_params_from_rar(ue,
- proc,
- eNB_id);
+ generate_ue_ulsch_params_from_rar(ue,
+ proc,
+ eNB_id);
ue->ulsch[eNB_id]->power_offset = 14;
LOG_D(PHY,"[UE %d][RAPROC] Frame %d: Setting Msg3_flag in nr_tti_rx %d, for harq_pid %d\n",
- Mod_id,
- frame_tx,
- nr_tti_tx,
- harq_pid);
+ Mod_id,
+ frame_tx,
+ nr_tti_tx,
+ harq_pid);
Msg3_flag = 1;
} else {
- /* no pusch has been scheduled on this transmit slot */
+ /* no pusch has been scheduled on this transmit slot */
if (harq_pid == NR_MAX_HARQ_PROCESSES) {
- LOG_E(PHY,"[UE%d] Frame %d nr_tti_rx %d ulsch_decoding.c: FATAL ERROR: illegal harq_pid, returning\n",
+ LOG_E(PHY,"[UE%d] Frame %d nr_tti_rx %d ulsch_decoding.c: FATAL ERROR: illegal harq_pid, returning\n",
Mod_id,frame_tx, nr_tti_tx);
//mac_xface->macphy_exit("Error in ulsch_decoding");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
- stop_meas(&ue->phy_proc_tx);
+ stop_meas(&ue->phy_proc_tx);
#endif
return;
}
@@ -1617,31 +1663,31 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
uint8_t isBad = 0;
if (ue->frame_parms.N_RB_UL <= ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb) {
LOG_D(PHY,"Invalid PUSCH first_RB=%d for N_RB_UL=%d\n",
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb,
- ue->frame_parms.N_RB_UL);
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb,
+ ue->frame_parms.N_RB_UL);
isBad = 1;
}
if (ue->frame_parms.N_RB_UL < ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb) {
LOG_D(PHY,"Invalid PUSCH num_RB=%d for N_RB_UL=%d\n",
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb,
- ue->frame_parms.N_RB_UL);
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb,
+ ue->frame_parms.N_RB_UL);
isBad = 1;
}
if (0 > ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb) {
LOG_D(PHY,"Invalid PUSCH first_RB=%d\n",
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb);
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb);
isBad = 1;
}
if (0 >= ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb) {
LOG_D(PHY,"Invalid PUSCH num_RB=%d\n",
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb);
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb);
isBad = 1;
}
if (ue->frame_parms.N_RB_UL < (ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb + ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb)) {
LOG_D(PHY,"Invalid PUSCH num_RB=%d + first_RB=%d for N_RB_UL=%d\n",
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb,
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb,
- ue->frame_parms.N_RB_UL);
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb,
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb,
+ ue->frame_parms.N_RB_UL);
isBad = 1;
}
if ((0 > ue->ulsch[eNB_id]->harq_processes[harq_pid]->rvidx) ||
@@ -1651,8 +1697,8 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
}
if (20 < ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs) {
- LOG_D(PHY,"Not supported MCS in OAI mcs=%d\n", ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs);
- isBad = 1;
+ LOG_D(PHY,"Not supported MCS in OAI mcs=%d\n", ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs);
+ isBad = 1;
}
if (isBad) {
@@ -1668,26 +1714,26 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
// ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
LOG_D(PHY,"Generating PUSCH (Abssubframe: %d.%d): harq-Id: %d, round: %d, MaxReTrans: %d \n",frame_tx,nr_tti_tx,harq_pid,ue->ulsch[eNB_id]->harq_processes[harq_pid]->round,ue->ulsch[eNB_id]->Mlimit);
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->round >= (ue->ulsch[eNB_id]->Mlimit - 1))
- {
+ {
LOG_D(PHY,"PUSCH MAX Retransmission achieved ==> send last pusch\n");
ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0;
- }
+ }
ack_status_cw0 = nr_reset_ack(&ue->frame_parms,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- ue->ulsch[eNB_id]->o_ACK,
- &Nbundled,
- 0);
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ ue->ulsch[eNB_id]->o_ACK,
+ &Nbundled,
+ 0);
ack_status_cw1 = nr_reset_ack(&ue->frame_parms,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][1]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- ue->ulsch[eNB_id]->o_ACK,
- &NbundledCw1,
- 1);
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][1]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ ue->ulsch[eNB_id]->o_ACK,
+ &NbundledCw1,
+ 1);
//Nbundled = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack;
//ue->ulsch[eNB_id]->bundling = Nbundled;
@@ -1698,10 +1744,10 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
// check Periodic CQI/RI reporting
cqi_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0)&&
- (is_cqi_TXOp(ue,proc,eNB_id)==1));
+ (is_cqi_TXOp(ue,proc,eNB_id)==1));
ri_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) &&
- (is_ri_TXOp(ue,proc,eNB_id)==1));
+ (is_ri_TXOp(ue,proc,eNB_id)==1));
// compute CQI/RI resources
compute_cqi_ri_resources(ue, ue->ulsch[eNB_id], eNB_id, ue->ulsch[eNB_id]->rnti, P_RNTI, CBA_RNTI, cqi_status, ri_status);
@@ -1711,44 +1757,44 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
// check if we received a PDSCH at nr_tti_tx - 4
// ==> send ACK/NACK on PUSCH
if (ue->frame_parms.frame_type == FDD)
- {
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK = ack_status_cw0 + ack_status_cw1;
- }
+ {
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK = ack_status_cw0 + ack_status_cw1;
+ }
#if T_TRACER
- if(ue->ulsch[eNB_id]->o_ACK[0])
- {
- LOG_I(PHY,"PUSCH ACK\n");
- T(T_UE_PHY_DLSCH_UE_ACK, T_INT(eNB_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx), T_INT(Mod_id), T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti),
- T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
- }
- else
- {
- LOG_I(PHY,"PUSCH NACK\n");
- T(T_UE_PHY_DLSCH_UE_NACK, T_INT(eNB_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx), T_INT(Mod_id), T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti),
- T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
- }
+ if(ue->ulsch[eNB_id]->o_ACK[0])
+ {
+ LOG_I(PHY,"PUSCH ACK\n");
+ T(T_UE_PHY_DLSCH_UE_ACK, T_INT(eNB_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx), T_INT(Mod_id), T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti),
+ T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
+ }
+ else
+ {
+ LOG_I(PHY,"PUSCH NACK\n");
+ T(T_UE_PHY_DLSCH_UE_NACK, T_INT(eNB_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx), T_INT(Mod_id), T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti),
+ T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
+ }
#endif
#ifdef UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d][PDSCH %x] AbsSubFrame %d.%d Generating ACK (%d,%d) for %d bits on PUSCH\n",
- Mod_id,
- ue->ulsch[eNB_id]->rnti,
- frame_tx%1024,nr_tti_tx,
- ue->ulsch[eNB_id]->o_ACK[0],ue->ulsch[eNB_id]->o_ACK[1],
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK);
+ Mod_id,
+ ue->ulsch[eNB_id]->rnti,
+ frame_tx%1024,nr_tti_tx,
+ ue->ulsch[eNB_id]->o_ACK[0],ue->ulsch[eNB_id]->o_ACK[1],
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK);
#endif
}
//#ifdef UE_DEBUG_TRACE
- LOG_I(PHY,
- "[UE %d][PUSCH %d] AbsSubframe %d.%d Generating PUSCH : first_rb %d, nb_rb %d, round %d, mcs %d, tbs %d, rv %d, "
- "cyclic_shift %d (cyclic_shift_common %d,n_DMRS2 %d,n_PRS %d), ACK (%d,%d), O_ACK %d, ack_status_cw0 %d ack_status_cw1 %d bundling %d, Nbundled %d, CQI %d, RI %d\n",
+ LOG_I(PHY,
+ "[UE %d][PUSCH %d] AbsSubframe %d.%d Generating PUSCH : first_rb %d, nb_rb %d, round %d, mcs %d, tbs %d, rv %d, "
+ "cyclic_shift %d (cyclic_shift_common %d,n_DMRS2 %d,n_PRS %d), ACK (%d,%d), O_ACK %d, ack_status_cw0 %d ack_status_cw1 %d bundling %d, Nbundled %d, CQI %d, RI %d\n",
Mod_id,harq_pid,frame_tx%1024,nr_tti_tx,
first_rb,nb_rb,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs,
- ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS,
+ ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->rvidx,
(ue->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift+
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2+
@@ -1763,7 +1809,7 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
ue->ulsch[eNB_id]->bundling, Nbundled,
cqi_status,
ri_status);
- //#endif
+ //#endif
@@ -1818,149 +1864,149 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
stop_meas(&ue->ulsch_encoding_stats);
#endif
if (ue->mac_enabled == 1) {
- // signal MAC that Msg3 was sent
- //mac_xface->Msg3_transmitted(Mod_id,
- CC_id,
- frame_tx,
- eNB_id);
- }
- } // Msg3_flag==1
- else {
- input_buffer_length = ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS/8;
+ // signal MAC that Msg3 was sent
+ //mac_xface->Msg3_transmitted(Mod_id,
+ CC_id,
+ frame_tx,
+ eNB_id);
+ }
+ } // Msg3_flag==1
+ else {
+ input_buffer_length = ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS/8;
- if (ue->mac_enabled==1) {
- // LOG_D(PHY,"[UE %d] ULSCH : Searching for MAC SDUs\n",Mod_id);
- if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->round==0) {
- //if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
- access_mode=SCHEDULED_ACCESS;
- //mac_xface->ue_get_sdu(Mod_id,
+ if (ue->mac_enabled==1) {
+ // LOG_D(PHY,"[UE %d] ULSCH : Searching for MAC SDUs\n",Mod_id);
+ if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->round==0) {
+ //if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
+ access_mode=SCHEDULED_ACCESS;
+ //mac_xface->ue_get_sdu(Mod_id,
CC_id,
- frame_tx,
- proc->subframe_tx,
- nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
- eNB_id,
- ulsch_input_buffer,
- input_buffer_length,
- &access_mode);
- }
+ frame_tx,
+ proc->subframe_tx,
+ nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
+ eNB_id,
+ ulsch_input_buffer,
+ input_buffer_length,
+ &access_mode);
+ }
#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_ULSCH
- LOG_D(PHY,"[UE] Frame %d, nr_tti_rx %d : ULSCH SDU (TX harq_pid %d) (%d bytes) : \n",frame_tx,nr_tti_tx,harq_pid, ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS>>3);
+ LOG_D(PHY,"[UE] Frame %d, nr_tti_rx %d : ULSCH SDU (TX harq_pid %d) (%d bytes) : \n",frame_tx,nr_tti_tx,harq_pid, ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS>>3);
- for (i=0; i<ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS>>3; i++)
- LOG_T(PHY,"%x.",ulsch_input_buffer[i]);
+ for (i=0; i<ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS>>3; i++)
+ LOG_T(PHY,"%x.",ulsch_input_buffer[i]);
- LOG_T(PHY,"\n");
+ LOG_T(PHY,"\n");
#endif
#endif
- }
- else {
- unsigned int taus(void);
+ }
+ else {
+ unsigned int taus(void);
- for (i=0; i<input_buffer_length; i++)
- ulsch_input_buffer[i]= (uint8_t)(taus()&0xff);
+ for (i=0; i<input_buffer_length; i++)
+ ulsch_input_buffer[i]= (uint8_t)(taus()&0xff);
- }
+ }
#if UE_TIMING_TRACE
- start_meas(&ue->ulsch_encoding_stats);
+ start_meas(&ue->ulsch_encoding_stats);
#endif
- if (abstraction_flag==0) {
+ if (abstraction_flag==0) {
- if (ulsch_encoding(ulsch_input_buffer,
- ue,
- harq_pid,
- eNB_id,
- proc->nr_tti_rx,
- ue->transmission_mode[eNB_id],0,
- Nbundled)!=0) {
- LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
+ if (ulsch_encoding(ulsch_input_buffer,
+ ue,
+ harq_pid,
+ eNB_id,
+ proc->nr_tti_rx,
+ ue->transmission_mode[eNB_id],0,
+ Nbundled)!=0) {
+ LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->phy_proc_tx);
#endif
- return;
- }
- }
+ return;
+ }
+ }
#ifdef PHY_ABSTRACTION
- else {
- ulsch_encoding_emul(ulsch_input_buffer,ue,eNB_id,proc->nr_tti_rx,harq_pid,0);
- }
+ else {
+ ulsch_encoding_emul(ulsch_input_buffer,ue,eNB_id,proc->nr_tti_rx,harq_pid,0);
+ }
#endif
#if UE_TIMING_TRACE
- stop_meas(&ue->ulsch_encoding_stats);
+ stop_meas(&ue->ulsch_encoding_stats);
#endif
- }
+}
- if (abstraction_flag == 0) {
- if (ue->mac_enabled==1) {
- nr_pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag);
- ue->tx_power_dBm[nr_tti_tx] = ue->ulsch[eNB_id]->Po_PUSCH;
- }
- else {
- ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm;
- }
- ue->tx_total_RE[nr_tti_tx] = nb_rb*12;
+if (abstraction_flag == 0) {
+ if (ue->mac_enabled==1) {
+ nr_pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag);
+ ue->tx_power_dBm[nr_tti_tx] = ue->ulsch[eNB_id]->Po_PUSCH;
+ }
+ else {
+ ue->tx_power_dBm[nr_tti_tx] = ue->tx_power_max_dBm;
+ }
+ ue->tx_total_RE[nr_tti_tx] = nb_rb*12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
- tx_amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx],
- ue->tx_power_max_dBm,
- ue->frame_parms.N_RB_UL,
- nb_rb);
+ tx_amp = get_tx_amp(ue->tx_power_dBm[nr_tti_tx],
+ ue->tx_power_max_dBm,
+ ue->frame_parms.N_RB_UL,
+ nb_rb);
#else
- tx_amp = AMP;
+ tx_amp = AMP;
#endif
#if T_TRACER
- T(T_UE_PHY_PUSCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]),
- T_INT(tx_amp),T_INT(ue->ulsch[eNB_id]->f_pusch),T_INT(get_PL(Mod_id,0,eNB_id)),T_INT(nb_rb));
+ T(T_UE_PHY_PUSCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]),
+ T_INT(tx_amp),T_INT(ue->ulsch[eNB_id]->f_pusch),T_INT(get_PL(Mod_id,0,eNB_id)),T_INT(nb_rb));
#endif
#ifdef UE_DEBUG_TRACE
- LOG_I(PHY,"[UE %d][PUSCH %d] AbsSubFrame %d.%d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
- Mod_id,harq_pid,frame_tx%1024,nr_tti_tx,ue->tx_power_dBm[nr_tti_tx],ue->tx_power_max_dBm, tx_amp);
+ LOG_I(PHY,"[UE %d][PUSCH %d] AbsSubFrame %d.%d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
+ Mod_id,harq_pid,frame_tx%1024,nr_tti_tx,ue->tx_power_dBm[nr_tti_tx],ue->tx_power_max_dBm, tx_amp);
#endif
- if (tx_amp>100)
- tx_amp =100;
+ if (tx_amp>100)
+ tx_amp =100;
- //LOG_I(PHY,"[UE %d][PUSCH %d] after AbsSubFrame %d.%d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
- // Mod_id,harq_pid,frame_tx%1024,nr_tti_tx,ue->tx_power_dBm[nr_tti_tx],ue->tx_power_max_dBm, tx_amp);
+ //LOG_I(PHY,"[UE %d][PUSCH %d] after AbsSubFrame %d.%d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
+ // Mod_id,harq_pid,frame_tx%1024,nr_tti_tx,ue->tx_power_dBm[nr_tti_tx],ue->tx_power_max_dBm, tx_amp);
#if UE_TIMING_TRACE
- start_meas(&ue->ulsch_modulation_stats);
+ start_meas(&ue->ulsch_modulation_stats);
#endif
- ulsch_modulation(ue->common_vars.txdataF,
- tx_amp,
- frame_tx,
- nr_tti_tx,
- &ue->frame_parms,
- ue->ulsch[eNB_id]);
- for (aa=0; aa<1/*frame_parms->nb_antennas_tx*/; aa++)
- generate_drs_pusch(ue,
- proc,
- eNB_id,
- tx_amp,
- nr_tti_tx,
- first_rb,
- nb_rb,
- aa);
+ ulsch_modulation(ue->common_vars.txdataF,
+ tx_amp,
+ frame_tx,
+ nr_tti_tx,
+ &ue->frame_parms,
+ ue->ulsch[eNB_id]);
+ for (aa=0; aa<1/*frame_parms->nb_antennas_tx*/; aa++)
+ generate_drs_pusch(ue,
+ proc,
+ eNB_id,
+ tx_amp,
+ nr_tti_tx,
+ first_rb,
+ nb_rb,
+ aa);
#if UE_TIMING_TRACE
- stop_meas(&ue->ulsch_modulation_stats);
+ stop_meas(&ue->ulsch_modulation_stats);
#endif
- }
+ }
- if (abstraction_flag==1) {
- // clear SR
- ue->sr[nr_tti_tx]=0;
- }
- } // subframe_scheduling_flag==1
+if (abstraction_flag==1) {
+ // clear SR
+ ue->sr[nr_tti_tx]=0;
+ }
+} // subframe_scheduling_flag==1
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_ULSCH_UESPEC,VCD_FUNCTION_OUT);
+VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_ULSCH_UESPEC,VCD_FUNCTION_OUT);
#endif
@@ -1982,47 +2028,47 @@ void ue_srs_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id
uint8_t isSrsTxOccasion = pSoundingrs_ul_config_dedicated->srsUeSubframe;
if(isSrsTxOccasion)
- {
- ue->generate_ul_signal[eNB_id] = 1;
- if (ue->mac_enabled==1)
- {
- srs_power_cntl(ue,proc,eNB_id, (uint8_t*)(&nb_rb_srs), abstraction_flag);
- Po_SRS = ue->ulsch[eNB_id]->Po_SRS;
- }
- else
{
- Po_SRS = ue->tx_power_max_dBm;
- }
+ ue->generate_ul_signal[eNB_id] = 1;
+ if (ue->mac_enabled==1)
+ {
+ srs_power_cntl(ue,proc,eNB_id, (uint8_t*)(&nb_rb_srs), abstraction_flag);
+ Po_SRS = ue->ulsch[eNB_id]->Po_SRS;
+ }
+ else
+ {
+ Po_SRS = ue->tx_power_max_dBm;
+ }
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
- if (ue->mac_enabled==1)
- {
- tx_amp = get_tx_amp(Po_SRS,
- ue->tx_power_max_dBm,
- ue->frame_parms.N_RB_UL,
- nb_rb_srs);
- }
- else
- {
- tx_amp = AMP;
- }
+ if (ue->mac_enabled==1)
+ {
+ tx_amp = get_tx_amp(Po_SRS,
+ ue->tx_power_max_dBm,
+ ue->frame_parms.N_RB_UL,
+ nb_rb_srs);
+ }
+ else
+ {
+ tx_amp = AMP;
+ }
#else
tx_amp = AMP;
#endif
- LOG_D(PHY,"SRS PROC; TX_MAX_POWER %d, Po_SRS %d, NB_RB_UL %d, NB_RB_SRS %d TX_AMPL %d\n",ue->tx_power_max_dBm,
+ LOG_D(PHY,"SRS PROC; TX_MAX_POWER %d, Po_SRS %d, NB_RB_UL %d, NB_RB_SRS %d TX_AMPL %d\n",ue->tx_power_max_dBm,
Po_SRS,
ue->frame_parms.N_RB_UL,
nb_rb_srs,
tx_amp);
- uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
- uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((nr_tti_tx*nsymb)+(nsymb-1));
- generate_srs(&ue->frame_parms,
- &ue->soundingrs_ul_config_dedicated[eNB_id],
- &ue->common_vars.txdataF[eNB_id][symbol_offset],
- tx_amp,
- nr_tti_tx);
- }
+ uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
+ uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((nr_tti_tx*nsymb)+(nsymb-1));
+ generate_srs(&ue->frame_parms,
+ &ue->soundingrs_ul_config_dedicated[eNB_id],
+ &ue->common_vars.txdataF[eNB_id][symbol_offset],
+ tx_amp,
+ nr_tti_tx);
+ }
}
int16_t get_pucch2_cqi(PHY_VARS_NR_UE *ue,int eNB_id,int *len) {
@@ -2030,16 +2076,16 @@ int16_t get_pucch2_cqi(PHY_VARS_NR_UE *ue,int eNB_id,int *len) {
if ((ue->transmission_mode[eNB_id]<4)||
(ue->transmission_mode[eNB_id]==7)) { // Mode 1-0 feedback
// 4-bit CQI message
- /*LOG_I(PHY,"compute CQI value, TM %d, length 4, Cqi Avg %d, value %d \n", ue->transmission_mode[eNB_id],
- ue->measurements.wideband_cqi_avg[eNB_id],
- sinr2cqi((double)ue->measurements.wideband_cqi_avg[eNB_id],
- ue->transmission_mode[eNB_id]));*/
+ /*LOG_I(PHY,"compute CQI value, TM %d, length 4, Cqi Avg %d, value %d \n", ue->transmission_mode[eNB_id],
+ ue->measurements.wideband_cqi_avg[eNB_id],
+ sinr2cqi((double)ue->measurements.wideband_cqi_avg[eNB_id],
+ ue->transmission_mode[eNB_id]));*/
*len=4;
return(sinr2cqi((double)ue->measurements.wideband_cqi_avg[eNB_id],
- ue->transmission_mode[eNB_id]));
+ ue->transmission_mode[eNB_id]));
}
else { // Mode 1-1 feedback, later
- //LOG_I(PHY,"compute CQI value, TM %d, length 0, Cqi Avg 0 \n", ue->transmission_mode[eNB_id]);
+ //LOG_I(PHY,"compute CQI value, TM %d, length 0, Cqi Avg 0 \n", ue->transmission_mode[eNB_id]);
*len=0;
// 2-antenna ports RI=1, 6 bits (2 PMI, 4 CQI)
@@ -2067,54 +2113,54 @@ void get_pucch_param(PHY_VARS_NR_UE *ue,
uint16_t *plength)
{
- switch (format) {
- case pucch_format1:
+ switch (format) {
+ case pucch_format1:
{
- pucch_resource[0] = ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex;
- pucch_payload[0] = 0; // payload is ignored in case of format1
- pucch_payload[1] = 0; // payload is ignored in case of format1
+ pucch_resource[0] = ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex;
+ pucch_payload[0] = 0; // payload is ignored in case of format1
+ pucch_payload[1] = 0; // payload is ignored in case of format1
}
break;
- case pucch_format1a:
- case pucch_format1b:
+ case pucch_format1a:
+ case pucch_format1b:
{
- pucch_resource[0] = nr_get_n1_pucch(ue,
- proc,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
- eNB_id,
- ack_payload,
- SR);
- pucch_payload[0] = ack_payload[0];
- pucch_payload[1] = ack_payload[1];
- //pucch_payload[1] = 1;
+ pucch_resource[0] = nr_get_n1_pucch(ue,
+ proc,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
+ eNB_id,
+ ack_payload,
+ SR);
+ pucch_payload[0] = ack_payload[0];
+ pucch_payload[1] = ack_payload[1];
+ //pucch_payload[1] = 1;
}
break;
- case pucch_format2:
+ case pucch_format2:
{
- pucch_resource[0] = ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PUCCH_ResourceIndex;
- if(cqi_report)
+ pucch_resource[0] = ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PUCCH_ResourceIndex;
+ if(cqi_report)
{
- pucch_payload[0] = get_pucch2_cqi(ue,eNB_id,(int*)plength);
+ pucch_payload[0] = get_pucch2_cqi(ue,eNB_id,(int*)plength);
}
- else
+ else
{
- *plength = 1;
- pucch_payload[0] = get_pucch2_ri(ue,eNB_id);
+ *plength = 1;
+ pucch_payload[0] = get_pucch2_ri(ue,eNB_id);
}
}
break;
- case pucch_format2a:
- case pucch_format2b:
- LOG_E(PHY,"NO Resource available for PUCCH 2a/2b \n");
+ case pucch_format2a:
+ case pucch_format2b:
+ LOG_E(PHY,"NO Resource available for PUCCH 2a/2b \n");
break;
- case pucch_format3:
- fprintf(stderr, "PUCCH format 3 not handled\n");
- abort();
- }
+ case pucch_format3:
+ fprintf(stderr, "PUCCH format 3 not handled\n");
+ abort();
+ }
}
#ifdef NR_PUCCH_SCHED
@@ -2158,15 +2204,15 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
*/
int harq_pid = nr_subframe2harq_pid(&ue->frame_parms,
- frame_tx,
- nr_tti_tx);
+ frame_tx,
+ nr_tti_tx);
if(ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag)
- {
+ {
LOG_D(PHY,"PUSCH is programmed on this nr_tti_rx [pid %d] AbsSuframe %d.%d ==> Skip PUCCH transmission \n",harq_pid,frame_tx,nr_tti_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PUCCH,VCD_FUNCTION_OUT);
return;
- }
+ }
uint8_t isShortenPucch = (pSoundingrs_ul_config_dedicated->srsCellSubframe && frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission);
@@ -2191,50 +2237,50 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
SR_payload = 0;
if (nr_is_SR_TXOp(ue,proc,eNB_id)==1)
- {
+ {
if (ue->mac_enabled==1) {
- SR_payload = mac_xface->ue_get_SR(Mod_id,
- CC_id,
- frame_tx,
- eNB_id,
- ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->crnti,
- nr_tti_tx); // nr_tti_rx used for meas gap
+ SR_payload = mac_xface->ue_get_SR(Mod_id,
+ CC_id,
+ frame_tx,
+ eNB_id,
+ ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->crnti,
+ nr_tti_tx); // nr_tti_rx used for meas gap
}
else {
- SR_payload = 1;
+ SR_payload = 1;
}
- }
+ }
ack_status_cw0 = nr_get_ack(&ue->frame_parms,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- pucch_ack_payload,
- 0);
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ pucch_ack_payload,
+ 0);
ack_status_cw1 = nr_get_ack(&ue->frame_parms,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][1]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- pucch_ack_payload,
- 1);
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][1]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ pucch_ack_payload,
+ 1);
nb_cw = ( (ack_status_cw0 != 0) ? 1:0) + ( (ack_status_cw1 != 0) ? 1:0);
cqi_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0)&&
- (is_cqi_TXOp(ue,proc,eNB_id)==1));
+ (is_cqi_TXOp(ue,proc,eNB_id)==1));
ri_status = ((ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) &&
- (is_ri_TXOp(ue,proc,eNB_id)==1));
+ (is_ri_TXOp(ue,proc,eNB_id)==1));
// Part - II
// if nothing to report ==> exit function
if( (nb_cw==0) && (SR_payload==0) && (cqi_status==0) && (ri_status==0) )
- {
+ {
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d SR_payload %d nb_cw %d pucch_ack_payload[0] %d pucch_ack_payload[1] %d cqi_status %d Return \n",
frame_tx%1024, nr_tti_tx, SR_payload, nb_cw, pucch_ack_payload[0], pucch_ack_payload[1], cqi_status);
return;
- }
+ }
// Part - III
// Decide which PUCCH format should be used if needed
@@ -2269,180 +2315,181 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
case pucch_format1:
case pucch_format1a:
case pucch_format1b:
- {
+ {
if (ue->mac_enabled == 1) {
- Po_PUCCH = nr_pucch_power_cntl(ue,proc,nr_tti_tx,eNB_id,format);
+ Po_PUCCH = nr_pucch_power_cntl(ue,proc,nr_tti_tx,eNB_id,format);
}
else {
- Po_PUCCH = ue->tx_power_max_dBm;
+ Po_PUCCH = ue->tx_power_max_dBm;
}
ue->tx_power_dBm[nr_tti_tx] = Po_PUCCH;
ue->tx_total_RE[nr_tti_tx] = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
tx_amp = get_tx_amp(Po_PUCCH,
- ue->tx_power_max_dBm,
- ue->frame_parms.N_RB_UL,
- 1);
+ ue->tx_power_max_dBm,
+ ue->frame_parms.N_RB_UL,
+ 1);
#else
tx_amp = AMP;
#endif
#if T_TRACER
T(T_UE_PHY_PUCCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]),
- T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_PL(ue->Mod_id,ue->CC_id,eNB_id)));
+ T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_PL(ue->Mod_id,ue->CC_id,eNB_id)));
#endif
#ifdef UE_DEBUG_TRACE
if(format == pucch_format1)
- {
+ {
LOG_I(PHY,"[UE %d][SR %x] AbsSubframe %d.%d Generating PUCCH 1 (SR for PUSCH), an_srs_simultanous %d, shorten_pucch %d, n1_pucch %d, Po_PUCCH %d\n",
- Mod_id,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
- frame_tx%1024, nr_tti_tx,
- frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission,
- isShortenPucch,
- ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex,
- Po_PUCCH);
- }
+ Mod_id,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
+ frame_tx%1024, nr_tti_tx,
+ frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission,
+ isShortenPucch,
+ ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex,
+ Po_PUCCH);
+ }
else
- {
+ {
if (SR_payload>0) {
- LOG_I(PHY,"[UE %d][SR %x] AbsSubFrame %d.%d Generating PUCCH %s payload %d,%d (with SR for PUSCH), an_srs_simultanous %d, shorten_pucch %d, n1_pucch %d, Po_PUCCH %d, amp %d\n",
- Mod_id,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
- frame_tx % 1024, nr_tti_tx,
- (format == pucch_format1a? "1a": (
- format == pucch_format1b? "1b" : "??")),
- pucch_ack_payload[0],pucch_ack_payload[1],
- frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission,
- isShortenPucch,
- pucch_resource,
- Po_PUCCH,
- tx_amp);
+ LOG_I(PHY,"[UE %d][SR %x] AbsSubFrame %d.%d Generating PUCCH %s payload %d,%d (with SR for PUSCH), an_srs_simultanous %d, shorten_pucch %d, n1_pucch %d, Po_PUCCH %d, amp %d\n",
+ Mod_id,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
+ frame_tx % 1024, nr_tti_tx,
+ (format == pucch_format1a? "1a": (
+ format == pucch_format1b? "1b" : "??")),
+ pucch_ack_payload[0],pucch_ack_payload[1],
+ frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission,
+ isShortenPucch,
+ pucch_resource,
+ Po_PUCCH,
+ tx_amp);
} else {
- LOG_I(PHY,"[UE %d][PDSCH %x] AbsSubFrame %d.%d rx_offset_diff: %d, Generating PUCCH %s, an_srs_simultanous %d, shorten_pucch %d, n1_pucch %d, b[0]=%d,b[1]=%d (SR_Payload %d), Po_PUCCH %d, amp %d\n",
- Mod_id,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
- frame_tx%1024, nr_tti_tx,ue->rx_offset_diff,
- (format == pucch_format1a? "1a": (
- format == pucch_format1b? "1b" : "??")),
- frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission,
- isShortenPucch,
- pucch_resource,pucch_payload[0],pucch_payload[1],SR_payload,
- Po_PUCCH,
- tx_amp);
+ LOG_I(PHY,"[UE %d][PDSCH %x] AbsSubFrame %d.%d rx_offset_diff: %d, Generating PUCCH %s, an_srs_simultanous %d, shorten_pucch %d, n1_pucch %d, b[0]=%d,b[1]=%d (SR_Payload %d), Po_PUCCH %d, amp %d\n",
+ Mod_id,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
+ frame_tx%1024, nr_tti_tx,ue->rx_offset_diff,
+ (format == pucch_format1a? "1a": (
+ format == pucch_format1b? "1b" : "??")),
+ frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission,
+ isShortenPucch,
+ pucch_resource,pucch_payload[0],pucch_payload[1],SR_payload,
+ Po_PUCCH,
+ tx_amp);
}
- }
+ }
#endif
#if T_TRACER
if(pucch_payload[0])
- {
+ {
T(T_UE_PHY_DLSCH_UE_ACK, T_INT(eNB_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx), T_INT(Mod_id), T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti),
- T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
- }
+ T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
+ }
else
- {
+ {
T(T_UE_PHY_DLSCH_UE_NACK, T_INT(eNB_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx), T_INT(Mod_id), T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti),
- T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
- }
+ T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->current_harq_pid));
+ }
#endif
if (abstraction_flag == 0) {
- generate_pucch1x(ue->common_vars.txdataF,
- &ue->frame_parms,
- ue->ncs_cell,
- format,
- &ue->pucch_config_dedicated[eNB_id],
- pucch_resource,
- isShortenPucch, // shortened format
- pucch_payload,
- tx_amp,
- nr_tti_tx);
+ generate_pucch1x(ue->common_vars.txdataF,
+ &ue->frame_parms,
+ ue->ncs_cell,
+ format,
+ &ue->pucch_config_dedicated[eNB_id],
+ pucch_resource,
+ isShortenPucch, // shortened format
+ pucch_payload,
+ tx_amp,
+ nr_tti_tx);
} else {
#ifdef PHY_ABSTRACTION
- LOG_D(PHY,"Calling generate_pucch_emul ... (ACK %d %d, SR %d)\n",pucch_ack_payload[0],pucch_ack_payload[1],SR_payload);
- generate_pucch_emul(ue,
- proc,
- format,
- ue->frame_parms.pucch_config_common.nCS_AN,
- pucch_payload,
- SR_payload);
+ LOG_D(PHY,"Calling generate_pucch_emul ... (ACK %d %d, SR %d)\n",pucch_ack_payload[0],pucch_ack_payload[1],SR_payload);
+ generate_pucch_emul(ue,
+ proc,
+ format,
+ ue->frame_parms.pucch_config_common.nCS_AN,
+ pucch_payload,
+ SR_payload);
#endif
}
- }
- break;
+ }
+ break;
case pucch_format2:
- {
+ {
if (ue->mac_enabled == 1) {
- Po_PUCCH = nr_pucch_power_cntl(ue,proc,nr_tti_tx,eNB_id,format);
+ Po_PUCCH = nr_pucch_power_cntl(ue,proc,nr_tti_tx,eNB_id,format);
}
else {
- Po_PUCCH = ue->tx_power_max_dBm;
+ Po_PUCCH = ue->tx_power_max_dBm;
}
ue->tx_power_dBm[nr_tti_tx] = Po_PUCCH;
ue->tx_total_RE[nr_tti_tx] = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
tx_amp = get_tx_amp(Po_PUCCH,
- ue->tx_power_max_dBm,
- ue->frame_parms.N_RB_UL,
- 1);
+ ue->tx_power_max_dBm,
+ ue->frame_parms.N_RB_UL,
+ 1);
#else
tx_amp = AMP;
#endif
#if T_TRACER
T(T_UE_PHY_PUCCH_TX_POWER, T_INT(eNB_id),T_INT(Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx),T_INT(ue->tx_power_dBm[nr_tti_tx]),
- T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_PL(ue->Mod_id,ue->CC_id,eNB_id)));
+ T_INT(tx_amp),T_INT(ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->g_pucch),T_INT(get_PL(ue->Mod_id,ue->CC_id,eNB_id)));
#endif
#ifdef UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d][RNTI %x] AbsSubFrame %d.%d Generating PUCCH 2 (RI or CQI), Po_PUCCH %d, isShortenPucch %d, amp %d\n",
- Mod_id,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
- frame_tx%1024, nr_tti_tx,
- Po_PUCCH,
- isShortenPucch,
- tx_amp);
+ Mod_id,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
+ frame_tx%1024, nr_tti_tx,
+ Po_PUCCH,
+ isShortenPucch,
+ tx_amp);
#endif
generate_pucch2x(ue->common_vars.txdataF,
- &ue->frame_parms,
- ue->ncs_cell,
- format,
- &ue->pucch_config_dedicated[eNB_id],
- pucch_resource,
- pucch_payload,
- len, // A
- 0, // B2 not needed
- tx_amp,
- nr_tti_tx,
- ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->crnti);
- }
- break;
+ &ue->frame_parms,
+ ue->ncs_cell,
+ format,
+ &ue->pucch_config_dedicated[eNB_id],
+ pucch_resource,
+ pucch_payload,
+ len, // A
+ 0, // B2 not needed
+ tx_amp,
+ nr_tti_tx,
+ ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][eNB_id]->crnti);
+ }
+ break;
case pucch_format2a:
- LOG_D(PHY,"[UE %d][RNTI %x] AbsSubFrame %d.%d Generating PUCCH 2a (RI or CQI) Ack/Nack 1bit \n",
- Mod_id,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
- frame_tx%1024, nr_tti_tx);
- break;
+ LOG_D(PHY,"[UE %d][RNTI %x] AbsSubFrame %d.%d Generating PUCCH 2a (RI or CQI) Ack/Nack 1bit \n",
+ Mod_id,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
+ frame_tx%1024, nr_tti_tx);
+ break;
case pucch_format2b:
- LOG_D(PHY,"[UE %d][RNTI %x] AbsSubFrame %d.%d Generating PUCCH 2b (RI or CQI) Ack/Nack 2bits\n",
- Mod_id,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
- frame_tx%1024, nr_tti_tx);
- break;
+ LOG_D(PHY,"[UE %d][RNTI %x] AbsSubFrame %d.%d Generating PUCCH 2b (RI or CQI) Ack/Nack 2bits\n",
+ Mod_id,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->rnti,
+ frame_tx%1024, nr_tti_tx);
+ break;
default:
- break;
+ break;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_PUCCH,VCD_FUNCTION_OUT);
}
+
void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type) {
@@ -2477,8 +2524,8 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
if (abstraction_flag==0) {
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
memset(&ue->common_vars.txdataF[aa][nr_tti_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],
- 0,
- frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
+ 0,
+ frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
}
}
@@ -2493,10 +2540,10 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
}
if (ue->UE_mode[eNB_id] == PUSCH) {
- // check if we need to use PUCCH 1a/1b
- ue_pucch_procedures(ue,proc,eNB_id,abstraction_flag);
- // check if we need to use SRS
- ue_srs_procedures(ue,proc,eNB_id,abstraction_flag);
+ // check if we need to use PUCCH 1a/1b
+ ue_pucch_procedures(ue,proc,eNB_id,abstraction_flag);
+ // check if we need to use SRS
+ ue_srs_procedures(ue,proc,eNB_id,abstraction_flag);
} // UE_mode==PUSCH
@@ -2513,18 +2560,18 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
access_mode=CBA_ACCESS;
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: CBA num dci %d\n",
- Mod_id,frame_tx,nr_tti_tx,
- ue->ulsch[eNB_id]->num_cba_dci[nr_tti_tx]);
+ Mod_id,frame_tx,nr_tti_tx,
+ ue->ulsch[eNB_id]->num_cba_dci[nr_tti_tx]);
/*mac_xface->ue_get_sdu(Mod_id,
- CC_id,
- frame_tx,
- proc->subframe_tx,
- nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
- eNB_id,
- ulsch_input_buffer,
- input_buffer_length,
- &access_mode);*/
+ CC_id,
+ frame_tx,
+ proc->subframe_tx,
+ nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
+ eNB_id,
+ ulsch_input_buffer,
+ input_buffer_length,
+ &access_mode);*/
ue->ulsch[eNB_id]->num_cba_dci[nr_tti_tx]=0;
@@ -2553,7 +2600,7 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
ue->ulsch[eNB_id]->harq_processes[harq_pid]->status= IDLE;
//reset_cba_uci(ue->ulsch[eNB_id]->o);
LOG_N(PHY,"[UE %d] Frame %d, nr_tti_rx %d: CBA transmission cancelled or postponed\n",
- Mod_id, frame_tx,nr_tti_tx);
+ Mod_id, frame_tx,nr_tti_tx);
}
}
@@ -2582,38 +2629,38 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
// reset DL ACK/NACK status
uint8_t N_bundled = 0;
if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0] != NULL)
- {
- nr_reset_ack(&ue->frame_parms,
- ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- ue->ulsch[eNB_id]->o_ACK,
- &N_bundled,
- 0);
- nr_reset_ack(&ue->frame_parms,
- ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- ue->ulsch[eNB_id]->o_ACK,
- &N_bundled,
- 0);
- nr_reset_ack(&ue->frame_parms,
- ue->dlsch[next2_thread_id][eNB_id][0]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- ue->ulsch[eNB_id]->o_ACK,
- &N_bundled,
- 0);
- }
+ {
+ nr_reset_ack(&ue->frame_parms,
+ ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ ue->ulsch[eNB_id]->o_ACK,
+ &N_bundled,
+ 0);
+ nr_reset_ack(&ue->frame_parms,
+ ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ ue->ulsch[eNB_id]->o_ACK,
+ &N_bundled,
+ 0);
+ nr_reset_ack(&ue->frame_parms,
+ ue->dlsch[next2_thread_id][eNB_id][0]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ ue->ulsch[eNB_id]->o_ACK,
+ &N_bundled,
+ 0);
+ }
if (ue->dlsch_SI[eNB_id] != NULL)
nr_reset_ack(&ue->frame_parms,
- ue->dlsch_SI[eNB_id]->harq_ack,
- nr_tti_tx,
- proc->nr_tti_rx,
- ue->ulsch[eNB_id]->o_ACK,
- &N_bundled,
- 0);
+ ue->dlsch_SI[eNB_id]->harq_ack,
+ nr_tti_tx,
+ proc->nr_tti_rx,
+ ue->ulsch[eNB_id]->o_ACK,
+ &N_bundled,
+ 0);
LOG_D(PHY,"****** end TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, nr_tti_tx);
@@ -2636,11 +2683,11 @@ void phy_procedures_UE_S_TX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstractio
int i;
// set the whole tx buffer to RX
for (i=0; i<LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe; i++)
- ue->common_vars.txdata[aa][i] = 0x00010001;
+ ue->common_vars.txdata[aa][i] = 0x00010001;
#else //this is the normal case
memset(&ue->common_vars.txdata[aa][0],0,
- (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe)*sizeof(int32_t));
+ (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe)*sizeof(int32_t));
#endif //else EXMIMO
}
@@ -2650,13 +2697,12 @@ void phy_procedures_UE_S_TX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstractio
#endif
void nr_ue_measurement_procedures(
- uint16_t l, // symbol index of each slot [0..6]
- PHY_VARS_NR_UE *ue,
- UE_nr_rxtx_proc_t *proc,
- uint8_t eNB_id,
- uint16_t slot, // slot index of each radio frame [0..19]
- uint8_t abstraction_flag,
- runmode_t mode)
+ uint16_t l, // symbol index of each slot [0..6]
+ PHY_VARS_NR_UE *ue,
+ UE_nr_rxtx_proc_t *proc,
+ uint8_t eNB_id,
+ uint16_t slot, // slot index of each radio frame [0..19]
+ runmode_t mode)
{
LOG_D(PHY,"ue_measurement_procedures l %u Ncp %d\n",l,ue->frame_parms.Ncp);
@@ -2674,45 +2720,43 @@ void nr_ue_measurement_procedures(
LOG_D(PHY,"Calling measurements nr_tti_rx %d, rxdata %p\n",nr_tti_rx,ue->common_vars.rxdata);
lte_ue_measurements(ue,
- (nr_tti_rx*frame_parms->samples_per_tti+ue->rx_offset)%(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME),
- (nr_tti_rx == 1) ? 1 : 0,
- 0,
- 0,
- nr_tti_rx);
+ (nr_tti_rx*frame_parms->samples_per_tti+ue->rx_offset)%(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME),
+ (nr_tti_rx == 1) ? 1 : 0,
+ 0,
+ 0,
+ nr_tti_rx);
} else {
lte_ue_measurements(ue,
- 0,
- 0,
- 1,
- 0,
- nr_tti_rx);
+ 0,
+ 0,
+ 1,
+ 0,
+ nr_tti_rx);
}
#if T_TRACER
if(slot == 0)
T(T_UE_PHY_MEAS, T_INT(eNB_id), T_INT(ue->Mod_id), T_INT(proc->frame_rx%1024), T_INT(proc->nr_tti_rx),
- T_INT((int)(10*log10(ue->measurements.rsrp[0])-ue->rx_total_gain_dB)),
- T_INT((int)ue->measurements.rx_rssi_dBm[0]),
- T_INT((int)(ue->measurements.rx_power_avg_dB[0] - ue->measurements.n0_power_avg_dB)),
- T_INT((int)ue->measurements.rx_power_avg_dB[0]),
- T_INT((int)ue->measurements.n0_power_avg_dB),
- T_INT((int)ue->measurements.wideband_cqi_avg[0]),
- T_INT((int)ue->common_vars.freq_offset));
+ T_INT((int)(10*log10(ue->measurements.rsrp[0])-ue->rx_total_gain_dB)),
+ T_INT((int)ue->measurements.rx_rssi_dBm[0]),
+ T_INT((int)(ue->measurements.rx_power_avg_dB[0] - ue->measurements.n0_power_avg_dB)),
+ T_INT((int)ue->measurements.rx_power_avg_dB[0]),
+ T_INT((int)ue->measurements.n0_power_avg_dB),
+ T_INT((int)ue->measurements.wideband_cqi_avg[0]),
+ T_INT((int)ue->common_vars.freq_offset));
#endif
}
if (l==(6-ue->frame_parms.Ncp)) {
// make sure we have signal from PSS/SSS for N0 measurement
- // LOG_I(PHY," l==(6-ue->frame_parms.Ncp) ue_rrc_measurements\n");
+ // LOG_I(PHY," l==(6-ue->frame_parms.Ncp) ue_rrc_measurements\n");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_RRC_MEASUREMENTS, VCD_FUNCTION_IN);
ue_rrc_measurements(ue,
- slot,
- abstraction_flag);
+ slot,
+ abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_RRC_MEASUREMENTS, VCD_FUNCTION_OUT);
- if (abstraction_flag==1)
- ue->sinr_eff = sinr_eff_cqi_calc(ue, 0, nr_tti_rx);
}
#endif
@@ -2737,7 +2781,7 @@ void nr_ue_measurement_procedures(
*/
eNB_id = 0;
- if (abstraction_flag == 0) {
+
LOG_D(PHY,"start adjust sync l = %d slot = %d no timing %d\n",l, slot, ue->no_timing_correction);
if (ue->no_timing_correction==0)
@@ -2747,7 +2791,7 @@ void nr_ue_measurement_procedures(
nr_tti_rx,
0,
16384);
- }
+
}
@@ -2780,14 +2824,14 @@ void phy_procedures_emos_UE_RX(PHY_VARS_NR_UE *ue,uint8_t last_slot,uint8_t eNB_
if ((last_slot==10) || (last_slot==11)) {
for (i=0; i<ue->frame_parms.nb_antennas_rx; i++)
for (j=0; j<ue->frame_parms.nb_antennas_tx; j++) {
- // first OFDM symbol with pilots
- memcpy(&emos_dump_UE.channel[i][j][(last_slot%2)*2*ue->frame_parms.ofdm_symbol_size],
- &ue->common_vars.dl_ch_estimates[eNB_id][(j<<1) + i][0],
- ue->frame_parms.ofdm_symbol_size*sizeof(int));
- // second OFDM symbol with pilots
- memcpy(&emos_dump_UE.channel[i][j][((last_slot%2)*2+1)*ue->frame_parms.ofdm_symbol_size],
- &ue->common_vars.dl_ch_estimates[eNB_id][(j<<1) + i][(ue->frame_parms.Ncp == 0 ? 4 : 3)*ue->frame_parms.ofdm_symbol_size],
- ue->frame_parms.ofdm_symbol_size*sizeof(int));
+ // first OFDM symbol with pilots
+ memcpy(&emos_dump_UE.channel[i][j][(last_slot%2)*2*ue->frame_parms.ofdm_symbol_size],
+ &ue->common_vars.dl_ch_estimates[eNB_id][(j<<1) + i][0],
+ ue->frame_parms.ofdm_symbol_size*sizeof(int));
+ // second OFDM symbol with pilots
+ memcpy(&emos_dump_UE.channel[i][j][((last_slot%2)*2+1)*ue->frame_parms.ofdm_symbol_size],
+ &ue->common_vars.dl_ch_estimates[eNB_id][(j<<1) + i][(ue->frame_parms.Ncp == 0 ? 4 : 3)*ue->frame_parms.ofdm_symbol_size],
+ ue->frame_parms.ofdm_symbol_size*sizeof(int));
}
}
@@ -2835,7 +2879,7 @@ void phy_procedures_emos_UE_RX(PHY_VARS_NR_UE *ue,uint8_t last_slot,uint8_t eNB_
LOG_W(PHY,"[UE %d] frame %d, slot %d, Problem writing EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot);
} else {
if (proc->frame_rx%100==0) {
- LOG_I(PHY,"[UE %d] frame %d, slot %d, Writing %d bytes EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot, bytes);
+ LOG_I(PHY,"[UE %d] frame %d, slot %d, Writing %d bytes EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot, bytes);
}
}
}
@@ -2938,6 +2982,7 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
if (ret==0) {
ue->pbch_vars[eNB_id]->pdu_errors_conseq = 0;
+
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] frame %d, nr_tti_rx %d, Received PBCH (MIB): frame_tx %d. N_RB_DL %d\n",
ue->Mod_id,
@@ -2954,18 +2999,20 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
/*
write_output("rxsig0.m","rxs0", ue->common_vars.rxdata[0],ue->frame_parms.samples_per_subframe,1,1);
- write_output("H00.m","h00",&(ue->common_vars.dl_ch_estimates[0][0][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
- write_output("H10.m","h10",&(ue->common_vars.dl_ch_estimates[0][2][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
- write_output("rxsigF0.m","rxsF0", ue->common_vars.rxdataF[0],8*ue->frame_parms.ofdm_symbol_size,1,1);
- write_output("PBCH_rxF0_ext.m","pbch0_ext",ue->pbch_vars[0]->rxdataF_ext[0],12*4*6,1,1);
- write_output("PBCH_rxF0_comp.m","pbch0_comp",ue->pbch_vars[0]->rxdataF_comp[0],12*4*6,1,1);
- write_output("PBCH_rxF_llr.m","pbch_llr",ue->pbch_vars[0]->llr,(ue->frame_parms.Ncp==0) ? 1920 : 1728,1,4);
- exit(-1);
+ write_output("H00.m","h00",&(ue->common_vars.dl_ch_estimates[0][0][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
+ write_output("H10.m","h10",&(ue->common_vars.dl_ch_estimates[0][2][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
+
+ write_output("rxsigF0.m","rxsF0", ue->common_vars.rxdataF[0],8*ue->frame_parms.ofdm_symbol_size,1,1);
+ write_output("PBCH_rxF0_ext.m","pbch0_ext",ue->pbch_vars[0]->rxdataF_ext[0],12*4*6,1,1);
+ write_output("PBCH_rxF0_comp.m","pbch0_comp",ue->pbch_vars[0]->rxdataF_comp[0],12*4*6,1,1);
+ write_output("PBCH_rxF_llr.m","pbch_llr",ue->pbch_vars[0]->llr,(ue->frame_parms.Ncp==0) ? 1920 : 1728,1,4);
+ exit(-1);
*/
ue->pbch_vars[eNB_id]->pdu_errors_conseq++;
ue->pbch_vars[eNB_id]->pdu_errors++;
+
if (ue->pbch_vars[eNB_id]->pdu_errors_conseq>=100) {
LOG_E(PHY,"More that 100 consecutive PBCH errors! Exiting!\n");
exit_fun("More that 100 consecutive PBCH errors! Exiting!\n");
@@ -2979,9 +3026,9 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] frame %d, slot %d, PBCH errors = %d, consecutive errors = %d!\n",
- ue->Mod_id,frame_rx, nr_tti_rx,
- ue->pbch_vars[eNB_id]->pdu_errors,
- ue->pbch_vars[eNB_id]->pdu_errors_conseq);
+ ue->Mod_id,frame_rx, nr_tti_rx,
+ ue->pbch_vars[eNB_id]->pdu_errors,
+ ue->pbch_vars[eNB_id]->pdu_errors_conseq);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_OUT);
}
@@ -3007,13 +3054,13 @@ unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb
#ifdef NR_PDCCH_SCHED
-int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t abstraction_flag)
+int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc)
{
// unsigned int dci_cnt=0, i; //removed for nr_ue_pdcch_procedures and added in the loop for nb_coreset_active
- #ifdef NR_PDCCH_SCHED_DEBUG
- printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_ue_pdcch_procedures() \n");
- #endif
+#ifdef NR_PDCCH_SCHED_DEBUG
+ printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_ue_pdcch_procedures() \n");
+#endif
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
@@ -3025,7 +3072,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// each element represents the size in bits for each dci field, for each decoded dci -> [dci_cnt-1]
// each time a dci is decode at dci_cnt, the values of the table dci_fields_sizes[i][j] will be copied at table dci_fields_sizes_cnt[dci_cnt-1][i][j]
// table dci_fields_sizes_cnt[dci_cnt-1][i][j] will then be used in function nr_extract_dci_info
- uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
+ uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS];
int nb_searchspace_active=0;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
@@ -3042,7 +3089,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
uint16_t sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti; //FIXME
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES] =
{c_rnti,cs_rnti,new_rnti,tc_rnti,p_rnti,si_rnti,ra_rnti,sp_csi_rnti,sfi_rnti,int_rnti,tpc_pusch_rnti,tpc_pucch_rnti,tpc_srs_rnti};
-
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> there is a bug in FAPI to calculate nb_searchspace_total=%d\n",nb_searchspace_total);
#endif
@@ -3052,15 +3098,15 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> the number of searchSpaces active in the current slot(%d) is %d) \n",
nr_tti_rx,nb_searchspace_total);
#endif
+
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
unsigned int dci_cnt=0;
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {{0}};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
- uint16_t n_RB_ULBWP = 106;
+ // uint16_t n_RB_ULBWP = 106;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
- uint16_t n_RB_DLBWP = 106;
// First we have to identify each searchSpace active at a time and do PDCCH monitoring corresponding to current searchSpace
// Up to 10 searchSpaces can be configured to UE (s<=10)
@@ -3070,14 +3116,14 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
/*
* The following code has been removed as it is handled by higher layers (fapi)
*
- // Verify that monitoring is required at the slot nr_tti_rx. We will run pdcch procedure only if do_pdcch_monitoring_current_slot=1
- // For Type0-PDCCH searchspace, we need to calculate the monitoring slot from Tables 13-1 .. 13-15 in TS 38.213 Subsection 13
- NR_UE_SLOT_PERIOD_OFFSET_t sl_period_offset_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset;
- if (sl_period_offset_mon == nr_sl1) {
- do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every slot
- } else if (nr_tti_rx%(uint16_t)sl_period_offset_mon == pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset_offset) {
- do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every monitoringSlotPeriodicityAndOffset slot with offset
- }*/
+ // Verify that monitoring is required at the slot nr_tti_rx. We will run pdcch procedure only if do_pdcch_monitoring_current_slot=1
+ // For Type0-PDCCH searchspace, we need to calculate the monitoring slot from Tables 13-1 .. 13-15 in TS 38.213 Subsection 13
+ NR_UE_SLOT_PERIOD_OFFSET_t sl_period_offset_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset;
+ if (sl_period_offset_mon == nr_sl1) {
+ do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every slot
+ } else if (nr_tti_rx%(uint16_t)sl_period_offset_mon == pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset_offset) {
+ do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every monitoringSlotPeriodicityAndOffset slot with offset
+ }*/
/*
* FIXME
* For PDCCH monitoring when overlap with SS/PBCH according to 38.213 v15.1.0 Section 10
@@ -3085,25 +3131,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
*/
//int _offset,_index,_M;
int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
- /*
- * The following code has been removed as it is handled by higher layers (fapi)
- if (searchSpace_id == 0){ // Implementing TS 38.213 subclause 13, UE procedure for monitoring Type0-PDCCH common search space
- *
- * according to TS 38.213 subclause 13
- * For the SS/PBCH block and control resource set (CORESET) multiplexing pattern 1,
- * a UE monitors PDCCH in the Type0-PDCCH common search space over two consecutive slots starting from slot n0
- *
- if (frame_rx%2 == 0) {
- if ((((_offset*2+((_index*_M)/20))%2) != 0) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx-1)){
- do_pdcch_monitoring_current_slot = 0;
- }
- }
- if (frame_rx%2 == 1) {
- if ((((_offset*2+((_index*_M)/20))%2) != 1) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx-1)){
- do_pdcch_monitoring_current_slot = 0;
- }
- }
- }*/
+
+
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> nb_searchspace_active=%d do_pdcch_monitoring_current_slot=%d (to be removed)\n",
nb_searchspace_active,
@@ -3139,39 +3168,40 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
if (nb_coreset_active >= nb_coreset_total) return 0; // the coreset_id could not be found. There is a problem
}*/
- /*
- * we do not need these parameters yet
- *
- // get the parameters describing the current CORESET
- int coreset_duration = pdcch_vars2->coreset[nb_coreset_active].duration;
- uint64_t coreset_freq_dom = pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources;
- int coreset_shift_index = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.shiftIndex;
- NR_UE_CORESET_REG_bundlesize_t coreset_bundlesize = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.reg_bundlesize;
- NR_UE_CORESET_interleaversize_t coreset_interleaversize = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.interleaversize;
- NR_UE_CORESET_precoder_granularity_t precoder_granularity = pdcch_vars2->coreset[nb_coreset_active].precoderGranularity;
- int tci_statesPDCCH = pdcch_vars2->coreset[nb_coreset_active].tciStatesPDCCH;
- int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
- uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
- */
- // A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces.
- // Searchspace types:
- // Type0-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
- // number of consecutive resource blocks and a number of consecutive symbols for
- // the control resource set of the Type0-PDCCH common search space from
- // the four most significant bits of RMSI-PDCCH-Config as described in Tables 13-1 through 13-10
- // and determines PDCCH monitoring occasions
- // from the four least significant bits of RMSI-PDCCH-Config,
- // included in MasterInformationBlock, as described in Tables 13-11 through 13-15
- // Type0A-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
- // Type1-PDCCH common search space for a DCI format with CRC scrambled by a RA-RNTI, or a TC-RNTI, or a C-RNTI
- // Type2-PDCCH common search space for a DCI format with CRC scrambled by a P-RNTI
- // Type3-PDCCH common search space for a DCI format with CRC scrambled by INT-RNTI, or SFI-RNTI,
- // or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
+ /*
+ * we do not need these parameters yet
+ *
+ // get the parameters describing the current CORESET
+ int coreset_duration = pdcch_vars2->coreset[nb_coreset_active].duration;
+ uint64_t coreset_freq_dom = pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources;
+ int coreset_shift_index = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.shiftIndex;
+ NR_UE_CORESET_REG_bundlesize_t coreset_bundlesize = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.reg_bundlesize;
+ NR_UE_CORESET_interleaversize_t coreset_interleaversize = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.interleaversize;
+ NR_UE_CORESET_precoder_granularity_t precoder_granularity = pdcch_vars2->coreset[nb_coreset_active].precoderGranularity;
+ int tci_statesPDCCH = pdcch_vars2->coreset[nb_coreset_active].tciStatesPDCCH;
+ int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
+ uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
+ */
+
+ // A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces.
+ // Searchspace types:
+ // Type0-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
+ // number of consecutive resource blocks and a number of consecutive symbols for
+ // the control resource set of the Type0-PDCCH common search space from
+ // the four most significant bits of RMSI-PDCCH-Config as described in Tables 13-1 through 13-10
+ // and determines PDCCH monitoring occasions
+ // from the four least significant bits of RMSI-PDCCH-Config,
+ // included in MasterInformationBlock, as described in Tables 13-11 through 13-15
+ // Type0A-PDCCH common search space for a DCI format with CRC scrambled by a SI-RNTI
+ // Type1-PDCCH common search space for a DCI format with CRC scrambled by a RA-RNTI, or a TC-RNTI, or a C-RNTI
+ // Type2-PDCCH common search space for a DCI format with CRC scrambled by a P-RNTI
+ // Type3-PDCCH common search space for a DCI format with CRC scrambled by INT-RNTI, or SFI-RNTI,
+ // or TPC-PUSCH-RNTI, or TPC-PUCCH-RNTI, or TPC-SRS-RNTI, or C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_IN);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_rx_pdcch_stats);
#endif
@@ -3207,11 +3237,13 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#ifdef NR_PDCCH_SCHED_DEBUG
- printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure with eNB_id=%d (n_RB_ULBWP=%d, n_RB_DLBWP=%d, searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d) -> dci_cnt=%d\n",
- eNB_id,n_RB_ULBWP,n_RB_DLBWP,searchSpaceType,
+ printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_dci_decoding_procedure with eNB_id=%d (n_RB_ULBWP=%d, n_RB_DLBWP=%d, searchSpaceType=%d, nb_searchspace_active=%d, nb_coreset_active=%d)\n",
+ eNB_id,
+ pdcch_vars2->n_RB_BWP[nb_searchspace_active],
+ pdcch_vars2->n_RB_BWP[nb_searchspace_active],
+ searchSpaceType,
nb_searchspace_active,
- nb_coreset_active,
- dci_cnt);
+ nb_coreset_active);
#endif
@@ -3225,8 +3257,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
eNB_id,
nr_tti_rx,
dci_fields_sizes_cnt,
- n_RB_ULBWP,
- n_RB_DLBWP,
+ pdcch_vars2->n_RB_BWP[nb_searchspace_active],
+ pdcch_vars2->n_RB_BWP[nb_searchspace_active],
&crc_scrambled,
&format_found,
crc_scrambled_values);
@@ -3237,39 +3269,41 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_tti_rx);
- uint8_t *nCCE_current = &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->nCCE[nr_tti_rx];
- uint8_t *nCCE_dest = &ue->pdcch_vars[next1_thread_id][eNB_id]->nCCE[nr_tti_rx];
- uint8_t *nCCE_dest1 = &ue->pdcch_vars[next2_thread_id][eNB_id]->nCCE[nr_tti_rx];
- memcpy(nCCE_dest, nCCE_current, sizeof(uint8_t));
- memcpy(nCCE_dest1, nCCE_current, sizeof(uint8_t));
- LOG_D(PHY,"current_thread %d next1_thread %d next2_thread %d \n", ue->current_thread_id[nr_tti_rx], next1_thread_id, next2_thread_id);
+ uint8_t *nCCE_current = &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->nCCE[nr_tti_rx];
+ uint8_t *nCCE_dest = &ue->pdcch_vars[next1_thread_id][eNB_id]->nCCE[nr_tti_rx];
+ uint8_t *nCCE_dest1 = &ue->pdcch_vars[next2_thread_id][eNB_id]->nCCE[nr_tti_rx];
+ memcpy(nCCE_dest, nCCE_current, sizeof(uint8_t));
+ memcpy(nCCE_dest1, nCCE_current, sizeof(uint8_t));
- LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d, Mode %s: DCI found %i --> rnti %x / crnti %x : format %d\n",
- ue->Mod_id,frame_rx%1024,nr_tti_rx,mode_string[ue->UE_mode[eNB_id]],
- dci_cnt,
- dci_alloc_rx[0].rnti,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
- dci_alloc_rx[0].format );
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dci_received += dci_cnt;
+ LOG_D(PHY,"current_thread %d next1_thread %d next2_thread %d \n", ue->current_thread_id[nr_tti_rx], next1_thread_id, next2_thread_id);
+
+ LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d, Mode %s: DCI found %i --> rnti %x / crnti %x : format %d\n",
+ ue->Mod_id,frame_rx%1024,nr_tti_rx,mode_string[ue->UE_mode[eNB_id]],
+ dci_cnt,
+ dci_alloc_rx[0].rnti,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
+ dci_alloc_rx[0].format );
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dci_received += dci_cnt;
#ifdef EMOS
- //emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt;
+ //emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt;
#endif
- ue->dci_ind.number_of_dcis = dci_cnt;
- ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance
+ ue->dci_ind.number_of_dcis = dci_cnt;
+ ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance
- for (int i=0; i<dci_cnt; i++) {
- /*
- * This is the NR part
- */
+ for (int i=0; i<dci_cnt; i++) {
+ /*
+ * This is the NR part
+ */
- if ((dci_alloc_rx[i].format == format0_0))
+ if ((dci_alloc_rx[i].format == format0_0))
if ((dci_alloc_rx[i].format == format1_0) &&
(dci_alloc_rx[i].rnti != crc_scrambled_values[_P_RNTI_]) &&
(dci_alloc_rx[i].rnti != crc_scrambled_values[_SI_RNTI_]) &&
(dci_alloc_rx[i].rnti != crc_scrambled_values[_RA_RNTI_])) ue->dlsch_received[eNB_id]++;
+
if ((dci_alloc_rx[i].rnti == crc_scrambled_values[_SI_RNTI_]) && (dci_alloc_rx[i].format == format1_0)) ue->dlsch_SI_received[eNB_id]++;
if ((dci_alloc_rx[i].rnti == crc_scrambled_values[_P_RNTI_]) && (dci_alloc_rx[i].format == format1_0)) ue->dlsch_p_received[eNB_id]++;
if ((dci_alloc_rx[i].rnti == crc_scrambled_values[_RA_RNTI_]) && (dci_alloc_rx[i].format == format1_0)) ue->dlsch_ra_received[eNB_id]++;
@@ -3292,38 +3326,38 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
dci_cnt);
#endif
nr_generate_ue_ul_dlsch_params_from_dci(ue,
- eNB_id,
- frame_rx,
- nr_tti_rx,
- dci_alloc_rx[i].dci_pdu,
- dci_alloc_rx[i].rnti,
- dci_alloc_rx[i].dci_length,
- dci_alloc_rx[i].format,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
- ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
- ue->ulsch[eNB_id],
- &ue->frame_parms,
- ue->pdsch_config_dedicated,
- ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
- dci_fields_sizes_cnt[i],
- n_RB_ULBWP,
- n_RB_DLBWP,
- crc_scrambled_values,
- &nr_dci_info_extracted);
+ eNB_id,
+ frame_rx,
+ nr_tti_rx,
+ dci_alloc_rx[i].dci_pdu,
+ dci_alloc_rx[i].rnti,
+ dci_alloc_rx[i].dci_length,
+ dci_alloc_rx[i].format,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
+ ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
+ ue->ulsch[eNB_id],
+ &ue->frame_parms,
+ ue->pdsch_config_dedicated,
+ ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
+ dci_fields_sizes_cnt[i],
+ pdcch_vars2->n_RB_BWP[nb_searchspace_active],
+ pdcch_vars2->n_RB_BWP[nb_searchspace_active],
+ crc_scrambled_values,
+ &nr_dci_info_extracted);
ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
ue->dci_ind.dci_list[i].n_CCE = dci_alloc_rx[i].firstCCE;
ue->dci_ind.dci_list[i].N_CCE = (int)dci_alloc_rx[i].L;
- ue->dci_ind.number_of_dcis = ue->dci_ind.number_of_dcis + 1;
- memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
+ memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
- // TODO: check where should we send up this message.
- //ue->if_inst->dl_indication(&ue->dl_indication);
-
} // end for loop dci_cnt
+ // TODO: check where should we send up this message.
+ ue->if_inst->dl_indication(&ue->dl_indication);
+
+
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_rx_pdcch_stats);
#endif
@@ -3336,6 +3370,139 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#endif // NR_PDCCH_SCHED
+
+
+#if 0
+
+ if (generate_ue_dlsch_params_from_dci(frame_rx,
+ nr_tti_rx,
+ (DCI1A_5MHz_TDD_1_6_t *)&dci_alloc_rx[i].dci_pdu,
+ ue->prach_resources[eNB_id]->ra_RNTI,
+ format1A,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
+ ue->pdsch_vars_ra[eNB_id],
+ &ue->dlsch_ra[eNB_id],
+ &ue->frame_parms,
+ ue->pdsch_config_dedicated,
+ SI_RNTI,
+ ue->prach_resources[eNB_id]->ra_RNTI,
+ P_RNTI,
+ ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
+ 0)==0) {
+
+ ue->dlsch_ra_received[eNB_id]++;
+
+ #ifdef DEBUG_PHY_PROC
+ LOG_D(PHY,"[UE %d] Generate UE DLSCH RA_RNTI format 1A, rb_alloc %x, dlsch_ra[eNB_id] %p\n",
+ ue->Mod_id,ue->dlsch_ra[eNB_id]->harq_processes[0]->rb_alloc_even[0],ue->dlsch_ra[eNB_id]);
+ #endif
+ }
+ } else if( (dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) &&
+ (dci_alloc_rx[i].format == format0)) {
+
+ #ifdef DEBUG_PHY_PROC
+ LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d: Found rnti %x, format 0, dci_cnt %d\n",
+ ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].rnti,i);
+ #endif
+
+ ue->ulsch_no_allocation_counter[eNB_id] = 0;
+ //dump_dci(&ue->frame_parms,&dci_alloc_rx[i]);
+
+ if ((ue->UE_mode[eNB_id] > PRACH) &&
+ (generate_ue_ulsch_params_from_dci((void *)&dci_alloc_rx[i].dci_pdu,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
+ nr_tti_rx,
+ format0,
+ ue,
+ proc,
+ SI_RNTI,
+ 0,
+ P_RNTI,
+ CBA_RNTI,
+ eNB_id,
+ 0)==0)) {
+ #if T_TRACER
+ NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
+ uint8_t harq_pid = subframe2harq_pid(frame_parms,
+ pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,proc->nr_tti_rx),
+ pdcch_alloc2ul_subframe(frame_parms,proc->nr_tti_rx));
+
+ T(T_UE_PHY_ULSCH_UE_DCI, T_INT(eNB_id), T_INT(proc->frame_rx%1024), T_INT(proc->nr_tti_rx), T_INT(ue->Mod_id),
+ T_INT(dci_alloc_rx[i].rnti), T_INT(harq_pid),
+ T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs),
+ T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->round),
+ T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb),
+ T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb),
+ T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS));
+ #endif
+ #ifdef DEBUG_PHY_PROC
+ LOG_D(PHY,"[UE %d] Generate UE ULSCH C_RNTI format 0 (nr_tti_rx %d)\n",ue->Mod_id,nr_tti_rx);
+ #endif
+
+ }
+ } else if( (dci_alloc_rx[i].rnti == ue->ulsch[eNB_id]->cba_rnti[0]) &&
+ (dci_alloc_rx[i].format == format0)) {
+ // UE could belong to more than one CBA group
+ // ue->Mod_id%ue->ulsch[eNB_id]->num_active_cba_groups]
+ #ifdef DEBUG_PHY_PROC
+ LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d: Found cba rnti %x, format 0, dci_cnt %d\n",
+ ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].rnti,i);
+
+ if (((frame_rx%100) == 0) || (frame_rx < 20))
+ dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
+
+ #endif
+
+ ue->ulsch_no_allocation_counter[eNB_id] = 0;
+ //dump_dci(&ue->frame_parms,&dci_alloc_rx[i]);
+
+ if ((ue->UE_mode[eNB_id] > PRACH) &&
+ (generate_ue_ulsch_params_from_dci((void *)&dci_alloc_rx[i].dci_pdu,
+ ue->ulsch[eNB_id]->cba_rnti[0],
+ nr_tti_rx,
+ format0,
+ ue,
+ proc,
+ SI_RNTI,
+ 0,
+ P_RNTI,
+ CBA_RNTI,
+ eNB_id,
+ 0)==0)) {
+
+ #ifdef DEBUG_PHY_PROC
+ LOG_D(PHY,"[UE %d] Generate UE ULSCH CBA_RNTI format 0 (nr_tti_rx %d)\n",ue->Mod_id,nr_tti_rx);
+ #endif
+ ue->ulsch[eNB_id]->num_cba_dci[(nr_tti_rx+4)%10]++;
+ }
+ }
+
+ else {
+ #ifdef DEBUG_PHY_PROC
+ LOG_D(PHY,"[UE %d] frame %d, nr_tti_rx %d: received DCI %d with RNTI=%x (C-RNTI:%x, CBA_RNTI %x) and format %d!\n",ue->Mod_id,frame_rx,nr_tti_rx,i,dci_alloc_rx[i].rnti,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
+ ue->ulsch[eNB_id]->cba_rnti[0],
+ dci_alloc_rx[i].format);
+
+ // dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
+ #endif
+ }*/
+
+ } // end for loop dci_cnt
+#if UE_TIMING_TRACE
+ stop_meas(&ue->dlsch_rx_pdcch_stats);
+#endif
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
+
+ // } // end if do_pdcch_monitoring_current_slot
+ } // end for loop nb_searchspace_active
+ return(0);
+}
+
+
+
+#endif
+
#if 0
void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,int abstraction_flag) {
@@ -3355,15 +3522,15 @@ void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,i
LOG_D(PHY,"ue calling pmch nr_tti_rx ..\n ");
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Querying for PMCH demodulation\n",
- ue->Mod_id,(nr_tti_rx==9?-1:0)+frame_rx,nr_tti_rx);
+ ue->Mod_id,(nr_tti_rx==9?-1:0)+frame_rx,nr_tti_rx);
#if defined(Rel10) || defined(Rel14)
/*pmch_mcs = mac_xface->ue_query_mch(ue->Mod_id,
- CC_id,
- frame_rx,
- nr_tti_rx,
- eNB_id,
- &sync_area,
- &mcch_active);*/
+ CC_id,
+ frame_rx,
+ nr_tti_rx,
+ eNB_id,
+ &sync_area,
+ &mcch_active);*/
#else
pmch_mcs=-1;
@@ -3374,122 +3541,121 @@ void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,i
fill_UE_dlsch_MCH(ue,pmch_mcs,1,0,0);
if (abstraction_flag == 0 ) {
- for (l=2; l<12; l++) {
+ for (l=2; l<12; l++) {
- slot_fep_mbsfn(ue,
- l,
- nr_tti_rx,
- 0,0);//ue->rx_offset,0);
- }
+ slot_fep_mbsfn(ue,
+ l,
+ nr_tti_rx,
+ 0,0);//ue->rx_offset,0);
+ }
- for (l=2; l<12; l++) {
- rx_pmch(ue,
- 0,
- nr_tti_rx,
- l);
- }
+ for (l=2; l<12; l++) {
+ rx_pmch(ue,
+ 0,
+ nr_tti_rx,
+ l);
+ }
- ue->dlsch_MCH[0]->harq_processes[0]->G = get_G(&ue->frame_parms,
- ue->dlsch_MCH[0]->harq_processes[0]->nb_rb,
- ue->dlsch_MCH[0]->harq_processes[0]->rb_alloc_even,
- ue->dlsch_MCH[0]->harq_processes[0]->Qm,
- 1,
- 2,
- frame_rx,
- nr_tti_rx,
- 0);
+ ue->dlsch_MCH[0]->harq_processes[0]->G = get_G(&ue->frame_parms,
+ ue->dlsch_MCH[0]->harq_processes[0]->nb_rb,
+ ue->dlsch_MCH[0]->harq_processes[0]->rb_alloc_even,
+ ue->dlsch_MCH[0]->harq_processes[0]->Qm,
+ 1,
+ 2,
+ frame_rx,
+ nr_tti_rx,
+ 0);
- dlsch_unscrambling(&ue->frame_parms,1,ue->dlsch_MCH[0],
- ue->dlsch_MCH[0]->harq_processes[0]->G,
- ue->pdsch_vars_MCH[0]->llr[0],0,nr_tti_rx<<1);
+ dlsch_unscrambling(&ue->frame_parms,1,ue->dlsch_MCH[0],
+ ue->dlsch_MCH[0]->harq_processes[0]->G,
+ ue->pdsch_vars_MCH[0]->llr[0],0,nr_tti_rx<<1);
#ifdef UE_DLSCH_PARALLELISATION
- ret = nr_dlsch_decoding_mthread(ue,proc, eNB_id,
- ue->pdsch_vars_MCH[0]->llr[0],
- &ue->frame_parms,
- ue->dlsch_MCH[0],
- ue->dlsch_MCH[0]->harq_processes[0],
- frame_rx,
- nb_symb_sch,
- nr_tti_rx,
- 0,
- 0,1);
+ ret = dlsch_decoding_mthread(ue,proc, eNB_id,
+ ue->pdsch_vars_MCH[0]->llr[0],
+ &ue->frame_parms,
+ ue->dlsch_MCH[0],
+ ue->dlsch_MCH[0]->harq_processes[0],
+ frame_rx,
+ nr_tti_rx,
+ 0,
+ 0,1);
#else
- ret = nr_dlsch_decoding(ue,
- ue->pdsch_vars_MCH[0]->llr[0],
- &ue->frame_parms,
- ue->dlsch_MCH[0],
- ue->dlsch_MCH[0]->harq_processes[0],
- frame_rx,
- nr_tti_rx,
- 0,
- 0,1);
- printf("start pmch dlsch decoding\n");
+ ret = dlsch_decoding(ue,
+ ue->pdsch_vars_MCH[0]->llr[0],
+ &ue->frame_parms,
+ ue->dlsch_MCH[0],
+ ue->dlsch_MCH[0]->harq_processes[0],
+ frame_rx,
+ nr_tti_rx,
+ 0,
+ 0,1);
+ printf("start pmch dlsch decoding\n");
#endif
} else { // abstraction
#ifdef PHY_ABSTRACTION
- ret = dlsch_decoding_emul(ue,
- nr_tti_rx,
- 5, // PMCH
- eNB_id);
+ ret = dlsch_decoding_emul(ue,
+ nr_tti_rx,
+ 5, // PMCH
+ eNB_id);
#endif
}
if (mcch_active == 1)
- ue->dlsch_mcch_trials[sync_area][0]++;
+ ue->dlsch_mcch_trials[sync_area][0]++;
else
- ue->dlsch_mtch_trials[sync_area][0]++;
+ ue->dlsch_mtch_trials[sync_area][0]++;
if (ret == (1+ue->dlsch_MCH[0]->max_turbo_iterations)) {
- if (mcch_active == 1)
- ue->dlsch_mcch_errors[sync_area][0]++;
- else
- ue->dlsch_mtch_errors[sync_area][0]++;
+ if (mcch_active == 1)
+ ue->dlsch_mcch_errors[sync_area][0]++;
+ else
+ ue->dlsch_mtch_errors[sync_area][0]++;
- LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: PMCH in error (%d,%d), not passing to L2 (TBS %d, iter %d,G %d)\n",
- ue->Mod_id,
+ LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: PMCH in error (%d,%d), not passing to L2 (TBS %d, iter %d,G %d)\n",
+ ue->Mod_id,
frame_rx,nr_tti_rx,
- ue->dlsch_mcch_errors[sync_area][0],
- ue->dlsch_mtch_errors[sync_area][0],
- ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
- ue->dlsch_MCH[0]->max_turbo_iterations,
- ue->dlsch_MCH[0]->harq_processes[0]->G);
- dump_mch(ue,0,ue->dlsch_MCH[0]->harq_processes[0]->G,nr_tti_rx);
+ ue->dlsch_mcch_errors[sync_area][0],
+ ue->dlsch_mtch_errors[sync_area][0],
+ ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
+ ue->dlsch_MCH[0]->max_turbo_iterations,
+ ue->dlsch_MCH[0]->harq_processes[0]->G);
+ dump_mch(ue,0,ue->dlsch_MCH[0]->harq_processes[0]->G,nr_tti_rx);
#ifdef DEBUG_DLSCH
- for (int i=0; i<ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3; i++) {
- LOG_T(PHY,"%02x.",ue->dlsch_MCH[0]->harq_processes[0]->c[0][i]);
- }
+ for (int i=0; i<ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3; i++) {
+ LOG_T(PHY,"%02x.",ue->dlsch_MCH[0]->harq_processes[0]->c[0][i]);
+ }
- LOG_T(PHY,"\n");
+ LOG_T(PHY,"\n");
#endif
- if (nr_tti_rx==9)
- //mac_xface->macphy_exit("Why are we exiting here?");
- } else { // decoding successful
+ if (nr_tti_rx==9)
+ //mac_xface->macphy_exit("Why are we exiting here?");
+ } else { // decoding successful
#if defined(Rel10) || defined(Rel14)
- if (mcch_active == 1) {
- /*mac_xface->ue_send_mch_sdu(ue->Mod_id,
- CC_id,
- frame_rx,
- ue->dlsch_MCH[0]->harq_processes[0]->b,
- ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
- eNB_id,// not relevant in eMBMS context
- sync_area);*/
- ue->dlsch_mcch_received[sync_area][0]++;
+ if (mcch_active == 1) {
+ /*mac_xface->ue_send_mch_sdu(ue->Mod_id,
+ CC_id,
+ frame_rx,
+ ue->dlsch_MCH[0]->harq_processes[0]->b,
+ ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3,
+ eNB_id,// not relevant in eMBMS context
+ sync_area);*/
+ ue->dlsch_mcch_received[sync_area][0]++;
- if (ue->dlsch_mch_received_sf[nr_tti_rx%5][0] == 1 ) {
- ue->dlsch_mch_received_sf[nr_tti_rx%5][0]=0;
- } else {
- ue->dlsch_mch_received[0]+=1;
- ue->dlsch_mch_received_sf[nr_tti_rx][0]=1;
- }
+ if (ue->dlsch_mch_received_sf[nr_tti_rx%5][0] == 1 ) {
+ ue->dlsch_mch_received_sf[nr_tti_rx%5][0]=0;
+ } else {
+ ue->dlsch_mch_received[0]+=1;
+ ue->dlsch_mch_received_sf[nr_tti_rx][0]=1;
+ }
- }
+ }
#endif // Rel10 || Rel14
} // decoding sucessful
} // pmch_mcs>=0
@@ -3499,44 +3665,46 @@ void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,i
void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t *current_harq_processes)
{
- harq_processes_dest->B = current_harq_processes->B ;
- harq_processes_dest->C = current_harq_processes->C ;
- harq_processes_dest->DCINdi = current_harq_processes->DCINdi ;
- harq_processes_dest->F = current_harq_processes->F ;
- harq_processes_dest->G = current_harq_processes->G ;
- harq_processes_dest->K = current_harq_processes->K ;
- harq_processes_dest->Nl = current_harq_processes->Nl ;
- harq_processes_dest->Qm = current_harq_processes->Qm ;
- harq_processes_dest->TBS = current_harq_processes->TBS ;
- harq_processes_dest->b = current_harq_processes->b ;
- harq_processes_dest->codeword = current_harq_processes->codeword ;
- harq_processes_dest->delta_PUCCH = current_harq_processes->delta_PUCCH ;
- harq_processes_dest->dl_power_off = current_harq_processes->dl_power_off ;
- harq_processes_dest->first_tx = current_harq_processes->first_tx ;
- harq_processes_dest->mcs = current_harq_processes->mcs ;
- harq_processes_dest->mimo_mode = current_harq_processes->mimo_mode ;
- harq_processes_dest->nb_rb = current_harq_processes->nb_rb ;
- harq_processes_dest->pmi_alloc = current_harq_processes->pmi_alloc ;
- harq_processes_dest->rb_alloc_even[0] = current_harq_processes->rb_alloc_even[0] ;
- harq_processes_dest->rb_alloc_even[1] = current_harq_processes->rb_alloc_even[1] ;
- harq_processes_dest->rb_alloc_even[2] = current_harq_processes->rb_alloc_even[2] ;
- harq_processes_dest->rb_alloc_even[3] = current_harq_processes->rb_alloc_even[3] ;
- harq_processes_dest->rb_alloc_odd[0] = current_harq_processes->rb_alloc_odd[0] ;
- harq_processes_dest->rb_alloc_odd[1] = current_harq_processes->rb_alloc_odd[1] ;
- harq_processes_dest->rb_alloc_odd[2] = current_harq_processes->rb_alloc_odd[2] ;
- harq_processes_dest->rb_alloc_odd[3] = current_harq_processes->rb_alloc_odd[3] ;
- harq_processes_dest->round = current_harq_processes->round ;
- harq_processes_dest->rvidx = current_harq_processes->rvidx ;
- harq_processes_dest->status = current_harq_processes->status ;
- harq_processes_dest->vrb_type = current_harq_processes->vrb_type ;
+
+ harq_processes_dest->B = current_harq_processes->B ;
+ harq_processes_dest->C = current_harq_processes->C ;
+ harq_processes_dest->DCINdi = current_harq_processes->DCINdi ;
+ harq_processes_dest->F = current_harq_processes->F ;
+ harq_processes_dest->G = current_harq_processes->G ;
+ harq_processes_dest->K = current_harq_processes->K ;
+ harq_processes_dest->Nl = current_harq_processes->Nl ;
+ harq_processes_dest->Qm = current_harq_processes->Qm ;
+ harq_processes_dest->TBS = current_harq_processes->TBS ;
+ harq_processes_dest->b = current_harq_processes->b ;
+ harq_processes_dest->codeword = current_harq_processes->codeword ;
+ harq_processes_dest->delta_PUCCH = current_harq_processes->delta_PUCCH ;
+ harq_processes_dest->dl_power_off = current_harq_processes->dl_power_off ;
+ harq_processes_dest->first_tx = current_harq_processes->first_tx ;
+ harq_processes_dest->mcs = current_harq_processes->mcs ;
+ harq_processes_dest->mimo_mode = current_harq_processes->mimo_mode ;
+ harq_processes_dest->nb_rb = current_harq_processes->nb_rb ;
+ harq_processes_dest->pmi_alloc = current_harq_processes->pmi_alloc ;
+ harq_processes_dest->rb_alloc_even[0] = current_harq_processes->rb_alloc_even[0] ;
+ harq_processes_dest->rb_alloc_even[1] = current_harq_processes->rb_alloc_even[1] ;
+ harq_processes_dest->rb_alloc_even[2] = current_harq_processes->rb_alloc_even[2] ;
+ harq_processes_dest->rb_alloc_even[3] = current_harq_processes->rb_alloc_even[3] ;
+ harq_processes_dest->rb_alloc_odd[0] = current_harq_processes->rb_alloc_odd[0] ;
+ harq_processes_dest->rb_alloc_odd[1] = current_harq_processes->rb_alloc_odd[1] ;
+ harq_processes_dest->rb_alloc_odd[2] = current_harq_processes->rb_alloc_odd[2] ;
+ harq_processes_dest->rb_alloc_odd[3] = current_harq_processes->rb_alloc_odd[3] ;
+ harq_processes_dest->round = current_harq_processes->round ;
+ harq_processes_dest->rvidx = current_harq_processes->rvidx ;
+ harq_processes_dest->status = current_harq_processes->status ;
+ harq_processes_dest->vrb_type = current_harq_processes->vrb_type ;
+
}
/*void copy_ack_struct(nr_harq_status_t *harq_ack_dest, nr_harq_status_t *current_harq_ack)
-{
- memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
-}*/
+ {
+ memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
+ }*/
-void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1, int abstraction_flag) {
+void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1) {
int nr_tti_rx = proc->nr_tti_rx;
int m;
@@ -3563,11 +3731,11 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
}
else if((pdsch==PDSCH) && (ue->transmission_mode[eNB_id]==3))
- {
+ {
dual_stream_UE = rx_IC_dual_stream;
eNB_id_i = eNB_id;
i_mod = 0;
- }
+ }
else {
dual_stream_UE = 0;
eNB_id_i = eNB_id+1;
@@ -3578,17 +3746,17 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
if (ue->transmission_mode[eNB_id]==7) {
if (ue->frame_parms.Ncp==0) {
//if ((m==3) || (m==6) || (m==9) || (m==12))
- //LOG_D(PHY,"[UE %d] dlsch->active in nr_tti_rx %d => %d, l=%d\n",phy_vars_ue->Mod_id,nr_tti_rx,phy_vars_ue->dlsch_ue[eNB_id][0]->active, l);
- //lte_dl_bf_channel_estimation(ue,eNB_id,0,nr_tti_rx*2+(m>6?1:0),5,m);
+ //LOG_D(PHY,"[UE %d] dlsch->active in nr_tti_rx %d => %d, l=%d\n",phy_vars_ue->Mod_id,nr_tti_rx,phy_vars_ue->dlsch_ue[eNB_id][0]->active, l);
+ //lte_dl_bf_channel_estimation(ue,eNB_id,0,nr_tti_rx*2+(m>6?1:0),5,m);
} else {
LOG_E(PHY,"[UE %d]Beamforming channel estimation not supported yet for TM7 extented CP.\n",ue->Mod_id);
}
}
if ((m==s0) && (m<3))
- first_symbol_flag = 1;
+ first_symbol_flag = 1;
else
- first_symbol_flag = 0;
+ first_symbol_flag = 0;
#if UE_TIMING_TRACE
uint8_t slot = 0;
if(m >= ue->frame_parms.symbols_per_tti>>1)
@@ -3610,17 +3778,17 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_llr_stats_parallelization[ue->current_thread_id[nr_tti_rx]][slot]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,nr_tti_rx,m,ue->dlsch_llr_stats_parallelization[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,nr_tti_rx,m,ue->dlsch_llr_stats_parallelization[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,nr_tti_rx,m,ue->dlsch_llr_stats_parallelization[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] LLR Computation Symbol %d %5.2f \n",proc->frame_rx,nr_tti_rx,m,ue->dlsch_llr_stats_parallelization[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
#endif
#endif
if(first_symbol_flag)
- {
+ {
proc->first_symbol_available = 1;
- }
+ }
} // CRNTI active
}
}
@@ -3637,43 +3805,43 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Received RAR mode %d\n",
- ue->Mod_id,
- frame_rx,
- nr_tti_rx, ue->UE_mode[eNB_id]);
+ ue->Mod_id,
+ frame_rx,
+ nr_tti_rx, ue->UE_mode[eNB_id]);
if (ue->mac_enabled == 1) {
if ((ue->UE_mode[eNB_id] != PUSCH) &&
- (ue->prach_resources[eNB_id]->Msg3!=NULL)) {
+ (ue->prach_resources[eNB_id]->Msg3!=NULL)) {
LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Invoking MAC for RAR (current preamble %d)\n",
ue->Mod_id,frame_rx,
nr_tti_rx,
ue->prach_resources[eNB_id]->ra_PreambleIndex);
-/* timing_advance = mac_xface->ue_process_rar(ue->Mod_id,
- ue->CC_id,
- frame_rx,
- ue->prach_resources[eNB_id]->ra_RNTI,
- dlsch0->harq_processes[0]->b,
- &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
- ue->prach_resources[eNB_id]->ra_PreambleIndex,
- dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
-*/
+ /* timing_advance = mac_xface->ue_process_rar(ue->Mod_id,
+ ue->CC_id,
+ frame_rx,
+ ue->prach_resources[eNB_id]->ra_RNTI,
+ dlsch0->harq_processes[0]->b,
+ &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
+ ue->prach_resources[eNB_id]->ra_PreambleIndex,
+ dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
+ */
ue->pdcch_vars[next1_thread_id][eNB_id]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti;
ue->pdcch_vars[next2_thread_id][eNB_id]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti;
if (timing_advance!=0xffff) {
- LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Got rnti %x and timing advance %d from RAR\n",
+ LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Got rnti %x and timing advance %d from RAR\n",
ue->Mod_id,
frame_rx,
nr_tti_rx,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
timing_advance);
- // remember this c-rnti is still a tc-rnti
+ // remember this c-rnti is still a tc-rnti
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti_is_temporary = 1;
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti_is_temporary = 1;
//timing_advance = 0;
nr_process_timing_advance_rar(ue,proc,timing_advance);
@@ -3681,10 +3849,10 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod
if (mode!=debug_prach) {
ue->ulsch_Msg3_active[eNB_id]=1;
nr_get_Msg3_alloc(&ue->frame_parms,
- nr_tti_rx,
- frame_rx,
- &ue->ulsch_Msg3_frame[eNB_id],
- &ue->ulsch_Msg3_subframe[eNB_id]);
+ nr_tti_rx,
+ frame_rx,
+ &ue->ulsch_Msg3_frame[eNB_id],
+ &ue->ulsch_Msg3_subframe[eNB_id]);
LOG_D(PHY,"[UE %d][RAPROC] Got Msg3_alloc Frame %d nr_tti_rx %d: Msg3_frame %d, Msg3_subframe %d\n",
ue->Mod_id,
@@ -3693,8 +3861,8 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod
ue->ulsch_Msg3_frame[eNB_id],
ue->ulsch_Msg3_subframe[eNB_id]);
harq_pid = nr_subframe2harq_pid(&ue->frame_parms,
- ue->ulsch_Msg3_frame[eNB_id],
- ue->ulsch_Msg3_subframe[eNB_id]);
+ ue->ulsch_Msg3_frame[eNB_id],
+ ue->ulsch_Msg3_subframe[eNB_id]);
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0;
ue->UE_mode[eNB_id] = RA_RESPONSE;
@@ -3703,9 +3871,9 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod
ue->ulsch_no_allocation_counter[eNB_id] = 0;
}
} else { // PRACH preamble doesn't match RAR
- LOG_W(PHY,"[UE %d][RAPROC] Received RAR preamble (%d) doesn't match !!!\n",
- ue->Mod_id,
- ue->prach_resources[eNB_id]->ra_PreambleIndex);
+ LOG_W(PHY,"[UE %d][RAPROC] Received RAR preamble (%d) doesn't match !!!\n",
+ ue->Mod_id,
+ ue->prach_resources[eNB_id]->ra_PreambleIndex);
}
} // mode != PUSCH
}
@@ -3725,8 +3893,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors,
- runmode_t mode,
- int abstraction_flag) {
+ runmode_t mode) {
int harq_pid;
int frame_rx = proc->frame_rx;
@@ -3742,7 +3909,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
uint16_t nb_symb_sch = 8;
if (dlsch0==NULL)
- AssertFatal(0,"dlsch0 should be defined at this level \n");
+ AssertFatal(0,"dlsch0 should be defined at this level \n");
harq_pid = dlsch0->current_harq_pid;
is_cw0_active = dlsch0->harq_processes[harq_pid]->status;
@@ -3754,14 +3921,14 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"AbsSubframe %d.%d Start LDPC Decoder for CW1 [harq_pid %d] ? %d \n", frame_rx%1024, nr_tti_rx, harq_pid, is_cw1_active);
if(is_cw0_active && is_cw1_active)
- {
+ {
dlsch0->Kmimo = 2;
dlsch1->Kmimo = 2;
- }
+ }
else
- {
+ {
dlsch0->Kmimo = 1;
- }
+ }
if (1) {
switch (pdsch) {
case SI_PDSCH:
@@ -3793,15 +3960,14 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
if (pdsch==RA_PDSCH) {
if (ue->prach_resources[eNB_id]!=NULL)
- dlsch0->rnti = ue->prach_resources[eNB_id]->ra_RNTI;
+ dlsch0->rnti = ue->prach_resources[eNB_id]->ra_RNTI;
else {
- LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: FATAL, prach_resources is NULL\n",ue->Mod_id,frame_rx,nr_tti_rx);
- //mac_xface->macphy_exit("prach_resources is NULL");
- return;
+ LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: FATAL, prach_resources is NULL\n",ue->Mod_id,frame_rx,nr_tti_rx);
+ //mac_xface->macphy_exit("prach_resources is NULL");
+ return;
}
}
- if (abstraction_flag == 0) {
// start ldpc decode for CW 0
dlsch0->harq_processes[harq_pid]->G = nr_get_G(dlsch0->harq_processes[harq_pid]->nb_rb,
@@ -3966,169 +4132,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY," ------ end ldpc decoder for AbsSubframe %d.%d ------ \n", frame_rx, nr_tti_rx);
}
- else {
- LOG_D(PHY,"Calling dlsch_decoding_emul ...\n");
-#ifdef PHY_ABSTRACTION
- ret = dlsch_decoding_emul(ue,
- nr_tti_rx,
- pdsch,
- eNB_id);
-#endif
- }
-
- // Check CRC for CW 0
- if (ret == (1+dlsch0->max_ldpc_iterations)) {
- *dlsch_errors=*dlsch_errors+1;
-
- if(dlsch0->rnti != 0xffff)
- {
- LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : DLSCH CW0 in error (rv %d,round %d, mcs %d,TBS %d)\n",
- ue->Mod_id,dlsch0->rnti,
- harq_pid,frame_rx,nr_tti_rx,
- dlsch0->harq_processes[harq_pid]->rvidx,
- dlsch0->harq_processes[harq_pid]->round,
- dlsch0->harq_processes[harq_pid]->mcs,
- dlsch0->harq_processes[harq_pid]->TBS);
- }
-
-
- } else {
- if(dlsch0->rnti != 0xffff)
- {
- LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : Received DLSCH CW0 (rv %d,round %d, mcs %d,TBS %d)\n",
- ue->Mod_id,dlsch0->rnti,
- harq_pid,frame_rx,nr_tti_rx,
- dlsch0->harq_processes[harq_pid]->rvidx,
- dlsch0->harq_processes[harq_pid]->round,
- dlsch0->harq_processes[harq_pid]->mcs,
- dlsch0->harq_processes[harq_pid]->TBS);
- }
-
-#ifdef DEBUG_DLSCH
- int j;
- LOG_D(PHY,"dlsch harq_pid %d (rx): \n",dlsch0->current_harq_pid);
-
- for (j=0; j<dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS>>3; j++)
- LOG_T(PHY,"%x.",dlsch0->harq_processes[dlsch0->current_harq_pid]->b[j]);
-
- LOG_T(PHY,"\n");
-#endif
-
-
- switch (pdsch) {
- case PDSCH:
- /* if (ue->mac_enabled == 1)
- mac_xface->ue_send_sdu(ue->Mod_id,
- CC_id,
- frame_rx,
- nr_tti_rx,
- dlsch0->harq_processes[dlsch0->current_harq_pid]->b,
- dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS>>3,
- eNB_id);*/
- break;
- case SI_PDSCH:
- /*mac_xface->ue_decode_si(ue->Mod_id,
- CC_id,
- frame_rx,
- eNB_id,
- ue->dlsch_SI[eNB_id]->harq_processes[0]->b,
- ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);*/
- break;
- case P_PDSCH:
- /* if (ue->mac_enabled == 1)
- mac_xface->ue_decode_p(ue->Mod_id,
- CC_id,
- frame_rx,
- eNB_id,
- ue->dlsch_SI[eNB_id]->harq_processes[0]->b,
- ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);*/
- break;
- case RA_PDSCH:
- if (ue->mac_enabled == 1)
- //process_rar(ue,proc,eNB_id,mode,abstraction_flag);
- break;
- case PDSCH1:
- LOG_E(PHY,"Shouldn't have PDSCH1 yet, come back later\n");
- AssertFatal(1==0,"exiting");
- break;
- case PMCH:
- LOG_E(PHY,"Shouldn't have PMCH here\n");
- AssertFatal(1==0,"exiting");
- break;
-
- }
- ue->total_TBS[eNB_id] = ue->total_TBS[eNB_id] +
- dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS;
- ue->total_received_bits[eNB_id] = ue->total_TBS[eNB_id] +
- dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS;
- }
- // Check CRC for CW 1
- if(is_cw1_active)
- {
- if (ret1 == (1+dlsch0->max_ldpc_iterations)) {
- LOG_I(PHY,"[UE %d][PDSCH %x/%d] Frame %d nr_tti_rx %d DLSCH CW1 in error (rv %d,mcs %d,TBS %d)\n",
- ue->Mod_id,dlsch0->rnti,
- harq_pid,frame_rx,nr_tti_rx,
- dlsch0->harq_processes[harq_pid]->rvidx,
- dlsch0->harq_processes[harq_pid]->mcs,
- dlsch0->harq_processes[harq_pid]->TBS);
-
- } else {
- LOG_I(PHY,"[UE %d][PDSCH %x/%d] Frame %d nr_tti_rx %d: Received DLSCH CW1 (rv %d,mcs %d,TBS %d)\n",
- ue->Mod_id,dlsch0->rnti,
- harq_pid,frame_rx,nr_tti_rx,
- dlsch0->harq_processes[harq_pid]->rvidx,
- dlsch0->harq_processes[harq_pid]->mcs,
- dlsch0->harq_processes[harq_pid]->TBS);
-
-
- if (ue->mac_enabled == 1) {
- switch (pdsch) {
- case PDSCH:
- if(is_cw1_active)
- /*mac_xface->ue_send_sdu(ue->Mod_id,
- CC_id,
- frame_rx,
- nr_tti_rx,
- dlsch1->harq_processes[dlsch1->current_harq_pid]->b,
- dlsch1->harq_processes[dlsch1->current_harq_pid]->TBS>>3,
- eNB_id);*/
- break;
- case SI_PDSCH:
- case P_PDSCH:
- case RA_PDSCH:
- case PDSCH1:
- case PMCH:
- AssertFatal(0,"exiting");
- break;
- }
- }
- }
- }
-
- //#ifdef DEBUG_PHY_PROC
- LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d nr_tti_rx %d: PDSCH/DLSCH decoding iter %d/%d (mcs %d, rv %d, TBS %d)\n",
- ue->Mod_id,
- dlsch0->rnti,harq_pid,
- frame_rx,nr_tti_rx,ret,dlsch0->max_ldpc_iterations,
- dlsch0->harq_processes[harq_pid]->mcs,
- dlsch0->harq_processes[harq_pid]->rvidx,
- dlsch0->harq_processes[harq_pid]->TBS);
-
-#ifdef DEBUG_PHY_PROC
- if (frame_rx%100==0) {
- LOG_D(PHY,"[UE %d][PDSCH %x] Frame %d nr_tti_rx %d dlsch_errors %d, dlsch_received %d, dlsch_fer %d, current_dlsch_cqi %d\n",
- ue->Mod_id,dlsch0->rnti,
- frame_rx,nr_tti_rx,
- ue->dlsch_errors[eNB_id],
- ue->dlsch_received[eNB_id],
- ue->dlsch_fer[eNB_id],
- ue->measurements.wideband_cqi_tot[eNB_id]);
- }
-#endif
-
- }
}
@@ -4144,174 +4148,174 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
#define FIFO_PRIORITY 40
void *UE_thread_slot1_dl_processing(void *arg) {
- static __thread int UE_dl_slot1_processing_retval;
- struct rx_tx_thread_data *rtd = arg;
- UE_nr_rxtx_proc_t *proc = rtd->proc;
- PHY_VARS_NR_UE *ue = rtd->UE;
-
- int frame_rx;
- uint8_t nr_tti_rx;
- uint8_t pilot0;
- uint8_t pilot1;
- uint8_t slot1;
-
- uint8_t next_nr_tti_rx;
- uint8_t next_subframe_slot0;
-
- proc->instance_cnt_slot1_dl_processing=-1;
- proc->nr_tti_rx=proc->sub_frame_start;
-
- char threadname[256];
- sprintf(threadname,"UE_thread_slot1_dl_processing_%d", proc->sub_frame_start);
-
- cpu_set_t cpuset;
- CPU_ZERO(&cpuset);
- if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.slot1_proc_one != -1 )
- CPU_SET(threads.slot1_proc_one, &cpuset);
- if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.slot1_proc_two != -1 )
- CPU_SET(threads.slot1_proc_two, &cpuset);
- if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.slot1_proc_three != -1 )
- CPU_SET(threads.slot1_proc_three, &cpuset);
-
- init_thread(900000,1000000 , FIFO_PRIORITY-1, &cpuset,
- threadname);
-
- while (!oai_exit) {
- if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE] error locking mutex for UE slot1 dl processing\n" );
- exit_fun("nothing to add");
- }
- while (proc->instance_cnt_slot1_dl_processing < 0) {
- // most of the time, the thread is waiting here
- pthread_cond_wait( &proc->cond_slot1_dl_processing, &proc->mutex_slot1_dl_processing );
- }
- if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE slot1 dl processing \n" );
- exit_fun("nothing to add");
- }
+ static __thread int UE_dl_slot1_processing_retval;
+ struct rx_tx_thread_data *rtd = arg;
+ UE_nr_rxtx_proc_t *proc = rtd->proc;
+ PHY_VARS_NR_UE *ue = rtd->UE;
- /*for(int th_idx=0; th_idx< RX_NB_TH; th_idx++)
- {
- frame_rx = ue->proc.proc_rxtx[0].frame_rx;
- nr_tti_rx = ue->proc.proc_rxtx[0].nr_tti_rx;
- printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, nr_tti_rx);
- }*/
- frame_rx = proc->frame_rx;
- nr_tti_rx = proc->nr_tti_rx;
- next_nr_tti_rx = (1+nr_tti_rx)%10;
- next_subframe_slot0 = next_nr_tti_rx<<1;
-
- slot1 = (nr_tti_rx<<1) + 1;
- pilot0 = 0;
-
- //printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, nr_tti_rx);
-
- if (ue->frame_parms.Ncp == 0) { // normal prefix
- pilot1 = 4;
- } else { // extended prefix
- pilot1 = 3;
- }
+ int frame_rx;
+ uint8_t nr_tti_rx;
+ uint8_t pilot0;
+ uint8_t pilot1;
+ uint8_t slot1;
+
+ uint8_t next_nr_tti_rx;
+ uint8_t next_subframe_slot0;
+
+ proc->instance_cnt_slot1_dl_processing=-1;
+ proc->nr_tti_rx=proc->sub_frame_start;
+
+ char threadname[256];
+ sprintf(threadname,"UE_thread_slot1_dl_processing_%d", proc->sub_frame_start);
+
+ cpu_set_t cpuset;
+ CPU_ZERO(&cpuset);
+ if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.slot1_proc_one != -1 )
+ CPU_SET(threads.slot1_proc_one, &cpuset);
+ if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.slot1_proc_two != -1 )
+ CPU_SET(threads.slot1_proc_two, &cpuset);
+ if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.slot1_proc_three != -1 )
+ CPU_SET(threads.slot1_proc_three, &cpuset);
+
+ init_thread(900000,1000000 , FIFO_PRIORITY-1, &cpuset,
+ threadname);
+
+ while (!oai_exit) {
+ if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE] error locking mutex for UE slot1 dl processing\n" );
+ exit_fun("nothing to add");
+ }
+ while (proc->instance_cnt_slot1_dl_processing < 0) {
+ // most of the time, the thread is waiting here
+ pthread_cond_wait( &proc->cond_slot1_dl_processing, &proc->mutex_slot1_dl_processing );
+ }
+ if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE slot1 dl processing \n" );
+ exit_fun("nothing to add");
+ }
+
+ /*for(int th_idx=0; th_idx< RX_NB_TH; th_idx++)
+ {
+ frame_rx = ue->proc.proc_rxtx[0].frame_rx;
+ nr_tti_rx = ue->proc.proc_rxtx[0].nr_tti_rx;
+ printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, nr_tti_rx);
+ }*/
+ frame_rx = proc->frame_rx;
+ nr_tti_rx = proc->nr_tti_rx;
+ next_nr_tti_rx = (1+nr_tti_rx)%10;
+ next_subframe_slot0 = next_nr_tti_rx<<1;
+
+ slot1 = (nr_tti_rx<<1) + 1;
+ pilot0 = 0;
+
+ //printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, nr_tti_rx);
+
+ if (ue->frame_parms.Ncp == 0) { // normal prefix
+ pilot1 = 4;
+ } else { // extended prefix
+ pilot1 = 3;
+ }
- /**** Slot1 FE Processing ****/
+ /**** Slot1 FE Processing ****/
#if UE_TIMING_TRACE
- start_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1]);
+ start_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1]);
#endif
- // I- start dl slot1 processing
- // do first symbol of next downlink nr_tti_rx for channel estimation
- /*
- // 1- perform FFT for pilot ofdm symbols first (ofdmSym0 next nr_tti_rx ofdmSym11)
- if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)
- {
- front_end_fft(ue,
- pilot0,
- next_subframe_slot0,
- 0,
- 0);
- }
+ // I- start dl slot1 processing
+ // do first symbol of next downlink nr_tti_rx for channel estimation
+ /*
+ // 1- perform FFT for pilot ofdm symbols first (ofdmSym0 next nr_tti_rx ofdmSym11)
+ if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)
+ {
+ front_end_fft(ue,
+ pilot0,
+ next_subframe_slot0,
+ 0,
+ 0);
+ }
- front_end_fft(ue,
- pilot1,
- slot1,
- 0,
- 0);
- */
- // 1- perform FFT
- for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
- {
- //if( (l != pilot0) && (l != pilot1))
- {
+ front_end_fft(ue,
+ pilot1,
+ slot1,
+ 0,
+ 0);
+ */
+ // 1- perform FFT
+ for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
+ {
+ //if( (l != pilot0) && (l != pilot1))
+ {
#if UE_TIMING_TRACE
- start_meas(&ue->ofdm_demod_stats);
+ start_meas(&ue->ofdm_demod_stats);
#endif
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
- //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,l);
- front_end_fft(ue,
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
+ //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,l);
+ front_end_fft(ue,
l,
slot1,
0,
0);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
- stop_meas(&ue->ofdm_demod_stats);
+ stop_meas(&ue->ofdm_demod_stats);
#endif
- }
- } // for l=1..l2
+ }
+ } // for l=1..l2
- if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)
- {
- //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,next_subframe_slot0,pilot0);
- front_end_fft(ue,
- pilot0,
- next_subframe_slot0,
- 0,
- 0);
- }
+ if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)
+ {
+ //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,next_subframe_slot0,pilot0);
+ front_end_fft(ue,
+ pilot0,
+ next_subframe_slot0,
+ 0,
+ 0);
+ }
- // 2- perform Channel Estimation for slot1
- for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
- {
- if(l == pilot1)
- {
- //wait until channel estimation for pilot0/slot1 is available
- uint32_t wait = 0;
- while(proc->chan_est_pilot0_slot1_available == 0)
- {
- usleep(1);
- wait++;
- }
- //printf("[slot1 dl processing] ChanEst symbol %d slot %d wait%d\n",l,slot1,wait);
- }
- //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,l);
- front_end_chanEst(ue,
- l,
- slot1,
- 0);
- ue_measurement_procedures(l-1,ue,proc,0,1+(nr_tti_rx<<1),0,ue->mode);
- }
- //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,next_subframe_slot0,pilot0);
- front_end_chanEst(ue,
- pilot0,
- next_subframe_slot0,
- 0);
+ // 2- perform Channel Estimation for slot1
+ for (int l=1; l<ue->frame_parms.symbols_per_tti>>1; l++)
+ {
+ if(l == pilot1)
+ {
+ //wait until channel estimation for pilot0/slot1 is available
+ uint32_t wait = 0;
+ while(proc->chan_est_pilot0_slot1_available == 0)
+ {
+ usleep(1);
+ wait++;
+ }
+ //printf("[slot1 dl processing] ChanEst symbol %d slot %d wait%d\n",l,slot1,wait);
+ }
+ //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,l);
+ front_end_chanEst(ue,
+ l,
+ slot1,
+ 0);
+ ue_measurement_procedures(l-1,ue,proc,0,1+(nr_tti_rx<<1),0,ue->mode);
+ }
+ //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,next_subframe_slot0,pilot0);
+ front_end_chanEst(ue,
+ pilot0,
+ next_subframe_slot0,
+ 0);
- if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
- {
- ue_pbch_procedures(0,ue,proc,0);
- }
+ if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
+ {
+ ue_pbch_procedures(0,ue,proc,0);
+ }
- proc->chan_est_slot1_available = 1;
- //printf("Set available slot 1channelEst to 1 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
- //printf(" [slot1 dl processing] ==> FFT/CHanEst Done for AbsSubframe %d.%d \n", proc->frame_rx, proc->nr_tti_rx);
+ proc->chan_est_slot1_available = 1;
+ //printf("Set available slot 1channelEst to 1 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
+ //printf(" [slot1 dl processing] ==> FFT/CHanEst Done for AbsSubframe %d.%d \n", proc->frame_rx, proc->nr_tti_rx);
- //printf(" [slot1 dl processing] ==> Start LLR Comuptation slot1 for AbsSubframe %d.%d \n", proc->frame_rx, proc->nr_tti_rx);
+ //printf(" [slot1 dl processing] ==> Start LLR Comuptation slot1 for AbsSubframe %d.%d \n", proc->frame_rx, proc->nr_tti_rx);
#if UE_TIMING_TRACE
- stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1]);
+ stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][1].p_time/(cpuf*1000.0));
#endif
#endif
@@ -4319,10 +4323,10 @@ void *UE_thread_slot1_dl_processing(void *arg) {
//wait until pdcch is decoded
uint32_t wait = 0;
while(proc->dci_slot0_available == 0)
- {
+ {
usleep(1);
wait++;
- }
+ }
//printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait DCI %d\n",frame_rx,nr_tti_rx,wait);
@@ -4338,67 +4342,67 @@ void *UE_thread_slot1_dl_processing(void *arg) {
// start slave thread for Pdsch Procedure (slot1)
// do procedures for C-RNTI
uint8_t eNB_id = 0;
- uint8_t abstraction_flag = 0;
+
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
- //wait until first ofdm symbol is processed
- //wait = 0;
- //while(proc->first_symbol_available == 0)
- //{
- // usleep(1);
- // wait++;
- //}
- //printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait First Ofdm Sym %d\n",frame_rx,nr_tti_rx,wait);
-
- //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- PDSCH,
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
- NULL,
- (ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
- LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
- LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
+ //wait until first ofdm symbol is processed
+ //wait = 0;
+ //while(proc->first_symbol_available == 0)
+ //{
+ // usleep(1);
+ // wait++;
+ //}
+ //printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait First Ofdm Sym %d\n",frame_rx,nr_tti_rx,wait);
+
+ //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ PDSCH,
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
+ NULL,
+ (ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1,
+ abstraction_flag);
+ LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
+ LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- SI_PDSCH,
- ue->dlsch_SI[eNB_id],
- NULL,
- (ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ SI_PDSCH,
+ ue->dlsch_SI[eNB_id],
+ NULL,
+ (ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1,
+ abstraction_flag);
}
// do procedures for P-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- P_PDSCH,
- ue->dlsch_p[eNB_id],
- NULL,
- (ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ P_PDSCH,
+ ue->dlsch_p[eNB_id],
+ NULL,
+ (ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1,
+ abstraction_flag);
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- RA_PDSCH,
- ue->dlsch_ra[eNB_id],
- NULL,
- (ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ RA_PDSCH,
+ ue->dlsch_ra[eNB_id],
+ NULL,
+ (ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1,
+ abstraction_flag);
}
proc->llr_slot1_available=1;
@@ -4414,19 +4418,19 @@ void *UE_thread_slot1_dl_processing(void *arg) {
#endif
- if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
- exit_fun("noting to add");
- }
- proc->instance_cnt_slot1_dl_processing--;
- if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE FEP Slo1\n" );
- exit_fun("noting to add");
- }
+ if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
+ exit_fun("noting to add");
+ }
+ proc->instance_cnt_slot1_dl_processing--;
+ if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE FEP Slo1\n" );
+ exit_fun("noting to add");
}
- // thread finished
- free(arg);
- return &UE_dl_slot1_processing_retval;
+ }
+ // thread finished
+ free(arg);
+ return &UE_dl_slot1_processing_retval;
}
#endif
@@ -4435,465 +4439,465 @@ int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_pr
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type) {
- int l,l2;
- int pmch_flag=0;
- int frame_rx = proc->frame_rx;
- int nr_tti_rx = proc->nr_tti_rx;
- uint8_t pilot0;
- uint8_t pilot1;
- uint8_t slot0;
- uint8_t slot1;
- uint8_t first_ofdm_sym;
+ int l,l2;
+ int pmch_flag=0;
+ int frame_rx = proc->frame_rx;
+ int nr_tti_rx = proc->nr_tti_rx;
+ uint8_t pilot0;
+ uint8_t pilot1;
+ uint8_t slot0;
+ uint8_t slot1;
+ uint8_t first_ofdm_sym;
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
#if T_TRACER
- T(T_UE_PHY_DL_TICK, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx));
+ T(T_UE_PHY_DL_TICK, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx));
- T(T_UE_PHY_INPUT_SIGNAL, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx), T_INT(0),
- T_BUFFER(&ue->common_vars.rxdata[0][nr_tti_rx*ue->frame_parms.samples_per_subframe],
- ue->frame_parms.samples_per_subframe * 4));
+ T(T_UE_PHY_INPUT_SIGNAL, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx), T_INT(0),
+ T_BUFFER(&ue->common_vars.rxdata[0][nr_tti_rx*ue->frame_parms.samples_per_subframe],
+ ue->frame_parms.samples_per_subframe * 4));
#endif
- // start timers
+ // start timers
#ifdef UE_DEBUG_TRACE
- LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
+ LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
#endif
#if UE_TIMING_TRACE
- start_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
- start_meas(&ue->ue_front_end_stat[ue->current_thread_id[nr_tti_rx]]);
+ start_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
+ start_meas(&ue->ue_front_end_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
- pmch_flag = is_pmch_subframe(frame_rx,nr_tti_rx,&ue->frame_parms) ? 1 : 0;
-
- if (do_pdcch_flag) {
- // deactivate reception until we scan pdcch
- if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0])
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
- if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1])
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1]->active = 0;
+ pmch_flag = is_pmch_subframe(frame_rx,nr_tti_rx,&ue->frame_parms) ? 1 : 0;
- if (ue->dlsch_SI[eNB_id])
- ue->dlsch_SI[eNB_id]->active = 0;
- if (ue->dlsch_p[eNB_id])
- ue->dlsch_p[eNB_id]->active = 0;
- if (ue->dlsch_ra[eNB_id])
- ue->dlsch_ra[eNB_id]->active = 0;
- }
+ if (do_pdcch_flag) {
+ // deactivate reception until we scan pdcch
+ if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0])
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
+ if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1])
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1]->active = 0;
+
+ if (ue->dlsch_SI[eNB_id])
+ ue->dlsch_SI[eNB_id]->active = 0;
+ if (ue->dlsch_p[eNB_id])
+ ue->dlsch_p[eNB_id]->active = 0;
+ if (ue->dlsch_ra[eNB_id])
+ ue->dlsch_ra[eNB_id]->active = 0;
+ }
#ifdef DEBUG_PHY_PROC
- LOG_D(PHY,"[%s %d] Frame %d nr_tti_rx %d: Doing phy_procedures_UE_RX\n",
- (r_type == multicast_relay) ? "RN/UE" : "UE",
- ue->Mod_id,frame_rx, nr_tti_rx);
+ LOG_D(PHY,"[%s %d] Frame %d nr_tti_rx %d: Doing phy_procedures_UE_RX\n",
+ (r_type == multicast_relay) ? "RN/UE" : "UE",
+ ue->Mod_id,frame_rx, nr_tti_rx);
#endif
- if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) == SF_S) { // S-subframe, do first 5 symbols only
- l2 = 5;
- } else if (pmch_flag == 1) { // do first 2 symbols only
- l2 = 1;
- } else { // normal nr_tti_rx, last symbol to be processed is the first of the second slot
- l2 = (ue->frame_parms.symbols_per_tti/2)-1;
- }
-
- int prev_nr_tti_rx = (nr_tti_rx - 1)<0? 9: (nr_tti_rx - 1);
- if (nr_subframe_select(&ue->frame_parms,prev_nr_tti_rx) != SF_DL) {
- //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
- // RX processing of symbols l=0...l2
- //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
- first_ofdm_sym = 0;
- } else {
- //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
- // RX processing of symbols l=1...l2 (l=0 is done in last scheduling epoch)
- //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
- first_ofdm_sym = 1;
- }
- slot0 = (nr_tti_rx<<1);
- slot1 = (nr_tti_rx<<1) + 1;
- pilot0 = 0;
- if (ue->frame_parms.Ncp == 0) { // normal prefix
- pilot1 = 4;
- } else { // extended prefix
- pilot1 = 3;
- }
+ if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) == SF_S) { // S-subframe, do first 5 symbols only
+ l2 = 5;
+ } else if (pmch_flag == 1) { // do first 2 symbols only
+ l2 = 1;
+ } else { // normal nr_tti_rx, last symbol to be processed is the first of the second slot
+ l2 = (ue->frame_parms.symbols_per_tti/2)-1;
+ }
- //LOG_I(PHY,"Set available channelEst to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
- //LOG_I(PHY,"Set available llrs slot1 to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
- //LOG_I(PHY,"Set available dci info slot0 to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
- proc->chan_est_pilot0_slot1_available=0;
- proc->llr_slot1_available=0;
- proc->dci_slot0_available=0;
- proc->first_symbol_available=0;
- proc->chan_est_slot1_available=0;
- //proc->channel_level=0;
+ int prev_nr_tti_rx = (nr_tti_rx - 1)<0? 9: (nr_tti_rx - 1);
+ if (nr_subframe_select(&ue->frame_parms,prev_nr_tti_rx) != SF_DL) {
+ //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+ // RX processing of symbols l=0...l2
+ //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+ first_ofdm_sym = 0;
+ } else {
+ //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+ // RX processing of symbols l=1...l2 (l=0 is done in last scheduling epoch)
+ //++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+ first_ofdm_sym = 1;
+ }
+ slot0 = (nr_tti_rx<<1);
+ slot1 = (nr_tti_rx<<1) + 1;
+ pilot0 = 0;
+ if (ue->frame_parms.Ncp == 0) { // normal prefix
+ pilot1 = 4;
+ } else { // extended prefix
+ pilot1 = 3;
+ }
- if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE %d][Slot0] error locking mutex for UE slot1 dl processing\n",ue->Mod_id );
- exit_fun("nothing to add");
- }
+ //LOG_I(PHY,"Set available channelEst to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
+ //LOG_I(PHY,"Set available llrs slot1 to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
+ //LOG_I(PHY,"Set available dci info slot0 to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
+ proc->chan_est_pilot0_slot1_available=0;
+ proc->llr_slot1_available=0;
+ proc->dci_slot0_available=0;
+ proc->first_symbol_available=0;
+ proc->chan_est_slot1_available=0;
+ //proc->channel_level=0;
+
+ if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE %d][Slot0] error locking mutex for UE slot1 dl processing\n",ue->Mod_id );
+ exit_fun("nothing to add");
+ }
- proc->instance_cnt_slot1_dl_processing++;
- if (proc->instance_cnt_slot1_dl_processing == 0)
+ proc->instance_cnt_slot1_dl_processing++;
+ if (proc->instance_cnt_slot1_dl_processing == 0)
{
- LOG_D(PHY,"unblock slot1 dl processing thread blocked on instance_cnt_slot1_dl_processing : %d \n", proc->instance_cnt_slot1_dl_processing );
- if (pthread_cond_signal(&proc->cond_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE %d][Slot0] ERROR pthread_cond_signal for UE slot1 processing thread\n", ue->Mod_id);
- exit_fun("nothing to add");
- }
- if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
- LOG_E( PHY, "[SCHED][UE %d][Slot0] error unlocking mutex for UE slot1 dl processing \n",ue->Mod_id );
- exit_fun("nothing to add");
- }
+ LOG_D(PHY,"unblock slot1 dl processing thread blocked on instance_cnt_slot1_dl_processing : %d \n", proc->instance_cnt_slot1_dl_processing );
+ if (pthread_cond_signal(&proc->cond_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE %d][Slot0] ERROR pthread_cond_signal for UE slot1 processing thread\n", ue->Mod_id);
+ exit_fun("nothing to add");
+ }
+ if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
+ LOG_E( PHY, "[SCHED][UE %d][Slot0] error unlocking mutex for UE slot1 dl processing \n",ue->Mod_id );
+ exit_fun("nothing to add");
+ }
} else
{
- LOG_E( PHY, "[SCHED][UE %d] UE RX thread busy (IC %d)!!\n", ue->Mod_id, proc->instance_cnt_slot1_dl_processing);
- if (proc->instance_cnt_slot1_dl_processing > 2)
- exit_fun("instance_cnt_slot1_dl_processing > 2");
+ LOG_E( PHY, "[SCHED][UE %d] UE RX thread busy (IC %d)!!\n", ue->Mod_id, proc->instance_cnt_slot1_dl_processing);
+ if (proc->instance_cnt_slot1_dl_processing > 2)
+ exit_fun("instance_cnt_slot1_dl_processing > 2");
}
- //AssertFatal(pthread_cond_signal(&proc->cond_slot1_dl_processing) ==0 ,"");
- AssertFatal(pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) ==0,"");
+ //AssertFatal(pthread_cond_signal(&proc->cond_slot1_dl_processing) ==0 ,"");
+ AssertFatal(pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) ==0,"");
- /**** Slot0 FE Processing ****/
- // I- start main thread for FFT/ChanEst symbol: 0/1 --> 7
+ /**** Slot0 FE Processing ****/
+ // I- start main thread for FFT/ChanEst symbol: 0/1 --> 7
#if UE_TIMING_TRACE
- start_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
-#endif
- // 1- perform FFT for pilot ofdm symbols first (ofdmSym7 ofdmSym4 or (ofdmSym6 ofdmSym3))
- //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,pilot0);
- front_end_fft(ue,
- pilot0,
- slot1,
- 0,
- 0);
- //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,pilot1);
- front_end_fft(ue,
- pilot1,
- slot0,
- 0,
- 0);
- //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,pilot1);
- front_end_chanEst(ue,
- pilot1,
- slot0,
- 0);
- //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,pilot0);
- front_end_chanEst(ue,
- pilot0,
- slot1,
- 0);
- proc->chan_est_pilot0_slot1_available = 1;
- //printf("Set available channelEst to 1 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
-
- // 2- perform FFT for other ofdm symbols other than pilots
- for (l=first_ofdm_sym; l<=l2; l++)
+ start_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
+#endif
+ // 1- perform FFT for pilot ofdm symbols first (ofdmSym7 ofdmSym4 or (ofdmSym6 ofdmSym3))
+ //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,pilot0);
+ front_end_fft(ue,
+ pilot0,
+ slot1,
+ 0,
+ 0);
+ //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,pilot1);
+ front_end_fft(ue,
+ pilot1,
+ slot0,
+ 0,
+ 0);
+ //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,pilot1);
+ front_end_chanEst(ue,
+ pilot1,
+ slot0,
+ 0);
+ //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,pilot0);
+ front_end_chanEst(ue,
+ pilot0,
+ slot1,
+ 0);
+ proc->chan_est_pilot0_slot1_available = 1;
+ //printf("Set available channelEst to 1 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
+
+ // 2- perform FFT for other ofdm symbols other than pilots
+ for (l=first_ofdm_sym; l<=l2; l++)
{
- if( (l != pilot0) && (l != pilot1))
+ if( (l != pilot0) && (l != pilot1))
{
- //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,l);
+ //printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,l);
#if UE_TIMING_TRACE
- start_meas(&ue->ofdm_demod_stats);
-#endif
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
- front_end_fft(ue,
- l,
- slot0,
- 0,
- 0);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
+ start_meas(&ue->ofdm_demod_stats);
+#endif
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
+ front_end_fft(ue,
+ l,
+ slot0,
+ 0,
+ 0);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
- stop_meas(&ue->ofdm_demod_stats);
+ stop_meas(&ue->ofdm_demod_stats);
#endif
}
} // for l=1..l2
- // 3- perform Channel Estimation for slot0
- for (l=first_ofdm_sym; l<=l2; l++)
+ // 3- perform Channel Estimation for slot0
+ for (l=first_ofdm_sym; l<=l2; l++)
{
- if( (l != pilot0) && (l != pilot1))
+ if( (l != pilot0) && (l != pilot1))
{
- //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,l);
- front_end_chanEst(ue,
- l,
- slot0,
- 0);
+ //printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,l);
+ front_end_chanEst(ue,
+ l,
+ slot0,
+ 0);
}
- ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
+ ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
}
- if (do_pdcch_flag) {
+ if (do_pdcch_flag) {
#if UE_TIMING_TRACE
- start_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ start_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
- if (ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
- LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,nr_tti_rx);
+ if (ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
+ LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,nr_tti_rx);
#if UE_TIMING_TRACE
- stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
- //proc->dci_slot0_available = 1;
- return(-1);
- }
- //proc->dci_slot0_available=1;
+ //proc->dci_slot0_available = 1;
+ return(-1);
+ }
+ //proc->dci_slot0_available=1;
#if UE_TIMING_TRACE
- stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
- }
+ }
- //printf("num_pdcch_symbols %d\n",ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols);
+ //printf("num_pdcch_symbols %d\n",ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols);
- // first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
+ // first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
#if UE_TIMING_TRACE
- stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
+ stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#endif
#endif
- //wait until slot1 FE is done
- uint32_t wait = 0;
- while(proc->chan_est_slot1_available == 0)
+ //wait until slot1 FE is done
+ uint32_t wait = 0;
+ while(proc->chan_est_slot1_available == 0)
{
- usleep(1);
- wait++;
+ usleep(1);
+ wait++;
}
#if UE_TIMING_TRACE
- stop_meas(&ue->ue_front_end_stat[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->ue_front_end_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#endif
#endif
- /**** End nr_tti_rx FE Processing ****/
+ /**** End nr_tti_rx FE Processing ****/
#if 0
- //Trigger LLR parallelized for Slot 1
- proc->dci_slot0_available=1;
- printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,nr_tti_rx);
+ //Trigger LLR parallelized for Slot 1
+ proc->dci_slot0_available=1;
+ printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,nr_tti_rx);
#endif
- /**** Pdsch Procedure Slot0 ****/
- // start main thread for Pdsch Procedure (slot0)
- // do procedures for C-RNTI
- //printf("AbsSubframe %d.%d Pdsch Procedure (slot0)\n",frame_rx%1024,nr_tti_rx);
- //printf("AbsSubframe %d.%d Pdsch Procedure PDSCH Active %d \n",frame_rx%1024,nr_tti_rx, ue->dlsch[ue->current_thread_id[nr_tti_rx]][0][0]->active);
+ /**** Pdsch Procedure Slot0 ****/
+ // start main thread for Pdsch Procedure (slot0)
+ // do procedures for C-RNTI
+ //printf("AbsSubframe %d.%d Pdsch Procedure (slot0)\n",frame_rx%1024,nr_tti_rx);
+ //printf("AbsSubframe %d.%d Pdsch Procedure PDSCH Active %d \n",frame_rx%1024,nr_tti_rx, ue->dlsch[ue->current_thread_id[nr_tti_rx]][0][0]->active);
#if UE_TIMING_TRACE
- start_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ start_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
#if UE_TIMING_TRACE
- start_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
+ start_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#endif
- if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- PDSCH,
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- (ue->frame_parms.symbols_per_tti>>1)-1,
- abstraction_flag);
-
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
- }
+ if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ PDSCH,
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ (ue->frame_parms.symbols_per_tti>>1)-1,
+ abstraction_flag);
- // do procedures for SI-RNTI
- if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- SI_PDSCH,
- ue->dlsch_SI[eNB_id],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- (ue->frame_parms.symbols_per_tti>>1)-1,
- abstraction_flag);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
- }
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
+ }
- // do procedures for SI-RNTI
- if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- P_PDSCH,
- ue->dlsch_p[eNB_id],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- (ue->frame_parms.symbols_per_tti>>1)-1,
- abstraction_flag);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
- }
+ // do procedures for SI-RNTI
+ if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ SI_PDSCH,
+ ue->dlsch_SI[eNB_id],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ (ue->frame_parms.symbols_per_tti>>1)-1,
+ abstraction_flag);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
+ }
- // do procedures for RA-RNTI
- if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
- ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- RA_PDSCH,
- ue->dlsch_ra[eNB_id],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- (ue->frame_parms.symbols_per_tti>>1)-1,
- abstraction_flag);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
- }
+ // do procedures for SI-RNTI
+ if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ P_PDSCH,
+ ue->dlsch_p[eNB_id],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ (ue->frame_parms.symbols_per_tti>>1)-1,
+ abstraction_flag);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
+ }
+
+ // do procedures for RA-RNTI
+ if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
+ ue_pdsch_procedures(ue,
+ proc,
+ eNB_id,
+ RA_PDSCH,
+ ue->dlsch_ra[eNB_id],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ (ue->frame_parms.symbols_per_tti>>1)-1,
+ abstraction_flag);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
+ }
#if 1
- // LLR linear
- proc->dci_slot0_available=1;
- //printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,nr_tti_rx);
+ // LLR linear
+ proc->dci_slot0_available=1;
+ //printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,nr_tti_rx);
#endif
#if UE_TIMING_TRACE
- stop_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
+ stop_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#endif
#endif
- //wait until LLR Slot1 is done
- wait = 0;
- while(proc->llr_slot1_available == 0)
+ //wait until LLR Slot1 is done
+ wait = 0;
+ while(proc->llr_slot1_available == 0)
{
- usleep(1);
- wait++;
+ usleep(1);
+ wait++;
}
#if UE_TIMING_TRACE
- stop_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
- //printf("[slot0 dl processing] AbsSubframe %d.%d Channel Decoder Start wait %d\n",frame_rx,nr_tti_rx,wait);
+ //printf("[slot0 dl processing] AbsSubframe %d.%d Channel Decoder Start wait %d\n",frame_rx,nr_tti_rx,wait);
- //=====================================================================//
+ //=====================================================================//
#if UE_TIMING_TRACE
- start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
- LOG_D(PHY,"==> Start Turbo Decoder active dlsch %d SI %d RA %d \n",ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active,
- ue->dlsch_SI[eNB_id]->active,
- //ue->dlsch_p[eNB_id]->active,
- ue->dlsch_ra[eNB_id]->active);
- // Start Turbo decoder
- if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
- //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
- ue_dlsch_procedures(ue,
- proc,
- eNB_id,
- PDSCH,
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1],
- &ue->dlsch_errors[eNB_id],
- mode,
- abstraction_flag);
- //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
- }
+ LOG_D(PHY,"==> Start Turbo Decoder active dlsch %d SI %d RA %d \n",ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active,
+ ue->dlsch_SI[eNB_id]->active,
+ //ue->dlsch_p[eNB_id]->active,
+ ue->dlsch_ra[eNB_id]->active);
+ // Start Turbo decoder
+ if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
+ //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
+ ue_dlsch_procedures(ue,
+ proc,
+ eNB_id,
+ PDSCH,
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1],
+ &ue->dlsch_errors[eNB_id],
+ mode,
+ abstraction_flag);
+ //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
+ }
- // do procedures for SI-RNTI
- if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
- ue_dlsch_procedures(ue,
- proc,
- eNB_id,
- SI_PDSCH,
- ue->dlsch_SI[eNB_id],
- NULL,
- &ue->dlsch_SI_errors[eNB_id],
- mode,
- abstraction_flag);
- ue->dlsch_SI[eNB_id]->active = 0;
- }
+ // do procedures for SI-RNTI
+ if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
+ ue_dlsch_procedures(ue,
+ proc,
+ eNB_id,
+ SI_PDSCH,
+ ue->dlsch_SI[eNB_id],
+ NULL,
+ &ue->dlsch_SI_errors[eNB_id],
+ mode,
+ abstraction_flag);
+ ue->dlsch_SI[eNB_id]->active = 0;
+ }
- // do procedures for P-RNTI
- if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
- ue_dlsch_procedures(ue,
- proc,
- eNB_id,
- P_PDSCH,
- ue->dlsch_p[eNB_id],
- NULL,
- &ue->dlsch_p_errors[eNB_id],
- mode,
- abstraction_flag);
- ue->dlsch_p[eNB_id]->active = 0;
- }
- // do procedures for RA-RNTI
- if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
- ue_dlsch_procedures(ue,
- proc,
- eNB_id,
- RA_PDSCH,
- ue->dlsch_ra[eNB_id],
- NULL,
- &ue->dlsch_ra_errors[eNB_id],
- mode,
- abstraction_flag);
- ue->dlsch_ra[eNB_id]->active = 0;
- }
+ // do procedures for P-RNTI
+ if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
+ ue_dlsch_procedures(ue,
+ proc,
+ eNB_id,
+ P_PDSCH,
+ ue->dlsch_p[eNB_id],
+ NULL,
+ &ue->dlsch_p_errors[eNB_id],
+ mode,
+ abstraction_flag);
+ ue->dlsch_p[eNB_id]->active = 0;
+ }
+ // do procedures for RA-RNTI
+ if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
+ ue_dlsch_procedures(ue,
+ proc,
+ eNB_id,
+ RA_PDSCH,
+ ue->dlsch_ra[eNB_id],
+ NULL,
+ &ue->dlsch_ra_errors[eNB_id],
+ mode,
+ abstraction_flag);
+ ue->dlsch_ra[eNB_id]->active = 0;
+ }
#if UE_TIMING_TRACE
- stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
- // duplicate harq structure
- uint8_t current_harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid;
- NR_DL_UE_HARQ_t *current_harq_processes = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[current_harq_pid];
- nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
+ // duplicate harq structure
+ uint8_t current_harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid;
+ NR_DL_UE_HARQ_t *current_harq_processes = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[current_harq_pid];
+ nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
- // For Debug parallelisation
- //if (current_harq_ack->ack == 0) {
- //printf("[slot0 dl processing][End of Channel Decoding] AbsSubframe %d.%d Decode Fail for HarqId%d Round%d\n",frame_rx,nr_tti_rx,current_harq_pid,current_harq_processes->round);
- //}
- for(uint8_t rx_th_idx=1; rx_th_idx<RX_NB_TH; rx_th_idx++)
- {
- NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[ue->current_thread_id[(nr_tti_rx+rx_th_idx)%10]][eNB_id][0]->harq_processes[current_harq_pid];
- nr_harq_status_t *harq_ack_dest = &ue->dlsch[ue->current_thread_id[(nr_tti_rx+rx_th_idx)%10]][eNB_id][0]->harq_ack[nr_tti_rx];
+ // For Debug parallelisation
+ //if (current_harq_ack->ack == 0) {
+ //printf("[slot0 dl processing][End of Channel Decoding] AbsSubframe %d.%d Decode Fail for HarqId%d Round%d\n",frame_rx,nr_tti_rx,current_harq_pid,current_harq_processes->round);
+ //}
+ for(uint8_t rx_th_idx=1; rx_th_idx<RX_NB_TH; rx_th_idx++)
+ {
+ NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[ue->current_thread_id[(nr_tti_rx+rx_th_idx)%10]][eNB_id][0]->harq_processes[current_harq_pid];
+ nr_harq_status_t *harq_ack_dest = &ue->dlsch[ue->current_thread_id[(nr_tti_rx+rx_th_idx)%10]][eNB_id][0]->harq_ack[nr_tti_rx];
- copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
- copy_ack_struct(harq_ack_dest, current_harq_ack);
+ copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
+ copy_ack_struct(harq_ack_dest, current_harq_ack);
- }
- /*
+ }
+ /*
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[(nr_tti_rx+1)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[(nr_tti_rx+2)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
@@ -4906,60 +4910,61 @@ int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_pr
copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
copy_ack_struct(harq_ack_dest1, current_harq_ack);
- */
- if (nr_tti_rx==9) {
- if (frame_rx % 10 == 0) {
- if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
- ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
+ */
+ if (nr_tti_rx==9) {
+ if (frame_rx % 10 == 0) {
+ if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
+ ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
- ue->dlsch_errors_last[eNB_id] = ue->dlsch_errors[eNB_id];
- ue->dlsch_received_last[eNB_id] = ue->dlsch_received[eNB_id];
- }
+ ue->dlsch_errors_last[eNB_id] = ue->dlsch_errors[eNB_id];
+ ue->dlsch_received_last[eNB_id] = ue->dlsch_received[eNB_id];
+ }
- ue->bitrate[eNB_id] = (ue->total_TBS[eNB_id] - ue->total_TBS_last[eNB_id])*100;
- ue->total_TBS_last[eNB_id] = ue->total_TBS[eNB_id];
- LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
- ue->Mod_id,frame_rx,ue->total_TBS[eNB_id],
- ue->total_TBS_last[eNB_id],(float) ue->bitrate[eNB_id]/1000.0);
+ ue->bitrate[eNB_id] = (ue->total_TBS[eNB_id] - ue->total_TBS_last[eNB_id])*100;
+ ue->total_TBS_last[eNB_id] = ue->total_TBS[eNB_id];
+ LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
+ ue->Mod_id,frame_rx,ue->total_TBS[eNB_id],
+ ue->total_TBS_last[eNB_id],(float) ue->bitrate[eNB_id]/1000.0);
#if UE_AUTOTEST_TRACE
- if ((frame_rx % 100 == 0)) {
- LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[eNB_id]/1000.0, frame_rx);
- }
+ if ((frame_rx % 100 == 0)) {
+ LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[eNB_id]/1000.0, frame_rx);
+ }
#endif
- }
+ }
#ifdef EMOS
- phy_procedures_emos_UE_RX(ue,slot,eNB_id);
+ phy_procedures_emos_UE_RX(ue,slot,eNB_id);
#endif
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
- stop_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
- LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
- return (0);
+ LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
+ return (0);
}
#endif
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
- uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
- relaying_type_t r_type) {
+ uint8_t do_pdcch_flag,runmode_t mode) {
+
+
int l,l2;
int pilot1;
- int pmch_flag=0;
+
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
uint16_t nb_symb_sch = 8; // to be updated by higher layer
@@ -4984,36 +4989,34 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#endif
// start timers
-//#ifdef UE_DEBUG_TRACE
+ //#ifdef UE_DEBUG_TRACE
LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
-//#endif
+ //#endif
#if UE_TIMING_TRACE
start_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
start_meas(&ue->generic_stat);
#endif
- pmch_flag = is_pmch_subframe(frame_rx,nr_tti_rx,&ue->frame_parms) ? 1 : 0;
-
if (do_pdcch_flag) {
- // deactivate reception until we scan pdcch
- if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0])
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
- if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1])
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1]->active = 0;
-
- if (ue->dlsch_SI[eNB_id])
- ue->dlsch_SI[eNB_id]->active = 0;
- if (ue->dlsch_p[eNB_id])
- ue->dlsch_p[eNB_id]->active = 0;
- if (ue->dlsch_ra[eNB_id])
- ue->dlsch_ra[eNB_id]->active = 0;
+ // deactivate reception until we scan pdcch
+ if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0])
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
+ if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1])
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1]->active = 0;
+
+ if (ue->dlsch_SI[eNB_id])
+ ue->dlsch_SI[eNB_id]->active = 0;
+ if (ue->dlsch_p[eNB_id])
+ ue->dlsch_p[eNB_id]->active = 0;
+ if (ue->dlsch_ra[eNB_id])
+ ue->dlsch_ra[eNB_id]->active = 0;
}
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[%s %d] Frame %d nr_tti_rx %d: Doing phy_procedures_UE_RX\n",
- (r_type == multicast_relay) ? "RN/UE" : "UE",
- ue->Mod_id,frame_rx, nr_tti_rx);
+ (r_type == multicast_relay) ? "RN/UE" : "UE",
+ ue->Mod_id,frame_rx, nr_tti_rx);
#endif
@@ -5023,22 +5026,22 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
pilot1 = 3;
}
-
+ /*
if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) == SF_S) { // S-subframe, do first 5 symbols only
l2 = 5;
- } else if (pmch_flag == 1) { // do first 2 symbols only
- l2 = 1;
- } else { // normal nr_tti_rx, last symbol to be processed is the first of the second slot
+ } else */
+ { // normal nr_tti_rx, last symbol to be processed is the first of the second slot
l2 = (ue->frame_parms.symbols_per_tti/2)-1;
}
- int prev_nr_tti_rx = (nr_tti_rx - 1)<0? 9: (nr_tti_rx - 1);
+ int prev_nr_tti_rx = (nr_tti_rx - 1)<0? 9: (nr_tti_rx - 1);/*
if (nr_subframe_select(&ue->frame_parms,prev_nr_tti_rx) != SF_DL) {
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// RX processing of symbols l=0...l2
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
l=0;
- } else {
+ } else */
+ {
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// RX processing of symbols l=1...l2 (l=0 is done in last scheduling epoch)
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
@@ -5051,31 +5054,32 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#ifdef NR_PDCCH_SCHED
//nr_gold_pdcch(ue,0, 2);
- if (nr_tti_rx==1){
- for (uint16_t l=0; l<nb_symb_pdcch; l++) {
- if (abstraction_flag == 0) {
+
+ if (nr_tti_rx==1){
+ for (uint16_t l=0; l<nb_symb_pdcch; l++) {
+
#if UE_TIMING_TRACE
- start_meas(&ue->ofdm_demod_stats);
+ start_meas(&ue->ofdm_demod_stats);
#endif
-
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
- nr_slot_fep(ue,
- l,
- nr_tti_rx<<1,
- 0,
- 0,
- 1,
- NR_PDCCH_EST);
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
+ nr_slot_fep(ue,
+ l,
+ nr_tti_rx,
+ 0,
+ 0,
+ 1,
+ NR_PDCCH_EST);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
- stop_meas(&ue->ofdm_demod_stats);
+ stop_meas(&ue->ofdm_demod_stats);
#endif
- //printf("phy procedure pdcch start measurement l =%d\n",l);
- nr_ue_measurement_procedures(l,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
- }
- }
+
+ //printf("phy procedure pdcch start measurement l =%d\n",l);
+ nr_ue_measurement_procedures(l,ue,proc,eNB_id,(nr_tti_rx<<1),mode);
+
+ }
- if (nr_ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
+ if (nr_ue_pdcch_procedures(eNB_id,ue,proc) == -1) {
LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,nr_tti_rx);
return(-1);
}
@@ -5098,7 +5102,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
NR_PDSCH_EST);
//printf("phy procedure pdsch start measurement\n");
- nr_ue_measurement_procedures(m,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
+ nr_ue_measurement_procedures(m,ue,proc,eNB_id,(nr_tti_rx<<1),mode);
}
//set active for testing, to be removed
@@ -5114,14 +5118,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- PDSCH,
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
- NULL,
- nb_symb_pdcch, //ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- (nb_symb_sch+nb_symb_pdcch-1), //ue->frame_parms.symbols_per_tti>>1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ PDSCH,
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
+ NULL,
+ nb_symb_pdcch, //ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ (nb_symb_sch+nb_symb_pdcch-1)); //ue->frame_parms.symbols_per_tti>>1,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
}
@@ -5131,14 +5134,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- SI_PDSCH,
- ue->dlsch_SI[eNB_id],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- ue->frame_parms.symbols_per_tti>>1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ SI_PDSCH,
+ ue->dlsch_SI[eNB_id],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ ue->frame_parms.symbols_per_tti>>1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
}
@@ -5146,14 +5148,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- P_PDSCH,
- ue->dlsch_p[eNB_id],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- ue->frame_parms.symbols_per_tti>>1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ P_PDSCH,
+ ue->dlsch_p[eNB_id],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ ue->frame_parms.symbols_per_tti>>1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
}
@@ -5161,23 +5162,22 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- RA_PDSCH,
- ue->dlsch_ra[eNB_id],
- NULL,
- ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
- ue->frame_parms.symbols_per_tti>>1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ RA_PDSCH,
+ ue->dlsch_ra[eNB_id],
+ NULL,
+ ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
+ ue->frame_parms.symbols_per_tti>>1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
}
//#if 0
LOG_D(PHY," ------ slot 1 Processing: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
LOG_D(PHY," ------ --> FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
- if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) != SF_S) { // do front-end processing for second slot, and first symbol of next nr_tti_rx
+ /*if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) != SF_S)*/
+ { // do front-end processing for second slot, and first symbol of next nr_tti_rx
for (l=1; l<ue->frame_parms.symbols_per_tti>>1; l++) {
- if (abstraction_flag == 0) {
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
@@ -5190,18 +5190,19 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
0,
NR_PDSCH_EST);*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
+
#if UE_TIMING_TRACE
- stop_meas(&ue->ofdm_demod_stats);
+ stop_meas(&ue->ofdm_demod_stats);
#endif
- }
+
- //ue_measurement_procedures(l-1,ue,proc,eNB_id,1+(nr_tti_rx<<1),abstraction_flag,mode);
+ //ue_measurement_procedures(l-1,ue,proc,eNB_id,1+(nr_tti_rx<<1),abstraction_flag,mode);
- } // for l=1..l2
+ } // for l=1..l2
// do first symbol of next downlink nr_tti_rx for channel estimation
- int next_nr_tti_rx = (1+nr_tti_rx)%10;
- if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)
+ int next_nr_tti_rx = (1+nr_tti_rx)%10;
+ /* if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)*/
{
/*nr_slot_fep(ue,
0,
@@ -5209,7 +5210,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
0,
0,
0,
- NR_PDSCH_EST);*/
+ NR_PDSCH_EST);*/
}
} // not an S-subframe
#if UE_TIMING_TRACE
@@ -5219,36 +5220,37 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#else
LOG_D(PHY, "[SFN %d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",nr_tti_rx,ue->generic_stat.p_time/(cpuf*1000.0));
#endif
-
+
#endif
//LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
- {
- for (int i=0; i<3; i++)
- nr_slot_fep(ue,
- (5+i), //mu=1 case B
- nr_tti_rx,
- 0,
- 0,
- 1,
- NR_PBCH_EST);
-
- nr_ue_pbch_procedures(eNB_id,ue,proc,abstraction_flag);
- }
-
+ {
+ for (int i=0; i<3; i++)
+ nr_slot_fep(ue,
+ (5+i), //mu=1 case B
+ nr_tti_rx,
+ 0,
+ 0,
+ 1,
+ NR_PBCH_EST);
+
+ nr_ue_pbch_procedures(eNB_id,ue,proc,0);
+ }
+
// do procedures for C-RNTI
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
-
+
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
+
start_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
/*nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
+ proc,
+ eNB_id,
PDSCH,
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
NULL,
@@ -5265,34 +5267,36 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
//#endif //slot 1
nr_ue_dlsch_procedures(ue,
- proc,
- eNB_id,
- PDSCH,
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
- ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1],
- &ue->dlsch_errors[eNB_id],
- mode,
- abstraction_flag);
+ proc,
+ eNB_id,
+ PDSCH,
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
+ ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1],
+ &ue->dlsch_errors[eNB_id],
+ mode);
+
+
#if UE_TIMING_TRACE
- stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
+ stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
- printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ printf("[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
- LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[SFN %d] Slot1: Pdsch Proc %5.2f\n",nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+ LOG_D(PHY, "[SFN %d] Slot0 Slot1: Dlsch Proc %5.2f\n",nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
+ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
- }
+ }
#if UE_TIMING_TRACE
- start_meas(&ue->generic_stat);
+start_meas(&ue->generic_stat);
#endif
#if 0
+
if(nr_tti_rx==5 && ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid]->nb_rb > 20){
//write_output("decoder_llr.m","decllr",dlsch_llr,G,1,0);
//write_output("llr.m","llr", &ue->pdsch_vars[eNB_id]->llr[0][0],(14*nb_rb*12*dlsch1_harq->Qm) - 4*(nb_rb*4*dlsch1_harq->Qm),1,0);
@@ -5315,14 +5319,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- SI_PDSCH,
- ue->dlsch_SI[eNB_id],
- NULL,
- 1+(ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ SI_PDSCH,
+ ue->dlsch_SI[eNB_id],
+ NULL,
+ 1+(ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1);
/*ue_dlsch_procedures(ue,
proc,
@@ -5339,14 +5342,14 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
// do procedures for P-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- P_PDSCH,
- ue->dlsch_p[eNB_id],
- NULL,
- 1+(ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ P_PDSCH,
+ ue->dlsch_p[eNB_id],
+ NULL,
+ 1+(ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1);
+
/*ue_dlsch_procedures(ue,
proc,
@@ -5362,14 +5365,14 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
nr_ue_pdsch_procedures(ue,
- proc,
- eNB_id,
- RA_PDSCH,
- ue->dlsch_ra[eNB_id],
- NULL,
- 1+(ue->frame_parms.symbols_per_tti>>1),
- ue->frame_parms.symbols_per_tti-1,
- abstraction_flag);
+ proc,
+ eNB_id,
+ RA_PDSCH,
+ ue->dlsch_ra[eNB_id],
+ NULL,
+ 1+(ue->frame_parms.symbols_per_tti>>1),
+ ue->frame_parms.symbols_per_tti-1);
+
/*ue_dlsch_procedures(ue,
proc,
eNB_id,
@@ -5392,63 +5395,63 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
/*nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[next2_thread_id][eNB_id][0]->harq_ack[nr_tti_rx];
- */
+*/
- copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
- //copy_ack_struct(harq_ack_dest, current_harq_ack);
+copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
+//copy_ack_struct(harq_ack_dest, current_harq_ack);
- copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
- //copy_ack_struct(harq_ack_dest1, current_harq_ack);
+copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
+//copy_ack_struct(harq_ack_dest1, current_harq_ack);
- if (nr_tti_rx==9) {
- if (frame_rx % 10 == 0) {
- if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
- ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
+if (nr_tti_rx==9) {
+ if (frame_rx % 10 == 0) {
+ if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
+ ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
- ue->dlsch_errors_last[eNB_id] = ue->dlsch_errors[eNB_id];
- ue->dlsch_received_last[eNB_id] = ue->dlsch_received[eNB_id];
- }
+ ue->dlsch_errors_last[eNB_id] = ue->dlsch_errors[eNB_id];
+ ue->dlsch_received_last[eNB_id] = ue->dlsch_received[eNB_id];
+ }
- ue->bitrate[eNB_id] = (ue->total_TBS[eNB_id] - ue->total_TBS_last[eNB_id])*100;
- ue->total_TBS_last[eNB_id] = ue->total_TBS[eNB_id];
- LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
- ue->Mod_id,frame_rx,ue->total_TBS[eNB_id],
- ue->total_TBS_last[eNB_id],(float) ue->bitrate[eNB_id]/1000.0);
-
- #if UE_AUTOTEST_TRACE
- if ((frame_rx % 100 == 0)) {
- LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[eNB_id]/1000.0, frame_rx);
- }
- #endif
+ ue->bitrate[eNB_id] = (ue->total_TBS[eNB_id] - ue->total_TBS_last[eNB_id])*100;
+ ue->total_TBS_last[eNB_id] = ue->total_TBS[eNB_id];
+ LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
+ ue->Mod_id,frame_rx,ue->total_TBS[eNB_id],
+ ue->total_TBS_last[eNB_id],(float) ue->bitrate[eNB_id]/1000.0);
+#if UE_AUTOTEST_TRACE
+ if ((frame_rx % 100 == 0)) {
+ LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[eNB_id]/1000.0, frame_rx);
}
+#endif
+
+ }
#if UE_TIMING_TRACE
- stop_meas(&ue->generic_stat);
- printf("after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0));
+stop_meas(&ue->generic_stat);
+printf("after tubo until end of Rx %5.2f \n",ue->generic_stat.p_time/(cpuf*1000.0));
#endif
#ifdef EMOS
- phy_procedures_emos_UE_RX(ue,slot,eNB_id);
+phy_procedures_emos_UE_RX(ue,slot,eNB_id);
#endif
- VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
+VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
- stop_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
+stop_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
- printf("------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+printf("------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
- LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
+LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
//#endif //pdsch
- LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
- return (0);
+LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
+return (0);
}
@@ -5498,10 +5501,10 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
int frame_tx = proc->frame_tx;
int nr_tti_rx = proc->nr_tti_rx;
int nr_tti_tx = proc->nr_tti_tx;
-//#ifdef UE_NR_PHY_DEMO
-// int nr_tti_rx = proc->nr_tti_rx;
-// int nr_tti_tx = proc->nr_tti_tx;
-//#endif
+ //#ifdef UE_NR_PHY_DEMO
+ // int nr_tti_rx = proc->nr_tti_rx;
+ // int nr_tti_tx = proc->nr_tti_tx;
+ //#endif
#undef DEBUG_PHY_PROC
@@ -5530,14 +5533,14 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
switch (ITTI_MSG_ID(msg_p)) {
case PHY_FIND_CELL_REQ:
- LOG_I(PHY, "[UE %d] Received %s\n", Mod_id, msg_name);
+ LOG_I(PHY, "[UE %d] Received %s\n", Mod_id, msg_name);
- /* TODO process the message */
- break;
+ /* TODO process the message */
+ break;
default:
- LOG_E(PHY, "[UE %d] Received unexpected message %s\n", Mod_id, msg_name);
- break;
+ LOG_E(PHY, "[UE %d] Received unexpected message %s\n", Mod_id, msg_name);
+ break;
}
result = itti_free (ITTI_MSG_ORIGIN_ID(msg_p), msg_p);
@@ -5550,12 +5553,12 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
for (slot=0;slot<2;slot++) {
if ((nr_subframe_select(&ue->frame_parms,nr_tti_tx)==SF_UL)||
- (ue->frame_parms.frame_type == FDD)) {
+ (ue->frame_parms.frame_type == FDD)) {
phy_procedures_UE_TX(ue,proc,eNB_id,abstraction_flag,mode,r_type);
}
if ((nr_subframe_select(&ue->frame_parms,nr_tti_rx)==SF_DL) ||
- (ue->frame_parms.frame_type == FDD)) {
+ (ue->frame_parms.frame_type == FDD)) {
#if defined(Rel10) || defined(Rel14)
if (phy_procedures_RN_UE_RX(nr_tti_rx, nr_tti_tx, r_type) != 0 )
@@ -5564,12 +5567,12 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
}
if ((nr_subframe_select(&ue->frame_parms,nr_tti_tx)==SF_S) &&
- (slot==1)) {
+ (slot==1)) {
phy_procedures_UE_S_TX(ue,eNB_id,abstraction_flag,r_type);
}
if ((nr_subframe_select(&ue->frame_parms,nr_tti_rx)==SF_S) &&
- (slot==0)) {
+ (slot==0)) {
#if defined(Rel10) || defined(Rel14)
if (phy_procedures_RN_UE_RX(nr_tti_rx, nr_tti_tx, r_type) != 0 )
@@ -5579,44 +5582,44 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
if (ue->mac_enabled==1) {
if (slot==0) {
-//#ifdef UE_NR_PHY_DEMO
+ //#ifdef UE_NR_PHY_DEMO
ret = mac_xface->ue_scheduler(ue->Mod_id,
- frame_rx,
- proc->subframe_rx,
- nr_tti_rx%(ue->frame_parms.ttis_per_subframe),
- frame_tx,
- proc->subframe_tx,
- nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
- nr_subframe_select(&ue->frame_parms,nr_tti_tx),
- eNB_id,
- 0/*FIXME CC_id*/);
-//#else
-/* ret = mac_xface->ue_scheduler(ue->Mod_id,
- frame_rx,
- nr_tti_rx,
- frame_tx,
- nr_tti_tx,
- nr_subframe_select(&ue->frame_parms,nr_tti_tx),
- eNB_id,*/
-// 0/*FIXME CC_id*/);
-//#endif
-
- if (ret == CONNECTION_LOST) {
- LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d RRC Connection lost, returning to PRACH\n",ue->Mod_id,
- frame_rx,nr_tti_tx);
- ue->UE_mode[eNB_id] = PRACH;
- // mac_xface->macphy_exit("Connection lost");
- } else if (ret == PHY_RESYNCH) {
- LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d RRC Connection lost, trying to resynch\n",
- ue->Mod_id,
- frame_rx,nr_tti_tx);
- ue->UE_mode[eNB_id] = RESYNCH;
- // mac_xface->macphy_exit("Connection lost");
- } else if (ret == PHY_HO_PRACH) {
- LOG_I(PHY,"[UE %d] Frame %d, nr_tti_rx %d, return to PRACH and perform a contention-free access\n",
- ue->Mod_id,frame_rx,nr_tti_tx);
- ue->UE_mode[eNB_id] = PRACH;
- }
+ frame_rx,
+ proc->subframe_rx,
+ nr_tti_rx%(ue->frame_parms.ttis_per_subframe),
+ frame_tx,
+ proc->subframe_tx,
+ nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
+ nr_subframe_select(&ue->frame_parms,nr_tti_tx),
+ eNB_id,
+ 0/*FIXME CC_id*/);
+ //#else
+ /* ret = mac_xface->ue_scheduler(ue->Mod_id,
+ frame_rx,
+ nr_tti_rx,
+ frame_tx,
+ nr_tti_tx,
+ nr_subframe_select(&ue->frame_parms,nr_tti_tx),
+ eNB_id,*/
+ // 0/*FIXME CC_id*/);
+ //#endif
+
+ if (ret == CONNECTION_LOST) {
+ LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d RRC Connection lost, returning to PRACH\n",ue->Mod_id,
+ frame_rx,nr_tti_tx);
+ ue->UE_mode[eNB_id] = PRACH;
+ // mac_xface->macphy_exit("Connection lost");
+ } else if (ret == PHY_RESYNCH) {
+ LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d RRC Connection lost, trying to resynch\n",
+ ue->Mod_id,
+ frame_rx,nr_tti_tx);
+ ue->UE_mode[eNB_id] = RESYNCH;
+ // mac_xface->macphy_exit("Connection lost");
+ } else if (ret == PHY_HO_PRACH) {
+ LOG_I(PHY,"[UE %d] Frame %d, nr_tti_rx %d, return to PRACH and perform a contention-free access\n",
+ ue->Mod_id,frame_rx,nr_tti_tx);
+ ue->UE_mode[eNB_id] = PRACH;
+ }
}
}
diff --git a/openair1/SIMULATION/LTE_PHY/dlsim.c b/openair1/SIMULATION/LTE_PHY/dlsim.c
index 63e6de22901c4c9a664e1d50cc4326e3ee5db90c..3807c51b96a5069014967d38ad7f276c92597a4a 100644
--- a/openair1/SIMULATION/LTE_PHY/dlsim.c
+++ b/openair1/SIMULATION/LTE_PHY/dlsim.c
@@ -1650,7 +1650,7 @@ int main(int argc, char **argv)
start_meas(&eNB->ofdm_mod_stats);
- ru->proc.subframe_tx=subframe;
+ ru->proc.tti_tx=subframe;
memcpy((void*)ru->frame_parms,(void*)&eNB->frame_parms,sizeof(LTE_DL_FRAME_PARMS));
feptx_prec(ru);
feptx_ofdm(ru);
@@ -1670,7 +1670,7 @@ int main(int argc, char **argv)
phy_procedures_eNB_TX(eNB,proc_eNB,0);
- ru->proc.subframe_tx=(subframe+1)%10;
+ ru->proc.tti_tx=(subframe+1)%10;
feptx_prec(ru);
feptx_ofdm(ru);
diff --git a/openair1/SIMULATION/LTE_PHY/ulsim.c b/openair1/SIMULATION/LTE_PHY/ulsim.c
index 6bdec77b764c50d02c1c9178fefcc1a5c0f2d367..8d963b91867ae6f235ac473f3937acc5066c5555 100644
--- a/openair1/SIMULATION/LTE_PHY/ulsim.c
+++ b/openair1/SIMULATION/LTE_PHY/ulsim.c
@@ -1158,7 +1158,7 @@ int main(int argc, char **argv) {
eNB->proc.frame_rx = 1;
eNB->proc.subframe_rx = subframe;
ru->proc.frame_rx = 1;
- ru->proc.subframe_rx = subframe;
+ ru->proc.tti_rx = subframe;
proc_rxtx_ue->frame_tx = proc_rxtx->frame_rx;
proc_rxtx_ue->frame_rx = proc_rxtx->frame_tx;
proc_rxtx_ue->subframe_tx = proc_rxtx->subframe_rx;
diff --git a/openair1/SIMULATION/NR_PHY/dlschsim.c b/openair1/SIMULATION/NR_PHY/dlschsim.c
index 565776d584bddd290016a1744ad6fa97e0ed524b..1c2b2305d6934606d0433f08588d35ebec381fcf 100644
--- a/openair1/SIMULATION/NR_PHY/dlschsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlschsim.c
@@ -36,14 +36,14 @@
#include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/defs_gNB.h"
+#include "PHY/INIT/phy_init.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/NR_REFSIG/nr_mod_table.h"
#include "PHY/MODULATION/modulation_eNB.h"
#include "PHY/MODULATION/modulation_UE.h"
-#include "PHY/INIT/phy_init.h"
#include "PHY/NR_TRANSPORT/nr_transport.h"
-#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
+#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "SCHED_NR/sched_nr.h"
@@ -52,626 +52,617 @@
//#include "UTIL/LISTS/list.h"
//#include "common/ran_context.h"
+//#define DEBUG_DLSCHSIM
+
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
-
double cpuf;
// dummy functions
-int nfapi_mode=0;
+int nfapi_mode = 0;
int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req) {
- return(0);
+ return (0);
}
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req) {
- return(0);
+ return (0);
}
int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req) {
- return(0);
+ return (0);
}
int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) {
- return(0);
+ return (0);
}
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {
- return(0);
+ return (0);
}
-uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn) {
- return(0);
+uint32_t from_nrarfcn(int nr_bandP, uint32_t dl_earfcn) {
+ return (0);
}
int32_t get_uldl_offset(int eutra_bandP) {
- return(0);
+ return (0);
}
-NR_IF_Module_t *NR_IF_Module_init(int Mod_id) {
- return(NULL);
+NR_IF_Module_t *
+NR_IF_Module_init(int Mod_id) {
+ return (NULL);
}
-void exit_function(const char *file, const char *function, const int line,const char *s) {
- const char *msg= s==NULL ? "no comment": s;
- printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg);
- exit(-1);
+void exit_function(const char *file, const char *function, const int line,
+ const char *s) {
+ const char *msg = s == NULL ? "no comment" : s;
+ printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg);
+ exit(-1);
}
// needed for some functions
-PHY_VARS_NR_UE *PHY_vars_UE_g[1][1]= {{NULL}};
-uint16_t n_rnti=0x1234;
+PHY_VARS_NR_UE *PHY_vars_UE_g[1][1] = { { NULL } };
+uint16_t n_rnti = 0x1234;
-char quantize(double D,double x,unsigned char B) {
- double qxd;
- short maxlev;
- qxd = floor(x/D);
- maxlev = 1<<(B-1);//(char)(pow(2,B-1));
+char quantize(double D, double x, unsigned char B) {
+ double qxd;
+ short maxlev;
+ qxd = floor(x / D);
+ maxlev = 1 << (B - 1); //(char)(pow(2,B-1));
- //printf("x=%f,qxd=%f,maxlev=%d\n",x,qxd, maxlev);
+ //printf("x=%f,qxd=%f,maxlev=%d\n",x,qxd, maxlev);
- if (qxd <= -maxlev)
- qxd = -maxlev;
- else if (qxd >= maxlev)
- qxd = maxlev-1;
+ if (qxd <= -maxlev)
+ qxd = -maxlev;
+ else if (qxd >= maxlev)
+ qxd = maxlev - 1;
- return((char)qxd);
+ return ((char) qxd);
}
int main(int argc, char **argv) {
- char c;
- int i; //,j,l,aa;
- double SNR,SNR_lin,snr0=-2.0,snr1=2.0;
- double snr_step = 0.1;
- uint8_t snr1set=0;
- int **txdata;
- double **s_re,**s_im,**r_re,**r_im;
- // int sync_pos, sync_pos_slot;
- // FILE *rx_frame_file;
- FILE *output_fd = NULL;
- uint8_t write_output_file=0;
- // int subframe_offset;
- // char fname[40], vname[40];
- int trial,n_trials=1,n_errors=0,n_false_positive=0;
- uint8_t transmission_mode = 1,n_tx=1,n_rx=1;
- uint16_t Nid_cell=0;
- channel_desc_t *gNB2UE;
- uint8_t extended_prefix_flag=0;
- int8_t interf1=-21,interf2=-21;
- FILE *input_fd=NULL,*pbch_file_fd=NULL;
- char input_val_str[50],input_val_str2[50];
- //uint16_t NB_RB=25;
- SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
- uint8_t N_RB_DL=106,mu=1;
- unsigned char frame_type = 0;
- unsigned char pbch_phase = 0;
- int frame=0,subframe=0;
- int frame_length_complex_samples;
- //int frame_length_complex_samples_no_prefix;
- NR_DL_FRAME_PARMS *frame_parms;
- //nfapi_nr_config_request_t *gNB_config;
- uint8_t Kmimo;
- uint32_t Nsoft;
- double sigma;
- unsigned char qbits=8;
- int ret;
- int run_initial_sync=0;
- int loglvl=OAILOG_WARNING;
- float target_error_rate = 0.01;
-
- uint16_t nb_symb_sch =12;
- uint16_t nb_rb = 50;
- uint8_t Imcs=9;
-
- cpuf = get_cpu_freq_GHz();
-
- if ( load_configmodule(argc,argv) == 0) {
- exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
- }
-
- //logInit();
- randominit(0);
-
- while ((c = getopt (argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:N:F:R:P:")) != -1) {
- switch (c) {
- case 'f':
- write_output_file=1;
- output_fd = fopen(optarg,"w");
-
- if (output_fd==NULL) {
- printf("Error opening %s\n",optarg);
- exit(-1);
- }
-
- break;
-
- case 'd':
- frame_type = 1;
- break;
-
- case 'g':
- switch((char)*optarg) {
- case 'A':
- channel_model=SCM_A;
- break;
-
- case 'B':
- channel_model=SCM_B;
- break;
-
- case 'C':
- channel_model=SCM_C;
- break;
-
- case 'D':
- channel_model=SCM_D;
- break;
-
- case 'E':
- channel_model=EPA;
- break;
-
- case 'F':
- channel_model=EVA;
- break;
-
- case 'G':
- channel_model=ETU;
- break;
-
- default:
- msg("Unsupported channel model!\n");
- exit(-1);
- }
-
- break;
-
- case 'i':
- interf1=atoi(optarg);
- break;
-
- case 'j':
- interf2=atoi(optarg);
- break;
-
- case 'n':
- n_trials = atoi(optarg);
- break;
-
- case 's':
- snr0 = atof(optarg);
- msg("Setting SNR0 to %f\n",snr0);
- break;
-
- case 'S':
- snr1 = atof(optarg);
- snr1set=1;
- msg("Setting SNR1 to %f\n",snr1);
- break;
-
- case 'p':
- extended_prefix_flag=1;
- break;
-
- /*
- case 'r':
- ricean_factor = pow(10,-.1*atof(optarg));
- if (ricean_factor>1) {
- printf("Ricean factor must be between 0 and 1\n");
- exit(-1);
- }
- break;
- */
-
- case 'y':
- n_tx=atoi(optarg);
-
- if ((n_tx==0) || (n_tx>2)) {
- msg("Unsupported number of tx antennas %d\n",n_tx);
- exit(-1);
- }
-
- break;
-
- case 'z':
- n_rx=atoi(optarg);
-
- if ((n_rx==0) || (n_rx>2)) {
- msg("Unsupported number of rx antennas %d\n",n_rx);
- exit(-1);
- }
-
- break;
-
- case 'N':
- Nid_cell = atoi(optarg);
- break;
-
- case 'R':
- N_RB_DL = atoi(optarg);
- break;
-
- case 'F':
- input_fd = fopen(optarg,"r");
-
- if (input_fd==NULL) {
- printf("Problem with filename %s\n",optarg);
- exit(-1);
- }
-
- break;
-
- case 'P':
- pbch_phase = atoi(optarg);
-
- if (pbch_phase>3)
- printf("Illegal PBCH phase (0-3) got %d\n",pbch_phase);
-
- break;
-
- case 'm':
- Imcs = atoi(optarg);
- break;
-
- case 'l':
- nb_symb_sch = atoi(optarg);
- break;
-
- case 'r':
- nb_rb = atoi(optarg);
- break;
-
- default:
- case 'h':
- printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
- argv[0]);
- printf("-h This message\n");
- printf("-p Use extended prefix mode\n");
- printf("-d Use TDD\n");
- printf("-n Number of frames to simulate\n");
- printf("-s Starting SNR, runs from SNR0 to SNR0 + 5 dB. If n_frames is 1 then just SNR is simulated\n");
- printf("-S Ending SNR, runs from SNR0 to SNR1\n");
- printf("-t Delay spread for multipath channel\n");
- printf("-g [A,B,C,D,E,F,G] Use 3GPP SCM (A,B,C,D) or 36-101 (E-EPA,F-EVA,G-ETU) models (ignores delay spread and Ricean factor)\n");
- printf("-x Transmission mode (1,2,6 for the moment)\n");
- printf("-y Number of TX antennas used in eNB\n");
- printf("-z Number of RX antennas used in UE\n");
- printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n");
- printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n");
- printf("-N Nid_cell\n");
- printf("-R N_RB_DL\n");
- printf("-O oversampling factor (1,2,4,8,16)\n");
- printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
- // printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
- printf("-f Output filename (.txt format) for Pe/SNR results\n");
- printf("-F Input filename (.txt format) for RX conformance testing\n");
- exit (-1);
- break;
- }
- }
-
- logInit();
- set_glog(loglvl);
- T_stdout = 1;
-
- if (snr1set==0)
- snr1 = snr0+10;
-
- gNB2UE = new_channel_desc_scm(n_tx,
- n_rx,
- channel_model,
- 61.44e6, //N_RB2sampling_rate(N_RB_DL),
- 40e6, //N_RB2channel_bandwidth(N_RB_DL),
- 0,
- 0,
- 0);
-
- if (gNB2UE==NULL) {
- msg("Problem generating channel model. Exiting.\n");
- exit(-1);
- }
-
- RC.gNB = (PHY_VARS_gNB ** *) malloc(sizeof(PHY_VARS_gNB **));
- RC.gNB[0] = (PHY_VARS_gNB **) malloc(sizeof(PHY_VARS_gNB *));
- RC.gNB[0][0] = malloc(sizeof(PHY_VARS_gNB));
- gNB = RC.gNB[0][0];
- //gNB_config = &gNB->gNB_config;
- frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
- frame_parms->nb_antennas_tx = n_tx;
- frame_parms->nb_antennas_rx = n_rx;
- frame_parms->N_RB_DL = N_RB_DL;
- crcTableInit();
- nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu);
- phy_init_nr_gNB(gNB,0,0);
- //init_eNB_afterRU();
- frame_length_complex_samples = frame_parms->samples_per_subframe;
- //frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
- s_re = malloc(2*sizeof(double *));
- s_im = malloc(2*sizeof(double *));
- r_re = malloc(2*sizeof(double *));
- r_im = malloc(2*sizeof(double *));
- txdata = malloc(2*sizeof(int *));
-
- for (i=0; i<2; i++) {
- s_re[i] = malloc(frame_length_complex_samples*sizeof(double));
- bzero(s_re[i],frame_length_complex_samples*sizeof(double));
- s_im[i] = malloc(frame_length_complex_samples*sizeof(double));
- bzero(s_im[i],frame_length_complex_samples*sizeof(double));
- r_re[i] = malloc(frame_length_complex_samples*sizeof(double));
- bzero(r_re[i],frame_length_complex_samples*sizeof(double));
- r_im[i] = malloc(frame_length_complex_samples*sizeof(double));
- bzero(r_im[i],frame_length_complex_samples*sizeof(double));
- txdata[i] = malloc(frame_length_complex_samples*sizeof(int));
- bzero(r_re[i],frame_length_complex_samples*sizeof(int));
- }
-
- if (pbch_file_fd!=NULL) {
- load_pbch_desc(pbch_file_fd);
- }
-
- /* for (int k=0; k<2; k++) {
- // Create transport channel structures for 2 transport blocks (MIMO)
- for (i=0; i<2; i++) {
- gNB->dlsch[k][i] = new_gNB_dlsch(Kmimo,8,Nsoft,0,frame_parms,gNB_config);
-
- if (!gNB->dlsch[k][i]) {
- printf("Can't get eNB dlsch structures\n");
- exit(-1);
- }
- gNB->dlsch[k][i]->Nsoft = 10;
- gNB->dlsch[k][i]->rnti = n_rnti+k;
- }
- }*/
- //configure UE
- UE = malloc(sizeof(PHY_VARS_NR_UE));
- memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
-
- //phy_init_nr_top(frame_parms);
- if (init_nr_ue_signal(UE, 1, 0) != 0) {
- printf("Error at UE NR initialisation\n");
- exit(-1);
- }
-
- //nr_init_frame_parms_ue(&UE->frame_parms);
- //init_nr_ue_transport(UE, 0);
- for (int sf = 0; sf < 2; sf++) {
- for (i=0; i<2; i++) {
- UE->dlsch[sf][0][i] = new_nr_ue_dlsch(Kmimo,8,Nsoft,5,N_RB_DL,0);
-
- if (!UE->dlsch[sf][0][i]) {
- printf("Can't get ue dlsch structures\n");
- exit(-1);
- }
-
- UE->dlsch[sf][0][i]->rnti = n_rnti;
- }
- }
-
- UE->dlsch_SI[0] = new_nr_ue_dlsch(1,1,Nsoft,5,N_RB_DL,0);
- UE->dlsch_ra[0] = new_nr_ue_dlsch(1,1,Nsoft,5,N_RB_DL,0);
- unsigned char harq_pid = 0; //dlsch->harq_ids[subframe];
- NR_gNB_DLSCH_t *dlsch = gNB->dlsch[0][0];
- nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
- time_stats_t *rm_stats;
- time_stats_t *te_stats;
- time_stats_t *i_stats;
- uint8_t is_crnti;
- uint8_t llr8_flag;
- unsigned int TBS = 8424;
- unsigned int available_bits;
- uint8_t nb_re_dmrs = 6;
- uint16_t length_dmrs = 1;
- unsigned char mod_order;
- uint8_t Nl=1;
- uint8_t rvidx = 0;
- dlsch->rnti =1;
- /*dlsch->harq_processes[0]->mcs = Imcs;
- dlsch->harq_processes[0]->rvidx = rvidx;*/
- //printf("dlschsim harqid %d nb_rb %d, mscs %d\n",dlsch->harq_ids[subframe],
- // dlsch->harq_processes[0]->nb_rb,dlsch->harq_processes[0]->mcs,dlsch->harq_processes[0]->Nl);
- mod_order = nr_get_Qm(Imcs,1);
- available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs,mod_order,1);
- TBS= nr_compute_tbs(Imcs,nb_rb,nb_symb_sch,nb_re_dmrs,length_dmrs,Nl);
- printf("available bits %d TBS %d mod_order %d\n",available_bits, TBS, mod_order);
- //dlsch->harq_ids[subframe]= 0;
- rel15->n_prb = nb_rb;
- rel15->nb_symbols = nb_symb_sch;
- rel15->modulation_order = mod_order;
- rel15->nb_layers = Nl;
- rel15->nb_re_dmrs = nb_re_dmrs;
- rel15->transport_block_size = TBS;
- double *modulated_input = malloc16(sizeof(double) * 16*68*384);
- short *channel_output_fixed = malloc16(sizeof( short) *16* 68*384);
- short *channel_output_uncoded = malloc16(sizeof(unsigned short) *16* 68*384);
- double errors_bit_uncoded=0;
- unsigned char *estimated_output;
- unsigned char *estimated_output_bit;
- unsigned char *test_input_bit;
- unsigned int errors_bit =0;
- test_input_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16*68*384);
- estimated_output = (unsigned char *) malloc16(sizeof(unsigned char) * 16*68*384);
- estimated_output_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16*68*384);
- NR_UE_DLSCH_t *dlsch0_ue = UE->dlsch[UE->current_thread_id[subframe]][0][0];
- NR_DL_UE_HARQ_t *harq_process = dlsch0_ue->harq_processes[harq_pid];
- harq_process->mcs = Imcs;
- harq_process->Nl = Nl;
- harq_process->nb_rb = nb_rb;
- harq_process->Qm = mod_order;
- harq_process->rvidx = rvidx;
- printf("harq process ue mcs = %d Qm = %d, symb %d\n", harq_process->mcs, harq_process->Qm,nb_symb_sch);
- unsigned char *test_input;
- test_input=(unsigned char *)malloc16(sizeof(unsigned char) * TBS/8);
-
- for (i=0; i<TBS/8; i++)
- test_input[i]=(unsigned char) rand();
-
- estimated_output = harq_process->b;
-
- /*for (int i=0; i<TBS/8; i++)
- printf("test input[%d]=%d \n",i,test_input[i]);*/
-
- //printf("crc32: [0]->0x%08x\n",crc24c(test_input, 32));
-
- // generate signal
- if (input_fd==NULL) {
- nr_dlsch_encoding(test_input,
- subframe,
- dlsch,
- frame_parms);
- }
-
- for (SNR=snr0; SNR<snr1; SNR+=snr_step) {
- n_errors = 0;
- n_false_positive = 0;
-
- for (trial=0; trial < n_trials; trial++) {
- errors_bit_uncoded = 0;
- for (i = 0; i < available_bits; i++) {
-#ifdef DEBUG_CODER
+ char c;
+ int i; //,j,l,aa;
+ double SNR, SNR_lin, snr0 = -2.0, snr1 = 2.0;
+ double snr_step = 0.1;
+ uint8_t snr1set = 0;
+ int **txdata;
+ double **s_re, **s_im, **r_re, **r_im;
+ // int sync_pos, sync_pos_slot;
+ // FILE *rx_frame_file;
+ FILE *output_fd = NULL;
+ uint8_t write_output_file = 0;
+ // int subframe_offset;
+ // char fname[40], vname[40];
+ int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
+ uint8_t transmission_mode = 1, n_tx = 1, n_rx = 1;
+ uint16_t Nid_cell = 0;
+ channel_desc_t *gNB2UE;
+ uint8_t extended_prefix_flag = 0;
+ int8_t interf1 = -21, interf2 = -21;
+ FILE *input_fd = NULL, *pbch_file_fd = NULL;
+ //char input_val_str[50],input_val_str2[50];
+ //uint16_t NB_RB=25;
+ SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
+ uint8_t N_RB_DL = 106, mu = 1;
+ unsigned char frame_type = 0;
+ unsigned char pbch_phase = 0;
+ int frame = 0, subframe = 0;
+ int frame_length_complex_samples;
+ //int frame_length_complex_samples_no_prefix;
+ NR_DL_FRAME_PARMS *frame_parms;
+ //nfapi_nr_config_request_t *gNB_config;
+ uint8_t Kmimo = 0;
+ uint32_t Nsoft = 0;
+ double sigma;
+ unsigned char qbits = 8;
+ int ret;
+ //int run_initial_sync=0;
+ int loglvl = OAILOG_WARNING;
+ float target_error_rate = 0.01;
+
+ uint16_t nb_symb_sch = 12;
+ uint16_t nb_rb = 50;
+ uint8_t Imcs = 9;
+
+ cpuf = get_cpu_freq_GHz();
+
+ if (load_configmodule(argc, argv) == 0) {
+ exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
+ }
+
+ //logInit();
+ randominit(0);
+
+ while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:N:F:R:P:")) != -1) {
+ switch (c) {
+ case 'f':
+ write_output_file = 1;
+ output_fd = fopen(optarg, "w");
+
+ if (output_fd == NULL) {
+ printf("Error opening %s\n", optarg);
+ exit(-1);
+ }
+
+ break;
+
+ case 'd':
+ frame_type = 1;
+ break;
+
+ case 'g':
+ switch ((char) *optarg) {
+ case 'A':
+ channel_model = SCM_A;
+ break;
+
+ case 'B':
+ channel_model = SCM_B;
+ break;
+
+ case 'C':
+ channel_model = SCM_C;
+ break;
+
+ case 'D':
+ channel_model = SCM_D;
+ break;
+
+ case 'E':
+ channel_model = EPA;
+ break;
+
+ case 'F':
+ channel_model = EVA;
+ break;
+
+ case 'G':
+ channel_model = ETU;
+ break;
+
+ default:
+ msg("Unsupported channel model!\n");
+ exit(-1);
+ }
+
+ break;
+
+ case 'i':
+ interf1 = atoi(optarg);
+ break;
+
+ case 'j':
+ interf2 = atoi(optarg);
+ break;
+
+ case 'n':
+ n_trials = atoi(optarg);
+ break;
+
+ case 's':
+ snr0 = atof(optarg);
+ msg("Setting SNR0 to %f\n", snr0);
+ break;
+
+ case 'S':
+ snr1 = atof(optarg);
+ snr1set = 1;
+ msg("Setting SNR1 to %f\n", snr1);
+ break;
+
+ case 'p':
+ extended_prefix_flag = 1;
+ break;
+
+ /*
+ case 'r':
+ ricean_factor = pow(10,-.1*atof(optarg));
+ if (ricean_factor>1) {
+ printf("Ricean factor must be between 0 and 1\n");
+ exit(-1);
+ }
+ break;
+ */
+
+ case 'y':
+ n_tx = atoi(optarg);
+
+ if ((n_tx == 0) || (n_tx > 2)) {
+ msg("Unsupported number of tx antennas %d\n", n_tx);
+ exit(-1);
+ }
+
+ break;
+
+ case 'z':
+ n_rx = atoi(optarg);
+
+ if ((n_rx == 0) || (n_rx > 2)) {
+ msg("Unsupported number of rx antennas %d\n", n_rx);
+ exit(-1);
+ }
+
+ break;
+
+ case 'N':
+ Nid_cell = atoi(optarg);
+ break;
+
+ case 'R':
+ N_RB_DL = atoi(optarg);
+ break;
+
+ case 'F':
+ input_fd = fopen(optarg, "r");
+
+ if (input_fd == NULL) {
+ printf("Problem with filename %s\n", optarg);
+ exit(-1);
+ }
+
+ break;
+
+ case 'P':
+ pbch_phase = atoi(optarg);
+
+ if (pbch_phase > 3)
+ printf("Illegal PBCH phase (0-3) got %d\n", pbch_phase);
+
+ break;
+
+ case 'm':
+ Imcs = atoi(optarg);
+ break;
+
+ case 'l':
+ nb_symb_sch = atoi(optarg);
+ break;
+
+ case 'r':
+ nb_rb = atoi(optarg);
+ break;
+
+ case 'x':
+ transmission_mode = atoi(optarg);
+ break;
+
+ default:
+ case 'h':
+ printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
+ printf("-h This message\n");
+ printf("-p Use extended prefix mode\n");
+ printf("-d Use TDD\n");
+ printf("-n Number of frames to simulate\n");
+ printf("-s Starting SNR, runs from SNR0 to SNR0 + 5 dB. If n_frames is 1 then just SNR is simulated\n");
+ printf("-S Ending SNR, runs from SNR0 to SNR1\n");
+ printf("-t Delay spread for multipath channel\n");
+ printf("-g [A,B,C,D,E,F,G] Use 3GPP SCM (A,B,C,D) or 36-101 (E-EPA,F-EVA,G-ETU) models (ignores delay spread and Ricean factor)\n");
+ printf("-x Transmission mode (1,2,6 for the moment)\n");
+ printf("-y Number of TX antennas used in eNB\n");
+ printf("-z Number of RX antennas used in UE\n");
+ printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n");
+ printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n");
+ printf("-N Nid_cell\n");
+ printf("-R N_RB_DL\n");
+ printf("-O oversampling factor (1,2,4,8,16)\n");
+ printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
+ // printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
+ printf("-f Output filename (.txt format) for Pe/SNR results\n");
+ printf("-F Input filename (.txt format) for RX conformance testing\n");
+ exit(-1);
+ break;
+ }
+ }
+
+ logInit();
+ set_glog(loglvl);
+ T_stdout = 1;
+
+ if (snr1set == 0)
+ snr1 = snr0 + 10;
+
+ gNB2UE = new_channel_desc_scm(n_tx, n_rx, channel_model, 61.44e6, //N_RB2sampling_rate(N_RB_DL),
+ 40e6, //N_RB2channel_bandwidth(N_RB_DL),
+ 0, 0, 0);
+
+ if (gNB2UE == NULL) {
+ msg("Problem generating channel model. Exiting.\n");
+ exit(-1);
+ }
+
+ RC.gNB = (PHY_VARS_gNB ** *) malloc(sizeof(PHY_VARS_gNB **));
+ RC.gNB[0] = (PHY_VARS_gNB **) malloc(sizeof(PHY_VARS_gNB *));
+ RC.gNB[0][0] = malloc(sizeof(PHY_VARS_gNB));
+ gNB = RC.gNB[0][0];
+ //gNB_config = &gNB->gNB_config;
+ frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
+ frame_parms->nb_antennas_tx = n_tx;
+ frame_parms->nb_antennas_rx = n_rx;
+ frame_parms->N_RB_DL = N_RB_DL;
+ crcTableInit();
+ nr_phy_config_request_sim(gNB, N_RB_DL, N_RB_DL, mu, Nid_cell);
+ phy_init_nr_gNB(gNB, 0, 0);
+ //init_eNB_afterRU();
+ frame_length_complex_samples = frame_parms->samples_per_subframe;
+ //frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
+ s_re = malloc(2 * sizeof(double *));
+ s_im = malloc(2 * sizeof(double *));
+ r_re = malloc(2 * sizeof(double *));
+ r_im = malloc(2 * sizeof(double *));
+ txdata = malloc(2 * sizeof(int *));
+
+ for (i = 0; i < 2; i++) {
+ s_re[i] = malloc(frame_length_complex_samples * sizeof(double));
+ bzero(s_re[i], frame_length_complex_samples * sizeof(double));
+ s_im[i] = malloc(frame_length_complex_samples * sizeof(double));
+ bzero(s_im[i], frame_length_complex_samples * sizeof(double));
+ r_re[i] = malloc(frame_length_complex_samples * sizeof(double));
+ bzero(r_re[i], frame_length_complex_samples * sizeof(double));
+ r_im[i] = malloc(frame_length_complex_samples * sizeof(double));
+ bzero(r_im[i], frame_length_complex_samples * sizeof(double));
+ txdata[i] = malloc(frame_length_complex_samples * sizeof(int));
+ bzero(r_re[i], frame_length_complex_samples * sizeof(int));
+ }
+
+ if (pbch_file_fd != NULL) {
+ load_pbch_desc(pbch_file_fd);
+ }
+
+ /* for (int k=0; k<2; k++) {
+ // Create transport channel structures for 2 transport blocks (MIMO)
+ for (i=0; i<2; i++) {
+ gNB->dlsch[k][i] = new_gNB_dlsch(Kmimo,8,Nsoft,0,frame_parms,gNB_config);
+
+ if (!gNB->dlsch[k][i]) {
+ printf("Can't get eNB dlsch structures\n");
+ exit(-1);
+ }
+ gNB->dlsch[k][i]->Nsoft = 10;
+ gNB->dlsch[k][i]->rnti = n_rnti+k;
+ }
+ }*/
+ //configure UE
+ UE = malloc(sizeof(PHY_VARS_NR_UE));
+ memcpy(&UE->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));
+
+ //phy_init_nr_top(frame_parms);
+ if (init_nr_ue_signal(UE, 1, 0) != 0) {
+ printf("Error at UE NR initialisation\n");
+ exit(-1);
+ }
+
+ //nr_init_frame_parms_ue(&UE->frame_parms);
+ //init_nr_ue_transport(UE, 0);
+ for (int sf = 0; sf < 2; sf++) {
+ for (i = 0; i < 2; i++) {
+ UE->dlsch[sf][0][i] = new_nr_ue_dlsch(Kmimo, 8, Nsoft, 5, N_RB_DL,
+ 0);
+
+ if (!UE->dlsch[sf][0][i]) {
+ printf("Can't get ue dlsch structures\n");
+ exit(-1);
+ }
+
+ UE->dlsch[sf][0][i]->rnti = n_rnti;
+ }
+ }
+
+ UE->dlsch_SI[0] = new_nr_ue_dlsch(1, 1, Nsoft, 5, N_RB_DL, 0);
+ UE->dlsch_ra[0] = new_nr_ue_dlsch(1, 1, Nsoft, 5, N_RB_DL, 0);
+ unsigned char harq_pid = 0; //dlsch->harq_ids[subframe];
+ NR_gNB_DLSCH_t *dlsch = gNB->dlsch[0][0];
+ nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->dlsch_pdu.dlsch_pdu_rel15;
+ //time_stats_t *rm_stats, *te_stats, *i_stats;
+ uint8_t is_crnti = 0, llr8_flag = 0;
+ unsigned int TBS = 8424;
+ unsigned int available_bits;
+ uint8_t nb_re_dmrs = 6;
+ uint16_t length_dmrs = 1;
+ unsigned char mod_order;
+ uint8_t Nl = 1;
+ uint8_t rvidx = 0;
+ dlsch->rnti = 1;
+ /*dlsch->harq_processes[0]->mcs = Imcs;
+ dlsch->harq_processes[0]->rvidx = rvidx;*/
+ //printf("dlschsim harqid %d nb_rb %d, mscs %d\n",dlsch->harq_ids[subframe],
+ // dlsch->harq_processes[0]->nb_rb,dlsch->harq_processes[0]->mcs,dlsch->harq_processes[0]->Nl);
+ mod_order = nr_get_Qm(Imcs, 1);
+ available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
+ TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, Nl);
+ printf("available bits %d TBS %d mod_order %d\n", available_bits, TBS, mod_order);
+ //dlsch->harq_ids[subframe]= 0;
+ rel15->n_prb = nb_rb;
+ rel15->nb_symbols = nb_symb_sch;
+ rel15->modulation_order = mod_order;
+ rel15->nb_layers = Nl;
+ rel15->nb_re_dmrs = nb_re_dmrs;
+ rel15->transport_block_size = TBS;
+ double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384);
+ short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384);
+ short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384);
+ double errors_bit_uncoded = 0;
+ unsigned char *estimated_output;
+ unsigned char *estimated_output_bit;
+ unsigned char *test_input_bit;
+ unsigned int errors_bit = 0;
+ test_input_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
+ estimated_output = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
+ estimated_output_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
+ NR_UE_DLSCH_t *dlsch0_ue = UE->dlsch[UE->current_thread_id[subframe]][0][0];
+ NR_DL_UE_HARQ_t *harq_process = dlsch0_ue->harq_processes[harq_pid];
+ harq_process->mcs = Imcs;
+ harq_process->Nl = Nl;
+ harq_process->nb_rb = nb_rb;
+ harq_process->Qm = mod_order;
+ harq_process->rvidx = rvidx;
+ printf("harq process ue mcs = %d Qm = %d, symb %d\n", harq_process->mcs, harq_process->Qm, nb_symb_sch);
+ unsigned char *test_input;
+ test_input = (unsigned char *) malloc16(sizeof(unsigned char) * TBS / 8);
+
+ for (i = 0; i < TBS / 8; i++)
+ test_input[i] = (unsigned char) rand();
+
+ estimated_output = harq_process->b;
+
+#ifdef DEBUG_DLSCHSIM
+ for (i = 0; i < TBS / 8; i++) printf("test_input[i]=%d \n",test_input[i]);
+#endif
+
+ /*for (int i=0; i<TBS/8; i++)
+ printf("test input[%d]=%d \n",i,test_input[i]);*/
+
+ //printf("crc32: [0]->0x%08x\n",crc24c(test_input, 32));
+ // generate signal
+ if (input_fd == NULL) {
+ nr_dlsch_encoding(test_input, subframe, dlsch, frame_parms);
+ }
- if ((i&0xf)==0)
- printf("\ne %d..%d: ",i,i+15);
+ for (SNR = snr0; SNR < snr1; SNR += snr_step) {
+ n_errors = 0;
+ n_false_positive = 0;
+ for (trial = 0; trial < n_trials; trial++) {
+ errors_bit_uncoded = 0;
+ for (i = 0; i < available_bits; i++) {
+#ifdef DEBUG_CODER
+ if ((i&0xf)==0)
+ printf("\ne %d..%d: ",i,i+15);
#endif
- //if (i<16)
- // printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]);
- if (dlsch->harq_processes[0]->f[i]==0)
- modulated_input[i]=1.0;///sqrt(2); //QPSK
- else
- modulated_input[i]=-1.0;///sqrt(2);
-
- //if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]);
- //SNR =10;
- SNR_lin = pow(10,SNR/10.0);
- sigma = 1.0/sqrt(2*SNR_lin);
- channel_output_fixed[i] = (short)quantize(sigma/4.0/4.0,modulated_input[i] + sigma*gaussdouble(0.0,1.0),qbits);
- //channel_output_fixed[i] = (char)quantize8bit(sigma/4.0,(2.0*modulated_input[i]) - 1.0 + sigma*gaussdouble(0.0,1.0));
- //printf("llr[%d]=%d\n",i,channel_output_fixed[i]);
- //printf("channel_output_fixed[%d]: %d\n",i,channel_output_fixed[i]);
-
- //channel_output_fixed[i] = (char)quantize(1,channel_output_fixed[i],qbits);
-
- //if (i<16) printf("channel_output_fixed[%d] = %d\n",i,channel_output_fixed[i]);
-
- //Uncoded BER
- if (channel_output_fixed[i]<0)
- channel_output_uncoded[i]=1; //QPSK demod
- else
- channel_output_uncoded[i]=0;
-
- if (channel_output_uncoded[i] != dlsch->harq_processes[harq_pid]->f[i])
- errors_bit_uncoded = errors_bit_uncoded + 1;
- }
-
- //if (errors_bit_uncoded>10)
- //printf("errors bits uncoded %f\n", errors_bit_uncoded);
+ //if (i<16)
+ // printf("encoder output f[%d] = %d\n",i,dlsch->harq_processes[0]->f[i]);
+ if (dlsch->harq_processes[0]->f[i] == 0)
+ modulated_input[i] = 1.0; ///sqrt(2); //QPSK
+ else
+ modulated_input[i] = -1.0; ///sqrt(2);
+
+ //if (i<16) printf("modulated_input[%d] = %d\n",i,modulated_input[i]);
+ //SNR =10;
+ SNR_lin = pow(10, SNR / 10.0);
+ sigma = 1.0 / sqrt(2 * SNR_lin);
+ channel_output_fixed[i] = (short) quantize(sigma / 4.0 / 4.0,
+ modulated_input[i] + sigma * gaussdouble(0.0, 1.0),
+ qbits);
+ //channel_output_fixed[i] = (char)quantize8bit(sigma/4.0,(2.0*modulated_input[i]) - 1.0 + sigma*gaussdouble(0.0,1.0));
+ //printf("llr[%d]=%d\n",i,channel_output_fixed[i]);
+ //printf("channel_output_fixed[%d]: %d\n",i,channel_output_fixed[i]);
+
+ //channel_output_fixed[i] = (char)quantize(1,channel_output_fixed[i],qbits);
+
+ //if (i<16) printf("channel_output_fixed[%d] = %d\n",i,channel_output_fixed[i]);
+
+ //Uncoded BER
+ if (channel_output_fixed[i] < 0)
+ channel_output_uncoded[i] = 1; //QPSK demod
+ else
+ channel_output_uncoded[i] = 0;
+
+ if (channel_output_uncoded[i] != dlsch->harq_processes[harq_pid]->f[i])
+ errors_bit_uncoded = errors_bit_uncoded + 1;
+ }
+
+ //if (errors_bit_uncoded>10)
+ //printf("errors bits uncoded %f\n", errors_bit_uncoded);
#ifdef DEBUG_CODER
- printf("\n");
- exit(-1);
+ printf("\n");
+ exit(-1);
#endif
- ret = nr_dlsch_decoding(UE,
- channel_output_fixed,
- &UE->frame_parms,
- dlsch0_ue,
- dlsch0_ue->harq_processes[0],
- frame,
- nb_symb_sch,
- subframe,
- harq_pid,
- is_crnti,
- llr8_flag);
-
- if (ret>dlsch0_ue->max_ldpc_iterations)
- n_errors++;
-
- //count errors
- errors_bit = 0;
-
- for (i=0; i<TBS; i++) {
- estimated_output_bit[i] = (estimated_output[i/8]&(1<<(i&7)))>>(i&7);
- test_input_bit[i] = (test_input[i/8]&(1<<(i&7)))>>(i&7); // Further correct for multiple segments
-
- if (estimated_output_bit[i] != test_input_bit[i]) {
- errors_bit++;
- //printf("estimated bits error occurs @%d ",i);
- }
- }
-
- if (errors_bit>0) {
- n_false_positive++;
- if (n_trials == 1)
- printf("\n errors_bit %d (trial %d)\n", errors_bit,trial);
- }
- }
-
- printf("SNR %f, BLER %f (false positive %f)\n",SNR,(float)n_errors/(float)n_trials,(float)n_false_positive/(float)n_trials);
-
- if ((float)n_errors/(float)n_trials < target_error_rate)
- break;
- }
-
- /*LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
- if (gNB->frame_parms.nb_antennas_tx>1)
- LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);*/
-
- //TODO: loop over slots
- /*for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
- if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
- PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
- txdata[aa],
- frame_parms->ofdm_symbol_size,
- 12,
- frame_parms->nb_prefix_samples,
- CYCLIC_PREFIX);
- } else {
- nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
- txdata[aa],
- 14,
- frame_parms);
- }
- }
-
- LOG_M("txsig0.m","txs0", txdata[0],frame_length_complex_samples,1,1);
- if (gNB->frame_parms.nb_antennas_tx>1)
- LOG_M("txsig1.m","txs1", txdata[1],frame_length_complex_samples,1,1);
-
-
- for (i=0; i<frame_length_complex_samples; i++) {
- for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
- r_re[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)]);
- r_im[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)+1]);
- }
- }*/
-
- for (i=0; i<2; i++) {
- printf("gNB %d\n",i);
- free_gNB_dlsch(gNB->dlsch[0][i]);
- printf("UE %d\n",i);
- free_nr_ue_dlsch(UE->dlsch[UE->current_thread_id[subframe]][0][i]);
- }
-
- for (i=0; i<2; i++) {
- free(s_re[i]);
- free(s_im[i]);
- free(r_re[i]);
- free(r_im[i]);
- free(txdata[i]);
- }
-
- free(s_re);
- free(s_im);
- free(r_re);
- free(r_im);
- free(txdata);
-
- if (output_fd)
- fclose(output_fd);
-
- if (input_fd)
- fclose(input_fd);
-
- return(n_errors);
+ ret = nr_dlsch_decoding(UE, channel_output_fixed, &UE->frame_parms,
+ dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch,
+ subframe, harq_pid, is_crnti, llr8_flag);
+
+ if (ret > dlsch0_ue->max_ldpc_iterations)
+ n_errors++;
+
+ //count errors
+ errors_bit = 0;
+
+ for (i = 0; i < TBS; i++) {
+ estimated_output_bit[i] = (dlsch0_ue->harq_processes[0]->b[i / 8] & (1 << (i & 7))) >> (i & 7);
+ test_input_bit[i] = (test_input[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
+
+ if (estimated_output_bit[i] != test_input_bit[i]) {
+ errors_bit++;
+ //printf("estimated bits error occurs @%d ",i);
+ }
+ }
+
+ if (errors_bit > 0) {
+ n_false_positive++;
+ if (n_trials == 1)
+ printf("errors_bit %d (trial %d)\n", errors_bit, trial);
+ }
+ }
+
+ printf("SNR %f, BLER %f (false positive %f)\n", SNR,
+ (float) n_errors / (float) n_trials,
+ (float) n_false_positive / (float) n_trials);
+
+ if ((float) n_errors / (float) n_trials < target_error_rate)
+ break;
+ }
+
+ /*LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
+ if (gNB->frame_parms.nb_antennas_tx>1)
+ LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);*/
+
+ //TODO: loop over slots
+ /*for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
+ if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
+ PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
+ txdata[aa],
+ frame_parms->ofdm_symbol_size,
+ 12,
+ frame_parms->nb_prefix_samples,
+ CYCLIC_PREFIX);
+ } else {
+ nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
+ txdata[aa],
+ 14,
+ frame_parms);
+ }
+ }
+
+ LOG_M("txsig0.m","txs0", txdata[0],frame_length_complex_samples,1,1);
+ if (gNB->frame_parms.nb_antennas_tx>1)
+ LOG_M("txsig1.m","txs1", txdata[1],frame_length_complex_samples,1,1);
+
+
+ for (i=0; i<frame_length_complex_samples; i++) {
+ for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
+ r_re[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)]);
+ r_im[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)+1]);
+ }
+ }*/
+
+ for (i = 0; i < 2; i++) {
+ printf("gNB %d\n", i);
+ free_gNB_dlsch(gNB->dlsch[0][i]);
+ printf("UE %d\n", i);
+ free_nr_ue_dlsch(UE->dlsch[UE->current_thread_id[subframe]][0][i]);
+ }
+
+ for (i = 0; i < 2; i++) {
+ free(s_re[i]);
+ free(s_im[i]);
+ free(r_re[i]);
+ free(r_im[i]);
+ free(txdata[i]);
+ }
+
+ free(s_re);
+ free(s_im);
+ free(r_re);
+ free(r_im);
+ free(txdata);
+
+ if (output_fd)
+ fclose(output_fd);
+
+ if (input_fd)
+ fclose(input_fd);
+
+ return (n_errors);
}
-
-
diff --git a/openair1/SIMULATION/NR_PHY/dlsim.c b/openair1/SIMULATION/NR_PHY/dlsim.c
index 979ddd96972d9c07450278c3f879b61d2378c111..f3a3219d7141934ae20fb4cd6cada27e5bbc0455 100644
--- a/openair1/SIMULATION/NR_PHY/dlsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlsim.c
@@ -54,6 +54,7 @@
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
#include "NR_UE_PHY_INTERFACE/NR_IF_Module.h"
+
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
@@ -72,14 +73,15 @@ int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {return(0);}
-uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn) {return(0);}
-int32_t get_uldl_offset(int eutra_bandP) {return(0);}
+int32_t get_uldl_offset(int nr_bandP) {return(0);}
NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);}
int8_t dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info){return(0);}
int8_t dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info){return(0);}
+lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe) { return(SF_DL);}
+
void exit_function(const char* file, const char* function, const int line,const char *s) {
const char * msg= s==NULL ? "no comment": s;
printf("Exiting at: %s:%d %s(), %s\n", file, line, function, msg);
@@ -97,6 +99,12 @@ int rlc_module_init (void) {return(0);}
void pdcp_layer_init(void) {}
int rrc_init_nr_global_param(void){return(0);}
+void config_common(int Mod_idP,
+ int CC_idP,
+ int nr_bandP,
+ uint64_t dl_CarrierFreqP,
+ uint32_t dl_BandwidthP
+ );
// needed for some functions
@@ -146,7 +154,7 @@ int main(int argc, char **argv)
unsigned char frame_type = 0;
unsigned char pbch_phase = 0;
- int frame=0,subframe=1;
+ int frame=0,slot=1;
int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
@@ -376,6 +384,8 @@ int main(int argc, char **argv)
RC.gNB = (PHY_VARS_gNB***) malloc(sizeof(PHY_VARS_gNB **));
RC.gNB[0] = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *));
RC.gNB[0][0] = malloc(sizeof(PHY_VARS_gNB));
+ memset(RC.gNB[0][0],0,sizeof(PHY_VARS_gNB));
+
gNB = RC.gNB[0][0];
gNB_config = &gNB->gNB_config;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
@@ -384,9 +394,14 @@ int main(int argc, char **argv)
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_DL;
+ // stub to configure frame_parms
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu);
+ // call MAC to configure common parameters
+
phy_init_nr_gNB(gNB,0,0);
+
+
double fs,bw;
if (mu == 1 && N_RB_DL == 217) {
@@ -455,13 +470,14 @@ int main(int argc, char **argv)
//configure UE
UE = malloc(sizeof(PHY_VARS_NR_UE));
+ memset((void*)UE,0,sizeof(PHY_VARS_NR_UE));
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_NR_UE**));
PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_NR_UE*));
PHY_vars_UE_g[0][0] = UE;
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
- phy_init_nr_top(UE);
+
if (run_initial_sync==1) UE->is_synchronized = 0;
- else UE->is_synchronized = 1;
+ else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
UE->perfect_ce = 0;
@@ -471,19 +487,25 @@ int main(int argc, char **argv)
exit(-1);
}
+ init_nr_ue_transport(UE,0);
+
nr_gold_pbch(UE);
+ nr_gold_pdcch(UE,0,2);
RC.nb_nr_macrlc_inst = 1;
mac_top_init_gNB();
gNB_mac = RC.nrmac[0];
+ config_common(0,0,78,(uint64_t)3640000000L,N_RB_DL);
+ config_nr_mib(0,0,1,kHz30,0,0,0,0);
+
nr_l2_init_ue();
UE_mac = get_mac_inst(0);
UE->if_inst = nr_ue_if_module_init(0);
UE->if_inst->scheduled_response = nr_ue_scheduled_response;
UE->if_inst->phy_config_request = nr_ue_phy_config_request;
- UE->if_inst->dl_indication = dummy_nr_ue_dl_indication;
+ UE->if_inst->dl_indication = nr_ue_dl_indication;
UE->if_inst->ul_indication = dummy_nr_ue_ul_indication;
@@ -495,11 +517,11 @@ int main(int argc, char **argv)
gNB->pbch_configured = 1;
for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1;
- nr_schedule_css_dlsch_phytest(0,frame,subframe);
+ nr_schedule_css_dlsch_phytest(0,frame,slot);
Sched_INFO.module_id = 0;
Sched_INFO.CC_id = 0;
Sched_INFO.frame = frame;
- Sched_INFO.subframe = subframe;
+ Sched_INFO.slot = slot;
Sched_INFO.DL_req = &gNB_mac->DL_req[0];
Sched_INFO.UL_req = NULL;
Sched_INFO.HI_DCI0_req = NULL;
@@ -507,7 +529,7 @@ int main(int argc, char **argv)
nr_schedule_response(&Sched_INFO);
gNB_proc.frame_tx = frame;
- gNB_proc.subframe_tx = subframe;
+ gNB_proc.slot_tx = slot;
phy_procedures_gNB_TX(gNB,&gNB_proc,0);
//nr_common_signal_procedures (gNB,frame,subframe);
@@ -563,7 +585,15 @@ int main(int argc, char **argv)
}
}
+
//Configure UE
+ rrc_gNB_carrier_data_t carrier;
+ uint32_t pdcch_ConfigSIB1 = 0;
+ uint32_t ssb_SubcarrierOffset = 0;
+ carrier.MIB = (uint8_t*) malloc(4);
+ carrier.sizeof_MIB = do_MIB_NR(&carrier,0,ssb_SubcarrierOffset,pdcch_ConfigSIB1,30,2);
+
+ nr_rrc_mac_config_req_ue(0,0,0,carrier.mib.message.choice.mib,NULL,NULL,NULL);
fapi_nr_dl_config_request_t dl_config;
// Type0 PDCCH search space
dl_config.number_pdus = 1;
@@ -592,7 +622,7 @@ int main(int argc, char **argv)
uint32_t number_of_search_space_per_slot=1;
uint32_t first_symbol_index=0;
- uint32_t search_space_duration; // element of search space
+ uint32_t search_space_duration=0; // element of search space
uint32_t coreset_duration; // element of coreset
coreset_duration = num_symbols * number_of_search_space_per_slot;
@@ -604,8 +634,9 @@ int main(int argc, char **argv)
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
-
-
+
+ dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = N_RB_DL;
+
for (SNR=snr0; SNR<snr1; SNR+=.2) {
n_errors = 0;
@@ -644,19 +675,20 @@ int main(int argc, char **argv)
UE->rx_offset=0;
UE_proc.frame_rx = frame;
- UE_proc.nr_tti_rx= subframe;
- UE_proc.subframe_rx = subframe;
+ UE_proc.nr_tti_rx= slot;
+ UE_proc.subframe_rx = slot;
UE_mac->scheduled_response.dl_config = &dl_config;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
+ printf("Running phy procedures UE RX %d.%d\n",frame,slot);
+
phy_procedures_nrUE_RX(UE,
&UE_proc,
0,
- 0,
do_pdcch_flag,
- normal_txrx,
- no_relay);
+ normal_txrx);
+
if (UE->dci_ind.number_of_dcis==0) n_errors++;
}
diff --git a/openair1/SIMULATION/NR_PHY/pbchsim.c b/openair1/SIMULATION/NR_PHY/pbchsim.c
index 8d847787e6f629a8b3d0d0018712ca22f9039200..f71cb7d147b156a6dfe3756151d1340e4fc067e3 100644
--- a/openair1/SIMULATION/NR_PHY/pbchsim.c
+++ b/openair1/SIMULATION/NR_PHY/pbchsim.c
@@ -66,8 +66,8 @@ int oai_nfapi_ul_config_req(nfapi_ul_config_request_t *ul_config_req) { return(0
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req) {return(0);}
-uint32_t from_earfcn(int eutra_bandP,uint32_t dl_earfcn) {return(0);}
-int32_t get_uldl_offset(int eutra_bandP) {return(0);}
+uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn) {return(0);}
+int32_t get_uldl_offset(int nr_bandP) {return(0);}
NR_IF_Module_t *NR_IF_Module_init(int Mod_id){return(NULL);}
@@ -85,39 +85,41 @@ int main(int argc, char **argv)
char c;
- int i,l,aa;
+ int i,aa;//,l;
double sigma2, sigma2_dB=10,SNR,snr0=-2.0,snr1=2.0;
uint8_t snr1set=0;
int **txdata;
double **s_re,**s_im,**r_re,**r_im;
- double iqim = 0.0;
- unsigned char pbch_pdu[6];
+ //double iqim = 0.0;
+ //unsigned char pbch_pdu[6];
// int sync_pos, sync_pos_slot;
// FILE *rx_frame_file;
FILE *output_fd = NULL;
uint8_t write_output_file=0;
//int result;
- int freq_offset;
+ //int freq_offset;
// int subframe_offset;
// char fname[40], vname[40];
- int trial,n_trials=1,n_errors,n_errors_payload;
+ int trial,n_trials=1,n_errors=0,n_errors_payload=0;
uint8_t transmission_mode = 1,n_tx=1,n_rx=1;
uint16_t Nid_cell=0;
channel_desc_t *gNB2UE;
- uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
+
uint8_t extended_prefix_flag=0;
int8_t interf1=-21,interf2=-21;
FILE *input_fd=NULL,*pbch_file_fd=NULL;
- char input_val_str[50],input_val_str2[50];
- uint8_t frame_mod4,num_pdcch_symbols = 0;
+ //uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
+ //char input_val_str[50],input_val_str2[50];
+ //uint8_t frame_mod4,num_pdcch_symbols = 0;
+ //double pbch_sinr;
+ //int pbch_tx_ant;
SCM_t channel_model=AWGN;//Rayleigh1_anticorr;
- double pbch_sinr;
- int pbch_tx_ant;
+
int N_RB_DL=273,mu=1;
unsigned char frame_type = 0;
@@ -355,7 +357,7 @@ int main(int argc, char **argv)
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_DL;
- nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu);
+ nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell);
phy_init_nr_gNB(gNB,0,0);
double fs,bw;
@@ -474,7 +476,7 @@ int main(int argc, char **argv)
frame_length_complex_samples,
input_fd) != frame_length_complex_samples) {
printf("error reading from file\n");
- exit(-1);
+ //exit(-1);
}
}
@@ -512,7 +514,7 @@ int main(int argc, char **argv)
sigma2 = pow(10,sigma2_dB/10);
// printf("sigma2 %f (%f dB)\n",sigma2,sigma2_dB);
- for (i=0; i<frame_length_complex_samples; i++) {
+ for (i=0; i<frame_parms->samples_per_subframe; i++) {
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
((short*) UE->common_vars.rxdata[aa])[2*i] = (short) ((r_re[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
@@ -521,9 +523,9 @@ int main(int argc, char **argv)
}
if (n_trials==1) {
- LOG_M("rxsig0.m","rxs0", UE->common_vars.rxdata[0],frame_length_complex_samples,1,1);
+ LOG_M("rxsig0.m","rxs0", UE->common_vars.rxdata[0],frame_parms->samples_per_subframe,1,1);
if (gNB->frame_parms.nb_antennas_tx>1)
- LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1],frame_length_complex_samples,1,1);
+ LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1],frame_parms->samples_per_subframe,1,1);
}
if (UE->is_synchronized == 0) {
@@ -559,7 +561,7 @@ int main(int argc, char **argv)
0,
1,
NR_PBCH_EST);
-
+
ret = nr_rx_pbch(UE,
&UE->proc.proc_rxtx[0],
UE->pbch_vars[0],
@@ -586,7 +588,7 @@ int main(int argc, char **argv)
n_errors_payload++;
}
- if (ret<0) n_errors++;
+ if (ret!=0) n_errors++;
}
} //noise trials
diff --git a/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c b/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
index b6aee84cec5b4f9a290b02c9b461aab0c50e0abe..24a86425f3d22583afb45fae86209a8d26b4e078 100644
--- a/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
+++ b/openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
@@ -119,9 +119,9 @@ void dl_phy_sync_success(module_id_t module_idP,
frame_t frameP,
unsigned char eNB_index, uint8_t first_sync){}
-uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn) { return(0);}
+uint32_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn) { return(0);}
-int32_t get_uldl_offset(int eutra_bandP) { return(0);}
+int32_t get_uldl_offset(int nr_bandP) { return(0);}
IF_Module_t *IF_Module_init(int Mod_id) { return(NULL);}
diff --git a/openair2/COMMON/rrc_messages_types.h b/openair2/COMMON/rrc_messages_types.h
index 6d83aba9079d4a4b301aecfb8c531e72a207cfef..922c949307b683fa1aebbfe4a03ae1647c930f22 100644
--- a/openair2/COMMON/rrc_messages_types.h
+++ b/openair2/COMMON/rrc_messages_types.h
@@ -310,8 +310,8 @@ typedef struct NRRrcConfigurationReq_s {
uint8_t tdd_config_s[MAX_NUM_CCs];
lte_prefix_type_t DL_prefix_type[MAX_NUM_CCs];
lte_prefix_type_t UL_prefix_type[MAX_NUM_CCs];
- int16_t eutra_band[MAX_NUM_CCs];
- uint32_t downlink_frequency[MAX_NUM_CCs];
+ int16_t nr_band[MAX_NUM_CCs];
+ uint64_t downlink_frequency[MAX_NUM_CCs];
int32_t uplink_frequency_offset[MAX_NUM_CCs];
int16_t Nid_cell[MAX_NUM_CCs];// for testing, change later
int16_t N_RB_DL[MAX_NUM_CCs];// for testing, change later
diff --git a/openair2/GNB_APP/RRC_nr_paramsvalues.h b/openair2/GNB_APP/RRC_nr_paramsvalues.h
index a30e8c537d571759f5f3c879d648326658549b4d..ca7c659355ae97b8cf63e6dea1cc364058dea53b 100644
--- a/openair2/GNB_APP/RRC_nr_paramsvalues.h
+++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h
@@ -39,7 +39,7 @@
#define GNB_CONFIG_STRING_FRAME_TYPE "frame_type"
#define GNB_CONFIG_STRING_DL_PREFIX_TYPE "DL_prefix_type"
#define GNB_CONFIG_STRING_UL_PREFIX_TYPE "UL_prefix_type"
-#define GNB_CONFIG_STRING_EUTRA_BAND "eutra_band"
+#define GNB_CONFIG_STRING_NR_BAND "nr_band"
#define GNB_CONFIG_STRING_DOWNLINK_FREQUENCY "downlink_frequency"
#define GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET "uplink_frequency_offset"
#define GNB_CONFIG_STRING_NID_CELL "Nid_cell"
diff --git a/openair2/GNB_APP/gnb_config.c b/openair2/GNB_APP/gnb_config.c
index cae39fc1243b2452901a55c9f29c1816ed259510..4484cc18a885026c8caf1bfa6f7b4832599cdce7 100644
--- a/openair2/GNB_APP/gnb_config.c
+++ b/openair2/GNB_APP/gnb_config.c
@@ -118,9 +118,9 @@ void RCconfig_nr_flexran()
*SearchSpace_searchSpaceType, *ue_Specific__dci_Formats,
*RateMatchPatternLTE_CRS_subframeAllocation_choice;
- long long int downlink_frequency;
+ uint64_t downlink_frequency;
- int32_t eutra_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
+ int32_t nr_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
MIB_subCarrierSpacingCommon, MIB_ssb_SubcarrierOffset, MIB_dmrs_TypeA_Position,
pdcch_ConfigSIB1, SIB1_ssb_PeriodicityServingCell, SIB1_ss_PBCH_BlockPower,
absoluteFrequencySSB, DL_FreqBandIndicatorNR,
@@ -431,8 +431,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
char* DL_prefix_type = NULL;
char* UL_prefix_type = NULL;
- int32_t eutra_band = 0;
- long long int downlink_frequency = 0;
+ int32_t nr_band = 0;
+ uint64_t downlink_frequency = 0;
int32_t uplink_frequency_offset = 0;
int32_t Nid_cell = 0;
int32_t N_RB_DL = 0;
@@ -788,8 +788,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, UL_prefix_type);
}
- NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j] = eutra_band;
- NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint32_t) downlink_frequency;
+ NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j] = nr_band;
+ NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint64_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j] = (unsigned int) uplink_frequency_offset;
NRRRC_CONFIGURATION_REQ (msg_p).Nid_cell[j]= Nid_cell;
@@ -844,12 +844,12 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, UL_prefix_type);
}
- NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j] = eutra_band;
- NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint32_t) downlink_frequency;
+ NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j] = nr_band;
+ NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint64_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j] = (unsigned int) uplink_frequency_offset;
if (config_check_band_frequencies(j,
- NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j],
+ NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j],
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j],
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j],
NRRRC_CONFIGURATION_REQ (msg_p).frame_type[j])) {
diff --git a/openair2/GNB_APP/gnb_paramdef.h b/openair2/GNB_APP/gnb_paramdef.h
index a457a3b1a4f99d3a8d65c77a599b9fc4616edb23..15a2e9723926175516031c3502b8d3cbe7628b3f 100644
--- a/openair2/GNB_APP/gnb_paramdef.h
+++ b/openair2/GNB_APP/gnb_paramdef.h
@@ -602,12 +602,12 @@ typedef enum {
/* optname helpstr paramflags XXXptr defXXXval type numelt checked_param */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define NRCCPARAMS_DESC { \
-{GNB_CONFIG_STRING_FRAME_TYPE, NULL, 0, strptr:&frame_type, defstrval:"FDD", TYPE_STRING, 0}, \
+{GNB_CONFIG_STRING_FRAME_TYPE, NULL, 0, strptr:&frame_type, defstrval:"TDD", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_DL_PREFIX_TYPE, NULL, 0, strptr:&DL_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_UL_PREFIX_TYPE, NULL, 0, strptr:&UL_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
-{GNB_CONFIG_STRING_EUTRA_BAND, NULL, 0, iptr:&eutra_band, defintval:7, TYPE_UINT, 0}, \
-{GNB_CONFIG_STRING_DOWNLINK_FREQUENCY, NULL, 0, i64ptr:(int64_t *)&downlink_frequency, defint64val:2680000000, TYPE_UINT64, 0}, \
-{GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET, NULL, 0, iptr:&uplink_frequency_offset, defintval:-120000000, TYPE_INT, 0}, \
+{GNB_CONFIG_STRING_NR_BAND, NULL, 0, iptr:&nr_band, defintval:78, TYPE_UINT, 0}, \
+{GNB_CONFIG_STRING_DOWNLINK_FREQUENCY, NULL, 0, i64ptr:(int64_t *)&downlink_frequency, defint64val:3600000000, TYPE_UINT64, 0}, \
+{GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET, NULL, 0, iptr:&uplink_frequency_offset, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NID_CELL, NULL, 0, iptr:&Nid_cell, defintval:0, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_N_RB_DL, NULL, 0, iptr:&N_RB_DL, defintval:25, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_NB_ANT_PORTS, NULL, 0, iptr:&nb_antenna_ports, defintval:15, TYPE_UINT, 0}, \
@@ -751,7 +751,7 @@ typedef enum {
#define GNB_CONFIG_FRAME_TYPE_IDX 0
#define GNB_CONFIG_DL_PREFIX_TYPE_IDX 1
#define GNB_CONFIG_UL_PREFIX_TYPE_IDX 2
-#define GNB_CONFIG_EUTRA_BAND_IDX 3
+#define GNB_CONFIG_NR_BAND_IDX 3
#define GNB_CONFIG_DOWNLINK_FREQUENCY_IDX 4
#define GNB_CONFIG_UPLINK_FREQUENCY_OFFSET_IDX 5
#define GNB_CONFIG_NID_CELL_IDX 6
diff --git a/openair2/LAYER2/NR_MAC_UE/mac_proto.h b/openair2/LAYER2/NR_MAC_UE/mac_proto.h
index 24662aaa7c14c37e8882014b00b7b108e63addf7..f34000bc9834ba1abf80159c6665218d71962e04 100755
--- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h
@@ -127,5 +127,8 @@ void nr_ue_process_mac_pdu(
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index);
+
+int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, void *pduP, uint32_t pdu_len);
+
#endif
-/** @}*/
\ No newline at end of file
+/** @}*/
diff --git a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
index 157ce9d84d3f4d9b52df6d8b871447da3d2d06b4..44f1cf05ea3c354265c55715e79eb61437a5d26f 100644
--- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
@@ -95,7 +95,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.tpmi = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_dmrs_cdm_groups = 0;
- ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[4] = 0;
+ for (int i=0;i<4;i++) ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.dmrs_ports[i]=0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.n_front_load_symb = 0;
//ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.srs_config = 0;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15.csi_reportTriggerSize = 0;
@@ -125,7 +125,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
- ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
+ for (int i=0;i<NUMBER_PUCCH_FORMAT_NR;i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
@@ -180,14 +180,14 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.pucch_GroupHopping = phy_config->config_req.ul_bwp_common.pucch_config_common.pucch_group_hopping;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.hoppingId = phy_config->config_req.ul_bwp_common.pucch_config_common.hopping_id;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_nominal = phy_config->config_req.ul_bwp_common.pucch_config_common.p0_nominal;
- ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[NUMBER_PUCCH_FORMAT_NR] = 0;
+ for (int i=0;i<NUMBER_PUCCH_FORMAT_NR; i++) ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.deltaF_PUCCH_f[i] = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Id = 0; /* INTEGER (1..8) */
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.p0_PUCCH_Value = 0;
ul_config->ul_config_list[ul_config->number_pdus].pucch_config_pdu.twoPUCCH_PC_AdjustmentStates = 0;
}
if(mac->if_module != NULL && mac->if_module->ul_indication != NULL){
- mac->if_module->ul_indication(&mac->scheduled_response);
+ mac->if_module->dl_indication(&mac->scheduled_response);
}
return 0;
}
@@ -659,9 +659,15 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
- dl_config->number_pdus = dl_config->number_pdus + 1;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
+ dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set
+ /*
+ printf("nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n",
+ dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti,
+ dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP);
+ */
+ dl_config->number_pdus = dl_config->number_pdus + 1;
}
if(search_space_mask & type0a_pdcch){
@@ -1301,9 +1307,9 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
/* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
- nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
+ nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
- nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
+ nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_0,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
@@ -1377,9 +1383,9 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
/* BANDWIDTH_PART_IND */
ulsch_config_pdu_0_1->bandwidth_part_ind = dci->bandwidth_part_ind;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
- nr_ue_process_dci_freq_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
+ nr_ue_process_dci_freq_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->freq_dom_resource_assignment_UL);
/* TIME_DOM_RESOURCE_ASSIGNMENT */
- nr_ue_process_dci_time_dom_resource_assignment(&ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
+ nr_ue_process_dci_time_dom_resource_assignment(ulsch_config_pdu_0_1,NULL,dci->time_dom_resource_assignment,mac->mib->dmrs_TypeA_Position);
/* FREQ_HOPPING_FLAG */
if ((mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.resource_allocation != 0) &&
(mac->phy_config.config_req.ul_bwp_dedicated.pusch_config_dedicated.frequency_hopping !=0))
@@ -1769,8 +1775,7 @@ printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
//for (int k=0;k<1000;k++) printf(">>> %d ",k);
//mac->if_module->dl_indication(&mac->dl_info);
//mac->if_module->dl_indication(&mac->dl_config_request);
- mac->if_module->dl_indication(&mac->phy_config);
-
+ mac->if_module->dl_indication(&mac->phy_config);
break;
diff --git a/openair2/LAYER2/NR_MAC_gNB/config.c b/openair2/LAYER2/NR_MAC_gNB/config.c
index 98bd01e71bd49a65cfd039ba2780c6fe00745aca..30917fd543c6a040973c1d10fe7b71e0eac54f4d 100644
--- a/openair2/LAYER2/NR_MAC_gNB/config.c
+++ b/openair2/LAYER2/NR_MAC_gNB/config.c
@@ -52,98 +52,107 @@ extern uint8_t nfapi_mode;
int32_t **rxdata;
int32_t **txdata;
-typedef struct eutra_bandentry_s {
+typedef struct nr_bandentry_s {
int16_t band;
- uint32_t ul_min;
- uint32_t ul_max;
- uint32_t dl_min;
- uint32_t dl_max;
- uint32_t N_OFFs_DL;
-} eutra_bandentry_t;
+ uint64_t ul_min;
+ uint64_t ul_max;
+ uint64_t dl_min;
+ uint64_t dl_max;
+ uint64_t N_OFFs_DL;
+ uint64_t step_size;
+} nr_bandentry_t;
typedef struct band_info_s {
int nbands;
- eutra_bandentry_t band_info[100];
-} band_info_t;
-
-static const eutra_bandentry_t eutra_bandtable[] = {
- {1, 19200, 19800, 21100, 21700, 0},
- {2, 18500, 19100, 19300, 19900, 6000},
- {3, 17100, 17850, 18050, 18800, 12000},
- {4, 17100, 17550, 21100, 21550, 19500},
- {5, 8240, 8490, 8690, 8940, 24000},
- {6, 8300, 8400, 8750, 8850, 26500},
- {7, 25000, 25700, 26200, 26900, 27500},
- {8, 8800, 9150, 9250, 9600, 34500},
- {9, 17499, 17849, 18449, 18799, 38000},
- {10, 17100, 17700, 21100, 21700, 41500},
- {11, 14279, 14529, 14759, 15009, 47500},
- {12, 6980, 7160, 7280, 7460, 50100},
- {13, 7770, 7870, 7460, 7560, 51800},
- {14, 7880, 7980, 7580, 7680, 52800},
- {17, 7040, 7160, 7340, 7460, 57300},
- {18, 8150, 9650, 8600, 10100, 58500},
- {19, 8300, 8450, 8750, 8900, 60000},
- {20, 8320, 8620, 7910, 8210, 61500},
- {21, 14479, 14629, 14959, 15109, 64500},
- {22, 34100, 34900, 35100, 35900, 66000},
- {23, 20000, 20200, 21800, 22000, 75000},
- {24, 16126, 16605, 15250, 15590, 77000},
- {25, 18500, 19150, 19300, 19950, 80400},
- {26, 8140, 8490, 8590, 8940, 86900},
- {27, 8070, 8240, 8520, 8690, 90400},
- {28, 7030, 7580, 7580, 8130, 92100},
- {29, 0, 0, 7170, 7280, 96600},
- {30, 23050, 23250, 23500, 23600, 97700},
- {31, 45250, 34900, 46250, 35900, 98700},
- {32, 0, 0, 14520, 14960, 99200},
- {33, 19000, 19200, 19000, 19200, 36000},
- {34, 20100, 20250, 20100, 20250, 36200},
- {35, 18500, 19100, 18500, 19100, 36350},
- {36, 19300, 19900, 19300, 19900, 36950},
- {37, 19100, 19300, 19100, 19300, 37550},
- {38, 25700, 26200, 25700, 26300, 37750},
- {39, 18800, 19200, 18800, 19200, 38250},
- {40, 23000, 24000, 23000, 24000, 38650},
- {41, 24960, 26900, 24960, 26900, 39650},
- {42, 34000, 36000, 34000, 36000, 41590},
- {43, 36000, 38000, 36000, 38000, 43590},
- {44, 7030, 8030, 7030, 8030, 45590},
- {45, 14470, 14670, 14470, 14670, 46590},
- {46, 51500, 59250, 51500, 59250, 46790},
- {65, 19200, 20100, 21100, 22000, 65536},
- {66, 17100, 18000, 21100, 22000, 66436},
- {67, 0, 0, 7380, 7580, 67336},
- {68, 6980, 7280, 7530, 7830, 67536}
+ nr_bandentry_t band_info[100];
+} nr_band_info_t;
+
+static const nr_bandentry_t nr_bandtable[] = {
+ {1, 1920000, 1980000, 2110000, 2170000, 20, 422000},
+ {2, 1850000, 1910000, 1930000, 1990000, 20, 386000},
+ {3, 1710000, 1785000, 1805000, 1880000, 20, 361000},
+ {5, 824000, 849000, 869000, 894000, 20, 173800},
+ {7, 2500000, 2570000, 2620000, 2690000, 20, 524000},
+ {8, 880000, 915000, 925000, 960000, 20, 185000},
+ {12, 698000, 716000, 728000, 746000, 20, 145800},
+ {20, 832000, 862000, 791000, 821000, 20, 158200},
+ {25, 1850000, 1915000, 1930000, 1995000, 20, 386000},
+ {28, 703000, 758000, 758000, 813000, 20, 151600},
+ {34, 2010000, 2025000, 2010000, 2025000, 20, 402000},
+ {38, 2570000, 2620000, 2570000, 2630000, 20, 514000},
+ {39, 1880000, 1920000, 1880000, 1920000, 20, 376000},
+ {40, 2300000, 2400000, 2300000, 2400000, 20, 460000},
+ {41, 2496000, 2690000, 2496000, 2690000, 3, 499200},
+ {50, 1432000, 1517000, 1432000, 1517000, 20, 286400},
+ {51, 1427000, 1432000, 1427000, 1432000, 20, 285400},
+ {66, 1710000, 1780000, 2110000, 2200000, 20, 422000},
+ {70, 1695000, 1710000, 1995000, 2020000, 20, 399000},
+ {71, 663000, 698000, 617000, 652000, 20, 123400},
+ {74, 1427000, 1470000, 1475000, 1518000, 20, 295000},
+ {75, 000, 000, 1432000, 1517000, 20, 286400},
+ {76, 000, 000, 1427000, 1432000, 20, 285400},
+ {77, 3300000, 4200000, 3300000, 4200000, 1, 620000},
+ {78, 3300000, 3800000, 3300000, 3800000, 1, 620000},
+ {79, 4400000, 5000000, 4400000, 5000000, 2, 693334},
+ {80, 1710000, 1785000, 000, 000, 20, 342000},
+ {81, 860000, 915000, 000, 000, 20, 176000},
+ {82, 832000, 862000, 000, 000, 20, 166400},
+ {83, 703000, 748000, 000, 000, 20, 140600},
+ {84, 1920000, 1980000, 000, 000, 20, 384000},
+ {86, 1710000, 1785000, 000, 000, 20, 342000}
};
-uint32_t nr_to_earfcn(int eutra_bandP, uint32_t dl_CarrierFreq, uint32_t bw)
+uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw)
{
- uint32_t dl_CarrierFreq_by_100k = dl_CarrierFreq / 100000;
- int bw_by_100 = bw / 100;
+ uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
+ int bw_kHz = bw / 1000;
int i;
- AssertFatal(eutra_bandP < 69, "eutra_band %d > 68\n", eutra_bandP);
- for (i = 0; i < 69 && eutra_bandtable[i].band != eutra_bandP; i++);
+ LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
+ AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP);
+ for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++);
+
+ AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
+ "Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
+ nr_bandP, bw, (long long unsigned int)dl_CarrierFreq_by_1k,
+ (long long unsigned int)nr_bandtable[i].dl_min);
+ AssertFatal(dl_CarrierFreq_by_1k <=
+ (nr_bandtable[i].dl_max - bw_kHz),
+ "Band %d, dl_CarrierFreq %llu bw %u: DL carrier frequency %llu kHz > %llu\n",
+ nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k,
+ (long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
+
+ int deltaFglobal;
+
+ if (dl_CarrierFreq < 3e9) deltaFglobal = 5;
+ else deltaFglobal = 15;
+
+ // This is equation before Table 5.4.2.1-1 in 38101-1-f30
+ // F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
+ return (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal) +
+ nr_bandtable[i].N_OFFs_DL);
+}
- AssertFatal(dl_CarrierFreq_by_100k >= eutra_bandtable[i].dl_min,
- "Band %d, bw %u : DL carrier frequency %u Hz < %u\n",
- eutra_bandP, bw, dl_CarrierFreq,
- eutra_bandtable[i].dl_min);
- AssertFatal(dl_CarrierFreq_by_100k <=
- (eutra_bandtable[i].dl_max - bw_by_100),
- "Band %d, bw %u: DL carrier frequency %u Hz > %d\n",
- eutra_bandP, bw, dl_CarrierFreq,
- eutra_bandtable[i].dl_max - bw_by_100);
+uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn)
+{
- return (dl_CarrierFreq_by_100k - eutra_bandtable[i].dl_min +
- (eutra_bandtable[i].N_OFFs_DL / 10));
-}
+ int i;
+ int deltaFglobal;
+ if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5;
+ else deltaFglobal = 15;
+
+ AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP);
+ for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++);
+ AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
+
+ return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
+
+}
void config_nr_mib(int Mod_idP,
int CC_idP,
@@ -159,24 +168,31 @@ void config_nr_mib(int Mod_idP,
cfg->num_tlv=0;
- cfg->rf_config.tx_antenna_ports.value = p_gNBP;
- cfg->rf_config.tx_antenna_ports.tl.tag = NFAPI_RF_CONFIG_TX_ANTENNA_PORTS_TAG;
+ cfg->rf_config.dl_subcarrierspacing.value = subCarrierSpacingCommon;
+
+ cfg->rf_config.dl_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG;
cfg->num_tlv++;
- cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
+ cfg->rf_config.ul_subcarrierspacing.value = subCarrierSpacingCommon;
+ cfg->rf_config.ul_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG;
+ cfg->num_tlv++;
-
+ cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
+ cfg->sch_config.ssb_subcarrier_offset.tl.tag = NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
+ cfg->num_tlv++;
}
void config_common(int Mod_idP,
int CC_idP,
- int eutra_bandP,
- int dl_CarrierFreqP,
- int dl_BandwidthP
+ int nr_bandP,
+ uint64_t dl_CarrierFreqP,
+ uint32_t dl_BandwidthP
){
nfapi_nr_config_request_t *cfg = &RC.nrmac[Mod_idP]->config[CC_idP];
+ int mu = 1;
+
// FDD
cfg->subframe_config.duplex_mode.value = 1;
cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG;
@@ -184,15 +200,15 @@ void config_common(int Mod_idP,
/// In NR DL and UL will be different band
cfg->nfapi_config.rf_bands.number_rf_bands = 1;
- cfg->nfapi_config.rf_bands.rf_band[0] = eutra_bandP;
+ cfg->nfapi_config.rf_bands.rf_band[0] = nr_bandP;
cfg->nfapi_config.rf_bands.tl.tag = NFAPI_PHY_RF_BANDS_TAG;
cfg->num_tlv++;
- cfg->nfapi_config.earfcn.value = nr_to_earfcn(eutra_bandP,dl_CarrierFreqP,dl_BandwidthP*180/100);
- cfg->nfapi_config.earfcn.tl.tag = NFAPI_NFAPI_EARFCN_TAG;
+ cfg->nfapi_config.nrarfcn.value = to_nrarfcn(nr_bandP,dl_CarrierFreqP,dl_BandwidthP*180000*(1+mu));
+ cfg->nfapi_config.nrarfcn.tl.tag = NFAPI_NR_NFAPI_NRARFCN_TAG;
cfg->num_tlv++;
- cfg->subframe_config.numerology_index_mu.value = 1;
+ cfg->subframe_config.numerology_index_mu.value = mu;
//cfg->subframe_config.tl.tag =
//cfg->num_tlv++;
@@ -217,8 +233,8 @@ void config_common(int Mod_idP,
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_idP,
int p_gNB,
- int eutra_bandP,
- int dl_CarrierFreqP,
+ int nr_bandP,
+ uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
NR_ServingCellConfigCommon_t *servingcellconfigcommon
@@ -245,7 +261,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
if( servingcellconfigcommon != NULL ){
config_common(Mod_idP,
CC_idP,
- eutra_bandP,
+ nr_bandP,
dl_CarrierFreqP,
dl_BandwidthP
);
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
index 8217b96393f6e0af7d1bfe9fca77e0a9ea43b6d9..d29a9fb90887cc9185595dcd111b3b132c8b56b9 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
@@ -71,7 +71,7 @@ uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP,
frame_t frameP,
- sub_frame_t subframeP){
+ sub_frame_t slotP){
nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0];
@@ -87,7 +87,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
//DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
- HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
+ HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = slotP + (frameP<<7);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
@@ -104,7 +104,7 @@ void check_nr_ul_failure(module_id_t module_idP,
int CC_id,
int UE_id,
frame_t frameP,
- sub_frame_t subframeP) {
+ sub_frame_t slotP) {
UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list;
nfapi_nr_dl_config_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0];
@@ -259,14 +259,14 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
}
}
*/
-void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
+void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{
int CC_id;
gNB_MAC_INST *mac = RC.nrmac[module_idP];
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
- nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][subframeP];
+ nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][slotP];
nfapi_ul_config_request_t *ul_req = &mac->UL_req[CC_id];
nfapi_ul_config_request_pdu_t *ul_req_pdu = ul_req->ul_config_request_body.ul_config_pdu_list;
@@ -274,12 +274,12 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
// Restore the pointer
ul_req->ul_config_request_body.ul_config_pdu_list = ul_req_pdu;
- ul_req->sfn_sf = (frameP<<4) + subframeP;
+ ul_req->sfn_sf = (frameP<<7) + slotP;
ul_req_tmp->ul_config_request_body.number_of_pdus = 0;
if (ul_req->ul_config_request_body.number_of_pdus>0)
{
- LOG_D(PHY, "%s() active NOW (frameP:%d subframeP:%d) pdus:%d\n", __FUNCTION__, frameP, subframeP, ul_req->ul_config_request_body.number_of_pdus);
+ LOG_D(PHY, "%s() active NOW (frameP:%d slotP:%d) pdus:%d\n", __FUNCTION__, frameP, slotP, ul_req->ul_config_request_body.number_of_pdus);
}
memcpy((void*)ul_req->ul_config_request_body.ul_config_pdu_list,
@@ -290,7 +290,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frameP,
- sub_frame_t subframeP){
+ sub_frame_t slotP){
protocol_ctxt_t ctxt;
int CC_id, i = -1;
@@ -303,7 +303,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
RC.nrmac[module_idP]->frame = frameP;
- RC.nrmac[module_idP]->subframe = subframeP;
+ RC.nrmac[module_idP]->slot = slotP;
+
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
//mbsfn_status[CC_id] = 0;
@@ -312,17 +313,20 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL, 0, 100);
- clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, subframeP);
+ clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, slotP);
}
// refresh UE list based on UEs dropped by PHY in previous subframe
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
+ nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
+
rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i);
-
- if (((frameP&127) == 0) && (subframeP == 0)) {
+ int spf = get_spf(cfg);
+
+ if (((frameP&127) == 0) && (slotP == 0)) {
LOG_I(MAC,
"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
rnti,
@@ -334,11 +338,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
(UE_list->UE_sched_ctrl[i].pucch1_snr[CC_id] - 128) / 2);
}
- RC.gNB[module_idP][CC_id]->pusch_stats_bsr[i][(frameP * 10) + subframeP] = -63;
+ RC.gNB[module_idP][CC_id]->pusch_stats_bsr[i][to_absslot(cfg,frameP,slotP)] = -63;
if (i == UE_list->head)
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BSR,RC.gNB[module_idP][CC_id]->
- pusch_stats_bsr[i][(frameP * 10) + subframeP]);
+ pusch_stats_bsr[i][to_absslot(cfg,frameP,slotP)]);
// increment this, it is cleared when we receive an sdu
RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer++;
@@ -407,20 +411,21 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
- PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, subframeP,module_idP);
+ PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, slotP,module_idP);
pdcp_run(&ctxt);
//rrc_rx_tx(&ctxt, CC_id);
// This schedules MIB
- if((subframeP == 0) && (frameP & 7) == 0){
- schedule_nr_mib(module_idP, frameP, subframeP);
+ if((slotP == 0) && (frameP & 7) == 0){
+ schedule_nr_mib(module_idP, frameP, slotP);
}
// Phytest scheduling/ option not activated because of pending bug
- if (subframeP==1)
- nr_schedule_css_dlsch_phytest(module_idP, frameP, subframeP);
+
+ if (slotP==2)
+ nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);
/*
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
index 95f685a536851d5eb07e614b12d562538cc32a08..8dbdbc93fa0254b3ef4d804e72606fbde5734d9f 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
@@ -57,7 +57,7 @@
extern RAN_CONTEXT_t RC;
-void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP){
+void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc;
@@ -70,9 +70,9 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
int mib_sdu_length;
int CC_id;
- uint16_t sfn_sf = frameP << 4 | subframeP;
+ uint16_t sfn_sf = frameP << 7 | slotP;
- AssertFatal(subframeP == 0, "Subframe must be 0\n");
+ AssertFatal(slotP == 0, "Subframe must be 0\n");
AssertFatal((frameP & 7) == 0, "Frame must be a multiple of 8\n");
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
@@ -83,11 +83,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); // not used in this case
- LOG_D(MAC, "Frame %d, subframe %d: BCH PDU length %d\n", frameP, subframeP, mib_sdu_length);
+ LOG_D(MAC, "Frame %d, slot %d: BCH PDU length %d\n", frameP, slotP, mib_sdu_length);
if (mib_sdu_length > 0) {
- LOG_D(MAC, "Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n", frameP, subframeP, dl_req->number_pdu, mib_sdu_length);
+ LOG_D(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->number_pdu, mib_sdu_length);
if ((frameP & 1023) < 80){
LOG_D(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
index 822dbb92f559aace78a7a785a8337f3cca244b37..131e64a93be88ed999c0bc81561736fc301e35a4 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
@@ -30,6 +30,7 @@
#include "nr_mac_gNB.h"
#include "SCHED_NR/sched_nr.h"
+#include "mac_proto.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
@@ -39,7 +40,7 @@ extern RAN_CONTEXT_t RC;
* current version has only a DCI for type 1 PDCCH for C_RNTI*/
void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
- sub_frame_t subframeP)
+ sub_frame_t slotP)
{
uint8_t CC_id;
@@ -49,15 +50,19 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
nfapi_nr_dl_config_request_pdu_t *dl_config_dci_pdu;
nfapi_nr_dl_config_request_pdu_t *dl_config_dlsch_pdu;
nfapi_tx_request_pdu_t *TX_req;
- uint16_t sfn_sf = frameP << 4 | subframeP;
+
+ nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
uint16_t rnti = 0x1234;
+ uint16_t sfn_sf = frameP << 7 | slotP;
+ int dl_carrier_bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
+
+ // everything here is hard-coded to 30 kHz
+ int scs = get_dlscs(cfg);
+ int slots_per_frame = get_spf(cfg);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_I(MAC, "Scheduling common search space DCI type 1 for CC_id %d\n",CC_id);
- PHY_VARS_gNB *gNB = RC.gNB[module_idP][CC_id];
- nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
- NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
dl_config_dci_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
@@ -85,11 +90,13 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
dlsch_pdu_rel15->ndi = 1;
dlsch_pdu_rel15->redundancy_version = 0;
- nr_configure_css_dci_from_mib(&gNB->pdcch_type0_params,
- kHz30, kHz30, nr_FR1, 0, 0,
- fp->slots_per_frame,
- cfg->rf_config.dl_carrier_bandwidth.value);
- memcpy((void*)params_rel15, (void*)&gNB->pdcch_type0_params, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
+
+ nr_configure_css_dci_initial(params_rel15,
+ scs, scs, nr_FR1, 0, 0,
+ slots_per_frame,
+ dl_carrier_bandwidth);
+
+ params_rel15->first_slot = 0;
pdu_rel15->frequency_domain_assignment = get_RIV(dlsch_pdu_rel15->start_prb, dlsch_pdu_rel15->n_prb, cfg->rf_config.dl_carrier_bandwidth.value);
pdu_rel15->time_domain_assignment = get_SLIV(dlsch_pdu_rel15->start_symbol, dlsch_pdu_rel15->nb_symbols);
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
index a2a96799fdf4adf8e8d6c9e238651fae68abcff2..ca0f103a437742f9b2018d79d23e027b0d78d023 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
@@ -65,59 +65,175 @@ extern RAN_CONTEXT_t RC;
extern int n_active_slices;
-int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP){
- // if FDD return dummy value
- if (ccP->tdd_Config == NULL)
+/// LUT for the number of symbols in the coreset indexed by coreset index (4 MSB rmsi_pdcch_config)
+uint8_t nr_coreset_nsymb_pdcch_type_0_b40Mhz[16] = {2,2,2,2,2,3,3,3,3,3,1,1,1,2,2,2}; // below 40Mhz bw
+uint8_t nr_coreset_nsymb_pdcch_type_0_a40Mhz[10] = {2,2,3,3,1,1,2,2,3,3}; // above 40Mhz bw
+/// LUT for the number of RBs in the coreset indexed by coreset index
+uint8_t nr_coreset_rb_offset_pdcch_type_0_b40Mhz[16] = {0,1,2,3,4,0,1,2,3,4,12,14,16,12,14,16};
+uint8_t nr_coreset_rb_offset_pdcch_type_0_a40Mhz[10] = {0,4,0,4,0,28,0,28,0,28};
+/// LUT for monitoring occasions param O indexed by ss index (4 LSB rmsi_pdcch_config)
+uint8_t nr_ss_param_O_type_0_mux1_FR1[16] = {0,0,2,2,5,5,7,7,0,5,0,0,2,2,5,5};
+uint8_t nr_ss_param_O_type_0_mux1_FR2[14] = {0,0,2.5,2.5,5,5,0,2.5,5,7.5,7.5,7.5,0,5};
+/// LUT for number of SS sets per slot indexed by ss index
+uint8_t nr_ss_sets_per_slot_type_0_FR1[16] = {1,2,1,2,1,2,1,2,1,1,1,1,1,1,1,1};
+uint8_t nr_ss_sets_per_slot_type_0_FR2[14] = {1,2,1,2,1,2,2,2,2,1,2,2,1,1};
+/// LUT for monitoring occasions param M indexed by ss index
+uint8_t nr_ss_param_M_type_0_mux1_FR1[16] = {1,0.5,1,0.5,1,0.5,1,0.5,2,2,1,1,1,1,1,1};
+uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5,0.5,2,2};
+/// LUT for SS first symbol index indexed by ss index
+uint8_t nr_ss_first_symb_idx_type_0_mux1_FR1[8] = {0,0,1,2,1,2,1,2};
+
+int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){
+
return (0);
+}
- switch (ccP->tdd_Config->subframeAssignment) {
- case 1:
- switch (subframeP) {
- case 0:
- case 4:
- case 5:
- case 9:
- return (0);
+void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+ nr_scs_e scs_common,
+ nr_scs_e pdcch_scs,
+ nr_frequency_range_e freq_range,
+ uint8_t rmsi_pdcch_config,
+ uint8_t ssb_idx,
+ uint16_t nb_slots_per_frame,
+ uint16_t N_RB)
+{
+ uint8_t O, M;
+ uint8_t ss_idx = rmsi_pdcch_config&0xf;
+ uint8_t cset_idx = (rmsi_pdcch_config>>4)&0xf;
+ uint8_t mu;
+
+ /// Coreset params
+ switch(scs_common) {
+
+ case kHz15:
+ mu = 0;
break;
- case 2:
- case 3:
- case 7:
- case 8:
- return (1);
+
+ case kHz30:
+ mu = 1;
+
+ if (N_RB < 106) { // Minimum 40Mhz bandwidth not satisfied
+ switch(pdcch_scs) {
+ case kHz15:
+ AssertFatal(1==0,"kHz15 not supported yet\n");
+ break;
+
+ case kHz30:
+ pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_params->n_rb = (cset_idx < 10)? 24 : 48;
+ pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
+ pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
+ break;
+
+ default:
+ AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
+ }
+ }
+
+ else {
+ AssertFatal(ss_idx<10 ,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
+ switch(pdcch_scs) {
+ case kHz15:
+ AssertFatal(1==0,"15 kHz SCS not supported yet\n");
+ break;
+
+ case kHz30:
+ pdcch_params->mux_pattern = NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1;
+ pdcch_params->n_rb = (cset_idx < 4)? 24 : 48;
+ pdcch_params->n_symb = nr_coreset_nsymb_pdcch_type_0_b40Mhz[cset_idx];
+ pdcch_params->rb_offset = nr_coreset_rb_offset_pdcch_type_0_b40Mhz[cset_idx];
+ break;
+
+ default:
+ AssertFatal(1==0,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
+ }
+ }
+
+ case kHz60:
+ mu = 2;
break;
- default:
- return (0);
+
+ case kHz120:
+ mu = 3;
break;
- }
- break;
- case 3:
- if ((subframeP <= 1) || (subframeP >= 5))
- return (0);
- else if ((subframeP > 1) && (subframeP < 5))
- return (1);
- else
- AssertFatal(1 == 0, "Unknown subframe number\n");
- break;
- case 4:
- if ((subframeP <= 1) || (subframeP >= 4))
- return (0);
- else if ((subframeP > 1) && (subframeP < 4))
- return (1);
- else
- AssertFatal(1 == 0, "Unknown subframe number\n");
- break;
- case 5:
- if ((subframeP <= 1) || (subframeP >= 3))
- return (0);
- else if ((subframeP > 1) && (subframeP < 3))
- return (1);
- else
- AssertFatal(1 == 0, "Unknown subframe number\n");
- break;
+
default:
- AssertFatal(1 == 0,
- "subframe %d Unsupported TDD configuration %d\n",
- subframeP, (int) ccP->tdd_Config->subframeAssignment);
- break;
+ AssertFatal(1==0,"Invalid common subcarrier spacing %d\n", scs_common);
+
}
+
+ /// Search space params
+ switch(pdcch_params->mux_pattern) {
+
+ case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1:
+ if (freq_range == nr_FR1) {
+ O = nr_ss_param_O_type_0_mux1_FR1[ss_idx];
+ pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR1[ss_idx];
+ M = nr_ss_param_M_type_0_mux1_FR1[ss_idx];
+ pdcch_params->first_symbol = (ss_idx < 8)? ( (ss_idx&1)? pdcch_params->n_symb : 0 ) : nr_ss_first_symb_idx_type_0_mux1_FR1[ss_idx - 8];
+ }
+
+ else {
+ AssertFatal(ss_idx<14 ,"Invalid search space index for multiplexing type 1 and FR2 %d\n", ss_idx);
+ O = nr_ss_param_O_type_0_mux1_FR2[ss_idx];
+ pdcch_params->nb_ss_sets_per_slot = nr_ss_sets_per_slot_type_0_FR2[ss_idx];
+ M = nr_ss_param_M_type_0_mux1_FR2[ss_idx];
+ pdcch_params->first_symbol = (ss_idx < 12)? ( (ss_idx&1)? 7 : 0 ) : 0;
+ }
+ pdcch_params->nb_slots = 2;
+ pdcch_params->sfn_mod2 = ((uint8_t)(floor( (O*pow(2, mu) + floor(ssb_idx*M)) / nb_slots_per_frame )) & 1)? 1 : 0;
+ pdcch_params->first_slot = (uint8_t)(O*pow(2, mu) + floor(ssb_idx*M)) % nb_slots_per_frame;
+
+ break;
+
+ case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2:
+ break;
+
+ case NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3:
+ break;
+
+ default:
+ AssertFatal(1==0, "Invalid SSB and coreset multiplexing pattern %d\n", pdcch_params->mux_pattern);
+ }
+ pdcch_params->config_type = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
+ pdcch_params->cr_mapping_type = NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED;
+ pdcch_params->precoder_granularity = NFAPI_NR_CSET_SAME_AS_REG_BUNDLE;
+ pdcch_params->reg_bundle_size = 6;
+ pdcch_params->interleaver_size = 2;
+ // set initial banwidth part to full bandwidth
+ pdcch_params->n_RB_BWP = N_RB;
+
+
+}
+
+void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+ nfapi_nr_coreset_t* coreset,
+ nfapi_nr_search_space_t* search_space) {
+
+
+}
+
+int get_dlscs(nfapi_nr_config_request_t *cfg) {
+
+ return(cfg->rf_config.dl_subcarrierspacing.value);
+}
+
+
+int get_ulscs(nfapi_nr_config_request_t *cfg) {
+
+ return(cfg->rf_config.ul_subcarrierspacing.value);
+}
+
+int get_spf(nfapi_nr_config_request_t *cfg) {
+
+ int mu = cfg->rf_config.dl_subcarrierspacing.value;
+ AssertFatal(mu>=0&&mu<4,"Illegal scs %d\n",mu);
+
+ return(10 * (1<<mu));
+}
+
+int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot) {
+
+ return(get_spf(cfg)*frame) + slot;
+
}
diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
index c205fa5834de77715aad4499c92932d5ab21160c..784496ff9e50e4db61909fbd40cea4a3ac4dbabb 100644
--- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
@@ -39,14 +39,14 @@ void mac_top_init_gNB(void);
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_id,
int p_gNB,
- int eutra_bandP,
- int dl_CarrierFreqP,
+ int nr_bandP,
+ uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
NR_ServingCellConfigCommon_t *servingcellconfigcommon
);
-int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP);
+int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slotP);
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP,
@@ -59,4 +59,33 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
+
+
+void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
+ frame_t frameP,
+ sub_frame_t subframeP);
+
+
+void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+ nr_scs_e scs_common,
+ nr_scs_e pdcch_scs,
+ nr_frequency_range_e freq_range,
+ uint8_t rmsi_pdcch_config,
+ uint8_t ssb_idx,
+ uint16_t nb_slots_per_frame,
+ uint16_t N_RB);
+
+
+void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
+ nfapi_nr_coreset_t* coreset,
+ nfapi_nr_search_space_t* search_space);
+
+int get_dlscs(nfapi_nr_config_request_t *cfg);
+
+int get_ulscs(nfapi_nr_config_request_t *cfg);
+
+int get_spf(nfapi_nr_config_request_t *cfg);
+
+int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot);
+
#endif /*__LAYER2_NR_MAC_PROTO_H__*/
diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
index 1799721325b0bc948d5219721443e8d8cfbe2e38..3af2a4a7c9051da3e6d96243a2097204a078a18b 100644
--- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
@@ -67,7 +67,7 @@ typedef struct {
int physCellId;
int p_gNB;
int Ncp;
- int eutra_band;
+ int nr_band;
uint32_t dl_CarrierFreq;
NR_BCCH_BCH_Message_t *mib;
TDD_Config_t *tdd_Config;
@@ -107,8 +107,8 @@ typedef struct gNB_MAC_INST_s {
module_id_t Mod_id;
/// frame counter
frame_t frame;
- /// subframe counter
- sub_frame_t subframe;
+ /// slot counter
+ int slot;
/// Pointer to IF module instance for PHY
NR_IF_Module_t *if_inst;
/// Common cell resources
diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
index 05adde0fe44054c4b08363350b67e396fd911148..1bde86873bd3bb29855b32af870babce447c2374 100644
--- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.c
@@ -59,7 +59,7 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
AssertFatal(UL_info->rach_ind.rach_indication_body.number_of_preambles==1,"More than 1 preamble not supported\n");
UL_info->rach_ind.rach_indication_body.number_of_preambles=0;
- LOG_D(MAC,"UL_info[Frame %d, Subframe %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->subframe, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
+ LOG_D(MAC,"UL_info[Frame %d, Slot %d] Calling initiate_ra_proc RACH:SFN/SF:%d\n",UL_info->frame,UL_info->slot, NFAPI_SFNSF2DEC(UL_info->rach_ind.sfn_sf));
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rach_ind.sfn_sf),
@@ -80,12 +80,12 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
for (i=0;i<UL_info->rach_ind_br.rach_indication_body.number_of_preambles;i++) {
AssertFatal(UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type>0,
"Got regular PRACH preamble, not BL/CE\n");
- LOG_D(MAC,"Frame %d, Subframe %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->subframe,
+ LOG_D(MAC,"Frame %d, Slot %d Calling initiate_ra_proc (CE_level %d)\n",UL_info->frame,UL_info->slot,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel13.rach_resource_type-1);
initiate_ra_proc(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
- UL_info->subframe,
+ UL_info->slot,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.preamble,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.timing_advance,
UL_info->rach_ind_br.rach_indication_body.preamble_list[i].preamble_rel8.rnti,
@@ -113,7 +113,7 @@ void handle_nr_sr(NR_UL_IND_t *UL_info) {
SR_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
- UL_info->subframe,
+ UL_info->slot,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].rx_ue_information.rnti,
UL_info->sr_ind.sr_indication_body.sr_pdu_list[i].ul_cqi_information.ul_cqi);
}
@@ -133,7 +133,7 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) {
nfapi_cqi_indication_t ind;
ind.header.message_id = NFAPI_RX_CQI_INDICATION;
- ind.sfn_sf = UL_info->frame<<4 | UL_info->subframe;
+ ind.sfn_sf = UL_info->frame<<4 | UL_info->slot;
ind.cqi_indication_body = UL_info->cqi_ind;
oai_nfapi_cqi_indication(&ind);
@@ -147,7 +147,7 @@ void handle_nr_cqi(NR_UL_IND_t *UL_info) {
cqi_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
- UL_info->subframe,
+ UL_info->slot,
UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti,
&UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
@@ -220,11 +220,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti) {
LOG_D(PHY, "UL_info->crc_ind.crc_indication_body.crc_pdu_list[%d].crc_indication_rel8.crc_flag:%d\n", j, UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag);
if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
- LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
+ LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
- NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
+ NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
@@ -232,11 +232,11 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
else {
- LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->subframe);
+ LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
- NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->subframe,
+ NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
@@ -250,12 +250,12 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
UL_info->crc_ind.crc_indication_body.number_of_crcs=0;
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
- } // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0
+ } // UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->slot && UL_info->crc_ind.crc_indication_body.number_of_crcs>0
else if (UL_info->rx_ind.rx_indication_body.number_of_pdus!=0 || UL_info->crc_ind.crc_indication_body.number_of_crcs!=0) {
LOG_E(PHY,"hoping not to have mis-match between CRC ind and RX ind - hopefully the missing message is coming shortly rx_ind:%d(SFN/SF:%05d) crc_ind:%d(SFN/SF:%05d) UL_info(SFN/SF):%04d%d\n",
UL_info->rx_ind.rx_indication_body.number_of_pdus, NFAPI_SFNSF2DEC(UL_info->rx_ind.sfn_sf),
UL_info->crc_ind.crc_indication_body.number_of_crcs, NFAPI_SFNSF2DEC(UL_info->crc_ind.sfn_sf),
- UL_info->frame, UL_info->subframe);
+ UL_info->frame, UL_info->slot);
}
}
}
@@ -276,7 +276,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
gNB_MAC_INST *mac = RC.nrmac[module_id];
LOG_D(PHY,"SFN/SF:%d%d module_id:%d CC_id:%d UL_info[rx_ind:%d harqs:%d crcs:%d cqis:%d preambles:%d sr_ind:%d]\n",
- UL_info->frame,UL_info->subframe,
+ UL_info->frame,UL_info->slot,
module_id,CC_id,
UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->harq_ind.harq_indication_body.number_of_harqs, UL_info->crc_ind.crc_indication_body.number_of_crcs, UL_info->cqi_ind.number_of_cqis, UL_info->rach_ind.rach_indication_body.number_of_preambles, UL_info->sr_ind.sr_indication_body.number_of_srs);
@@ -284,18 +284,18 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
{
if (ifi->CC_mask==0) {
ifi->current_frame = UL_info->frame;
- ifi->current_subframe = UL_info->subframe;
+ ifi->current_slot = UL_info->slot;
}
else {
AssertFatal(UL_info->frame != ifi->current_frame,"CC_mask %x is not full and frame has changed\n",ifi->CC_mask);
- AssertFatal(UL_info->subframe != ifi->current_subframe,"CC_mask %x is not full and subframe has changed\n",ifi->CC_mask);
+ AssertFatal(UL_info->slot != ifi->current_slot,"CC_mask %x is not full and slot has changed\n",ifi->CC_mask);
}
ifi->CC_mask |= (1<<CC_id);
}
// clear DL/UL info for new scheduling round
- clear_nr_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->subframe);
+ clear_nr_nfapi_information(mac,CC_id,UL_info->frame,UL_info->slot);
handle_nr_rach(UL_info);
@@ -315,24 +315,26 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
/*
eNB_dlsch_ulsch_scheduler(module_id,
- (UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
- (UL_info->subframe+sf_ahead)%10);
+ (UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024,
+ (UL_info->slot+sf_ahead)%10);
*/
-
+ nfapi_nr_config_request_t *cfg = &mac->config[CC_id];
+ int spf = get_spf(cfg);
+
gNB_dlsch_ulsch_scheduler(module_id,
- (UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
- (UL_info->subframe+sf_ahead)%10);
+ (UL_info->frame+((UL_info->slot>(spf-1-sf_ahead))?1:0)) % 1024,
+ (UL_info->slot+sf_ahead)%spf);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
- sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024;
- sched_info->subframe = (UL_info->subframe+sf_ahead)%10;
+ sched_info->frame = (UL_info->frame + ((UL_info->slot>(spf-1-sf_ahead)) ? 1 : 0)) % 1024;
+ sched_info->slot = (UL_info->slot+sf_ahead)%spf;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
- (is_nr_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0))
+ (is_nr_UL_slot(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%spf)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
@@ -352,7 +354,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
ifi->NR_Schedule_response(sched_info);
}
- LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu);
+ LOG_D(PHY,"NR_Schedule_response: SFN_SF:%d%d dl_pdus:%d\n",sched_info->frame,sched_info->slot,sched_info->DL_req->dl_config_request_body.number_pdu);
}
}
}
@@ -374,4 +376,4 @@ NR_IF_Module_t *NR_IF_Module_init(int Mod_id){
"allocation of if_inst[%d]->if_mutex fails\n",Mod_id);
}
return if_inst[Mod_id];
-}
\ No newline at end of file
+}
diff --git a/openair2/NR_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_PHY_INTERFACE/NR_IF_Module.h
index 7849c034fe9679504125867233f6efe63f004b96..63cbd68f227d2c076263d69a976a2e99a95cf077 100644
--- a/openair2/NR_PHY_INTERFACE/NR_IF_Module.h
+++ b/openair2/NR_PHY_INTERFACE/NR_IF_Module.h
@@ -57,8 +57,8 @@ typedef struct{
int CC_id;
/// frame
frame_t frame;
- /// subframe
- sub_frame_t subframe;
+ /// slot
+ slot_t slot;
/// harq indication list
nfapi_harq_indication_t harq_ind;
@@ -88,7 +88,7 @@ typedef struct{
} NR_UL_IND_t;
-// Downlink subframe P7
+// Downlink slot P7
typedef struct{
@@ -98,8 +98,8 @@ typedef struct{
uint8_t CC_id;
/// frame
frame_t frame;
- /// subframe
- sub_frame_t subframe;
+ /// slot
+ slot_t slot;
/// nFAPI DL Config Request
nfapi_nr_dl_config_request_t *DL_req;
/// nFAPI UL Config Request
@@ -123,7 +123,7 @@ typedef struct NR_IF_Module_s{
void (*NR_PHY_config_req)(NR_PHY_Config_t* config_INFO);
uint32_t CC_mask;
uint16_t current_frame;
- uint8_t current_subframe;
+ uint8_t current_slot;
pthread_mutex_t if_mutex;
} NR_IF_Module_t;
@@ -137,4 +137,4 @@ void NR_UL_indication(NR_UL_IND_t *UL_INFO);
/*Interface for Downlink, transmitting the DLSCH SDU, DCI SDU*/
void NR_Schedule_Response(NR_Sched_Rsp_t *Sched_INFO);
-#endif /*_NFAPI_INTERFACE_NR_H_*/
\ No newline at end of file
+#endif /*_NFAPI_INTERFACE_NR_H_*/
diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
index 282a15ca471f7ca70700f1874dc11e4f861672f3..1ea888eeb972cbade1b025d2ce236e61289f0908 100644
--- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
@@ -33,6 +33,7 @@
#include "NR_IF_Module.h"
#include "mac_proto.h"
#include "assertions.h"
+#include "LAYER2/NR_MAC_UE/mac_extern.h"
#include <stdio.h>
@@ -41,217 +42,270 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
-int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
+int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
- return nr_ue_decode_mib( module_id,
- cc_id,
- gNB_index,
- additional_bits,
- ssb_length, // Lssb = 64 is not support
- ssb_index,
- pduP,
- cell_id);
+ return nr_ue_decode_mib( module_id,
+ cc_id,
+ gNB_index,
+ additional_bits,
+ ssb_length, // Lssb = 64 is not support
+ ssb_index,
+ pduP,
+ cell_id);
}
// L2 Abstraction Layer
-int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
+int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
- return 0;
+ return 0;
}
// L2 Abstraction Layer
-int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
+int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
- return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
+ printf("handle_dci: rnti %x,dci_type %d\n",rnti,dci_type);
+ return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
}
// L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len){
-// return 0;
- return nr_ue_process_dlsch( module_id,
- cc_id,
- gNB_index,
- &dci_ind,
- pduP,
- pdu_len);
+ // return 0;
+ return nr_ue_process_dlsch( module_id,
+ cc_id,
+ gNB_index,
+ &dci_ind,
+ pduP,
+ pdu_len);
}
-int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
-
- NR_UE_L2_STATE_t ret;
- module_id_t module_id = ul_info->module_id;
- NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
-
- // clean previous FAPI messages
- mac->tx_request.number_of_pdus = 0;
- mac->ul_config_request.number_pdus = 0;
- mac->dl_config_request.number_pdus = 0;
- // clean previous FAPI messages
-
- ret = nr_ue_scheduler(
- ul_info->module_id,
- ul_info->gNB_index,
- ul_info->cc_id,
- ul_info->frame,
- ul_info->slot,
- ul_info->ssb_index,
- 0, 0); // TODO check tx/rx frame/slot is need for NR version
-
- switch(ret){
- case CONNECTION_OK:
- break;
- case CONNECTION_LOST:
- break;
- case PHY_RESYNCH:
- break;
- case PHY_HO_PRACH:
- break;
- default:
- break;
- }
-
-
- mac->if_module->scheduled_response(&mac->scheduled_response);
-
- return 0;
+int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
+
+ NR_UE_L2_STATE_t ret;
+ module_id_t module_id = ul_info->module_id;
+ NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
+
+ // clean previous FAPI messages
+ mac->tx_request.number_of_pdus = 0;
+ mac->ul_config_request.number_pdus = 0;
+ mac->dl_config_request.number_pdus = 0;
+ // clean previous FAPI messages
+
+ ret = nr_ue_scheduler(
+ ul_info->module_id,
+ ul_info->gNB_index,
+ ul_info->cc_id,
+ ul_info->frame,
+ ul_info->slot,
+ ul_info->ssb_index,
+ 0, 0); // TODO check tx/rx frame/slot is need for NR version
+
+ switch(ret){
+ case CONNECTION_OK:
+ break;
+ case CONNECTION_LOST:
+ break;
+ case PHY_RESYNCH:
+ break;
+ case PHY_HO_PRACH:
+ break;
+ default:
+ break;
+ }
+
+
+ mac->if_module->scheduled_response(&mac->scheduled_response);
+
+ return 0;
}
-int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
+int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
- int32_t i;
- uint32_t ret_mask = 0x0;
- module_id_t module_id = dl_info->module_id;
- NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
-
- // clean up scheduled_response structure
-
-
- if(dl_info->dci_ind != NULL){
- printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
- for(i=0; i<dl_info->dci_ind->number_of_dcis; ++i){
- //printf(">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
- fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
-
- ret_mask |= (handle_dci(
- dl_info->module_id,
- dl_info->cc_id,
- dl_info->gNB_index,
- dci,
- (dl_info->dci_ind->dci_list+i)->rnti,
- (dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
-
-
- /*switch((dl_info->dci_ind->dci_list+i)->dci_type){
- case FAPI_NR_DCI_TYPE_0_0:
- case FAPI_NR_DCI_TYPE_0_1:
- case FAPI_NR_DCI_TYPE_1_1:
- case FAPI_NR_DCI_TYPE_2_0:
- case FAPI_NR_DCI_TYPE_2_1:
- case FAPI_NR_DCI_TYPE_2_2:
- case FAPI_NR_DCI_TYPE_2_3:
- AssertFatal(1==0, "Not yet support at this moment!\n");
- break;
+ int32_t i;
+ uint32_t ret_mask = 0x0;
+ module_id_t module_id = dl_info->module_id;
+ NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
+
+ // clean up scheduled_response structure
+
+
+ if(dl_info->dci_ind != NULL){
+ printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
+ for(i=0; i<dl_info->dci_ind->number_of_dcis; ++i){
+ printf(">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
+ fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
+ /*
+ ret_mask |= (handle_dci(
+ dl_info->module_id,
+ dl_info->cc_id,
+ dl_info->gNB_index,
+ dci,
+ (dl_info->dci_ind->dci_list+i)->rnti,
+ (dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
+ */
+
+ /*switch((dl_info->dci_ind->dci_list+i)->dci_type){
+ case FAPI_NR_DCI_TYPE_0_0:
+ case FAPI_NR_DCI_TYPE_0_1:
+ case FAPI_NR_DCI_TYPE_1_1:
+ case FAPI_NR_DCI_TYPE_2_0:
+ case FAPI_NR_DCI_TYPE_2_1:
+ case FAPI_NR_DCI_TYPE_2_2:
+ case FAPI_NR_DCI_TYPE_2_3:
+ AssertFatal(1==0, "Not yet support at this moment!\n");
+ break;
- case FAPI_NR_DCI_TYPE_1_0:
+ case FAPI_NR_DCI_TYPE_1_0:
- dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
+ dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
- // mapping into DL_CONFIG_REQ for DL-SCH
- fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
+ // mapping into DL_CONFIG_REQ for DL-SCH
+ fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
- dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
- memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
+ dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
+ memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
- dl_config->number_pdus = dl_config->number_pdus + 1;
+ dl_config->number_pdus = dl_config->number_pdus + 1;
- ret_mask |= (handle_dci(
- dl_info->module_id,
- dl_info->cc_id,
- dl_info->gNB_index,
- dci,
- (dl_info->dci_ind->dci_list+i)->rnti,
- (dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
+ ret_mask |= (handle_dci(
+ dl_info->module_id,
+ dl_info->cc_id,
+ dl_info->gNB_index,
+ dci,
+ (dl_info->dci_ind->dci_list+i)->rnti,
+ (dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
- break;
+ break;
- default:
- break;
- }*/
+ default:
+ break;
+ }*/
- //(dl_info->dci_list+i)->rnti
+ //(dl_info->dci_list+i)->rnti
- }
}
-
- if(dl_info->rx_ind != NULL){
- printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
- for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
- switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
- case FAPI_NR_RX_PDU_TYPE_MIB:
- ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
- (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
- (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
- (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
- (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
- (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
- break;
- case FAPI_NR_RX_PDU_TYPE_SIB:
- ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
- (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
- (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
- (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
- break;
- case FAPI_NR_RX_PDU_TYPE_DLSCH:
-// ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
- ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, &dl_info->dci_ind,
- (dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
- (dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
-
- break;
- default:
-
- break;
-
- }
- }
+ }
+
+ if(dl_info->rx_ind != NULL){
+ printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
+ for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
+ switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
+ case FAPI_NR_RX_PDU_TYPE_MIB:
+ ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
+ (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
+ (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
+ (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
+ (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
+ (dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
+ break;
+ case FAPI_NR_RX_PDU_TYPE_SIB:
+ ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
+ (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
+ (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
+ (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
+ break;
+ case FAPI_NR_RX_PDU_TYPE_DLSCH:
+ // ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
+ ret_mask |= (handle_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, dl_info->dci_ind,
+ (dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
+ (dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
+
+ break;
+ default:
+
+ break;
+
+ }
}
+ }
+ //clean up nr_downlink_indication_t *dl_info
+ dl_info->rx_ind = NULL;
+ dl_info->dci_ind = NULL;
- AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
- nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
+ AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
+ nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
- return 0;
+ return 0;
}
nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){
- if (nr_ue_if_module_inst[module_id] == NULL) {
- nr_ue_if_module_inst[module_id] = (nr_ue_if_module_t *)malloc(sizeof(nr_ue_if_module_t));
- memset((void*)nr_ue_if_module_inst[module_id],0,sizeof(nr_ue_if_module_t));
-
- nr_ue_if_module_inst[module_id]->cc_mask=0;
- nr_ue_if_module_inst[module_id]->current_frame = 0;
- nr_ue_if_module_inst[module_id]->current_slot = 0;
- nr_ue_if_module_inst[module_id]->phy_config_request = NULL;
- nr_ue_if_module_inst[module_id]->scheduled_response = NULL;
- nr_ue_if_module_inst[module_id]->dl_indication = nr_ue_dl_indication;
- nr_ue_if_module_inst[module_id]->ul_indication = nr_ue_ul_indication;
- }
+ if (nr_ue_if_module_inst[module_id] == NULL) {
+ nr_ue_if_module_inst[module_id] = (nr_ue_if_module_t *)malloc(sizeof(nr_ue_if_module_t));
+ memset((void*)nr_ue_if_module_inst[module_id],0,sizeof(nr_ue_if_module_t));
+
+ nr_ue_if_module_inst[module_id]->cc_mask=0;
+ nr_ue_if_module_inst[module_id]->current_frame = 0;
+ nr_ue_if_module_inst[module_id]->current_slot = 0;
+ nr_ue_if_module_inst[module_id]->phy_config_request = NULL;
+ nr_ue_if_module_inst[module_id]->scheduled_response = NULL;
+ nr_ue_if_module_inst[module_id]->dl_indication = nr_ue_dl_indication;
+ nr_ue_if_module_inst[module_id]->ul_indication = nr_ue_ul_indication;
+ }
- return nr_ue_if_module_inst[module_id];
+ return nr_ue_if_module_inst[module_id];
}
-int8_t nr_ue_if_module_kill(uint32_t module_id) {
+int nr_ue_if_module_kill(uint32_t module_id) {
+
+ if (nr_ue_if_module_inst[module_id] != NULL){
+ free(nr_ue_if_module_inst[module_id]);
+ }
+ return 0;
+}
- if (nr_ue_if_module_inst[module_id] != NULL){
- free(nr_ue_if_module_inst[module_id]);
- }
- return 0;
+int nr_ue_dcireq(nr_dcireq_t *dcireq) {
+
+ fapi_nr_dl_config_request_t *dl_config=&dcireq->dl_config_req;
+
+ // Type0 PDCCH search space
+ dl_config->number_pdus = 1;
+ dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
+
+ uint64_t mask = 0x0;
+ uint16_t num_rbs=48;
+ uint16_t rb_offset=47;
+ uint16_t cell_id=0;
+ uint16_t num_symbols=2;
+ for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
+ mask = mask >> 1;
+ mask = mask | 0x100000000000;
+ }
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset; // additional parameter other than coreset
+
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_INTERLEAVED;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id;
+
+ uint32_t number_of_search_space_per_slot=1;
+ uint32_t first_symbol_index=0;
+ uint32_t search_space_duration=1; // element of search space
+ uint32_t coreset_duration; // element of coreset
+
+ coreset_duration = num_symbols * number_of_search_space_per_slot;
+
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[0] = table_38213_10_1_1_c2[0];
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[1] = table_38213_10_1_1_c2[1];
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
+
+ dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106;
+
+
}
diff --git a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
index a9b385d8782aed707993a7c999cb43e8af2d7615..0ecba9736d5e4bf15239069e10154684e08f3298 100755
--- a/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
+++ b/openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
@@ -38,6 +38,21 @@
+typedef struct {
+ /// module id
+ module_id_t module_id;
+ /// gNB index
+ uint32_t gNB_index;
+ /// component carrier id
+ int cc_id;
+ /// frame
+ frame_t frame;
+ /// slot
+ int slot;
+
+ fapi_nr_dl_config_request_t dl_config_req;
+} nr_dcireq_t;
+
typedef struct {
/// module id
module_id_t module_id;
@@ -48,7 +63,7 @@ typedef struct {
/// frame
frame_t frame;
/// slot
- uint8_t slot;
+ int slot;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
@@ -72,7 +87,7 @@ typedef struct {
/// slot
uint32_t slot;
/// ssb_index, if ssb is not present in current TTI, thie value set to -1
- int8_t ssb_index;
+ int ssb_index;
} nr_uplink_indication_t;
// Downlink subframe P7
@@ -82,13 +97,13 @@ typedef struct {
/// module id
module_id_t module_id;
/// component carrier id
- uint8_t CC_id;
+ int CC_id;
/// frame
frame_t frame;
/// subframe
sub_frame_t subframe;
/// slot
- uint8_t slot;
+ int slot;
/// NR UE FAPI-like P7 message, direction: L2 to L1
/// downlink transmission configuration request structure
@@ -142,7 +157,7 @@ typedef int8_t (nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
-typedef int8_t (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
+typedef int (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
/*
* Generic type of an application-defined callback to return various
@@ -151,19 +166,21 @@ typedef int8_t (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
-typedef int8_t (nr_ue_ul_indication_f)(nr_uplink_indication_t *ul_info);
+typedef int (nr_ue_ul_indication_f)(nr_uplink_indication_t *ul_info);
+
+typedef int (nr_ue_dcireq_f)(nr_dcireq_t *ul_info);
// TODO check this stuff can be reuse of need modification
typedef struct nr_ue_if_module_s {
- nr_ue_scheduled_response_f *scheduled_response;
- nr_ue_phy_config_request_f *phy_config_request;
- nr_ue_dl_indication_f *dl_indication;
- nr_ue_ul_indication_f *ul_indication;
-
- uint32_t cc_mask;
- uint32_t current_frame;
- uint32_t current_slot;
- //pthread_mutex_t nr_if_mutex;
+ nr_ue_scheduled_response_f *scheduled_response;
+ nr_ue_phy_config_request_f *phy_config_request;
+ nr_ue_dl_indication_f *dl_indication;
+ nr_ue_ul_indication_f *ul_indication;
+ //nr_ue_dcireq_f *dcireq;
+ uint32_t cc_mask;
+ uint32_t current_frame;
+ uint32_t current_slot;
+ //pthread_mutex_t nr_if_mutex;
} nr_ue_if_module_t;
@@ -174,14 +191,16 @@ nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id);
/**\brief done free of memory allocation by module_id and release to pointer pool.
\param module_id module id*/
-int8_t nr_ue_if_module_kill(uint32_t module_id);
+int nr_ue_if_module_kill(uint32_t module_id);
/**\brief interface between L1/L2, indicating the downlink related information, like dci_ind and rx_req
\param dl_info including dci_ind and rx_request messages*/
-int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
+int nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
+
+int nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
-int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
+int nr_ue_dcireq(nr_dcireq_t *dcireq);
// TODO check
/**\brief handle BCCH-BCH message from dl_indication
@@ -190,15 +209,15 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
-int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
+int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
-int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
+int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
-int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
+int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
#endif
diff --git a/openair2/RRC/LTE/MESSAGES/asn1_msg.c b/openair2/RRC/LTE/MESSAGES/asn1_msg.c
index a39746bc2ce112a6f8878a75b9ea3792480b2ab3..c8e1e3157114389d892f84058836d36e82088559 100644
--- a/openair2/RRC/LTE/MESSAGES/asn1_msg.c
+++ b/openair2/RRC/LTE/MESSAGES/asn1_msg.c
@@ -39,7 +39,7 @@
#include <asn_application.h>
#include <asn_internal.h> /* for _ASN_DEFAULT_STACK_MAX */
#include <per_encoder.h>
-
+//#include "COMMON/messages_types.h"
#include "assertions.h"
#include "RRCConnectionRequest.h"
#include "UL-CCCH-Message.h"
diff --git a/openair2/RRC/NR/MESSAGES/asn1_msg.c b/openair2/RRC/NR/MESSAGES/asn1_msg.c
index ca7206744c9673b22f0f6e4430a7b13a1da99ed7..df45ae5e0570ca6275ae44f7a1a5e33b0eb2cad2 100644
--- a/openair2/RRC/NR/MESSAGES/asn1_msg.c
+++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c
@@ -42,7 +42,6 @@
#include "asn1_msg.h"
#include "RRC/NR/nr_rrc_extern.h"
-
#if defined(NR_Rel15)
#include "NR_SCS-SpecificCarrier.h"
#include "NR_TDD-UL-DL-ConfigCommon.h"
diff --git a/openair2/RRC/NR/nr_rrc_defs.h b/openair2/RRC/NR/nr_rrc_defs.h
index 3c72250fa91e67dbdda7f053e09e8ec5a9f30082..2290a409e17b030964cea4038f8add2793b49b95 100644
--- a/openair2/RRC/NR/nr_rrc_defs.h
+++ b/openair2/RRC/NR/nr_rrc_defs.h
@@ -385,8 +385,8 @@ typedef struct {
int Ncp_UL; //cyclic prefix for UL
int p_gNB; //number of tx antenna port
int p_rx_gNB; //number of receiving antenna ports
- uint32_t dl_CarrierFreq; //detected by the UE
- uint32_t ul_CarrierFreq; //detected by the UE
+ uint64_t dl_CarrierFreq; //detected by the UE
+ uint64_t ul_CarrierFreq; //detected by the UE
//are the only static one (memory has been already allocated)
NR_BCCH_BCH_Message_t mib;
diff --git a/openair2/RRC/NR/rrc_gNB.c b/openair2/RRC/NR/rrc_gNB.c
index 7a9c16f699cf27aaa878d54de1bff56c1f7e831b..10fc6b6a4ecb156de1a0c6f5ff42eb8a347e5b10 100644
--- a/openair2/RRC/NR/rrc_gNB.c
+++ b/openair2/RRC/NR/rrc_gNB.c
@@ -265,7 +265,7 @@ static void init_NR_SI(const protocol_ctxt_t* const ctxt_pP,
rrc_mac_config_req_gNB(ctxt_pP->module_id,
CC_id,
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].p_gNB,
- configuration->eutra_band[CC_id],
+ configuration->nr_band[CC_id],
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].dl_CarrierFreq,
configuration->N_RB_DL[CC_id],
(NR_BCCH_BCH_Message_t *)&RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].mib,
diff --git a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
index b197ea7576a0003b11cb9865ccc557ee7cfdbc65..3aaf0c55060cecf80586fb640e3e6e584ac568af 100644
--- a/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
+++ b/targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300.conf
@@ -262,9 +262,9 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
- parallel_config = "PARALLEL_SINGLE_THREAD";
+ parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
- worker_config = "WORKER_DISABLE";
+ worker_config = "WORKER_ENABLE";
}
);
diff --git a/targets/RT/USER/gNB_usrp.gtkw b/targets/RT/USER/gNB_usrp.gtkw
index f7ca2c291ae55ec48f8fe3b738348cff9b5d5ae5..b40f946bc19ac1da645896460832fdf6d710f897 100644
--- a/targets/RT/USER/gNB_usrp.gtkw
+++ b/targets/RT/USER/gNB_usrp.gtkw
@@ -24,9 +24,9 @@ variables.trx_tst[63:0]
functions.eNB_thread_rxtx0
@24
variables.frame_number_RX0_RU[63:0]
-variables.subframe_number_RX0_RU[63:0]
+variables.tti_number_RX0_RU[63:0]
variables.frame_number_TX0_RU[63:0]
-variables.subframe_number_TX0_RU[63:0]
+variables.tti_number_TX0_RU[63:0]
@28
functions.mac_schedule_dlsch
functions.macxface_eNB_dlsch_ulsch_scheduler
@@ -34,16 +34,16 @@ functions.macxface_ue_scheduler
functions.phy_eNB_ofdm_mod_l
@24
variables.frame_number_RX0_gNB[63:0]
-variables.subframe_number_RX0_gNB[63:0]
+variables.slot_number_RX0_gNB[63:0]
variables.frame_number_TX0_gNB[63:0]
-variables.subframe_number_TX0_gNB[63:0]
+variables.slot_number_TX0_gNB[63:0]
@28
functions.gNB_thread_rxtx0
@24
variables.frame_number_RX1_gNB[63:0]
-variables.subframe_number_RX1_gNB[63:0]
+variables.slot_number_RX1_gNB[63:0]
variables.frame_number_TX1_gNB[63:0]
-variables.subframe_number_TX1_gNB[63:0]
+variables.slot_number_TX1_gNB[63:0]
@28
functions.gNB_thread_rxtx1
functions.phy_procedures_ru_feprx0
diff --git a/targets/RT/USER/lte-enb.c b/targets/RT/USER/lte-enb.c
index 79f531df0cfd2b89a846b905b12842f3f58ed5e0..7145974a4a69933ed3ccb991409dfcf7e402de5b 100644
--- a/targets/RT/USER/lte-enb.c
+++ b/targets/RT/USER/lte-enb.c
@@ -453,13 +453,13 @@ void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string,RU_t
proc_rxtx->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx->frame_rx = ru_proc->frame_rx;
- proc_rxtx->subframe_rx = ru_proc->subframe_rx;
+ proc_rxtx->subframe_rx = ru_proc->tti_rx;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > (9-sf_ahead)) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + sf_ahead)%10;
if (rxtx(eNB,proc_rxtx,string) < 0) LOG_E(PHY,"eNB %d CC_id %d failed during execution\n",eNB->Mod_id,eNB->CC_id);
ru_proc->timestamp_tx = proc_rxtx->timestamp_tx;
- ru_proc->subframe_tx = proc_rxtx->subframe_tx;
+ ru_proc->tti_tx = proc_rxtx->subframe_tx;
ru_proc->frame_tx = proc_rxtx->frame_tx;
}
}
@@ -474,24 +474,24 @@ int wakeup_txfh(eNB_rxtx_proc_t *proc,RU_proc_t *ru_proc) {
if(wait_on_condition(&ru_proc->mutex_eNBs,&ru_proc->cond_eNBs,&ru_proc->ru_tx_ready,"wakeup_txfh")<0) {
- LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", ru_proc->frame_tx, ru_proc->subframe_tx);
+ LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", ru_proc->frame_tx, ru_proc->tti_tx);
return(-1);
}
if (release_thread(&ru_proc->mutex_eNBs,&ru_proc->ru_tx_ready,"wakeup_txfh")<0) return(-1);
if (ru_proc->instance_cnt_eNBs == 0) {
- LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->subframe_tx, proc->frame_rx, proc->subframe_rx);
+ LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->tti_tx, proc->frame_rx, proc->subframe_rx);
return(-1);
}
if (pthread_mutex_timedlock(&ru_proc->mutex_eNBs,&wait) != 0) {
- LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->subframe_rx&1,ru_proc->instance_cnt_eNBs );
+ LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->tti_rx&1,ru_proc->instance_cnt_eNBs );
exit_fun( "error locking mutex_eNB" );
return(-1);
}
++ru_proc->instance_cnt_eNBs;
ru_proc->timestamp_tx = proc->timestamp_tx;
- ru_proc->subframe_tx = proc->subframe_tx;
+ ru_proc->tti_tx = proc->subframe_tx;
ru_proc->frame_tx = proc->frame_tx;
// the thread can now be woken up
@@ -622,7 +622,7 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
// and proc->subframe_tx = proc->subframe_rx+sf_ahead
proc_rxtx0->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx0->frame_rx = ru_proc->frame_rx;
- proc_rxtx0->subframe_rx = ru_proc->subframe_rx;
+ proc_rxtx0->subframe_rx = ru_proc->tti_rx;
proc_rxtx0->frame_tx = (proc_rxtx0->subframe_rx > (9-sf_ahead)) ? (proc_rxtx0->frame_rx+1)&1023 : proc_rxtx0->frame_rx;
proc_rxtx0->subframe_tx = (proc_rxtx0->subframe_rx + sf_ahead)%10;
diff --git a/targets/RT/USER/lte-ru.c b/targets/RT/USER/lte-ru.c
index 8ecd0783d5c16e4407c2a2aed0ef40a22f6f09fb..a35c22f4eb244bcf89c44d9687ba916c8f609005 100644
--- a/targets/RT/USER/lte-ru.c
+++ b/targets/RT/USER/lte-ru.c
@@ -311,21 +311,21 @@ int connect_rau(RU_t *ru) {
// southbound IF5 fronthaul for 16-bit OAI format
static inline void fh_if5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
- send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_RRH_GW_DL);
+ send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_RRH_GW_DL);
}
// southbound IF5 fronthaul for Mobipass packet format
static inline void fh_if5_mobipass_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
- send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_MOBIPASS);
+ send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_MOBIPASS);
}
// southbound IF4p5 fronthaul
static inline void fh_if4p5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
- LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.subframe_tx);
- if (subframe_select(ru->frame_parms,ru->proc.subframe_tx)!=SF_UL)
- send_IF4p5(ru,ru->proc.frame_tx, ru->proc.subframe_tx, IF4p5_PDLFFT);
+ LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx);
+ if (subframe_select(ru->frame_parms,ru->proc.tti_tx)!=SF_UL)
+ send_IF4p5(ru,ru->proc.frame_tx, ru->proc.tti_tx, IF4p5_PDLFFT);
}
/*************************************************************/
@@ -340,11 +340,11 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
recv_IF5(ru, &proc->timestamp_rx, *subframe, IF5_RRH_GW_UL);
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_tti*10))&1023;
- proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
+ proc->tti_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
if (proc->first_rx == 0) {
- if (proc->subframe_rx != *subframe){
- LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *subframe){
+ LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*subframe);
exit_fun("Exiting");
}
@@ -355,7 +355,7 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *subframe = proc->tti_rx;
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
@@ -396,16 +396,16 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
} while(proc->symbol_mask[*subframe] != symbol_mask_full);
//caculate timestamp_rx, timestamp_tx based on frame and subframe
- proc->subframe_rx = sf;
+ proc->tti_rx = sf;
proc->frame_rx = f;
- proc->timestamp_rx = ((proc->frame_rx * 10) + proc->subframe_rx ) * fp->samples_per_tti ;
+ proc->timestamp_rx = ((proc->frame_rx * 10) + proc->tti_rx ) * fp->samples_per_tti ;
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_tti);
- proc->subframe_tx = (sf+sf_ahead)%10;
+ proc->tti_tx = (sf+sf_ahead)%10;
proc->frame_tx = (sf>(9-sf_ahead)) ? (f+1)&1023 : f;
if (proc->first_rx == 0) {
- if (proc->subframe_rx != *subframe){
- LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *subframe){
+ LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*subframe);
exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
@@ -415,14 +415,14 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *subframe = proc->tti_rx;
}
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, f );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, sf );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, sf );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
}
proc->symbol_mask[sf] = 0;
@@ -455,22 +455,22 @@ void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *subframe) {
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
int offset_mobipass = 40120;
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
- proc->subframe_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_tti)%10;
+ proc->tti_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_tti)%10;
proc->frame_rx = ((proc->timestamp_rx-offset_mobipass)/(fp->samples_per_tti*10))&1023;
- proc->subframe_rx = (proc->timestamp_rx/fp->samples_per_tti)%10;
+ proc->tti_rx = (proc->timestamp_rx/fp->samples_per_tti)%10;
proc->frame_rx = (proc->timestamp_rx/(10*fp->samples_per_tti))&1023;
if (proc->first_rx == 1) {
proc->first_rx =2;
- *subframe = proc->subframe_rx;
+ *subframe = proc->tti_rx;
*frame = proc->frame_rx;
- LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->subframe_rx);
+ LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->tti_rx);
}
else {
- if (proc->subframe_rx != *subframe) {
+ if (proc->tti_rx != *subframe) {
proc->first_rx++;
- LOG_E(PHY,"[Mobipass]timestamp:%llu, subframe_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->subframe_rx,*subframe, proc->first_rx);
+ LOG_E(PHY,"[Mobipass]timestamp:%llu, tti_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->tti_rx,*subframe, proc->first_rx);
//exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
@@ -479,7 +479,7 @@ void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *subframe) {
// exit_fun("Exiting");
}
// temporary solution
- *subframe = proc->subframe_rx;
+ *subframe = proc->tti_rx;
*frame = proc->frame_rx;
}
@@ -503,15 +503,15 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
prach_rx = 0;
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
- recv_IF4p5(ru, &proc->frame_rx, &proc->subframe_rx, &packet_type, &symbol_number);
+ recv_IF4p5(ru, &proc->frame_rx, &proc->tti_rx, &packet_type, &symbol_number);
// grab first prach information for this new subframe
if (got_prach_info==0) {
- prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx);
+ prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->tti_rx);
got_prach_info = 1;
}
if (proc->first_rx != 0) {
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *subframe = proc->tti_rx;
proc->first_rx = 0;
}
else {
@@ -519,8 +519,8 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
LOG_E(PHY,"frame_rx %d is not what we expect %d\n",proc->frame_rx,*frame);
exit_fun("Exiting");
}
- if (proc->subframe_rx != *subframe) {
- LOG_E(PHY,"subframe_rx %d is not what we expect %d\n",proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *subframe) {
+ LOG_E(PHY,"tti_rx %d is not what we expect %d\n",proc->tti_rx,*subframe);
exit_fun("Exiting");
}
}
@@ -564,7 +564,7 @@ void fh_if4p5_north_in(RU_t *ru,int *frame,int *subframe) {
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, *frame );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, *subframe );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, *subframe );
}
}
@@ -572,23 +572,23 @@ void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
RU_proc_t *proc = &ru->proc;
- int subframe_tx,frame_tx;
+ int tti_tx,frame_tx;
openair0_timestamp timestamp_tx;
recv_IF5(ru, ×tamp_tx, *subframe, IF5_RRH_GW_DL);
- // printf("Received subframe %d (TS %llu) from RCC\n",subframe_tx,timestamp_tx);
+ // printf("Received subframe %d (TS %llu) from RCC\n",tti_tx,timestamp_tx);
- subframe_tx = (timestamp_tx/fp->samples_per_tti)%10;
+ tti_tx = (timestamp_tx/fp->samples_per_tti)%10;
frame_tx = (timestamp_tx/(fp->samples_per_tti*10))&1023;
if (proc->first_tx != 0) {
- *subframe = subframe_tx;
+ *subframe = tti_tx;
*frame = frame_tx;
proc->first_tx = 0;
}
else {
- AssertFatal(subframe_tx == *subframe,
- "subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
+ AssertFatal(tti_tx == *subframe,
+ "tti_tx %d is not what we expect %d\n",tti_tx,*subframe);
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
}
@@ -601,28 +601,28 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
uint16_t packet_type;
uint32_t symbol_number,symbol_mask,symbol_mask_full;
- int subframe_tx,frame_tx;
+ int tti_tx,frame_tx;
LOG_D(PHY, "%s(ru:%p frame, subframe)\n", __FUNCTION__, ru);
symbol_number = 0;
symbol_mask = 0;
symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
do {
- recv_IF4p5(ru, &frame_tx, &subframe_tx, &packet_type, &symbol_number);
- if ((subframe_select(fp,subframe_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
+ recv_IF4p5(ru, &frame_tx, &tti_tx, &packet_type, &symbol_number);
+ if ((subframe_select(fp,tti_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
LOG_D(PHY,"subframe %d (%d): frame %d, subframe %d, symbol %d\n",
- *subframe,subframe_select(fp,*subframe),frame_tx,subframe_tx,symbol_number);
+ *subframe,subframe_select(fp,*subframe),frame_tx,tti_tx,symbol_number);
if (proc->first_tx != 0) {
*frame = frame_tx;
- *subframe = subframe_tx;
+ *subframe = tti_tx;
proc->first_tx = 0;
symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
}
else {
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
- AssertFatal(subframe_tx == *subframe,
- "subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
+ AssertFatal(tti_tx == *subframe,
+ "tti_tx %d is not what we expect %d\n",tti_tx,*subframe);
}
if (packet_type == IF4p5_PDLFFT) {
symbol_mask = symbol_mask | (1<<symbol_number);
@@ -630,20 +630,20 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type);
} while (symbol_mask != symbol_mask_full);
- if (subframe_select(fp,subframe_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
+ if (subframe_select(fp,tti_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
- proc->subframe_tx = subframe_tx;
+ proc->tti_tx = tti_tx;
proc->frame_tx = frame_tx;
- if ((frame_tx == 0)&&(subframe_tx == 0)) proc->frame_tx_unwrap += 1024;
+ if ((frame_tx == 0)&&(tti_tx == 0)) proc->frame_tx_unwrap += 1024;
- proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)subframe_tx) * (uint64_t)fp->samples_per_tti;
+ proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)tti_tx) * (uint64_t)fp->samples_per_tti;
- LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,subframe_tx);
+ LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,tti_tx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, tti_tx );
}
if (ru->feptx_ofdm) ru->feptx_ofdm(ru);
@@ -657,7 +657,7 @@ void fh_if5_north_out(RU_t *ru) {
/// **** send_IF5 of rxdata to BBU **** ///
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 1 );
- send_IF5(ru, proc->timestamp_rx, proc->subframe_rx, &seqno, IF5_RRH_GW_UL);
+ send_IF5(ru, proc->timestamp_rx, proc->tti_rx, &seqno, IF5_RRH_GW_UL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 0 );
}
@@ -667,17 +667,17 @@ void fh_if4p5_north_out(RU_t *ru) {
RU_proc_t *proc=&ru->proc;
LTE_DL_FRAME_PARMS *fp = ru->frame_parms;
- const int subframe = proc->subframe_rx;
- if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
+ const int subframe = proc->tti_rx;
+ if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) {
/// **** in TDD during DL send_IF4 of ULTICK to RCC **** ///
- send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULTICK);
+ send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULTICK);
return;
}
start_meas(&ru->tx_fhaul);
- send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULFFT);
+ send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULFFT);
stop_meas(&ru->tx_fhaul);
}
@@ -780,38 +780,38 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
}
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_tti*10))&1023;
- proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
+ proc->tti_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
// synchronize first reception to frame 0 subframe 0
#ifdef PHY_TX_THREAD
proc->timestamp_phy_tx = proc->timestamp_rx+((sf_ahead-1)*fp->samples_per_tti);
- proc->subframe_phy_tx = (proc->subframe_rx+(sf_ahead-1))%10;
- proc->frame_phy_tx = (proc->subframe_rx>(9-(sf_ahead-1))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
+ proc->subframe_phy_tx = (proc->tti_rx+(sf_ahead-1))%10;
+ proc->frame_phy_tx = (proc->tti_rx>(9-(sf_ahead-1))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
#else
proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_tti);
- proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
- proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
+ proc->tti_tx = (proc->tti_rx+sf_ahead)%10;
+ proc->frame_tx = (proc->tti_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
#endif
//proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_tti);
- //proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
- //proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
+ //proc->subframe_tx = (proc->tti_rx+sf_ahead)%10;
+ //proc->frame_tx = (proc->tti_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, subframe %d\n",
ru->idx,
0,
(unsigned long long int)proc->timestamp_rx,
- (int)ru->ts_offset,proc->frame_rx,proc->subframe_rx);
+ (int)ru->ts_offset,proc->frame_rx,proc->tti_rx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, proc->frame_rx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
}
if (proc->first_rx == 0) {
- if (proc->subframe_rx != *subframe){
- LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *subframe){
+ LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->tti_rx,*subframe);
exit_fun("Exiting");
}
@@ -822,10 +822,10 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *subframe = proc->tti_rx;
}
- //printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->subframe_rx,subframe);
+ //printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->tti_rx,subframe);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
@@ -849,12 +849,12 @@ void tx_rf(RU_t *ru) {
unsigned int txs;
int i;
- T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->subframe_tx),
- T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->subframe_tx * fp->samples_per_tti], fp->samples_per_tti * 4));
+ T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->tti_tx),
+ T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->tti_tx * fp->samples_per_tti], fp->samples_per_tti * 4));
- lte_subframe_t SF_type = subframe_select(fp,proc->subframe_tx%10);
- lte_subframe_t prevSF_type = subframe_select(fp,(proc->subframe_tx+9)%10);
- lte_subframe_t nextSF_type = subframe_select(fp,(proc->subframe_tx+1)%10);
+ lte_subframe_t SF_type = subframe_select(fp,proc->tti_tx%10);
+ lte_subframe_t prevSF_type = subframe_select(fp,(proc->tti_tx+9)%10);
+ lte_subframe_t nextSF_type = subframe_select(fp,(proc->tti_tx+1)%10);
int sf_extension = 0;
if ((SF_type == SF_DL) ||
@@ -892,7 +892,7 @@ void tx_rf(RU_t *ru) {
#endif
for (i=0; i<ru->nb_tx; i++)
- txp[i] = (void*)&ru->common.txdata[i][(proc->subframe_tx*fp->samples_per_tti)-sf_extension];
+ txp[i] = (void*)&ru->common.txdata[i][(proc->tti_tx*fp->samples_per_tti)-sf_extension];
/* add fail safe for late command */
if(late_control!=STATE_BURST_NORMAL){//stop burst
@@ -926,7 +926,7 @@ void tx_rf(RU_t *ru) {
/* add fail safe for late command end */
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (proc->timestamp_tx-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
@@ -940,7 +940,7 @@ void tx_rf(RU_t *ru) {
flags);
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,
- (long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->subframe_tx);
+ (long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
@@ -1033,7 +1033,7 @@ void wakeup_slaves(RU_proc_t *proc) {
int cnt_slave = ++slave_proc->instance_cnt_FH;
slave_proc->frame_rx = proc->frame_rx;
- slave_proc->subframe_rx = proc->subframe_rx;
+ slave_proc->tti_rx = proc->tti_rx;
slave_proc->timestamp_rx = proc->timestamp_rx;
slave_proc->timestamp_tx = proc->timestamp_tx;
@@ -1263,7 +1263,7 @@ void wakeup_eNBs(RU_t *ru) {
char string[20];
sprintf(string,"Incoming RU %d",ru->idx);
LOG_D(PHY,"RU %d Call eNB_top\n",ru->idx);
- ru->eNB_top(eNB_list[0],ru->proc.frame_rx,ru->proc.subframe_rx,string,ru);
+ ru->eNB_top(eNB_list[0],ru->proc.frame_rx,ru->proc.tti_rx,string,ru);
ru->proc.emulate_rf_busy = 0;
}
else {
@@ -1276,7 +1276,7 @@ void wakeup_eNBs(RU_t *ru) {
eNB_list[i]->proc.ru_proc = &ru->proc;
if (ru->wakeup_rxtx!=0 && ru->wakeup_rxtx(eNB_list[i],ru) < 0)
{
- LOG_E(PHY,"could not wakeup eNB rxtx process for subframe %d\n", ru->proc.subframe_rx);
+ LOG_E(PHY,"could not wakeup eNB rxtx process for subframe %d\n", ru->proc.tti_rx);
}
ru->proc.emulate_rf_busy = 0;
}
@@ -1298,12 +1298,12 @@ static inline int wakeup_prach_ru(RU_t *ru) {
if (ru->proc.instance_cnt_prach==-1) {
++ru->proc.instance_cnt_prach;
ru->proc.frame_prach = ru->proc.frame_rx;
- ru->proc.subframe_prach = ru->proc.subframe_rx;
+ ru->proc.subframe_prach = ru->proc.tti_rx;
// DJP - think prach_procedures() is looking at eNB frame_prach
if (ru->eNB_list[0]) {
ru->eNB_list[0]->proc.frame_prach = ru->proc.frame_rx;
- ru->eNB_list[0]->proc.subframe_prach = ru->proc.subframe_rx;
+ ru->eNB_list[0]->proc.subframe_prach = ru->proc.tti_rx;
}
LOG_D(PHY,"RU %d: waking up PRACH thread\n",ru->idx);
// the thread can now be woken up
@@ -1331,7 +1331,7 @@ static inline int wakeup_prach_ru_br(RU_t *ru) {
if (ru->proc.instance_cnt_prach_br==-1) {
++ru->proc.instance_cnt_prach_br;
ru->proc.frame_prach_br = ru->proc.frame_rx;
- ru->proc.subframe_prach_br = ru->proc.subframe_rx;
+ ru->proc.subframe_prach_br = ru->proc.tti_rx;
LOG_D(PHY,"RU %d: waking up PRACH thread\n",ru->idx);
// the thread can now be woken up
@@ -1571,10 +1571,10 @@ static void* ru_thread_tx( void* param ) {
else {
for (int i=0; i<ru->nb_tx; i++) {
if(proc->frame_tx == 2) {
- sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->subframe_tx);
+ sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->tti_tx);
LOG_M(filename,"txdataF_frame",ru->common.txdataF_BF[i],fp->symbols_per_tti*fp->ofdm_symbol_size, 1, 1);
}
- if(proc->frame_tx == 2 && proc->subframe_tx==0){
+ if(proc->frame_tx == 2 && proc->tti_tx==0){
sprintf(filename,"txdata%d_frame%d.m",i,proc->frame_tx);
LOG_M(filename,"txdata_frame",ru->common.txdata[i],fp->samples_per_tti*10, 1, 1);
}
@@ -1748,13 +1748,13 @@ static void* ru_thread( void* param ) {
LOG_D(PHY,"RU thread (do_prach %d, is_prach_subframe %d), received frame %d, subframe %d\n",
ru->do_prach,
- is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx),
- proc->frame_rx,proc->subframe_rx);
- if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx)==1)) {
+ is_prach_subframe(fp, proc->frame_rx, proc->tti_rx),
+ proc->frame_rx,proc->tti_rx);
+ if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->tti_rx)==1)) {
wakeup_prach_ru(ru);
}
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
- else if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx)>1)) {
+ else if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->tti_rx)>1)) {
wakeup_prach_ru_br(ru);
}
#endif
@@ -1817,10 +1817,10 @@ static void* ru_thread( void* param ) {
else {
for (int i=0; i<ru->nb_tx; i++) {
if(proc->frame_tx == 2) {
- sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->subframe_tx);
+ sprintf(filename,"txdataF%d_frame%d_sf%d.m",i,proc->frame_tx,proc->tti_tx);
LOG_M(filename,"txdataF_frame",ru->common.txdataF_BF[i],fp->symbols_per_tti*fp->ofdm_symbol_size, 1, 1);
}
- if(proc->frame_tx == 2 && proc->subframe_tx==0){
+ if(proc->frame_tx == 2 && proc->tti_tx==0){
sprintf(filename,"txdata%d_frame%d.m",i,proc->frame_tx);
LOG_M(filename,"txdata_frame",ru->common.txdata[i],fp->samples_per_tti*10, 1, 1);
}
@@ -2018,7 +2018,7 @@ static void* eNB_thread_phy_tx( void* param ) {
LOG_D(PHY,"Running eNB phy tx procedures\n");
if(ru->num_eNB == 1){
- proc_rxtx.subframe_tx = proc->subframe_phy_tx;
+ proc_rxtx.tti_tx = proc->subframe_phy_tx;
proc_rxtx.frame_tx = proc->frame_phy_tx;
phy_procedures_eNB_TX(eNB_list[0], &proc_rxtx, 1);
phy_tx_txdataF_end = 1;
@@ -2029,7 +2029,7 @@ static void* eNB_thread_phy_tx( void* param ) {
if (ru->proc.instance_cnt_rf_tx==-1) {
++ru->proc.instance_cnt_rf_tx;
ru->proc.frame_tx = proc->frame_phy_tx;
- ru->proc.subframe_tx = proc->subframe_phy_tx;
+ ru->proc.tti_tx = proc->subframe_phy_tx;
ru->proc.timestamp_tx = proc->timestamp_phy_tx;
// the thread can now be woken up
diff --git a/targets/RT/USER/nr-gnb.c b/targets/RT/USER/nr-gnb.c
index 1eb645e0b2438772e2cc8b18fbb16c0209520127..5d8c98d64512124d13ee70cc9aef9e9436fa76f7 100644
--- a/targets/RT/USER/nr-gnb.c
+++ b/targets/RT/USER/nr-gnb.c
@@ -118,8 +118,8 @@ extern openair0_config_t openair0_cfg[MAX_CARDS];
extern int transmission_mode;
+uint16_t sl_ahead=4;
uint16_t sf_ahead=4;
-
//pthread_t main_gNB_thread;
time_stats_t softmodem_stats_mt; // main thread
@@ -168,14 +168,14 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
// I am a PNF and I need to let nFAPI know that we have a (sub)frame tick
uint16_t frame = proc->frame_rx;
- uint16_t subframe = proc->subframe_rx;
+ uint16_t slot = proc->slot_rx;
//add_subframe(&frame, &subframe, 4);
//oai_subframe_ind(proc->frame_tx, proc->subframe_tx);
//LOG_D(PHY, "oai_subframe_ind(frame:%u, subframe:%d) - NOT CALLED ********\n", frame, subframe);
start_meas(&nfapi_meas);
- oai_subframe_ind(frame, subframe);
+ oai_subframe_ind(frame, slot);
stop_meas(&nfapi_meas);
if (gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus||
@@ -190,8 +190,8 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
NFAPI_SFNSF2DEC(gNB->UL_INFO.crc_ind.sfn_sf), gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs,
NFAPI_SFNSF2DEC(gNB->UL_INFO.rach_ind.sfn_sf), gNB->UL_INFO.rach_ind.rach_indication_body.number_of_preambles,
gNB->UL_INFO.cqi_ind.number_of_cqis,
- proc->frame_rx, proc->subframe_rx,
- proc->frame_tx, proc->subframe_tx);
+ proc->frame_rx, proc->slot_rx,
+ proc->frame_tx, proc->slot_tx);
}
}
@@ -200,11 +200,11 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
// ****************************************
// Common RX procedures subframe n
- T(T_GNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx));
+ T(T_GNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->slot_tx));
/*
// if this is IF5 or 3GPP_gNB
if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
- wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->subframe_rx);
+ wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->slot_rx);
}
// UE-specific RX processing for subframe n
@@ -215,7 +215,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = proc->frame_rx;
- gNB->UL_INFO.subframe = proc->subframe_rx;
+ gNB->UL_INFO.slot = proc->slot_rx;
gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id;
@@ -225,7 +225,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
/// end
// *****************************************
- // TX processing for subframe n+sf_ahead
+ // TX processing for subframe n+sl_ahead
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// *****************************************
@@ -238,7 +238,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
stop_meas( &softmodem_stats_rxtx_sf );
- LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, proc->frame_rx, proc->subframe_rx, proc->frame_tx, proc->subframe_tx);
+ LOG_D(PHY,"%s() Exit proc[rx:%d%d tx:%d%d]\n", __FUNCTION__, proc->frame_rx, proc->slot_rx, proc->frame_tx, proc->slot_tx);
#if 0
LOG_D(PHY, "rxtx:%lld nfapi:%lld phy:%lld tx:%lld rx:%lld prach:%lld ofdm:%lld ",
@@ -311,8 +311,8 @@ static void* gNB_L1_thread_tx(void* param) {
// (may be relaxed in the future for performance reasons)
// *****************************************
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,proc->subframe_tx);
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,proc->subframe_rx);
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,proc->slot_tx);
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,proc->frame_rx);
@@ -364,8 +364,8 @@ static void* gNB_L1_thread( void* param ) {
if (wait_on_condition(&proc->mutex,&proc->cond,&proc->instance_cnt,thread_name)<0) break;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0, 1 );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,proc->subframe_tx);
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,proc->subframe_rx);
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,proc->slot_tx);
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_GNB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,proc->frame_rx);
@@ -420,7 +420,7 @@ static void wait_system_ready (char *message, volatile int *start_flag) {
-void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int subframe_rx, char *string, struct RU_t_s *ru)
+void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, char *string, struct RU_t_s *ru)
{
gNB_L1_proc_t *proc = &gNB->proc;
gNB_L1_rxtx_proc_t *L1_proc = &proc->L1_proc;
@@ -428,20 +428,20 @@ void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int subframe_rx, char *string, str
RU_proc_t *ru_proc=&ru->proc;
proc->frame_rx = frame_rx;
- proc->subframe_rx = subframe_rx;
+ proc->slot_rx = slot_rx;
if (!oai_exit) {
- T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
+ T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->slot_rx));
- L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
+ L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sl_ahead*fp->samples_per_slot);
L1_proc->frame_rx = ru_proc->frame_rx;
- L1_proc->subframe_rx = ru_proc->subframe_rx;
- L1_proc->frame_tx = (L1_proc->subframe_rx > (9-sf_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
- L1_proc->subframe_tx = (L1_proc->subframe_rx + sf_ahead)%10;
+ L1_proc->slot_rx = ru_proc->tti_rx;
+ L1_proc->frame_tx = (L1_proc->slot_rx > (fp->slots_per_frame-1-sl_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
+ L1_proc->slot_tx = (L1_proc->slot_rx + sl_ahead)%fp->slots_per_frame;
if (rxtx(gNB,L1_proc,string) < 0) LOG_E(PHY,"gNB %d CC_id %d failed during execution\n",gNB->Mod_id,gNB->CC_id);
ru_proc->timestamp_tx = L1_proc->timestamp_tx;
- ru_proc->subframe_tx = L1_proc->subframe_tx;
+ ru_proc->tti_tx = L1_proc->slot_tx;
ru_proc->frame_tx = L1_proc->frame_tx;
}
}
@@ -455,10 +455,10 @@ int wakeup_txfh(gNB_L1_rxtx_proc_t *proc,PHY_VARS_gNB *gNB) {
struct timespec wait;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
-//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~inside wakeup_txfh %d.%d IC_RU = %d\n", proc->frame_tx, proc->subframe_tx, proc->instance_cnt_RUs);
+//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~inside wakeup_txfh %d.%d IC_RU = %d\n", proc->frame_tx, proc->slot_tx, proc->instance_cnt_RUs);
if(wait_on_condition(&proc->mutex_RUs,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh")<0) {
- LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", proc->frame_tx, proc->subframe_tx);
+ LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", proc->frame_tx, proc->slot_tx);
return(-1);
}
pthread_mutex_lock(&gNB->proc.mutex_RU_tx);
@@ -471,21 +471,21 @@ int wakeup_txfh(gNB_L1_rxtx_proc_t *proc,PHY_VARS_gNB *gNB) {
ru = gNB->RU_list[i];
ru_proc = &ru->proc;
if (ru_proc->instance_cnt_gNBs == 0) {
- LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->subframe_tx, proc->frame_rx, proc->subframe_rx);
+ LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->tti_tx, proc->frame_rx, proc->slot_rx);
return(-1);
}
if (pthread_mutex_timedlock(&ru_proc->mutex_gNBs,&wait) != 0) {
- LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->subframe_rx&1,ru_proc->instance_cnt_gNBs );
+ LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->tti_rx&1,ru_proc->instance_cnt_gNBs );
exit_fun( "error locking mutex_gNB" );
return(-1);
}
ru_proc->instance_cnt_gNBs = 0;
ru_proc->timestamp_tx = proc->timestamp_tx;
- ru_proc->subframe_tx = proc->subframe_tx;
+ ru_proc->tti_tx = proc->slot_tx;
ru_proc->frame_tx = proc->frame_tx;
-
+ LOG_I(PHY,"Signaling tx_thread_fh for %d.%d\n",ru_proc->frame_tx,ru_proc->tti_tx);
// the thread can now be woken up
if (pthread_cond_signal(&ru_proc->cond_gNBs) != 0) {
LOG_E( PHY, "[gNB] ERROR pthread_cond_signal for gNB TXnp4 thread\n");
@@ -524,9 +524,9 @@ int wakeup_tx(PHY_VARS_gNB *gNB) {
L1_proc_tx->instance_cnt = 0;
- L1_proc_tx->subframe_rx = L1_proc->subframe_rx;
+ L1_proc_tx->slot_rx = L1_proc->slot_rx;
L1_proc_tx->frame_rx = L1_proc->frame_rx;
- L1_proc_tx->subframe_tx = L1_proc->subframe_tx;
+ L1_proc_tx->slot_tx = L1_proc->slot_tx;
L1_proc_tx->frame_tx = L1_proc->frame_tx;
L1_proc_tx->timestamp_tx = L1_proc->timestamp_tx;
@@ -557,7 +557,7 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
if (ru == gNB->RU_list[i]) {
if ((proc->RU_mask&(1<<i)) > 0)
LOG_E(PHY,"gNB %d frame %d, subframe %d : previous information from RU %d (num_RU %d,mask %x) has not been served yet!\n",
- gNB->Mod_id,proc->frame_rx,proc->subframe_rx,ru->idx,gNB->num_RU,proc->RU_mask);
+ gNB->Mod_id,proc->frame_rx,proc->slot_rx,ru->idx,gNB->num_RU,proc->RU_mask);
proc->RU_mask |= (1<<i);
}
}
@@ -576,19 +576,19 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
wait.tv_nsec=5000000L;
/* accept some delay in processing - up to 5ms */
- for (i = 0; i < 10 && L1_proc->instance_cnt == 0; i++) {
- LOG_W( PHY,"[gNB] Frame %d Subframe %d, gNB RXn-TXnp4 thread busy!! (cnt %i)\n", L1_proc->frame_tx, L1_proc->subframe_tx, L1_proc->instance_cnt);
- usleep(500);
+ for (i = 0; i < fp->slots_per_frame && L1_proc->instance_cnt == 0; i++) {
+ LOG_W( PHY,"[gNB] SFN.SL %d.%d, gNB RXn-TXnp4 thread busy!! (i %d, cnt %i)\n", L1_proc->frame_tx, L1_proc->slot_tx, i,L1_proc->instance_cnt);
+ usleep(100);
}
if (L1_proc->instance_cnt == 0) {
exit_fun( "TX thread busy" );
return(-1);
}
- // wake up TX for subframe n+sf_ahead
+ // wake up TX for subframe n+sl_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) {
- LOG_E( PHY, "[gNB] ERROR pthread_mutex_lock for gNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt );
+ LOG_E( PHY, "[gNB] ERROR pthread_mutex_lock for gNB RXTX thread %d (IC %d)\n", L1_proc->slot_rx&1,L1_proc->instance_cnt );
exit_fun( "error locking mutex" );
return(-1);
}
@@ -599,15 +599,15 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
// transmitted timestamp of the next TX slot (first).
// The last (TS_rx mod samples_per_frame) was n*samples_per_tti,
- // we want to generate subframe (n+sf_ahead), so TS_tx = TX_rx+sf_ahead*samples_per_tti,
- // and proc->subframe_tx = proc->subframe_rx+sf_ahead
- L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
+ // we want to generate subframe (n+sl_ahead), so TS_tx = TX_rx+sl_ahead*samples_per_tti,
+ // and proc->slot_tx = proc->slot_rx+sl_ahead
+ L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sl_ahead*fp->samples_per_slot);
L1_proc->frame_rx = ru_proc->frame_rx;
- L1_proc->subframe_rx = ru_proc->subframe_rx;
- L1_proc->frame_tx = (L1_proc->subframe_rx > (9-sf_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
- L1_proc->subframe_tx = (L1_proc->subframe_rx + sf_ahead)%10;
+ L1_proc->slot_rx = ru_proc->tti_rx;
+ L1_proc->frame_tx = (L1_proc->slot_rx > (fp->slots_per_frame-1-sl_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
+ L1_proc->slot_tx = (L1_proc->slot_rx + sl_ahead)%fp->slots_per_frame;
-//printf("~~~~~~~~~~~~~~~~~~~~~~passing parameter IC = %d, RX: %d.%d, TX: %d.%d to L1 sf_ahead = %d\n", L1_proc->instance_cnt, L1_proc->frame_rx, L1_proc->subframe_rx, L1_proc->frame_tx, L1_proc->subframe_tx, sf_ahead);
+ LOG_I(PHY,"wakeupL1: passing parameter IC = %d, RX: %d.%d, TX: %d.%d to L1 sl_ahead = %d\n", L1_proc->instance_cnt, L1_proc->frame_rx, L1_proc->slot_rx, L1_proc->frame_tx, L1_proc->slot_tx, sl_ahead);
// the thread can now be woken up
if (pthread_cond_signal(&L1_proc->cond) != 0) {
@@ -925,7 +925,6 @@ void init_eNB_afterRU(void) {
// map antennas and PRACH signals to gNB RX
if (0) AssertFatal(gNB->num_RU>0,"Number of RU attached to gNB %d is zero\n",gNB->Mod_id);
LOG_I(PHY,"Mapping RX ports from %d RUs to gNB %d\n",gNB->num_RU,gNB->Mod_id);
- gNB->gNB_config.rf_config.tx_antenna_ports.value = 0;
//LOG_I(PHY,"Overwriting gNB->prach_vars.rxsigF[0]:%p\n", gNB->prach_vars.rxsigF[0]);
@@ -934,7 +933,6 @@ void init_eNB_afterRU(void) {
LOG_I(PHY,"gNB->num_RU:%d\n", gNB->num_RU);
for (ru_id=0,aa=0;ru_id<gNB->num_RU;ru_id++) {
- gNB->gNB_config.rf_config.tx_antenna_ports.value += gNB->RU_list[ru_id]->nb_rx;
AssertFatal(gNB->RU_list[ru_id]->common.rxdataF!=NULL,
"RU %d : common.rxdataF is NULL\n",
@@ -957,29 +955,7 @@ void init_eNB_afterRU(void) {
* In monolithic mode, we come here with nb_antennas_rx == 0
* (not tested in other modes).
*/
- if (gNB->gNB_config.rf_config.tx_antenna_ports.value < 1)
- {
- LOG_I(PHY, "%s() ************* DJP ***** gNB->gNB_config.rf_config.tx_antenna_ports:%d - GOING TO HARD CODE TO 1", __FUNCTION__, gNB->gNB_config.rf_config.tx_antenna_ports.value);
- gNB->gNB_config.rf_config.tx_antenna_ports.value = 1;
- }
- else
- {
- //LOG_I(PHY," Delete code\n");
- }
-
- if (gNB->gNB_config.rf_config.tx_antenna_ports.value < 1)
- {
- LOG_I(PHY, "%s() ************* DJP ***** gNB->gNB_config.rf_config.tx_antenna_ports:%d - GOING TO HARD CODE TO 1", __FUNCTION__, gNB->gNB_config.rf_config.tx_antenna_ports.value);
- gNB->gNB_config.rf_config.tx_antenna_ports.value = 1;
- }
- else
- {
- //LOG_I(PHY," Delete code\n");
- }
- AssertFatal(gNB->gNB_config.rf_config.tx_antenna_ports.value >0,
- "inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,gNB->gNB_config.rf_config.tx_antenna_ports.value);
- LOG_I(PHY,"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,gNB->gNB_config.rf_config.tx_antenna_ports.value);
//init_precoding_weights(RC.gNB[inst][CC_id]);
}
init_gNB_proc(inst);
diff --git a/targets/RT/USER/nr-ru.c b/targets/RT/USER/nr-ru.c
index 0e9107469170137b5731d675e1a75fdbcb3b0a78..af3916604e519a52fe94cfcf66125c474d81ac06 100644
--- a/targets/RT/USER/nr-ru.c
+++ b/targets/RT/USER/nr-ru.c
@@ -7,7 +7,6 @@
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
-
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
@@ -135,7 +134,7 @@ int attach_rru(RU_t *ru);
int connect_rau(RU_t *ru);
-extern uint16_t sf_ahead;
+extern uint16_t sl_ahead;
extern int emulate_rf;
extern int numerology;
@@ -309,40 +308,40 @@ int connect_rau(RU_t *ru) {
// southbound IF5 fronthaul for 16-bit OAI format
static inline void fh_if5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
- send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_RRH_GW_DL);
+ send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_RRH_GW_DL);
}
// southbound IF5 fronthaul for Mobipass packet format
static inline void fh_if5_mobipass_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
- send_IF5(ru, ru->proc.timestamp_tx, ru->proc.subframe_tx, &ru->seqno, IF5_MOBIPASS);
+ send_IF5(ru, ru->proc.timestamp_tx, ru->proc.tti_tx, &ru->seqno, IF5_MOBIPASS);
}
// southbound IF4p5 fronthaul
static inline void fh_if4p5_south_out(RU_t *ru) {
if (ru == RC.ru[0]) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, ru->proc.timestamp_tx&0xffffffff );
- LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.subframe_tx);
- if (nr_subframe_select(&ru->gNB_list[0]->gNB_config,ru->proc.subframe_tx)!=SF_UL)
- send_IF4p5(ru,ru->proc.frame_tx, ru->proc.subframe_tx, IF4p5_PDLFFT);
+ LOG_D(PHY,"Sending IF4p5 for frame %d subframe %d\n",ru->proc.frame_tx,ru->proc.tti_tx);
+ if (nr_slot_select(&ru->gNB_list[0]->gNB_config,ru->proc.tti_tx)!=SF_UL)
+ send_IF4p5(ru,ru->proc.frame_tx, ru->proc.tti_tx, IF4p5_PDLFFT);
}
/*************************************************************/
/* Input Fronthaul from south RCC/RAU */
// Synchronous if5 from south
-void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
+void fh_if5_south_in(RU_t *ru,int *frame, int *tti) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
- recv_IF5(ru, &proc->timestamp_rx, *subframe, IF5_RRH_GW_UL);
+ recv_IF5(ru, &proc->timestamp_rx, *tti, IF5_RRH_GW_UL);
- proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
- proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_subframe)%10;
+ proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*20))&1023;
+ proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%20;
if (proc->first_rx == 0) {
- if (proc->subframe_rx != *subframe){
- LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *tti){
+ LOG_E(PHY,"Received Timestamp doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*tti);
exit_fun("Exiting");
}
@@ -353,7 +352,7 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *tti = proc->tti_rx;
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
@@ -361,49 +360,49 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *subframe) {
}
// Synchronous if4p5 from south
-void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
+void fh_if4p5_south_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
- int f,sf;
+ int f,sl;
uint16_t packet_type;
uint32_t symbol_number=0;
uint32_t symbol_mask_full=0;
/*
- if ((fp->frame_type == TDD) && (subframe_select(fp,*subframe)==SF_S))
+ if ((fp->frame_type == TDD) && (subframe_select(fp,*slot)==SF_S))
symbol_mask_full = (1<<fp->ul_symbols_in_S_subframe)-1;
else
- symbol_mask_full = (1<<fp->symbols_per_tti)-1;
+ symbol_mask_full = (1<<fp->symbols_per_slot)-1;
- AssertFatal(proc->symbol_mask[*subframe]==0,"rx_fh_if4p5: proc->symbol_mask[%d] = %x\n",*subframe,proc->symbol_mask[*subframe]);*/
+ AssertFatal(proc->symbol_mask[*slot]==0,"rx_fh_if4p5: proc->symbol_mask[%d] = %x\n",*slot,proc->symbol_mask[*slot]);*/
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
- recv_IF4p5(ru, &f, &sf, &packet_type, &symbol_number);
+ recv_IF4p5(ru, &f, &sl, &packet_type, &symbol_number);
- if (packet_type == IF4p5_PULFFT) proc->symbol_mask[sf] = proc->symbol_mask[sf] | (1<<symbol_number);
+ if (packet_type == IF4p5_PULFFT) proc->symbol_mask[sl] = proc->symbol_mask[sl] | (1<<symbol_number);
else if (packet_type == IF4p5_PULTICK) {
if ((proc->first_rx==0) && (f!=*frame)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received frame %d != expected %d\n",f,*frame);
- if ((proc->first_rx==0) && (sf!=*subframe)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received subframe %d != expected %d (first_rx %d)\n",sf,*subframe,proc->first_rx);
+ if ((proc->first_rx==0) && (sl!=*slot)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received subframe %d != expected %d (first_rx %d)\n",sl,*slot,proc->first_rx);
break;
} else if (packet_type == IF4p5_PRACH) {
// nothing in RU for RAU
}
- LOG_D(PHY,"rx_fh_if4p5: subframe %d symbol mask %x\n",*subframe,proc->symbol_mask[*subframe]);
- } while(proc->symbol_mask[*subframe] != symbol_mask_full);
+ LOG_D(PHY,"rx_fh_if4p5: subframe %d symbol mask %x\n",*slot,proc->symbol_mask[sl]);
+ } while(proc->symbol_mask[sl] != symbol_mask_full);
//caculate timestamp_rx, timestamp_tx based on frame and subframe
- proc->subframe_rx = sf;
+ proc->tti_rx = sl;
proc->frame_rx = f;
- proc->timestamp_rx = ((proc->frame_rx * 10) + proc->subframe_rx ) * fp->samples_per_subframe ;
+ proc->timestamp_rx = ((proc->frame_rx * fp->slots_per_frame) + proc->tti_rx ) * fp->samples_per_slot ;
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_subframe);
- proc->subframe_tx = (sf+sf_ahead)%10;
- proc->frame_tx = (sf>(9-sf_ahead)) ? (f+1)&1023 : f;
+ proc->tti_tx = (sl+sl_ahead)%fp->slots_per_frame;
+ proc->frame_tx = (sl>(fp->slots_per_frame-sl_ahead)) ? (f+1)&1023 : f;
if (proc->first_rx == 0) {
- if (proc->subframe_rx != *subframe){
- LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *slot){
+ LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*slot);
exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
@@ -413,81 +412,23 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *slot = proc->tti_rx;
}
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, f );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, sf );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, sl);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
}
- proc->symbol_mask[sf] = 0;
+ proc->symbol_mask[proc->tti_rx] = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
LOG_D(PHY,"RU %d: fh_if4p5_south_in sleeping ...\n",ru->idx);
- usleep(100);
-}
-
-// Dummy FH from south for getting synchronization from master RU
-void fh_slave_south_in(RU_t *ru,int *frame,int *subframe) {
- // This case is for synchronization to another thread
- // it just waits for an external event. The actual rx_fh is handle by the asynchronous RX thread
- RU_proc_t *proc=&ru->proc;
-
- if (wait_on_condition(&proc->mutex_FH,&proc->cond_FH,&proc->instance_cnt_FH,"fh_slave_south_in") < 0)
- return;
-
- release_thread(&proc->mutex_FH,&proc->instance_cnt_FH,"rx_fh_slave_south_in");
-
-
}
-// asynchronous inbound if5 fronthaul from south (Mobipass)
-void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *subframe) {
-
- RU_proc_t *proc = &ru->proc;
- NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
-
- recv_IF5(ru, &proc->timestamp_rx, *subframe, IF5_MOBIPASS);
- pthread_mutex_lock(&proc->mutex_asynch_rxtx);
- int offset_mobipass = 40120;
- pthread_mutex_lock(&proc->mutex_asynch_rxtx);
- proc->subframe_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_subframe)%10;
- proc->frame_rx = ((proc->timestamp_rx-offset_mobipass)/(fp->samples_per_subframe*10))&1023;
-
- proc->subframe_rx = (proc->timestamp_rx/fp->samples_per_subframe)%10;
- proc->frame_rx = (proc->timestamp_rx/(10*fp->samples_per_subframe))&1023;
-
- if (proc->first_rx == 1) {
- proc->first_rx =2;
- *subframe = proc->subframe_rx;
- *frame = proc->frame_rx;
- LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->subframe_rx);
- }
- else {
- if (proc->subframe_rx != *subframe) {
- proc->first_rx++;
- LOG_E(PHY,"[Mobipass]timestamp:%llu, subframe_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->subframe_rx,*subframe, proc->first_rx);
- //exit_fun("Exiting");
- }
- if (proc->frame_rx != *frame) {
- proc->first_rx++;
- LOG_E(PHY,"[Mobipass]timestamp:%llu, frame_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,*frame, proc->first_rx);
- // exit_fun("Exiting");
- }
- // temporary solution
- *subframe = proc->subframe_rx;
- *frame = proc->frame_rx;
- }
-
- pthread_mutex_unlock(&proc->mutex_asynch_rxtx);
-
-
-} // gNodeB_3GPP_BBU
-
// asynchronous inbound if4p5 fronthaul from south
-void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
+void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
@@ -497,19 +438,19 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
// uint32_t got_prach_info=0;
symbol_number = 0;
- symbol_mask = (1<<(fp->symbols_per_slot * fp->slots_per_subframe))-1;
+ symbol_mask = (1<<(fp->symbols_per_slot))-1;
prach_rx = 0;
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
- recv_IF4p5(ru, &proc->frame_rx, &proc->subframe_rx, &packet_type, &symbol_number);
+ recv_IF4p5(ru, &proc->frame_rx, &proc->tti_rx, &packet_type, &symbol_number);
// grab first prach information for this new subframe
/*if (got_prach_info==0) {
- prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx);
+ prach_rx = is_prach_subframe(fp, proc->frame_rx, proc->tti_rx);
got_prach_info = 1;
}*/
if (proc->first_rx != 0) {
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *slot = proc->tti_rx;
proc->first_rx = 0;
}
else {
@@ -517,8 +458,8 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
LOG_E(PHY,"frame_rx %d is not what we expect %d\n",proc->frame_rx,*frame);
exit_fun("Exiting");
}
- if (proc->subframe_rx != *subframe) {
- LOG_E(PHY,"subframe_rx %d is not what we expect %d\n",proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *slot) {
+ LOG_E(PHY,"tti_rx %d is not what we expect %d\n",proc->tti_rx,*slot);
exit_fun("Exiting");
}
}
@@ -536,7 +477,7 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *subframe) {
// RRU IF4p5 TX fronthaul receiver. Assumes an if_device on input and if or rf device on output
// receives one subframe's worth of IF4p5 OFDM symbols and OFDM modulates
-void fh_if4p5_north_in(RU_t *ru,int *frame,int *subframe) {
+void fh_if4p5_north_in(RU_t *ru,int *frame,int *slot) {
uint32_t symbol_number=0;
uint32_t symbol_mask, symbol_mask_full;
@@ -546,47 +487,47 @@ void fh_if4p5_north_in(RU_t *ru,int *frame,int *subframe) {
/// **** incoming IF4p5 from remote RCC/RAU **** ///
symbol_number = 0;
symbol_mask = 0;
- symbol_mask_full = (1<<(ru->nr_frame_parms->symbols_per_slot* ru->nr_frame_parms->slots_per_subframe))-1;
+ symbol_mask_full = (1<<(ru->nr_frame_parms->symbols_per_slot))-1;
do {
- recv_IF4p5(ru, frame, subframe, &packet_type, &symbol_number);
+ recv_IF4p5(ru, frame, slot, &packet_type, &symbol_number);
symbol_mask = symbol_mask | (1<<symbol_number);
} while (symbol_mask != symbol_mask_full);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, *frame );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, *subframe );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, *slot );
}
}
-void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
+void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
- int subframe_tx,frame_tx;
+ int tti_tx,frame_tx;
openair0_timestamp timestamp_tx;
- recv_IF5(ru, ×tamp_tx, *subframe, IF5_RRH_GW_DL);
- // printf("Received subframe %d (TS %llu) from RCC\n",subframe_tx,timestamp_tx);
+ recv_IF5(ru, ×tamp_tx, *slot, IF5_RRH_GW_DL);
+ // printf("Received subframe %d (TS %llu) from RCC\n",tti_tx,timestamp_tx);
- subframe_tx = (timestamp_tx/fp->samples_per_subframe)%10;
- frame_tx = (timestamp_tx/(fp->samples_per_subframe*10))&1023;
+ tti_tx = (timestamp_tx/fp->samples_per_slot)%fp->slots_per_frame;
+ frame_tx = (timestamp_tx/(fp->samples_per_slot*fp->slots_per_frame))&1023;
if (proc->first_tx != 0) {
- *subframe = subframe_tx;
+ *slot = tti_tx;
*frame = frame_tx;
proc->first_tx = 0;
}
else {
- AssertFatal(subframe_tx == *subframe,
- "subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
+ AssertFatal(tti_tx == *slot,
+ "tti_tx %d is not what we expect %d\n",tti_tx,*slot);
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
}
}
-void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
+void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
@@ -594,28 +535,28 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
uint16_t packet_type;
uint32_t symbol_number,symbol_mask,symbol_mask_full=0;
- int subframe_tx,frame_tx;
+ int slot_tx,frame_tx;
LOG_D(PHY, "%s(ru:%p frame, subframe)\n", __FUNCTION__, ru);
symbol_number = 0;
symbol_mask = 0;
-// symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
+// symbol_mask_full = ((subframe_select(fp,*slot) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_slot))-1;
do {
- recv_IF4p5(ru, &frame_tx, &subframe_tx, &packet_type, &symbol_number);
- if ((nr_subframe_select(cfg,subframe_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
+ recv_IF4p5(ru, &frame_tx, &slot_tx, &packet_type, &symbol_number);
+ if ((nr_slot_select(cfg,slot_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
LOG_D(PHY,"subframe %d (%d): frame %d, subframe %d, symbol %d\n",
- *subframe,nr_subframe_select(cfg,*subframe),frame_tx,subframe_tx,symbol_number);
+ *slot,nr_slot_select(cfg,*slot),frame_tx,slot_tx,symbol_number);
if (proc->first_tx != 0) {
- *frame = frame_tx;
- *subframe = subframe_tx;
+ *frame = frame_tx;
+ *slot = slot_tx;
proc->first_tx = 0;
- //symbol_mask_full = ((subframe_select(fp,*subframe) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
+ //symbol_mask_full = ((subframe_select(fp,*slot) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_slot))-1;
}
else {
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
- AssertFatal(subframe_tx == *subframe,
- "subframe_tx %d is not what we expect %d\n",subframe_tx,*subframe);
+ AssertFatal(slot_tx == *slot,
+ "slot_tx %d is not what we expect %d\n",slot_tx,*slot);
}
if (packet_type == IF4p5_PDLFFT) {
symbol_mask = symbol_mask | (1<<symbol_number);
@@ -623,20 +564,20 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type);
} while (symbol_mask != symbol_mask_full);
- if (nr_subframe_select(cfg,subframe_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
+ if (nr_slot_select(cfg,slot_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
- proc->subframe_tx = subframe_tx;
+ proc->tti_tx = slot_tx;
proc->frame_tx = frame_tx;
- if ((frame_tx == 0)&&(subframe_tx == 0)) proc->frame_tx_unwrap += 1024;
+ if ((frame_tx == 0)&&(slot_tx == 0)) proc->frame_tx_unwrap += 1024;
- proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)subframe_tx) * (uint64_t)fp->samples_per_subframe;
+ proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * fp->slots_per_frame) + (uint64_t)slot_tx) * (uint64_t)fp->samples_per_slot;
- LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,subframe_tx);
+ LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,slot_tx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot_tx );
}
if (ru->feptx_ofdm) ru->feptx_ofdm(ru);
@@ -650,7 +591,7 @@ void fh_if5_north_out(RU_t *ru) {
/// **** send_IF5 of rxdata to BBU **** ///
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 1 );
- send_IF5(ru, proc->timestamp_rx, proc->subframe_rx, &seqno, IF5_RRH_GW_UL);
+ send_IF5(ru, proc->timestamp_rx, proc->tti_rx, &seqno, IF5_RRH_GW_UL);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF5, 0 );
}
@@ -660,17 +601,17 @@ void fh_if4p5_north_out(RU_t *ru) {
RU_proc_t *proc=&ru->proc;
//NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
- //const int subframe = proc->subframe_rx;
- if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
+ //const int subframe = proc->tti_rx;
+ if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
/*
if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) {
/// **** in TDD during DL send_IF4 of ULTICK to RCC **** ///
- send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULTICK);
+ send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULTICK);
return;
}*/
start_meas(&ru->tx_fhaul);
- send_IF4p5(ru, proc->frame_rx, proc->subframe_rx, IF4p5_PULFFT);
+ send_IF4p5(ru, proc->frame_rx, proc->tti_rx, IF4p5_PULFFT);
stop_meas(&ru->tx_fhaul);
}
@@ -703,7 +644,7 @@ static void* emulatedRF_thread(void* param) {
return 0;
}
-void rx_rf(RU_t *ru,int *frame,int *subframe) {
+void rx_rf(RU_t *ru,int *frame,int *slot) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
@@ -711,25 +652,28 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
unsigned int rxs;
int i;
openair0_timestamp ts,old_ts;
-
+
+ AssertFatal(*slot<fp->slots_per_frame && *slot>=0, "slot %d is illegal (%d)\n",*slot,fp->slots_per_frame);
for (i=0; i<ru->nb_rx; i++)
- rxp[i] = (void*)&ru->common.rxdata[i][*subframe*fp->samples_per_subframe];
+ rxp[i] = (void*)&ru->common.rxdata[i][*slot*fp->samples_per_slot];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1 );
old_ts = proc->timestamp_rx;
+ LOG_I(PHY,"Reading %d samples for slot %d (%p)\n",fp->samples_per_slot,*slot,rxp[0]);
+
if(emulate_rf){
wait_on_condition(&proc->mutex_emulateRF,&proc->cond_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
release_thread(&proc->mutex_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
- rxs = fp->samples_per_subframe;
+ rxs = fp->samples_per_slot;
ts = old_ts + rxs;
}
else{
rxs = ru->rfdevice.trx_read_func(&ru->rfdevice,
&ts,
rxp,
- fp->samples_per_subframe,
+ fp->samples_per_slot,
ru->nb_rx);
}
@@ -739,43 +683,43 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
//AssertFatal(rxs == fp->samples_per_subframe,
//"rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_subframe,rxs);
- if (rxs != fp->samples_per_subframe) LOG_E(PHY, "rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_subframe,rxs);
+ if (rxs != fp->samples_per_slot) LOG_E(PHY, "rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_slot,rxs);
if (proc->first_rx == 1) {
ru->ts_offset = proc->timestamp_rx;
proc->timestamp_rx = 0;
}
else {
- if (proc->timestamp_rx - old_ts != fp->samples_per_subframe) {
- LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_subframe,ru->ts_offset);
- ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_subframe);
+ if (proc->timestamp_rx - old_ts != fp->samples_per_slot) {
+ LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_slot,ru->ts_offset);
+ ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_slot);
proc->timestamp_rx = ts-ru->ts_offset;
}
}
- proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
- proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_subframe)%10;
+ proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*fp->slots_per_frame))&1023;
+ proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%fp->slots_per_frame;
// synchronize first reception to frame 0 subframe 0
- proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_subframe);
- proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
- proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
+ proc->timestamp_tx = proc->timestamp_rx+(sl_ahead*fp->samples_per_slot);
+ proc->tti_tx = (proc->tti_rx+sl_ahead)%fp->slots_per_frame;
+ proc->frame_tx = (proc->tti_rx>(fp->slots_per_frame-1-sl_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
- LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, subframe %d\n",
+ LOG_I(PHY,"RU %d/%d TS %llu (off %d), frame %d, slot %d.%d / %d\n",
ru->idx,
0,
(unsigned long long int)proc->timestamp_rx,
- (int)ru->ts_offset,proc->frame_rx,proc->subframe_rx);
+ (int)ru->ts_offset,proc->frame_rx,proc->tti_rx,proc->tti_tx,fp->slots_per_frame);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, proc->frame_rx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->subframe_rx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
}
if (proc->first_rx == 0) {
- if (proc->subframe_rx != *subframe){
- LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->subframe_rx,*subframe);
+ if (proc->tti_rx != *slot){
+ LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->tti_rx,*slot);
exit_fun("Exiting");
}
@@ -786,14 +730,14 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
- *subframe = proc->subframe_rx;
+ *slot = proc->tti_rx;
}
- //printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->subframe_rx,subframe);
+ //printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->tti_rx,subframe);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
- if (rxs != fp->samples_per_subframe)
+ if (rxs != fp->samples_per_slot)
{
//exit_fun( "problem receiving samples" );
LOG_E(PHY, "problem receiving samples\n");
@@ -810,18 +754,17 @@ void tx_rf(RU_t *ru) {
unsigned int txs;
int i;
- T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->subframe_tx),
- T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->subframe_tx * fp->samples_per_subframe], fp->samples_per_subframe * 4));
+ T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->tti_tx),
+ T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->tti_tx * fp->samples_per_slot], fp->samples_per_slot * 4));
- nr_subframe_t SF_type = nr_subframe_select(cfg,proc->subframe_tx%10);
- /*nr_subframe_t prevSF_type = nr_subframe_select(cfg,(proc->subframe_tx+9)%10);
- nr_subframe_t nextSF_type = nr_subframe_select(cfg,(proc->subframe_tx+1)%10);*/
+ nr_subframe_t SF_type = nr_slot_select(cfg,proc->tti_tx%fp->slots_per_frame);
int sf_extension = 0;
if ((SF_type == SF_DL) ||
(SF_type == SF_S)) {
+
+ int siglen=fp->samples_per_slot,flags=1;
- int siglen=fp->samples_per_subframe,flags=1;
/*
if (SF_type == SF_S) {
siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0);
@@ -843,11 +786,12 @@ void tx_rf(RU_t *ru) {
sf_extension = ru->N_TA_offset<<1;
} */
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
for (i=0; i<ru->nb_tx; i++)
- txp[i] = (void*)&ru->common.txdata[i][(proc->subframe_tx*fp->samples_per_subframe)-sf_extension];
-
+
+ txp[i] = (void*)&ru->common.txdata[i][(proc->tti_tx*fp->samples_per_slot)-sf_extension];
+
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (proc->timestamp_tx-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
// prepare tx buffer pointers
@@ -859,7 +803,7 @@ void tx_rf(RU_t *ru) {
flags);
LOG_D(PHY,"[TXPATH] RU %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,
- (long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->subframe_tx);
+ (long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
@@ -916,7 +860,7 @@ static void* ru_thread_asynch_rxtx( void* param ) {
if (ru->fh_south_asynch_in) ru->fh_south_asynch_in(ru,&frame,&subframe);
// asynchronous receive from north (RRU IF4/IF5)
else if (ru->fh_north_asynch_in) {
- if (nr_subframe_select(&ru->gNB_list[0]->gNB_config,subframe)!=SF_UL)
+ if (nr_slot_select(&ru->gNB_list[0]->gNB_config,subframe)!=SF_UL)
ru->fh_north_asynch_in(ru,&frame,&subframe);
}
else AssertFatal(1==0,"Unknown function in ru_thread_asynch_rxtx\n");
@@ -929,47 +873,6 @@ static void* ru_thread_asynch_rxtx( void* param ) {
-void wakeup_slaves(RU_proc_t *proc) {
-
- int i;
- struct timespec wait;
-
- wait.tv_sec=0;
- wait.tv_nsec=5000000L;
-
- for (i=0;i<proc->num_slaves;i++) {
- RU_proc_t *slave_proc = proc->slave_proc[i];
- // wake up slave FH thread
- // lock the FH mutex and make sure the thread is ready
- if (pthread_mutex_timedlock(&slave_proc->mutex_FH,&wait) != 0) {
- LOG_E( PHY, "ERROR pthread_mutex_lock for RU %d slave %d (IC %d)\n",proc->ru->idx,slave_proc->ru->idx,slave_proc->instance_cnt_FH);
- exit_fun( "error locking mutex_rxtx" );
- break;
- }
-
- int cnt_slave = ++slave_proc->instance_cnt_FH;
- slave_proc->frame_rx = proc->frame_rx;
- slave_proc->subframe_rx = proc->subframe_rx;
- slave_proc->timestamp_rx = proc->timestamp_rx;
- slave_proc->timestamp_tx = proc->timestamp_tx;
-
- pthread_mutex_unlock( &slave_proc->mutex_FH );
-
- if (cnt_slave == 0) {
- // the thread was presumably waiting where it should and can now be woken up
- if (pthread_cond_signal(&slave_proc->cond_FH) != 0) {
- LOG_E( PHY, "ERROR pthread_cond_signal for RU %d, slave RU %d\n",proc->ru->idx,slave_proc->ru->idx);
- exit_fun( "ERROR pthread_cond_signal" );
- break;
- }
- } else {
- LOG_W( PHY,"[RU] Frame %d, slave %d thread busy!! (cnt_FH %i)\n",slave_proc->frame_rx,slave_proc->ru->idx, cnt_slave);
- exit_fun( "FH thread busy" );
- break;
- }
- }
-}
-
/*!
* \brief The prach receive thread of RU.
* \param param is a \ref RU_proc_t structure which contains the info what to process.
@@ -1142,7 +1045,7 @@ void wakeup_gNB_L1s(RU_t *ru) {
char string[20];
sprintf(string,"Incoming RU %d",ru->idx);
LOG_D(PHY,"RU %d Call gNB_top\n",ru->idx);
- ru->gNB_top(gNB_list[0],ru->proc.frame_rx,ru->proc.subframe_rx,string,ru);
+ ru->gNB_top(gNB_list[0],ru->proc.frame_rx,ru->proc.tti_rx,string,ru);
}
else {
@@ -1153,7 +1056,7 @@ void wakeup_gNB_L1s(RU_t *ru) {
LOG_D(PHY,"ru->wakeup_rxtx:%p\n", ru->nr_wakeup_rxtx);
if (ru->nr_wakeup_rxtx!=0 && ru->nr_wakeup_rxtx(gNB_list[i],ru) < 0)
{
- LOG_E(PHY,"could not wakeup gNB rxtx process for subframe %d\n", ru->proc.subframe_rx);
+ LOG_E(PHY,"could not wakeup gNB rxtx process for subframe %d\n", ru->proc.tti_rx);
}
}
}
@@ -1174,12 +1077,12 @@ static inline int wakeup_prach_ru(RU_t *ru) {
if (ru->proc.instance_cnt_prach==-1) {
++ru->proc.instance_cnt_prach;
ru->proc.frame_prach = ru->proc.frame_rx;
- ru->proc.subframe_prach = ru->proc.subframe_rx;
+ ru->proc.subframe_prach = ru->proc.tti_rx;
// DJP - think prach_procedures() is looking at gNB frame_prach
if (ru->gNB_list[0]) {
ru->gNB_list[0]->proc.frame_prach = ru->proc.frame_rx;
- ru->gNB_list[0]->proc.subframe_prach = ru->proc.subframe_rx;
+ ru->gNB_list[0]->proc.slot_prach = ru->proc.tti_rx;
}
LOG_I(PHY,"RU %d: waking up PRACH thread\n",ru->idx);
// the thread can now be woken up
@@ -1383,7 +1286,7 @@ static void* ru_thread_tx( void* param ) {
gNB_L1_rxtx_proc_t *L1_proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
char filename[40];
- int print_frame = 2;
+ int print_frame = 8;
int i = 0;
cpu_set_t cpuset;
@@ -1410,9 +1313,9 @@ static void* ru_thread_tx( void* param ) {
wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
if (oai_exit) break;
-//printf("~~~~~~~~~~~~~~~~start process for ru_thread_tx %d.%d\n", proc->frame_tx, proc->subframe_tx);
+//printf("~~~~~~~~~~~~~~~~start process for ru_thread_tx %d.%d\n", proc->frame_tx, proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
- VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->subframe_tx );
+ VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
// do TX front-end processing if needed (precoding and/or IDFTs)
if (ru->feptx_prec) ru->feptx_prec(ru);
@@ -1430,9 +1333,9 @@ static void* ru_thread_tx( void* param ) {
{
for (i=0; i<ru->nb_tx; i++)
{
- sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->subframe_tx);
+ sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
- if(proc->subframe_tx == 9)
+ if(proc->tti_tx == 9)
{
sprintf(filename,"tx%ddata_frame%d.m", i, print_frame);
LOG_M(filename,"txdata_frame",&ru->common.txdata[i][0],fp->samples_per_frame, 1, 1);
@@ -1448,7 +1351,7 @@ static void* ru_thread_tx( void* param ) {
else {
LOG_E(PHY,"Cannot write to file %s\n",filename);
}
- }//if(proc->subframe_tx == 9)
+ }//if(proc->tti_tx == 9)
}//for (i=0; i<ru->nb_tx; i++)
}//if(proc->frame_tx == print_frame)
}//else emulate_rf
@@ -1463,7 +1366,7 @@ static void* ru_thread_tx( void* param ) {
if (ru == gNB->RU_list[j]) {
if ((gNB_proc->RU_mask_tx&(1<<j)) > 0)
LOG_E(PHY,"eNB %d frame %d, subframe %d : previous information from RU tx %d (num_RU %d,mask %x) has not been served yet!\n",
- gNB->Mod_id,gNB_proc->frame_rx,gNB_proc->subframe_rx,ru->idx,gNB->num_RU,gNB_proc->RU_mask_tx);
+ gNB->Mod_id,gNB_proc->frame_rx,gNB_proc->slot_rx,ru->idx,gNB->num_RU,gNB_proc->RU_mask_tx);
gNB_proc->RU_mask_tx |= (1<<j);
}
}
@@ -1497,10 +1400,10 @@ static void* ru_thread( void* param ) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int ret;
- int subframe =9;
+ int slot = fp->slots_per_frame-1;
int frame =1023;
char filename[40],threadname[40];
- int print_frame = 2;
+ int print_frame = 8;
int i = 0;
// set default return value
@@ -1590,36 +1493,36 @@ static void* ru_thread( void* param ) {
// these are local subframe/frame counters to check that we are in synch with the fronthaul timing.
// They are set on the first rx/tx in the underly FH routines.
- if (subframe==9) {
- subframe=0;
+ if (slot==(fp->slots_per_frame-1)) {
+ slot=0;
frame++;
frame&=1023;
} else {
- subframe++;
+ slot++;
}
// synchronization on input FH interface, acquire signals/data and block
- if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&subframe);
+ if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&slot);
else AssertFatal(1==0, "No fronthaul interface at south port");
- LOG_D(PHY,"AFTER fh_south_in - SFN/SF:%d%d RU->proc[RX:%d%d TX:%d%d] RC.gNB[0][0]:[RX:%d%d TX(SFN):%d]\n",
- frame,subframe,
- proc->frame_rx,proc->subframe_rx,
- proc->frame_tx,proc->subframe_tx,
- RC.gNB[0][0]->proc.frame_rx,RC.gNB[0][0]->proc.subframe_rx,
+ LOG_I(PHY,"AFTER fh_south_in - SFN/SL:%d%d RU->proc[RX:%d.%d TX:%d.%d] RC.gNB[0][0]:[RX:%d%d TX(SFN):%d]\n",
+ frame,slot,
+ proc->frame_rx,proc->tti_rx,
+ proc->frame_tx,proc->tti_tx,
+ RC.gNB[0][0]->proc.frame_rx,RC.gNB[0][0]->proc.slot_rx,
RC.gNB[0][0]->proc.frame_tx);
/*
LOG_D(PHY,"RU thread (do_prach %d, is_prach_subframe %d), received frame %d, subframe %d\n",
ru->do_prach,
- is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx),
- proc->frame_rx,proc->subframe_rx);
+ is_prach_subframe(fp, proc->frame_rx, proc->tti_rx),
+ proc->frame_rx,proc->tti_rx);
- if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx)==1)) {
+ if ((ru->do_prach>0) && (is_prach_subframe(fp, proc->frame_rx, proc->tti_rx)==1)) {
wakeup_prach_ru(ru);
}*/
// adjust for timing offset between RU
-//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~%d.%d in ru_thread is in process\n", proc->frame_rx, proc->subframe_rx);
+//printf("~~~~~~~~~~~~~~~~~~~~~~~~~~%d.%d in ru_thread is in process\n", proc->frame_rx, proc->tti_rx);
if (ru->idx!=0) proc->frame_tx = (proc->frame_tx+proc->frame_offset)&1023;
@@ -1627,8 +1530,6 @@ static void* ru_thread( void* param ) {
if (ru->feprx) ru->feprx(ru);
// At this point, all information for subframe has been received on FH interface
- // If this proc is to provide synchronization, do so
- wakeup_slaves(proc);
// wakeup all gNB processes waiting for this RU
if (ru->num_gNB>0) wakeup_gNB_L1s(ru);
@@ -1653,9 +1554,9 @@ static void* ru_thread( void* param ) {
{
for (i=0; i<ru->nb_tx; i++)
{
- sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->subframe_tx);
- LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
- if(proc->subframe_tx == 9)
+ sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->tti_tx);
+ LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_slot_wCP, 1, 1);
+ if(proc->tti_tx == 9)
{
sprintf(filename,"tx%ddata_frame%d.m", i, print_frame);
LOG_M(filename,"txdata_frame",&ru->common.txdata[i][0],fp->samples_per_frame, 1, 1);
@@ -1671,7 +1572,7 @@ static void* ru_thread( void* param ) {
else {
LOG_E(PHY,"Cannot write to file %s\n",filename);
}
- }//if(proc->subframe_tx == 9)
+ }//if(proc->tti_tx == 9)
}//for (i=0; i<ru->nb_tx; i++)
}//if(proc->frame_tx == print_frame)
}//else emulate_rf
@@ -2243,16 +2144,9 @@ void set_function_spec_param(RU_t *ru)
ru->feprx = (get_nprocs()<=2) ? fep_full : fep_full; // this is frequency-shift + DFTs
ru->feptx_prec = feptx_prec; // need to do transmit Precoding + IDFTs
ru->feptx_ofdm = (get_nprocs()<=2) ? nr_feptx_ofdm : nr_feptx_ofdm_2thread; // need to do transmit Precoding + IDFTs
- if (ru->if_timing == synch_to_other) {
- ru->fh_south_in = fh_slave_south_in; // synchronize to master
- ru->fh_south_out = fh_if5_mobipass_south_out; // use send_IF5 for mobipass
- ru->fh_south_asynch_in = fh_if5_south_asynch_in_mobipass; // UL is asynchronous
- }
- else {
- ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
- ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
- ru->fh_south_asynch_in = NULL; // no asynchronous UL
- }
+ ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
+ ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
+ ru->fh_south_asynch_in = NULL; // no asynchronous UL
ru->start_rf = NULL; // no local RF
ru->stop_rf = NULL;
ru->start_if = start_if; // need to start if interface for IF5
diff --git a/targets/RT/USER/nr-softmodem.c b/targets/RT/USER/nr-softmodem.c
index f6e61884fefffa57f591afb11c227aebfb01ce20..3bc9bf49d930a44927d224216439484028d2352c 100644
--- a/targets/RT/USER/nr-softmodem.c
+++ b/targets/RT/USER/nr-softmodem.c
@@ -610,8 +610,6 @@ void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
- config[CC_id]->rf_config.tx_antenna_ports.value = 1;
- config[CC_id]->rf_config.rx_antenna_ports.value = 1;
config[CC_id]->sch_config.physical_cell_id.value = 0;
///dl frequency to be filled in
diff --git a/targets/RT/USER/nr-ue.c b/targets/RT/USER/nr-ue.c
index ed55e15d3cf5679d295d7b3b8dc181fcc81e7cac..1dfa3dbd4fd8019fef47d9b1baa92f268be5c476 100644
--- a/targets/RT/USER/nr-ue.c
+++ b/targets/RT/USER/nr-ue.c
@@ -636,7 +636,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
proc->instance_cnt_rxtx=-1;
proc->subframe_rx=proc->sub_frame_start;
- proc->dci_err_cnt=0;
+ proc->dci_err_cnt=0;
char threadname[256];
sprintf(threadname,"UE_%d_proc_%d", UE->Mod_id, proc->sub_frame_start);
cpu_set_t cpuset;
@@ -673,6 +673,8 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// pickTime(current);
// updateTimes(proc->gotIQs, &t2, 10000, "Delay to wake up UE_Thread_Rx (case 2)");
+
+
// Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
@@ -681,11 +683,24 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
+ // call L2 for DL_CONFIG (DCI)
+ UE->dcireq.module_id = UE->Mod_id;
+ UE->dcireq.gNB_index = 0;
+ UE->dcireq.cc_id = 0;
+ UE->dcireq.frame = proc->frame_rx;
+ UE->dcireq.slot = proc->nr_tti_rx;
+ nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
+
+ NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
+ UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
+ nr_ue_scheduled_response(&UE_mac->scheduled_response);
+
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
- phy_procedures_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay);
- //printf(">>> nr_ue_pdcch_procedures ended\n");
+ phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
+ // printf(">>> nr_ue_pdcch_procedures ended\n");
+
#endif
}
@@ -698,68 +713,17 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
- if(1)
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
- UE->ul_indication.slot = 0; // to be fill
- UE->ul_indication.frame = 0; // to be fill
- // [TODO] mapping right after NR initial sync
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
-
-
-
-#ifdef NEW_MAC
- ret = mac_xface->ue_scheduler(UE->Mod_id,
- proc->frame_rx,
- proc->subframe_rx,
- proc->nr_tti_rx,
- proc->frame_tx,
- proc->subframe_tx,
- proc->nr_tti_tx%(UE->frame_parms.ttis_per_subframe),
-#ifndef NO_RAT_NR
- slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx),
-#else
- subframe_select(&UE->frame_parms,proc->subframe_tx),
-#endif
- 0,
- 0/*FIXME CC_id*/);
-#endif
-
-/*#else
- ret = mac_xface->ue_scheduler(UE->Mod_id,
- proc->frame_rx,
- proc->subframe_rx,
- proc->frame_tx,
- proc->subframe_tx,
- subframe_select(&UE->frame_parms,proc->subframe_tx),
- 0, */
-// 0/*FIXME CC_id*/);
-//#endif
- if ( ret != CONNECTION_OK) {
- char *txt;
- switch (ret) {
- case CONNECTION_LOST:
- txt="RRC Connection lost, returning to PRACH";
- break;
- case PHY_RESYNCH:
- txt="RRC Connection lost, trying to resynch";
- break;
- case RESYNCH:
- txt="return to PRACH and perform a contention-free access";
- break;
- default:
- txt="UNKNOWN RETURN CODE";
- };
- LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u %s\n",
- UE->Mod_id, proc->frame_rx, proc->subframe_tx,txt );
- }
- }
+ }
+
#if UE_TIMING_TRACE
stop_meas(&UE->generic_stat);
#endif
@@ -1109,42 +1073,60 @@ void *UE_thread(void *arg) {
// pickStaticTime(lastTime);
} //UE->mode != loop_through_memory
else {
- proc->nr_tti_rx=subframe_nr;
- proc->subframe_rx=subframe_nr;
- if(subframe_nr == 0) {
- for (th_id=0; th_id < RX_NB_TH; th_id++) {
- UE->proc.proc_rxtx[th_id].frame_rx++;
- }
- }
- proc->frame_tx = proc->frame_rx;
- proc->nr_tti_tx= subframe_nr + DURATION_RX_TO_TX;
- if (proc->nr_tti_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
- proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
- proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
- }
- proc->subframe_tx=proc->nr_tti_tx;
-
- printf("Processing subframe %d\n",proc->subframe_rx);
-
- if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
- UE->ul_indication.module_id = 0;
- UE->ul_indication.gNB_index = 0;
- UE->ul_indication.cc_id = 0;
- UE->ul_indication.slot = 0; // to be fill
- UE->ul_indication.frame = 0; // to be fill
- // [TODO] mapping right after NR initial sync
- UE->ul_indication.frame = proc->frame_rx;
- UE->ul_indication.slot = proc->nr_tti_rx;
-
- UE->if_inst->ul_indication(&UE->ul_indication);
+ proc->nr_tti_rx=subframe_nr;
+ proc->subframe_rx=subframe_nr;
+ if(subframe_nr == 0) {
+ for (th_id=0; th_id < RX_NB_TH; th_id++) {
+ UE->proc.proc_rxtx[th_id].frame_rx++;
}
+ }
+ proc->frame_tx = proc->frame_rx;
+ proc->nr_tti_tx= subframe_nr + DURATION_RX_TO_TX;
+ if (proc->nr_tti_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
+ proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
+ proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
+ }
+ proc->subframe_tx=proc->nr_tti_tx;
+
+ if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
+
+ //clean previous FAPI MESSAGE
+ UE->rx_ind.number_pdus = 0;
+ UE->dci_ind.number_of_dcis = 0;
+ //clean previous FAPI MESSAGE
+
+ // call L2 for DL_CONFIG (DCI)
+ UE->dcireq.module_id = UE->Mod_id;
+ UE->dcireq.gNB_index = 0;
+ UE->dcireq.cc_id = 0;
+ UE->dcireq.frame = proc->frame_rx;
+ UE->dcireq.slot = proc->nr_tti_rx;
+ nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
+
+ NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
+ UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
+ nr_ue_scheduled_response(&UE_mac->scheduled_response);
- phy_procedures_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay);
- getchar();
+
+ printf("Processing subframe %d\n",proc->subframe_rx);
+ phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
+ }
+
+ if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL){
+ UE->ul_indication.module_id = 0;
+ UE->ul_indication.gNB_index = 0;
+ UE->ul_indication.cc_id = 0;
+ UE->ul_indication.frame = proc->frame_rx;
+ UE->ul_indication.slot = proc->nr_tti_rx;
+
+ UE->if_inst->ul_indication(&UE->ul_indication);
+ }
+
+ getchar();
} // else loop_through_memory
} // start_rx_stream==1
} // UE->is_synchronized==1
-
+
} // while !oai_exit
return NULL;
}
diff --git a/targets/RT/USER/nr-uesoftmodem.c b/targets/RT/USER/nr-uesoftmodem.c
index beebdfd5619037af39a29a51b4af4ccf1aa8b2b1..81f46d31b393212f83de1643b2454f5094767f90 100644
--- a/targets/RT/USER/nr-uesoftmodem.c
+++ b/targets/RT/USER/nr-uesoftmodem.c
@@ -659,8 +659,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
- config[CC_id]->rf_config.tx_antenna_ports.value = 1;
- config[CC_id]->rf_config.rx_antenna_ports.value = 1;
config[CC_id]->sch_config.physical_cell_id.value = 0;
frame_parms[CC_id]->frame_type = FDD;