Commit 3e86d30b authored by knopp's avatar knopp
Browse files

some correction in RA processing for Msg4 harq handling

parent 55a9054e
......@@ -1015,6 +1015,8 @@ void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
phy_vars_ue->ulsch[eNB_id]->Mlimit = max_harq_tx;
}
extern uint16_t beta_cqi[16];
void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
struct PhysicalConfigDedicated *physicalConfigDedicated )
{
......@@ -1070,7 +1072,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
LOG_D(PHY,"pusch_config_dedicated.betaOffset_ACK_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index);
LOG_D(PHY,"pusch_config_dedicated.betaOffset_RI_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index);
LOG_D(PHY,"pusch_config_dedicated.betaOffset_CQI_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index);
LOG_D(PHY,"pusch_config_dedicated.betaOffset_CQI_Index %d => %d)\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index,beta_cqi[phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index]);
LOG_D(PHY,"\n");
......
......@@ -239,7 +239,7 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id)
max_pos_fil2 = ((max_pos_fil2 * coef) + (max_pos * ncoef)) >> 15;
//#ifdef DEBUG_PHY
LOG_I(PHY,"frame %d: max_pos = %d, max_pos_fil = %d, sync_pos=%d\n",eNB->proc.frame_rx,max_pos,max_pos_fil2,sync_pos);
LOG_D(PHY,"frame %d: max_pos = %d, max_pos_fil = %d, sync_pos=%d\n",eNB->proc.frame_rx,max_pos,max_pos_fil2,sync_pos);
//#endif //DEBUG_PHY
return(max_pos_fil2-sync_pos);
......
......@@ -7680,6 +7680,9 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag,
ulsch->bundling,
ulsch->harq_processes[harq_pid]->O_ACK);*/
LOG_D(PHY,"Setting beta_offset_cqi_times8 to %d, index %d\n",
beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index],
ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index);
ulsch->beta_offset_cqi_times8 = beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index];//18;
ulsch->beta_offset_ri_times8 = beta_ri[ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index];//10;
......@@ -7724,10 +7727,10 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
if (ue->ulsch_Msg3_active[eNB_id] == 1)
ue->ulsch_Msg3_active[eNB_id] = 0;
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d\n",
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d, cqi_req %d => O %d\n",
ue->Mod_id,harq_pid,
proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id]);
ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id],cqi_req,ulsch->O);
// ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
......
......@@ -1722,7 +1722,7 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *PHY_vars_eNB,
uint8_t use_srs);
void dump_ulsch(PHY_VARS_eNB *phy_vars_eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id);
void dump_ulsch(PHY_VARS_eNB *phy_vars_eNB,int frame, int subframe, uint8_t UE_id);
int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
......
......@@ -1329,23 +1329,21 @@ void rx_ulsch_emul(PHY_VARS_eNB *eNB,
}
void dump_ulsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id)
{
void dump_ulsch(PHY_VARS_eNB *eNB,int frame,int subframe,uint8_t UE_id) {
uint32_t nsymb = (eNB->frame_parms.Ncp == 0) ? 14 : 12;
uint8_t harq_pid;
int subframe = proc->subframe_rx;
harq_pid = subframe2harq_pid(&eNB->frame_parms,proc->frame_rx,subframe);
harq_pid = subframe2harq_pid(&eNB->frame_parms,frame,subframe);
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, TBS %d, Qm %d, N_symb %d\n", subframe,harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, TBS %d, Qm %d, N_symb %d\n",
subframe,harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS,eNB->ulsch[UE_id]->harq_processes[harq_pid]->Qm,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch);
//#ifndef OAI_EMU
write_output("/tmp/ulsch_d.m","ulsch_dseq",&eNB->ulsch[UE_id]->harq_processes[harq_pid]->d[0][96],
eNB->ulsch[UE_id]->harq_processes[harq_pid]->Kplus*3,1,0);
if (eNB->common_vars.rxdata) write_output("/tmp/rxsig0.m","rxs0", &eNB->common_vars.rxdata[0][0],eNB->frame_parms.samples_per_tti*10,1,1);
if (eNB->frame_parms.nb_antennas_rx>1)
if (eNB->common_vars.rxdata) write_output("/tmp/rxsig1.m","rxs1", &eNB->common_vars.rxdata[1][0],eNB->frame_parms.samples_per_tti*10,1,1);
......
......@@ -1309,7 +1309,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
nPRS)%12;
LOG_D(PHY,
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d, beta_cqi %d \n",
eNB->Mod_id,harq_pid,frame,subframe,
ulsch_harq->dci_alloc,
ulsch_harq->rar_alloc,
......@@ -1323,7 +1323,8 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
ulsch_harq->n_DMRS2,
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
nPRS,
ulsch_harq->O_ACK);
ulsch_harq->O_ACK,
ulsch->beta_offset_cqi_times8);
start_meas(&eNB->ulsch_demodulation_stats);
......@@ -1380,6 +1381,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
T_INT(harq_pid));
fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
eNB->Mod_id,harq_pid,
......@@ -1389,6 +1391,10 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1]);
if (dB_fixed_times10(eNB->pusch_vars[i]->ulsch_power[0]) > 300) {
dump_ulsch(eNB,frame,subframe,i); exit(-1);
}
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_DISCARDED_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE,
......@@ -1405,7 +1411,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
T(T_ENB_PHY_ULSCH_UE_ACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(i), T_INT(ulsch->rnti),
T_INT(harq_pid));
ulsch_harq->status = SCH_IDLE;
......@@ -1516,6 +1522,10 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) {
// estimate timing advance for MAC
sync_pos = lte_est_timing_advance_pusch(eNB,UE_id);
timing_advance_update = sync_pos - eNB->frame_parms.nb_prefix_samples/4; //to check
// if (timing_advance_update > 10) { dump_ulsch(eNB,frame,subframe,UE_id); exit(-1);}
// if (timing_advance_update < -10) { dump_ulsch(eNB,frame,subframe,UE_id); exit(-1);}
switch (eNB->frame_parms.N_RB_DL) {
case 6:
pdu->rx_indication_rel8.timing_advance = timing_advance_update;
......@@ -1544,10 +1554,16 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) {
// estimate UL_CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 200;//(10*eNB->measurements.n0_power_dB[0]);
if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0;
else if (SNRtimes10 > 635) pdu->rx_indication_rel8.ul_cqi=255;
else pdu->rx_indication_rel8.ul_cqi=(640+SNRtimes10)/5;
LOG_D(PHY,"[PUSCH %d] Filling RX_indication with SNR %d (%d), timing_advance %d (update %d)\n",
harq_pid,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance,
timing_advance_update);
eNB->UL_INFO.rx_ind.number_of_pdus++;
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
......
......@@ -648,6 +648,10 @@ typedef struct {
uint8_t oldmcs2[8];
/// NDI from last UL scheduling
uint8_t oldNDI_UL[8];
/// mcs from last UL scheduling
uint8_t mcs_UL[8];
/// TBS from last UL scheduling
uint8_t TBS_UL[8];
/// Flag to indicate UL has been scheduled at least once
boolean_t ul_active;
/// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received)
......
......@@ -777,12 +777,12 @@ void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_ReportP
}
uint8_t get_dl_cqi_pmi_size_pusch(UE_sched_ctrl *sched_ctl,COMMON_channels_t *cc,uint8_t tmode,uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic) {
uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode,uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic) {
int Ntab[6] = {0,4,7,9,10,13};
int N = Ntab[cc->p_eNB];
int N = Ntab[cc->mib->message.dl_Bandwidth];
int Ltab_uesel[6] = {0,6,9,13,15,18};
int L = Ltab_uesel[cc->p_eNB];
int L = Ltab_uesel[cc->mib->message.dl_Bandwidth];
AssertFatal(cqi_ReportModeAperiodic != NULL,"cqi_ReportPeriodic is null!\n");
......@@ -1307,7 +1307,103 @@ uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,u
return(((absSF/10)<<4) + (absSF%10));
}
void fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t cqi_req,
COMMON_channels_t *cc,
struct PhysicalConfigDedicated *physicalConfigDedicated,
uint8_t tmode,
uint32_t handle,
uint16_t rnti,
uint8_t resource_block_start,
uint8_t number_of_resource_blocks,
uint8_t mcs,
uint8_t cyclic_shift_2_for_drms,
uint8_t frequency_hopping_enabled_flag,
uint8_t frequency_hopping_bits,
uint8_t new_data_indication,
uint8_t redundancy_version,
uint8_t harq_process_number,
uint8_t ul_tx_mode,
uint8_t current_tx_nb,
uint8_t n_srs,
uint16_t size
) {
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
if (cqi_req==0)
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
else
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = handle;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = resource_block_start;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = number_of_resource_blocks;
if (mcs<11) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
else if (mcs<21) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = cyclic_shift_2_for_drms;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = frequency_hopping_enabled_flag;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = frequency_hopping_bits;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = new_data_indication;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = redundancy_version;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = harq_process_number;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = ul_tx_mode;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = current_tx_nb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = n_srs;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = size;
if (cqi_req == 1) {
// Add CQI portion
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
LOG_D(MAC,"report_type %d\n",ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type);
if (cc->p_eNB<=2 && (tmode==3||tmode==4||tmode==8||tmode==9||tmode==10))
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
else if (cc->p_eNB<=2)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
else if (cc->p_eNB==4)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;
AssertFatal(physicalConfigDedicated->cqi_ReportConfig!=NULL,"physicalConfigDedicated->cqi_ReportConfig is null!\n");
AssertFatal(physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic!=NULL,"physicalConfigDedicated->cqi_ReportModeAperiodic is null!\n");
AssertFatal(physicalConfigDedicated->pusch_ConfigDedicated!=NULL,"physicalConfigDedicated->puschConfigDedicated is null!\n");
for (int ri=0;
ri<(1<<ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);
ri++)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =
get_dl_cqi_pmi_size_pusch(cc,
tmode,
1+ri,
physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic);
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index;
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_RI_Index;
}
}
#ifdef Rel14
void fill_nfapi_ulsch_config_request_emtc(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t ue_type,
uint16_t total_number_of_repetitions,
uint16_t repetition_number,
uint16_t initial_transmission_sf_io) {
// Re13 fields
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = ue_type;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = total_number_of_repetitions;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = repetition_number;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = initial_transmission_sf_io;
}
int get_numnarrowbands(long dl_Bandwidth) {
int nb_tab[6] = {1,2,4,8,12,16};
......@@ -3288,7 +3384,7 @@ void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,
AssertFatal((cqi_ReportModeAperiodic = UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic)!=NULL,
"cqi_ReportModeAperiodic is null for UE %d\n",UE_id);
int N = Ntab[cc->p_eNB];
int N = Ntab[cc->mib->message.dl_Bandwidth];
int tmode = get_tmode(mod_idP,CC_idP,UE_id);
int ri = sched_ctl->aperiodic_ri_received[CC_idP];
int r,diffcqi0=0,diffcqi1=0,pmi_uesel=0;
......
......@@ -61,7 +61,7 @@
#define DEBUG_eNB_SCHEDULER 1
// This table holds the allowable PRB sizes for ULSCH transmissions
uint8_t rb_table[33] = {1,2,3,4,5,6,8,9,10,12,15,16,18,20,24,25,27,30,32,36,40,45,48,50,54,60,72,75,80,81,90,96,100};
uint8_t rb_table[34] = {1,2,3,4,5,6,8,9,10,12,15,16,18,20,24,25,27,30,32,36,40,45,48,50,54,60,64,72,75,80,81,90,96,100};
void rx_sdu(const module_id_t enb_mod_idP,
const int CC_idP,
......@@ -106,8 +106,12 @@ void rx_sdu(const module_id_t enb_mod_idP,
if (UE_id!=-1) {
LOG_D(MAC,"[eNB %d] CC_id %d Received ULSCH sdu from PHY (rnti %x, UE_id %d)\n",enb_mod_idP,CC_idP,rntiP,UE_id);
LOG_D(MAC,"[eNB %d][PUSCH %d] CC_id %d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",enb_mod_idP,harq_pid,CC_idP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],
rntiP,UE_id,ul_cqi);
AssertFatal(UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] < 8,
"round >= 8\n");
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
......@@ -121,11 +125,17 @@ void rx_sdu(const module_id_t enb_mod_idP,
}
if (sduP==NULL) { // we've got an error
LOG_D(MAC,"[eNB %d] CC_id %d ULSCH in error in round %d\n",enb_mod_idP,CC_idP,UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP]);
LOG_D(MAC,"[eNB %d][PUSCH %d] CC_id %d ULSCH in error in round %d, ul_cqi %d\n",enb_mod_idP,harq_pid,CC_idP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],ul_cqi);
// AssertFatal(1==0,"ulsch in error\n");
if (UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP] == 7)
if (UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] == 7) {
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid]=0;
// here we increment error statistics
}
else UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid]++;
return;
}
}
else { // Check if this is an RA process for the rnti
......@@ -165,7 +175,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
eNB->eNB_stats[CC_idP].total_ulsch_bytes_rx+=sdu_lenP;
eNB->eNB_stats[CC_idP].total_ulsch_pdus_rx+=1;
UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP] = 0;
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] = 0;
// control element
for (i=0; i<num_ce; i++) {
......@@ -824,8 +834,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
eNB_UE_STATS *eNB_UE_stats = NULL;
uint8_t status = 0;
uint8_t rb_table_index = -1;
uint16_t TBS = 0;
uint32_t cqi_req,cshift,ndi,mcs=0,tpc;
uint32_t cqi_req,cshift,ndi,tpc;
int32_t normalized_rx_power;
int32_t target_rx_power=-90;
static int32_t tpc_accumulated=0;
......@@ -840,6 +849,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
UE_sched_ctrl *UE_sched_ctrl;
int tmode;
int sched_frame=frameP;
int rvidx_tab[4] = {0,2,3,1};
if (sched_subframeP<subframeP) sched_frame++;
......@@ -962,8 +972,8 @@ abort();
if (((UE_is_to_be_scheduled(module_idP,CC_id,UE_id)>0)) || (round>0))// || ((frameP%10)==0))
// if there is information on bsr of DCCH, DTCH or if there is UL_SR, or if there is a packet to retransmit, or we want to schedule a periodic feedback every 10 frames
{
LOG_I(MAC,"[eNB %d][PUSCH] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UL_inactivity timer %d,UL_failure timer %d,cqi_req_timer %d)\n",
module_idP,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR,
LOG_D(MAC,"[eNB %d][PUSCH %d] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UL_inactivity timer %d,UL_failure timer %d,cqi_req_timer %d)\n",
module_idP,harq_pid,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR,
UE_sched_ctrl->ul_inactivity_timer,
UE_sched_ctrl->ul_failure_timer,
......@@ -1023,15 +1033,15 @@ abort();
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1=UE_template->pre_assigned_mcs_ul;
mcs = UE_template->pre_assigned_mcs_ul;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
UE_template->mcs_UL[harq_pid] = UE_template->pre_assigned_mcs_ul;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if (UE_template->pre_allocated_rb_table_index_ul >=0) {
rb_table_index=UE_template->pre_allocated_rb_table_index_ul;
} else {
mcs=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs);
UE_template->mcs_UL[harq_pid]=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs);
rb_table_index=5; // for PHR
}
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=mcs;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=UE_template->mcs_UL[harq_pid];
// buffer_occupancy = UE_template->ul_total_buffer;
while (((rb_table[rb_table_index]>(N_RB_UL-1-first_rb[CC_id])) ||
......@@ -1040,20 +1050,20 @@ abort();
rb_table_index--;
}
TBS = get_TBS_UL(mcs,rb_table[rb_table_index]);
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],rb_table[rb_table_index]);
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=rb_table[rb_table_index];
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid];
// buffer_occupancy -= TBS;
T(T_ENB_MAC_UE_UL_SCHEDULE, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
T_INT(TBS), T_INT(ndi));
if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED)
LOG_I(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled UE %d (mcs %d, first rb %d, nb_rb %d, rb_table_index %d, TBS %d, harq_pid %d)\n",
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,mcs,
LOG_D(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled UE %d (mcs %d, first rb %d, nb_rb %d, rb_table_index %d, TBS %d, harq_pid %d)\n",
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,UE_template->mcs_UL[harq_pid],
first_rb[CC_id],rb_table[rb_table_index],
rb_table_index,TBS,harq_pid);
rb_table_index,UE_template->TBS_UL[harq_pid],harq_pid);
// bad indices : 20 (40 PRB), 21 (45 PRB), 22 (48 PRB)
// increment for next UE allocation
......@@ -1067,9 +1077,9 @@ abort();
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SCHEDULED,UE_sched_ctrl->ul_scheduled);
// adjust total UL buffer status by TBS, wait for UL sdus to do final update
LOG_D(MAC,"[eNB %d] CC_id %d UE %d/%x : adjusting ul_total_buffer, old %d, TBS %d\n", module_idP,CC_id,UE_id,rnti,UE_template->ul_total_buffer,TBS);
if (UE_template->ul_total_buffer > TBS)
UE_template->ul_total_buffer -= TBS;
LOG_D(MAC,"[eNB %d] CC_id %d UE %d/%x : adjusting ul_total_buffer, old %d, TBS %d\n", module_idP,CC_id,UE_id,rnti,UE_template->ul_total_buffer,UE_template->TBS_UL[harq_pid]);
if (UE_template->ul_total_buffer > UE_template->TBS_UL[harq_pid])
UE_template->ul_total_buffer -= UE_template->TBS_UL[harq_pid];
else
UE_template->ul_total_buffer = 0;
LOG_D(MAC,"ul_total_buffer, new %d\n", UE_template->ul_total_buffer);
......@@ -1077,6 +1087,7 @@ abort();
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
// save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift;
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
......@@ -1087,7 +1098,7 @@ abort();
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = first_rb[CC_id];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = rb_table[rb_table_index];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.mcs_1 = mcs;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.mcs_1 = UE_template->mcs_UL[harq_pid];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cyclic_shift_2_for_drms = cshift;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.frequency_hopping_enabled_flag = 0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.new_data_indication_1 = ndi;
......@@ -1101,85 +1112,45 @@ abort();
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
LOG_I(MAC,"Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
// Add UL_config PDUs
ul_config_pdu = &ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
if (cqi_req==0)
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
else
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = first_rb[CC_id];
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = rb_table[rb_table_index];
if (mcs<11) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
else if (mcs<21) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = cshift;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = ndi;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = harq_pid;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(mcs,
rb_table[rb_table_index]);
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
cc,
UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
first_rb[CC_id], // resource_block_start
rb_table[rb_table_index], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid],
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
ndi, // new_data_indication
0, // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
get_TBS_UL(UE_template->mcs_UL[harq_pid],
rb_table[rb_table_index])
);
#ifdef Rel14
// Re13 fields
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = UE_template->rach_resource_type>2 ? 2 : 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (frameP*10)+subframeP;
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
1, //total_number_of_repetitions
1, //repetition_number
(frameP*10)+subframeP);
}
#endif
ul_req_tmp->number_of_pdus++;
if (cqi_req == 1) {
// Add CQI portion
tmode = get_tmode(module_idP,CC_id,UE_id);
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
LOG_I(MAC,"report_type %d\n",ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type);
if (cc->p_eNB<=2 && (tmode==3||tmode==4||tmode==8||tmode==9||tmode==10))
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
else if (cc->p_eNB<=2)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
else if (cc->p_eNB==4)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;
AssertFatal(UE_template->physicalConfigDedicated->cqi_ReportConfig!=NULL,"physicalConfigDedicated->cqi_ReportConfig is null!\n");
AssertFatal(UE_template->physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic!=NULL,"physicalConfigDedicated->cqi_ReportModeAperiodic is null!\n");
AssertFatal(UE_template->physicalConfigDedicated->pusch_ConfigDedicated!=NULL,"physicalConfigDedicated->puschConfigDedicated is null!\n");
for (int ri=0;
ri<(1<<ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);
ri++)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =
get_dl_cqi_pmi_size_pusch(&UE_list->UE_sched_ctrl[UE_id],
cc,
tmode,
1+ri,
UE_template->physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic);
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index;
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri = UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_RI_Index;
LOG_I(MAC,"Frame %d, Subframe %d: Requesting CQI information for UE %d/%x => O_r1 %d, betaCQI %d\n",
frameP,subframeP,UE_id,rnti,
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[0],
(int)UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index);