Commit 58c2a006 authored by Robert Schmidt's avatar Robert Schmidt
Browse files

MAC: slicing conf struct in RC

- introduce structure in RC for slicing conf (UL/DL)
- move global variables regarding slice configuration into RC
- change ue_slice_membership(): consider UL/DL
- remove the unnecessary header files
- set default parameters: one slice
parent 1e840a99
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file LAYER2/MAC/eNB_scheduler_dlsch.h
* \brief DLSCH Scheduler policy variables used during different phases of scheduling
* \author Navid Nikaein and Niccolo' Iardella
* \date 2018
* \version 0.2
* \email navid.nikaein@eurecom.fr
*/
/** @defgroup _oai2 openair2 Reference Implementation
* @ingroup _ref_implementation_
* @{
*/
/*@}*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_DLSCH_H__
#define __LAYER2_MAC_ENB_SCHEDULER_DLSCH_H__
// number of active slices for past and current time
int n_active_slices = 1;
int n_active_slices_current = 1;
int slice_counter = 0;
int intraslice_share_active = 1;
int intraslice_share_active_current = 1;
int interslice_share_active = 1;
int interslice_share_active_current = 1;
// RB share for each slice for past and current time
float slice_percentage[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_total = 0;
float slice_percentage_total_current = 0;
float slice_percentage_avg = 0.25;
int slice_isolation[MAX_NUM_SLICES] = {0, 0, 0, 0};
int slice_isolation_current[MAX_NUM_SLICES] = {0, 0, 0, 0};
int slice_priority[MAX_NUM_SLICES] = {10, 5, 2, 0};
int slice_priority_current[MAX_NUM_SLICES] = {10, 5, 2, 0};
// Frequency ranges for slice positioning
int slice_position[MAX_NUM_SLICES*2] = {0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX};
int slice_position_current[MAX_NUM_SLICES*2] = {0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX, 0, N_RBG_MAX};
// MAX MCS for each slice for past and current time
int slice_maxmcs[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int slice_maxmcs_current[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
// The lists of criteria that enforce the sorting policies of the slices
uint32_t slice_sorting[MAX_NUM_SLICES] = {0x012345, 0x012345, 0x012345, 0x012345};
uint32_t slice_sorting_current[MAX_NUM_SLICES] = {0x012345, 0x012345, 0x012345, 0x012345};
// Accounting policy (just greedy(1) or fair(0) setting for now)
int slice_accounting[MAX_NUM_SLICES] = {0, 0, 0, 0};
int slice_accounting_current[MAX_NUM_SLICES] = {0, 0, 0, 0};
int update_dl_scheduler[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
int update_dl_scheduler_current[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
// name of available scheduler
char *dl_scheduler_type[MAX_NUM_SLICES] =
{ "schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec"
};
// pointer to the slice specific scheduler
slice_scheduler_dl slice_sched_dl[MAX_NUM_SLICES] = {0};
pre_processor_results_t pre_processor_results[MAX_NUM_SLICES];
#endif //__LAYER2_MAC_ENB_SCHEDULER_DLSCH_H__
......@@ -62,8 +62,6 @@ extern uint16_t frame_cnt;
extern RAN_CONTEXT_t RC;
extern int n_active_slices;
int choose(int n, int k)
{
int res = 1;
......@@ -4541,7 +4539,7 @@ uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs)
return (uint16_t) floor(rb_percentage * total_rbs);
}
int ue_slice_membership(int UE_id, int slice_id)
int ue_slice_membership(int UE_id, int slice_id, int n_active_slices)
{
if ((slice_id < 0) || (slice_id > n_active_slices))
LOG_W(MAC, "out of range slice id %d\n", slice_id);
......
......@@ -48,7 +48,6 @@
#include "assertions.h"
//#include "LAYER2/MAC/pre_processor.c"
#include "eNB_scheduler_ulsch.h"
#include "pdcp.h"
#if defined(ENABLE_ITTI)
......@@ -64,6 +63,9 @@
#include "T.h"
#include "common/ran_context.h"
extern RAN_CONTEXT_t RC;
#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1
......@@ -923,6 +925,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
uint16_t first_rb[NFAPI_CC_MAX], i;
int CC_id;
eNB_MAC_INST *mac = RC.mac[module_idP];
slice_info_t *sli = &RC.mac[module_idP]->slice_info;
COMMON_channels_t *cc;
start_meas(&mac->schedule_ulsch);
......@@ -1037,112 +1040,112 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
// perform slice-specifc operations
total_slice_percentage_uplink=0;
avg_slice_percentage_uplink=1.0/n_active_slices_uplink;
sli->tot_pct_ul = 0;
sli->avg_pct_ul = 1.0 / sli->n_ul;
// reset the slice percentage for inactive slices
for (i = n_active_slices_uplink; i< MAX_NUM_SLICES; i++) {
slice_percentage_uplink[i]=0;
for (i = sli->n_ul; i< MAX_NUM_SLICES; i++) {
sli->ul[i].pct = 0;
}
for (i = 0; i < n_active_slices_uplink; i++) {
if (slice_percentage_uplink[i] < 0 ){
for (i = 0; i < sli->n_ul; i++) {
if (sli->ul[i].pct < 0 ){
LOG_W(MAC, "[eNB %d] frame %d subframe %d:invalid slice %d percentage %f. resetting to zero",
module_idP, frameP, subframeP, i, slice_percentage_uplink[i]);
slice_percentage_uplink[i]=0;
module_idP, frameP, subframeP, i, sli->ul[i].pct);
sli->ul[i].pct = 0;
}
total_slice_percentage_uplink+=slice_percentage_uplink[i];
sli->tot_pct_ul += sli->ul[i].pct;
}
for (i = 0; i < n_active_slices_uplink; i++) {
for (i = 0; i < sli->n_ul; i++) {
// Load any updated functions
if (update_ul_scheduler[i] > 0 ) {
slice_sched_ul[i] = dlsym(NULL, ul_scheduler_type[i]);
update_ul_scheduler[i] = 0;
update_ul_scheduler_current[i] = 0;
//slice_percentage_current_uplink[i]= slice_percentage_uplink[i];
//total_slice_percentage_current_uplink+=slice_percentage_uplink[i];
//if (total_slice_percentage_current_uplink> 1)
//total_slice_percentage_current_uplink=1;
if (sli->ul[i].update_sched > 0 ) {
sli->ul[i].sched_cb = dlsym(NULL, sli->ul[i].sched_name);
sli->ul[i].update_sched = 0;
sli->ul[i].update_sched_current = 0;
//sli->ul[i].pct_current = sli->ul[i].pct;
//sli->tot_pct_ul_current += sli->ul[i].pct;
//if (sli->tot_pct_ul_current > 1)
//sli->tot_pct_ul_current = 1;
LOG_I(MAC,"update ul scheduler slice %d\n", i);
}
// the new total RB share is within the range
if (total_slice_percentage_uplink <= 1.0){
if (sli->tot_pct_ul <= 1.0){
// check if the number of slices has changed, and log
if (n_active_slices_current_uplink != n_active_slices_uplink ){
if ((n_active_slices_uplink > 0) && (n_active_slices_uplink <= MAX_NUM_SLICES)) {
if (sli->n_ul_current != sli->n_ul ){
if ((sli->n_ul > 0) && (sli->n_ul <= MAX_NUM_SLICES)) {
LOG_I(MAC,"[eNB %d]frame %d subframe %d: number of active UL slices has changed: %d-->%d\n",
module_idP, frameP, subframeP, n_active_slices_current_uplink, n_active_slices_uplink);
n_active_slices_current_uplink = n_active_slices_uplink;
module_idP, frameP, subframeP, sli->n_ul_current, sli->n_ul);
sli->n_ul_current = sli->n_ul;
} else {
LOG_W(MAC,"invalid number of UL slices %d, revert to the previous value %d\n",
n_active_slices_uplink, n_active_slices_current_uplink);
n_active_slices_uplink = n_active_slices_current_uplink;
sli->n_ul, sli->n_ul_current);
sli->n_ul = sli->n_ul_current;
}
}
// check if the slice rb share has changed, and log the console
if (slice_percentage_current_uplink[i] != slice_percentage_uplink[i]){
if (sli->ul[i].pct_current != sli->ul[i].pct){
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: total percentage %f-->%f, slice RB percentage has changed: %f-->%f\n",
module_idP, i, frameP, subframeP, total_slice_percentage_current_uplink,
total_slice_percentage_uplink, slice_percentage_current_uplink[i], slice_percentage_uplink[i]);
total_slice_percentage_current_uplink = total_slice_percentage_uplink;
slice_percentage_current_uplink[i] = slice_percentage_uplink[i];
module_idP, i, frameP, subframeP, sli->tot_pct_ul_current,
sli->tot_pct_ul, sli->ul[i].pct_current, sli->ul[i].pct);
sli->tot_pct_ul_current = sli->tot_pct_ul;
sli->ul[i].pct_current = sli->ul[i].pct;
}
// check if the slice max MCS, and log the console
if (slice_maxmcs_current_uplink[i] != slice_maxmcs_uplink[i]){
if ((slice_maxmcs_uplink[i] >= 0) && (slice_maxmcs_uplink[i] <= 16)){
if (sli->ul[i].maxmcs_current != sli->ul[i].maxmcs){
if ((sli->ul[i].maxmcs >= 0) && (sli->ul[i].maxmcs <= 16)){
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n",
module_idP, i, frameP, subframeP, slice_maxmcs_current_uplink[i], slice_maxmcs_uplink[i]);
slice_maxmcs_current_uplink[i] = slice_maxmcs_uplink[i];
module_idP, i, frameP, subframeP, sli->ul[i].maxmcs_current, sli->ul[i].maxmcs);
sli->ul[i].maxmcs_current = sli->ul[i].maxmcs;
} else {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice max mcs %d, revert the previous value %d\n",
module_idP, i, slice_maxmcs_uplink[i],slice_maxmcs_current_uplink[i]);
slice_maxmcs_uplink[i] = slice_maxmcs_current_uplink[i];
module_idP, i, sli->ul[i].maxmcs, sli->ul[i].maxmcs_current);
sli->ul[i].maxmcs = sli->ul[i].maxmcs_current;
}
}
if (slice_first_rb_current[i] != slice_first_rb[i]){
if (slice_first_rb[i] >= 0){ // FIXME: Max limit is checked in the scheduler
if (sli->ul[i].first_rb_current != sli->ul[i].first_rb){
if (sli->ul[i].first_rb >= 0){ // FIXME: Max limit is checked in the scheduler
LOG_N(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice first rb has changed: %d-->%d\n",
module_idP, i, frameP, subframeP, slice_first_rb_current[i], slice_first_rb[i]);
slice_first_rb_current[i] = slice_first_rb[i];
module_idP, i, frameP, subframeP, sli->ul[i].first_rb_current, sli->ul[i].first_rb);
sli->ul[i].first_rb_current = sli->ul[i].first_rb;
} else {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice first rb %d, revert the previous value %d\n",
module_idP, i, slice_first_rb[i],slice_first_rb_current[i]);
slice_first_rb[i] = slice_first_rb_current[i];
module_idP, i, sli->ul[i].first_rb, sli->ul[i].first_rb_current);
sli->ul[i].first_rb = sli->ul[i].first_rb_current;
}
}
// check if a new scheduler, and log the console
if (update_ul_scheduler_current[i] != update_ul_scheduler[i]){
if (sli->ul[i].update_sched_current != sli->ul[i].update_sched) {
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: UL scheduler for this slice is updated: %s \n",
module_idP, i, frameP, subframeP, ul_scheduler_type[i]);
update_ul_scheduler_current[i] = update_ul_scheduler[i];
module_idP, i, frameP, subframeP, sli->ul[i].sched_name);
sli->ul[i].update_sched_current = sli->ul[i].update_sched;
}
} else {
if (n_active_slices_uplink == n_active_slices_current_uplink) {
if (sli->n_ul == sli->n_ul_current) {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), reduce proportionally the RB share by 0.1\n",
module_idP, i, total_slice_percentage_current_uplink, total_slice_percentage_uplink);
if (slice_percentage_uplink[i] > avg_slice_percentage_uplink) {
slice_percentage_uplink[i] -= 0.1;
total_slice_percentage_uplink -= 0.1;
module_idP, i, sli->tot_pct_ul_current, sli->tot_pct_ul);
if (sli->ul[i].pct > sli->avg_pct_ul) {
sli->ul[i].pct -= 0.1;
sli->tot_pct_ul -= 0.1;
}
} else {
// here we can correct the values, e.g. reduce proportionally
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), revert the number of slice to its previous value (%d->%d)\n",
module_idP, i, total_slice_percentage_current_uplink,
total_slice_percentage_uplink, n_active_slices_uplink,
n_active_slices_current_uplink);
n_active_slices_uplink = n_active_slices_current_uplink;
slice_percentage_uplink[i] = slice_percentage_current_uplink[i];
module_idP, i, sli->tot_pct_ul_current,
sli->tot_pct_ul, sli->n_ul,
sli->n_ul_current);
sli->n_ul = sli->n_ul_current;
sli->ul[i].pct = sli->ul[i].pct_current;
}
}
// Run each enabled slice-specific schedulers one by one
slice_sched_ul[i](module_idP, i, frameP, subframeP, sched_subframe, first_rb);
sli->ul[i].sched_cb(module_idP, i, frameP, subframeP, sched_subframe, first_rb);
}
stop_meas(&mac->schedule_ulsch);
......@@ -1172,6 +1175,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
eNB_MAC_INST *mac = RC.mac[module_idP];
COMMON_channels_t *cc = mac->common_channels;
UE_list_t *UE_list = &mac->UE_list;
slice_info_t *sli = &RC.mac[module_idP]->slice_info;
UE_TEMPLATE *UE_template;
UE_sched_ctrl *UE_sched_ctrl;
int sched_frame = frameP;
......@@ -1193,7 +1197,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
for (CC_id = 0; CC_id < NFAPI_CC_MAX; ++CC_id) {
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
UE_list->first_rb_offset[CC_id][slice_id] = cmin(N_RB_UL, slice_first_rb[slice_id]);
UE_list->first_rb_offset[CC_id][slice_id] = cmin(N_RB_UL, sli->ul[slice_id].first_rb);
}
//LOG_D(MAC, "entering ulsch preprocesor\n");
......@@ -1210,7 +1214,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
for (UE_id = UE_list->head_ul; UE_id >= 0;
UE_id = UE_list->next_ul[UE_id]) {
if (!ue_slice_membership(UE_id, slice_id))
if (!ue_slice_membership(UE_id, slice_id, sli->n_ul))
continue;
// don't schedule if Msg4 is not received yet
......@@ -1398,7 +1402,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_template->oldNDI_UL[harq_pid] = ndi;
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power = normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power = target_rx_power;
UE_template->mcs_UL[harq_pid] = cmin(UE_template->pre_assigned_mcs_ul, slice_maxmcs_uplink[slice_id]);
UE_template->mcs_UL[harq_pid] = cmin(UE_template->pre_assigned_mcs_ul, sli->ul[slice_id].maxmcs);
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1= UE_template->mcs_UL[harq_pid];
//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if (UE_template->pre_allocated_rb_table_index_ul >= 0) {
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file LAYER2/MAC/eNB_scheduler_ulsch.h
* \brief ULSCH Scheduler policy variables used during different phases of scheduling
* \author Navid Nikaein and Niccolo' Iardella
* \date 2018
* \version 0.2
* \email navid.nikaein@eurecom.fr
*/
/** @defgroup _oai2 openair2 Reference Implementation
* @ingroup _ref_implementation_
* @{
*/
/*@}*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_ULSCH_H__
#define __LAYER2_MAC_ENB_SCHEDULER_ULSCH_H__
/* number of active slices for past and current time*/
int n_active_slices_uplink = 1;
int n_active_slices_current_uplink = 1;
/* RB share for each slice for past and current time*/
float avg_slice_percentage_uplink=0.25;
float slice_percentage_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current_uplink[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float total_slice_percentage_uplink = 0;
float total_slice_percentage_current_uplink = 0;
// MAX MCS for each slice for past and current time
int slice_maxmcs_uplink[MAX_NUM_SLICES] = {20, 20, 20, 20};
int slice_maxmcs_current_uplink[MAX_NUM_SLICES] = {20,20,20,20};
int slice_first_rb[MAX_NUM_SLICES] = {0, 0, 0, 0};
int slice_first_rb_current[MAX_NUM_SLICES] = {0,0,0,0};
/*resource blocks allowed*/
uint16_t nb_rbs_allowed_slice_uplink[NFAPI_CC_MAX][MAX_NUM_SLICES];
/*Slice Update */
int update_ul_scheduler[MAX_NUM_SLICES] = {1, 1, 1, 1};
int update_ul_scheduler_current[MAX_NUM_SLICES] = {1, 1, 1, 1};
/* name of available scheduler*/
char *ul_scheduler_type[MAX_NUM_SLICES] = {"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti"
};
/* Slice Function Pointer */
slice_scheduler_ul slice_sched_ul[MAX_NUM_SLICES] = {0};
#endif //__LAYER2_MAC_ENB_SCHEDULER_ULSCH_H__
......@@ -1122,6 +1122,143 @@ typedef struct {
int tail_freelist; ///the tail position of the delete list
} UE_free_list_t;
/// Structure for saving the output of each pre_processor instance
typedef struct {
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint16_t nb_rbs_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX];
uint8_t slice_allocated_rbgs[NFAPI_CC_MAX][N_RBG_MAX];
uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX];
uint32_t bytes_lcid[MAX_MOBILES_PER_ENB][MAX_NUM_LCID];
uint32_t wb_pmi[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint8_t mcs[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
} pre_processor_results_t;
/**
* slice specific scheduler for the DL
*/
typedef void (*slice_scheduler_dl)(module_id_t mod_id,
slice_id_t slice_id,
frame_t frame,
sub_frame_t subframe,
int *mbsfn_flag);
typedef struct {
/// RB share for each slice for past and current time
float pct;
float pct_current;
/// whether this slice is isolated from the others for past and current time
int isol;
int isol_current;
int prio;
int prio_current;
/// Frequency ranges for slice positioning
int pos_low;
int pos_high;
int pos_low_current;
int pos_high_current;
// max mcs for each slice for past and current time
int maxmcs;
int maxmcs_current;
/// criteria for sorting policies of the slices
uint32_t sorting;
uint32_t sorting_current;
/// Accounting policy (just greedy(1) or fair(0) setting for now)
int accounting;
int accounting_current;
/// Whether the scheduler callback should be updated
int update_sched;
int update_sched_current;
/// name of available scheduler
char *sched_name;
/// pointer to the slice specific scheduler in DL
slice_scheduler_dl sched_cb;
} slice_sched_conf_dl_t;
typedef void (*slice_scheduler_ul)(module_id_t mod_id,
slice_id_t slice_id,
frame_t frame,
sub_frame_t subframe,
unsigned char sched_subframe,
uint16_t *first_rb);
typedef struct {
/// RB share for each slice for past and current time
float pct;
float pct_current;
// MAX MCS for each slice for past and current time
int maxmcs;
int maxmcs_current;
/// criteria for sorting policies of the slices
uint32_t sorting;
uint32_t sorting_current;
/// starting RB (RB offset) of UL scheduling
int first_rb;
int first_rb_current;
/// Slice scheduler callback update needed
int update_sched;
int update_sched_current;
/// name of available scheduler
char *sched_name;
/// pointer to the slice specific scheduler in UL
slice_scheduler_ul sched_cb;
} slice_sched_conf_ul_t;
typedef struct {
/// counter used to indicate when all slices have pre-allocated UEs
int slice_counter;
/// indicates whether remaining RBs after first intra-slice allocation will
/// be allocated to UEs of the same slice
int intraslice_share_active;
int intraslice_share_active_current;
/// indicates whether remaining RBs after slice allocation will be
/// allocated to UEs of another slice. Isolated slices will be ignored
int interslice_share_active;
int interslice_share_active_current;
/// number of active slices for past and current time in DL
int n_dl;
int n_dl_current;
/// RB share stats for DL
float tot_pct_dl;
float tot_pct_dl_current;
float avg_pct_dl;
slice_sched_conf_dl_t dl[MAX_NUM_SLICES];
/// number of active slices for past and current time in UL
int n_ul;
int n_ul_current;
/// RB share stats for UL
float tot_pct_ul;
float tot_pct_ul_current;
float avg_pct_ul;
slice_sched_conf_ul_t ul[MAX_NUM_SLICES];
pre_processor_results_t pre_processor_results[MAX_NUM_SLICES];
} slice_info_t;
/*! \brief eNB common channels */
typedef struct {
int physCellId;
......@@ -1242,7 +1379,10 @@ typedef struct eNB_MAC_INST_s {
/// UL handle
uint32_t ul_handle;
UE_list_t UE_list;
/// slice-related configuration
slice_info_t slice_info;
///subband bitmap configuration
SBMAP_CONF sbmap_conf;
/// CCE table used to build DCI scheduling information
......@@ -1575,20 +1715,6 @@ typedef struct {
mui_t rrc_mui[128];
}mac_rlc_am_muilist_t;
/// Structure for saving the output of each pre_processor instance
typedef struct {
uint16_t nb_rbs_required[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint16_t nb_rbs_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX];
uint8_t slice_allocated_rbgs[NFAPI_CC_MAX][N_RBG_MAX];
uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX];