Commit 5c0f42a2 authored by Cedric Roux's avatar Cedric Roux

Merge branch 'develop_integration_w08' into 'develop'

Develop integration w08

Summary of changes:
- various bugs fixed
- pre-commit script for better indentation: see commit 068ce4ca
  For the moment, each contributor has to enable the script (and install astyle) by hand.
  Maybe at some point the script will be mandatory.

See merge request !124
parents 38771f27 465ab00b
......@@ -136,6 +136,20 @@ clean_all_files() {
# Compilers
###################################
#check_warnings:
# print error message if the compilation had warnings
#argument:
# $1: log file
check_warnings() {
#we look for 'warning:' in the compilation log file
#this is how gcc starts a warning
#this is not perfect, we may get false positive
warning_count=`grep "warning:" "$1"|wc -l`
if [ $warning_count -gt 0 ]; then
echo_error "WARNING: $warning_count warnings. See $1"
fi
}
compilations() {
cd $OPENAIR_DIR/cmake_targets/$1/build
set +e
......@@ -153,6 +167,7 @@ compilations() {
if [ -s $3 ] ; then
cp $3 $4
echo_success "$2 compiled"
check_warnings "$dlog/$2.$REL.txt"
else
echo_error "$2 compilation failed"
exit 1
......
......@@ -2969,3 +2969,53 @@ struct DCI0A_20_MHz {
#define sizeof_DCI0A_20MHz 17
#define MAX_DCI_SIZE_BITS 45
struct DCI_INFO_EXTRACTED {
/// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
uint8_t type;
/// Resource Allocation Header
uint8_t rah;
/// HARQ Process
uint8_t harq_pid;
/// CQI Request
uint8_t cqi_req;
/// SRS Request
uint8_t srs_req;
/// Power Control
uint8_t TPC;
/// Localized/Distributed VRB
uint8_t vrb_type;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc;
// Applicable only when vrb_type = 1
uint8_t Ngap;
/// Cyclic shift
uint8_t cshift;
/// Hopping flag
uint8_t hopping;
/// Downlink Assignment Index
uint8_t dai;
/// DAI (TDD)
uint8_t ulindex;
/// TB swap
uint8_t tb_swap;
/// TPMI information for precoding
uint8_t tpmi;
/// Redundancy version 2
uint8_t rv2;
/// New Data Indicator 2
uint8_t ndi2;
/// Modulation and Coding Scheme and Redundancy Version 2
uint8_t mcs2;
/// Redundancy version 1
uint8_t rv1;
/// New Data Indicator 1
uint8_t ndi1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint8_t mcs1;
/// Scrambling ID
uint64_t ap_si_nl_id:3;
};
typedef struct DCI_INFO_EXTRACTED DCI_INFO_EXTRACTED_t;
......@@ -3941,71 +3941,19 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
}
int generate_ue_dlsch_params_from_dci(int frame,
uint8_t subframe,
void *dci_pdu,
uint16_t rnti,
DCI_format_t dci_format,
LTE_UE_DLSCH_t **dlsch,
LTE_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
uint8_t beamforming_mode,
uint16_t tc_rnti)
void extract_dci1A_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
{
uint8_t harq_pid=0;
uint32_t rballoc=0,RIV_max=0;
uint8_t frame_type=frame_parms->frame_type;
uint32_t rballoc=0;
uint8_t vrb_type=0;
uint8_t mcs=0,mcs1=0,mcs2=0;
uint8_t rv=0,rv1=0,rv2=0;
uint8_t TB0_active=0,TB1_active=0;
uint8_t ndi=0,ndi1=0,ndi2=0;
uint8_t rah=0;
uint8_t mcs=0;
uint8_t rv=0;
uint8_t ndi=0;
uint8_t TPC=0;
uint8_t NPRB=0,tbswap=0,tpmi=0;
uint8_t Ngap;
uint8_t dai=0;
LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
if (!dlsch[0]) return -1;
#ifdef DEBUG_DCI
LOG_D(PHY,"dci_tools.c: Filling ue dlsch params -> rnti %x, SFN/SF %d/%d, dci_format %s\n",
rnti,
frame%1024,
subframe,
(dci_format==format0? "Format 0":(
dci_format==format1? "format 1":(
dci_format==format1A? "format 1A":(
dci_format==format1B? "format 1B":(
dci_format==format1C? "format 1C":(
dci_format==format1D? "format 1D":(
dci_format==format1E_2A_M10PRB? "format 1E_2A_M10PRB":(
dci_format==format2? "format 2":(
dci_format==format2A? "format 2A":(
dci_format==format2B? "format 2B":(
dci_format==format2C? "format 2C":(
dci_format==format2D? "format 2D":(
dci_format==format3? "format 3": "UNKNOWN"
))))))))))))));
#endif
switch (dci_format) {
case format0: // This is an ULSCH allocation so nothing here, inform MAC
LOG_E(PHY,"format0 not possible\n");
return(-1);
break;
case format1A:
if (!dlsch[0]) return -1;
uint8_t dai=0;
switch (frame_parms->N_RB_DL) {
switch (N_RB_DL) {
case 6:
if (frame_type == TDD) {
vrb_type = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->vrb_type;
......@@ -4027,41 +3975,6 @@ int generate_ue_dlsch_params_from_dci(int frame,
harq_pid = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
//printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
}
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
harq_pid = 0;
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
// see 36-212 V8.6.0 p. 45
NPRB = (TPC&1) + 2;
} else {
if (harq_pid>=8) {
LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
NPRB = RIV2nb_rb_LUT6[rballoc];
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
}
if (vrb_type == LOCALIZED) {
dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT6[rballoc];
dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT6[rballoc];
}
else {
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
}
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];//NPRB;
RIV_max = RIV_max6;
break;
case 25:
......@@ -4087,35 +4000,6 @@ int generate_ue_dlsch_params_from_dci(int frame,
//printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
}
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
harq_pid = 0;
// see 36-212 V8.6.0 p. 45
NPRB = (TPC&1) + 2;
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
} else {
if (harq_pid>=8) {
LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
NPRB = RIV2nb_rb_LUT25[rballoc];
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
}
if (vrb_type == LOCALIZED) {
dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT25[rballoc];
dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT25[rballoc];
}
else {
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT25[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT25[rballoc];
}
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT25[rballoc];
RIV_max = RIV_max25;
break;
case 50:
......@@ -4139,50 +4023,6 @@ int generate_ue_dlsch_params_from_dci(int frame,
harq_pid = ((DCI1A_10MHz_FDD_t *)dci_pdu)->harq_pid;
//printf("FDD 1A: mcs %d, vrb_type %d, rballoc %x,ndi %d, rv %d, TPC %d\n",mcs,vrb_type,rballoc,ndi,rv,TPC);
}
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
harq_pid = 0;
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
// see 36-212 V8.6.0 p. 45
NPRB = (TPC&1) + 2;
} else {
if (harq_pid>=8) {
LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
NPRB = RIV2nb_rb_LUT50[rballoc];
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
}
if (vrb_type == LOCALIZED) {
dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
// printf("rballoc: %08x.%08x\n",dlsch0_harq->rb_alloc_even[0],dlsch0_harq->rb_alloc_even[1]);
} else { // DISTRIBUTED
if ((rballoc&(1<<10)) == 0) {
rballoc = rballoc&(~(1<<10));
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
}
else {
rballoc = rballoc&(~(1<<10));
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
}
}
dlsch0_harq->vrb_type = vrb_type;
dlsch0_harq->nb_rb = RIV2nb_rb_LUT50[rballoc];//NPRB;
RIV_max = RIV_max50;
break;
case 100:
......@@ -4206,387 +4046,111 @@ int generate_ue_dlsch_params_from_dci(int frame,
harq_pid = ((DCI1A_20MHz_FDD_t *)dci_pdu)->harq_pid;
//printf("FDD 1A: mcs %d, rballoc %x,rv %d, TPC %d\n",mcs,rballoc,rv,TPC);
}
break;
}
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
harq_pid = 0;
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
// see 36-212 V8.6.0 p. 45
NPRB = (TPC&1) + 2;
} else {
pdci_info_extarcted->vrb_type = vrb_type;
pdci_info_extarcted->mcs1 = mcs;
pdci_info_extarcted->rballoc = rballoc;
pdci_info_extarcted->rv1 = rv;
pdci_info_extarcted->ndi1 = ndi;
pdci_info_extarcted->TPC = TPC;
pdci_info_extarcted->harq_pid = harq_pid;
pdci_info_extarcted->dai = dai;
}
if (harq_pid>=8) {
LOG_E(PHY,"Format 1A: harq_pid=%d >= 8\n", harq_pid);
return(-1);
}
void extract_dci1C_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
{
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
NPRB = RIV2nb_rb_LUT100[rballoc];
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
}
uint32_t rballoc=0;
uint8_t mcs=0;
if (vrb_type == LOCALIZED) {
dlsch0_harq->rb_alloc_even[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_even[1] = localRIV2alloc_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_even[2] = localRIV2alloc_LUT100_2[rballoc];
dlsch0_harq->rb_alloc_even[3] = localRIV2alloc_LUT100_3[rballoc];
dlsch0_harq->rb_alloc_odd[0] = localRIV2alloc_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = localRIV2alloc_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[2] = localRIV2alloc_LUT100_2[rballoc];
dlsch0_harq->rb_alloc_odd[3] = localRIV2alloc_LUT100_3[rballoc];
} else {
if ((rballoc&(1<<10)) == 0) { //Gap 1
rballoc = rballoc&(~(1<<12));
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap0_even_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap0_even_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap0_even_LUT100_2[rballoc];
dlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap0_even_LUT100_3[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap0_odd_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap0_odd_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap0_odd_LUT100_2[rballoc];
dlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap0_odd_LUT100_3[rballoc];
}
else { //Gap 2
rballoc = rballoc&(~(1<<12));
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_gap1_even_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_even[1] = distRIV2alloc_gap1_even_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_even[2] = distRIV2alloc_gap1_even_LUT100_2[rballoc];
dlsch0_harq->rb_alloc_even[3] = distRIV2alloc_gap1_even_LUT100_3[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_gap1_odd_LUT50_0[rballoc];
dlsch0_harq->rb_alloc_odd[1] = distRIV2alloc_gap1_odd_LUT50_1[rballoc];
dlsch0_harq->rb_alloc_odd[2] = distRIV2alloc_gap1_odd_LUT100_2[rballoc];
dlsch0_harq->rb_alloc_odd[3] = distRIV2alloc_gap1_odd_LUT100_3[rballoc];
}
}
dlsch0_harq->vrb_type = vrb_type;
switch (N_RB_DL) {
case 6:
mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6);
dlsch0_harq->nb_rb = RIV2nb_rb_LUT100[rballoc];//NPRB;
RIV_max = RIV_max100;
break;
}
if (rballoc>RIV_max) {
LOG_E(PHY,"Format 1A: rb_alloc > RIV_max\n");
return(-1);
}
case 25:
mcs = ((DCI1C_5MHz_t *)dci_pdu)->mcs;
rballoc = conv_1C_RIV(((DCI1C_5MHz_t *)dci_pdu)->rballoc,6);
if (NPRB==0) {
LOG_E(PHY,"Format 1A: NPRB=0\n");
return(-1);
}
break;
if((mcs>28) && ( (dlsch0_harq->round == 0) || (rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti) ))
{
// DCI false detection
return(-1);
}
if((rv!=0) && (dlsch0_harq->round == 0) && (rnti != si_rnti) && (rnti != p_rnti) && (rnti != ra_rnti))
{
// DCI false detection
return(-1);
}
case 50:
mcs = ((DCI1C_10MHz_t *)dci_pdu)->mcs;
rballoc = conv_1C_RIV(((DCI1C_10MHz_t *)dci_pdu)->rballoc,6);
// change the mcs limit from 7 to 8, supported by MAC
/* if (mcs > 10) {
LOG_E(PHY,"Format 1A: subframe %d unlikely mcs for format 1A (%d), TPC %d rv %d\n",subframe,mcs,TPC,rv);
return(-1);
}*/
break;
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) { //
// if ((dlsch0_harq->round == 4) || ( {
dlsch0_harq->round = 0;
dlsch0_harq->first_tx = 1;
// }
case 100:
mcs = ((DCI1C_20MHz_t *)dci_pdu)->mcs;
rballoc = conv_1C_RIV(((DCI1C_20MHz_t *)dci_pdu)->rballoc,6);
break;
// if (dlsch0_harq->round == 0)
// ndi = 1-dlsch0_harq->DCINdi;
default:
AssertFatal(0,"Format 1C: Unknown N_RB_DL %d\n",N_RB_DL);
break;
}
dlsch[0]->current_harq_pid = harq_pid;
dlsch0_harq->rvidx = rv;
dlsch0_harq->Nl = 1;
// dlsch[0]->layer_index = 0;
dlsch0_harq->mimo_mode = frame_parms->mode1_flag == 1 ?SISO : ALAMOUTI;
dlsch0_harq->dl_power_off = 1; //no power offset
dlsch0_harq->codeword=0;
pdci_info_extarcted->mcs1 = mcs;
pdci_info_extarcted->rballoc = rballoc;
}
LOG_D(PHY,"UE (%x/%d): Subframe %d Format1A DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d, round %d\n",
dlsch[0]->rnti,
harq_pid,
subframe,
ndi,
dlsch0_harq->DCINdi,
dlsch0_harq->first_tx,
dlsch0_harq->status,
dlsch0_harq->round);
void extract_dci1_info(uint8_t N_RB_DL, lte_frame_type_t frame_type, void *dci_pdu, DCI_INFO_EXTRACTED_t *pdci_info_extarcted)
{
dlsch[0]->active = 1;
uint32_t rballoc=0;
uint8_t mcs=0;
uint8_t rah=0;
uint8_t rv=0;
uint8_t TPC=0;
uint8_t ndi=0;
uint8_t harq_pid=0;
if ((ndi!=dlsch0_harq->DCINdi)|| // DCI has been toggled or this is the first transmission
switch (N_RB_DL) {
case 6:
if (frame_type == TDD) {
mcs = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->mcs;
rballoc = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rah;
rv = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->rv;
TPC = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->TPC;
ndi = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->ndi;
harq_pid = ((DCI1_1_5MHz_TDD_t *)dci_pdu)->harq_pid;
} else {
mcs = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->mcs;
rah = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rah;
rballoc = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rballoc;
rv = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->rv;
TPC = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->TPC;
ndi = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->ndi;
harq_pid = ((DCI1_1_5MHz_FDD_t *)dci_pdu)->harq_pid;
}
(dlsch0_harq->first_tx==1)) {
dlsch0_harq->round = 0;
break;
if (dlsch0_harq->first_tx==1) {
//LOG_I(PHY,"[PDSCH %x/%d] Format 1A DCI First TX: Clearing flag\n");
dlsch0_harq->first_tx = 0;
case 25:
if (frame_type == TDD) {
mcs = ((DCI1_5MHz_TDD_t *)dci_pdu)->mcs;
rballoc = ((DCI1_5MHz_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI1_5MHz_TDD_t *)dci_pdu)->rah;
rv = ((DCI1_5MHz_TDD_t *)dci_pdu)->rv;
TPC = ((DCI1_5MHz_TDD_t *)dci_pdu)->TPC;
ndi = ((DCI1_5MHz_TDD_t *)dci_pdu)->ndi;
harq_pid = ((DCI1_5MHz_TDD_t *)dci_pdu)->harq_pid;
} else {
mcs = ((DCI1_5MHz_FDD_t *)dci_pdu)->mcs;
rah = ((DCI1_5MHz_FDD_t *)dci_pdu)->rah;
rballoc = ((DCI1_5MHz_FDD_t *)dci_pdu)->rballoc;
rv = ((DCI1_5MHz_FDD_t *)dci_pdu)->rv;
TPC = ((DCI1_5MHz_FDD_t *)dci_pdu)->TPC;
ndi = ((DCI1_5MHz_FDD_t *)dci_pdu)->ndi;
harq_pid = ((DCI1_5MHz_FDD_t *)dci_pdu)->harq_pid;
}
} else if (dlsch0_harq->round == 0) { // duplicated PDSCH received. possibly eNB missed the previous DL ACK/NACK feedback
// skip PDSCH decoding
dlsch[0]->active = 0;
// report ACK back to eNB for this duplicated PDSCH
dlsch0_harq->status = SCH_IDLE;
dlsch0_harq->round = 0;
dlsch[0]->harq_ack[subframe].ack = 1;
dlsch[0]->harq_ack[subframe].harq_id = harq_pid;
dlsch[0]->harq_ack[subframe].send_harq_status = 1;
LOG_D(PHY,"UE (%x/%d): Format1A DCI: Duplicated PDSCH. Setting ACK for subframe %d (pid %d, round 0)\n",
dlsch[0]->rnti,harq_pid, subframe,harq_pid);
}
LOG_D(PHY,"UE (%x/%d): SFN/SF %4d/%1d Format1A DCI: dai %d, ndi %d, old_ndi %d (first tx %d), harq_status %d, round %d\n",
rnti,
harq_pid,
frame % 1024,
subframe,
dai,
ndi,
dlsch0_harq->DCINdi,
dlsch0_harq->first_tx,
dlsch0_harq->status,
dlsch0_harq->round);
if (rnti == tc_rnti) {
dlsch0_harq->DCINdi = (uint8_t)-1;
LOG_D(PHY,"UE (%x/%d): Format1A DCI: C-RNTI is temporary. Set NDI = %d and to be ignored\n",
rnti,harq_pid,dlsch0_harq->DCINdi);
} else {
dlsch0_harq->DCINdi = ndi;
}
dlsch[0]->harq_ack[subframe].vDAI_DL = dai+1;
// this a retransmission
if(dlsch0_harq->round)
{
// compare old TBS to new TBS
if((mcs<29) && (dlsch0_harq->TBS != TBStable[get_I_TBS(mcs)][NPRB-1]))
{
// this is an eNB issue
// retransmisison but old and new TBS are different !!!
// work around, consider it as a new transmission
LOG_E(PHY,"Format1A Retransmission but TBS are different: consider it as new transmission !!! \n");
dlsch0_harq->round = 0;
}
}
if(mcs<29)
{
dlsch0_harq->mcs = mcs;
}
if ((rnti==si_rnti) || (rnti==p_rnti) || (rnti==ra_rnti)) {
dlsch0_harq->TBS = TBStable[mcs][NPRB-1];
dlsch0_harq->Qm = 2;
}
else {
if(mcs < 29)
dlsch0_harq->TBS = TBStable[get_I_TBS(mcs)][NPRB-1];
dlsch0_harq->Qm = get_Qm(mcs);
}
dlsch[0]->rnti = rnti;
dlsch0 = dlsch[0];
if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
//printf("Format 1A: harq_pid %d, nb_rb %d, round %d\n",harq_pid,dlsch0_harq->nb_rb,dlsch0_harq->round);
break;
case format1C:
if (!dlsch[0]) return -1;
harq_pid = 0;
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
switch (frame_parms->N_RB_DL) {
case 6:
mcs = ((DCI1C_1_5MHz_t *)dci_pdu)->mcs;
rballoc = conv_1C_RIV(((DCI1C_1_5MHz_t *)dci_pdu)->rballoc,6);
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rballoc];
dlsch0_harq->rb_alloc_even[0] = distRIV2alloc_even_LUT6[rballoc];
dlsch0_harq->rb_alloc_odd[0] = distRIV2alloc_odd_LUT6[rballoc];
RIV_max = RIV_max6;
break;