Commit 6a3687fe authored by Louis Adrien Dufrene's avatar Louis Adrien Dufrene
Browse files

astyle applied

parent 700437f1
......@@ -28,9 +28,9 @@
#include "common/ran_context.h"
char* namepointer_chMag ;
char *namepointer_chMag ;
char fmageren_name2[512];
char* namepointer_log2;
char *namepointer_log2;
#include "PHY/LTE_REFSIG/primary_synch.h"
......@@ -45,7 +45,7 @@ int16_t *primary_synch2_time;
PHY_VARS_UE ***PHY_vars_UE_g;
LTE_DL_FRAME_PARMS *lte_frame_parms_g;
#else
PHY_VARS_UE * PHY_vars_UE_g[MAX_UE][MAX_NUM_CCs]={NULL};
PHY_VARS_UE *PHY_vars_UE_g[MAX_UE][MAX_NUM_CCs]= {NULL};
#endif
......@@ -62,10 +62,10 @@ char mode_string[4][20] = {"NOT SYNCHED","PRACH","RAR","PUSCH"};
#ifndef OPENAIR2
unsigned char NB_eNB_INST=0;
unsigned char NB_UE_INST=0;
unsigned char NB_RN_INST=0;
unsigned char NB_INST=0;
unsigned char NB_eNB_INST=0;
unsigned char NB_UE_INST=0;
unsigned char NB_RN_INST=0;
unsigned char NB_INST=0;
#endif
unsigned int ULSCH_max_consecutive_errors = 20;
......@@ -134,9 +134,9 @@ double beta2_dlsch[6][MCS_COUNT] = { {2.52163, 0.83231, 0.77472, 1.36536, 1.1682
#ifdef OCP_FRAMEWORK
#include <enums.h>
#else
char eNB_functions[6][20]={"eNodeB_3GPP","eNodeB_3GPP_BBU","NGFI_RAU_IF4p5","NGFI_RRU_IF5","NGFI_RRU_IF4p5",};
char eNB_timing[2][20]={"synch_to_ext_device","synch_to_other"};
char ru_if_types[MAX_RU_IF_TYPES][20]={"local RF","IF5 RRU","IF5 Mobipass","IF4p5 RRU","IF1pp RRU"};
char eNB_functions[6][20]= {"eNodeB_3GPP","eNodeB_3GPP_BBU","NGFI_RAU_IF4p5","NGFI_RRU_IF5","NGFI_RRU_IF4p5",};
char eNB_timing[2][20]= {"synch_to_ext_device","synch_to_other"};
char ru_if_types[MAX_RU_IF_TYPES][20]= {"local RF","IF5 RRU","IF5 Mobipass","IF4p5 RRU","IF1pp RRU"};
#endif
/// lookup table for unscrambling in RX
......
......@@ -45,7 +45,7 @@
#ifndef PUCCH
#define PUCCH
#define PUCCH
#endif
#include "LAYER2/MAC/mac.h"
......@@ -55,7 +55,7 @@
#include "UTIL/OPT/opt.h"
#if defined(ENABLE_ITTI)
# include "intertask_interface.h"
#include "intertask_interface.h"
#endif
#include "PHY/defs_UE.h"
......@@ -77,15 +77,13 @@ void Msg1_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8
void Msg3_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
#endif
void get_dumpparam(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t nb_rb,
uint32_t *alloc_even, uint8_t subframe,uint32_t Qm, uint32_t Nl, uint32_t tm,
uint8_t *nsymb, uint32_t *coded_bits_per_codeword) {
*nsymb = (ue->frame_parms.Ncp == 0) ? 14 : 12;
*coded_bits_per_codeword = get_G(&ue->frame_parms,
nb_rb,
alloc_even,
......@@ -97,21 +95,18 @@ void get_dumpparam(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t
tm);
}
void dump_dlsch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid)
{
void dump_dlsch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid) {
if (LOG_DUMPFLAG(DEBUG_UE_PHYPROC)) {
unsigned int coded_bits_per_codeword;
uint8_t nsymb ;
get_dumpparam(ue, proc, eNB_id,
ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->nb_rb ,
ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->nb_rb,
ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->rb_alloc_even,
subframe,
ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->Qm,
ue->dlsch[ue->current_thread_id[subframe]][eNB_id][0]->harq_processes[harq_pid]->Nl,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
&nsymb, &coded_bits_per_codeword);
LOG_M("rxsigF0.m","rxsF0", ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,2,1);
LOG_M("rxsigF0_ext.m","rxsF0_ext", ue->pdsch_vars[ue->current_thread_id[subframe]][0]->rxdataF_ext[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,1,1);
LOG_M("dlsch00_ch0_ext.m","dl00_ch0_ext", ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates_ext[0],300*nsymb,1,1);
......@@ -123,24 +118,20 @@ void dump_dlsch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subf
*/
LOG_M("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", ue->pdsch_vars[ue->current_thread_id[subframe]][0]->rxdataF_comp0[0],300*12,1,1);
LOG_M("dlsch_rxF_llr.m","dlsch_llr", ue->pdsch_vars[ue->current_thread_id[subframe]][0]->llr[0],coded_bits_per_codeword,1,0);
LOG_M("dlsch_mag1.m","dlschmag1",ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_mag0,300*12,1,1);
LOG_M("dlsch_mag2.m","dlschmag2",ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_magb0,300*12,1,1);
}
}
void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe)
{
if (LOG_DUMPFLAG(DEBUG_UE_PHYPROC)){
void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe) {
if (LOG_DUMPFLAG(DEBUG_UE_PHYPROC)) {
unsigned int coded_bits_per_codeword;
uint8_t nsymb;
get_dumpparam(ue, proc, eNB_id,
ue->dlsch_SI[eNB_id]->harq_processes[0]->nb_rb,
ue->dlsch_SI[eNB_id]->harq_processes[0]->rb_alloc_even,
subframe,2,1,0,
&nsymb, &coded_bits_per_codeword);
LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
ue->Mod_id,
ue->frame_parms.ofdm_symbol_size,
......@@ -150,9 +141,7 @@ void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
ue->dlsch_SI[eNB_id]->harq_processes[0]->nb_rb,
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->num_pdcch_symbols,
coded_bits_per_codeword);
LOG_M("rxsig0.m","rxs0", &ue->common_vars.rxdata[0][subframe*ue->frame_parms.samples_per_tti],ue->frame_parms.samples_per_tti,1,1);
LOG_M("rxsigF0.m","rxsF0", ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[0],nsymb*ue->frame_parms.ofdm_symbol_size,1,1);
LOG_M("rxsigF0_ext.m","rxsF0_ext", ue->pdsch_vars_SI[0]->rxdataF_ext[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,1,1);
LOG_M("dlsch00_ch0_ext.m","dl00_ch0_ext", ue->pdsch_vars_SI[0]->dl_ch_estimates_ext[0],ue->frame_parms.N_RB_DL*12*nsymb,1,1);
......@@ -164,7 +153,6 @@ void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
*/
LOG_M("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", ue->pdsch_vars_SI[0]->rxdataF_comp0[0],ue->frame_parms.N_RB_DL*12*nsymb,1,1);
LOG_M("dlsch_rxF_llr.m","dlsch_llr", ue->pdsch_vars_SI[0]->llr[0],coded_bits_per_codeword,1,0);
LOG_M("dlsch_mag1.m","dlschmag1",ue->pdsch_vars_SI[0]->dl_ch_mag0,300*nsymb,1,1);
LOG_M("dlsch_mag2.m","dlschmag2",ue->pdsch_vars_SI[0]->dl_ch_magb0,300*nsymb,1,1);
sleep(1);
......@@ -214,9 +202,7 @@ void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
}
*/
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb)
{
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb) {
int gain_dB;
double gain_lin;
......@@ -232,19 +218,15 @@ unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb
#endif
void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe)
{
if (LOG_DUMPFLAG(DEBUG_UE_PHYPROC)){
void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe) {
if (LOG_DUMPFLAG(DEBUG_UE_PHYPROC)) {
unsigned int coded_bits_per_codeword;
uint8_t nsymb ;
get_dumpparam(ue, proc, eNB_id,
ue->dlsch_SI[eNB_id]->harq_processes[0]->nb_rb,
ue->dlsch_SI[eNB_id]->harq_processes[0]->rb_alloc_even,
subframe,2,1,0,
&nsymb, &coded_bits_per_codeword);
LOG_D(PHY,"[UE %d] Dumping dlsch_ra : nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
ue->Mod_id,
ue->dlsch_ra[eNB_id]->harq_processes[0]->nb_rb,
......@@ -252,7 +234,6 @@ void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
ue->dlsch_ra[eNB_id]->harq_processes[0]->nb_rb,
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->num_pdcch_symbols,
coded_bits_per_codeword);
LOG_M("rxsigF0.m","rxsF0", ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF[0],2*12*ue->frame_parms.ofdm_symbol_size,2,1);
LOG_M("rxsigF0_ext.m","rxsF0_ext", ue->pdsch_vars_ra[0]->rxdataF_ext[0],2*12*ue->frame_parms.ofdm_symbol_size,1,1);
LOG_M("dlsch00_ch0_ext.m","dl00_ch0_ext", ue->pdsch_vars_ra[0]->dl_ch_estimates_ext[0],300*nsymb,1,1);
......@@ -264,18 +245,14 @@ void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
*/
LOG_M("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", ue->pdsch_vars_ra[0]->rxdataF_comp0[0],300*nsymb,1,1);
LOG_M("dlsch_rxF_llr.m","dlsch_llr", ue->pdsch_vars_ra[0]->llr[0],coded_bits_per_codeword,1,0);
LOG_M("dlsch_mag1.m","dlschmag1",ue->pdsch_vars_ra[0]->dl_ch_mag0,300*nsymb,1,1);
LOG_M("dlsch_mag2.m","dlschmag2",ue->pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
}
}
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index) {
// This flushes ALL DLSCH and ULSCH harq buffers of ALL connected eNBs...add the eNB_index later
// for more flexibility
uint8_t i,j,k,s;
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
......@@ -287,6 +264,7 @@ void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
if(ue->dlsch[l][i][j]) {
for(k=0; k<NUMBER_OF_HARQ_PID_MAX && ue->dlsch[l][i][j]->harq_processes[k]; k++) {
ue->dlsch[l][i][j]->harq_processes[k]->status = SCH_IDLE;
for (s=0; s<10; s++) {
// reset ACK/NACK bit to DTX for all subframes s = 0..9
ue->dlsch[l][i][j]->harq_ack[s].ack = 2;
......@@ -304,20 +282,16 @@ void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
ue->ulsch[i]->harq_processes[k]->status = SCH_IDLE;
//Set NDIs for all UL HARQs to 0
// ue->ulsch[i]->harq_processes[k]->Ndi = 0;
}
}
// flush Msg3 buffer
ue->ulsch_Msg3_active[i] = 0;
}
}
}
void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index) {
// if contention resolution fails, go back to PRACH
PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PRACH;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_index]->crnti_is_temporary = 0;
......@@ -327,13 +301,9 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
LOG_E(PHY,"[UE %d] Random-access procedure fails, going back to PRACH, setting SIStatus = 0, discard temporary C-RNTI and State RRC_IDLE\n",Mod_id);
}
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index) {
int i;
LOG_I(PHY,"[UE %d][RAPROC] Random-access procedure succeeded. Set C-RNTI = Temporary C-RNTI\n",Mod_id);
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[0][eNB_index]->crnti_is_temporary = 0;
PHY_vars_UE_g[Mod_id][CC_id]->pdcch_vars[1][eNB_index]->crnti_is_temporary = 0;
PHY_vars_UE_g[Mod_id][CC_id]->ulsch_Msg3_active[eNB_index] = 0;
......@@ -347,50 +317,31 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
PHY_vars_UE_g[Mod_id][CC_id]->ulsch[eNB_index]->harq_processes[i]->subframe_scheduling_flag=0;
}
}
}
UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index) {
return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index]);
}
void process_timing_advance_rar(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint16_t timing_advance) {
ue->timing_advance = timing_advance*4;
if (LOG_DEBUGFLAG(DEBUG_UE_PHYPROC)) {
/* TODO: fix this log, what is 'HW timing advance'? */
/*LOG_I(PHY,"[UE %d] AbsoluteSubFrame %d.%d, received (rar) timing_advance %d, HW timing advance %d\n",ue->Mod_id,proc->frame_rx, proc->subframe_rx, ue->timing_advance);*/
LOG_UI(PHY,"[UE %d] AbsoluteSubFrame %d.%d, received (rar) timing_advance %d\n",ue->Mod_id,proc->frame_rx, proc->subframe_rx, ue->timing_advance);
}
}
void process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance)
{
void process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance) {
// uint32_t frame = PHY_vars_UE_g[Mod_id]->frame;
// timing advance has Q1.5 format
timing_advance = timing_advance - 31;
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance = PHY_vars_UE_g[Mod_id][CC_id]->timing_advance+timing_advance*4; //this is for 25RB only!!!
LOG_D(PHY,"[UE %d] Got timing advance %d from MAC, new value %d\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
}
uint8_t is_SR_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id)
{
uint8_t is_SR_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id) {
int subframe=proc->subframe_tx;
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d Checking for SR TXOp (sr_ConfigIndex %d)\n",
ue->Mod_id,ue->pdcch_vars[ue->current_thread_id[proc->subframe_rx]][eNB_id]->crnti,proc->frame_tx,subframe,
ue->scheduling_request_config[eNB_id].sr_ConfigIndex);
......@@ -415,8 +366,7 @@ uint8_t is_SR_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id)
return(0);
}
uint8_t is_cqi_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id)
{
uint8_t is_cqi_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id) {
int subframe = proc->subframe_tx;
int frame = proc->frame_tx;
CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[eNB_id].CQI_ReportPeriodic;
......@@ -433,10 +383,7 @@ uint8_t is_cqi_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id)
else
return(0);
}
uint8_t is_ri_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id)
{
uint8_t is_ri_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id) {
int subframe = proc->subframe_tx;
int frame = proc->frame_tx;
CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[eNB_id].CQI_ReportPeriodic;
......@@ -462,22 +409,17 @@ void compute_cqi_ri_resources(PHY_VARS_UE *ue,
uint16_t p_rnti,
uint16_t cba_rnti,
uint8_t cqi_status,
uint8_t ri_status)
{
uint8_t ri_status) {
//PHY_MEASUREMENTS *meas = &ue->measurements;
//uint8_t transmission_mode = ue->transmission_mode[eNB_id];
//LOG_I(PHY,"compute_cqi_ri_resources O_RI %d O %d uci format %d \n",ulsch->O_RI,ulsch->O,ulsch->uci_format);
if (cqi_status == 1 || ri_status == 1)
{
if (cqi_status == 1 || ri_status == 1) {
ulsch->O = 4;
}
}
void ue_compute_srs_occasion(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t isSubframeSRS)
{
void ue_compute_srs_occasion(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t isSubframeSRS) {
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int frame_tx = proc->frame_tx;
int subframe_tx = proc->subframe_tx;
......@@ -486,43 +428,36 @@ void ue_compute_srs_occasion(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id
uint16_t srsOffset;
uint8_t is_pucch2_subframe = 0;
uint8_t is_sr_an_subframe = 0;
// check for SRS opportunity
pSoundingrs_ul_config_dedicated->srsUeSubframe = 0;
pSoundingrs_ul_config_dedicated->srsCellSubframe = isSubframeSRS;
if (isSubframeSRS) {
LOG_D(PHY," SrsDedicatedSetup: %d \n",pSoundingrs_ul_config_dedicated->srsConfigDedicatedSetup);
if(pSoundingrs_ul_config_dedicated->srsConfigDedicatedSetup)
{
compute_srs_pos(frame_parms->frame_type, pSoundingrs_ul_config_dedicated->srs_ConfigIndex, &srsPeriodicity, &srsOffset);
if(pSoundingrs_ul_config_dedicated->srsConfigDedicatedSetup) {
compute_srs_pos(frame_parms->frame_type, pSoundingrs_ul_config_dedicated->srs_ConfigIndex, &srsPeriodicity, &srsOffset);
LOG_D(PHY," srsPeriodicity: %d srsOffset: %d isSubframeSRS %d \n",srsPeriodicity,srsOffset,isSubframeSRS);
// transmit SRS if the four following constraints are respected:
// - UE is configured to transmit SRS
// - SRS are configured in current subframe
// - UE is configured to send SRS in this subframe
// 36.213 8.2
// 1- A UE shall not transmit SRS whenever SRS and PUCCH format 2/2a/2b transmissions happen to coincide in the same subframe
// 2- A UE shall not transmit SRS whenever SRS transmit
// on and PUCCH transmission carrying ACK/NACK and/or
// positive SR happen to coincide in the same subframe if the parameter
// Simultaneous-AN-and-SRS is FALSE
// check PUCCH format 2/2a/2b transmissions
is_pucch2_subframe = is_cqi_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.cqi_PMI_ConfigIndex>0);
is_pucch2_subframe = (is_ri_TXOp(ue,proc,eNB_id) && (ue->cqi_report_config[eNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0)) || is_pucch2_subframe;
// check ACK/SR transmission
if(frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission == FALSE)
{
if(is_SR_TXOp(ue,proc,eNB_id))
{
if(frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission == FALSE) {
if(is_SR_TXOp(ue,proc,eNB_id)) {
uint32_t SR_payload = 0;
if (ue->mac_enabled==1)
{
if (ue->mac_enabled==1) {
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
SR_payload = ue_get_SR(Mod_id,
......@@ -538,10 +473,10 @@ void ue_compute_srs_occasion(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id
}
uint8_t pucch_ack_payload[2];
if (get_ack(&ue->frame_parms,
ue->dlsch[ue->current_thread_id[proc->subframe_rx]][eNB_id][0]->harq_ack,
subframe_tx,proc->subframe_rx,pucch_ack_payload,0) > 0)
{
subframe_tx,proc->subframe_rx,pucch_ack_payload,0) > 0) {
is_sr_an_subframe = 1;
}
}
......@@ -549,28 +484,25 @@ void ue_compute_srs_occasion(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id
// check SRS UE opportunity
if( isSubframeSRS &&
(((10*frame_tx+subframe_tx) % srsPeriodicity) == srsOffset)
)
{
if ((is_pucch2_subframe == 0) && (is_sr_an_subframe == 0))
{
) {
if ((is_pucch2_subframe == 0) && (is_sr_an_subframe == 0)) {
pSoundingrs_ul_config_dedicated->srsUeSubframe = 1;
ue->ulsch[eNB_id]->srs_active = 1;
ue->ulsch[eNB_id]->Nsymb_pusch = 12-(frame_parms->Ncp<<1)- ue->ulsch[eNB_id]->srs_active;
}
else
{
LOG_I(PHY,"DROP UE-SRS-TX for this subframe %d.%d: collision with PUCCH2 or SR/AN: PUCCH2-occasion: %d, SR-AN-occasion[simSRS-SR-AN %d]: %d \n", frame_tx, subframe_tx, is_pucch2_subframe, frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission, is_sr_an_subframe);
} else {
LOG_I(PHY,"DROP UE-SRS-TX for this subframe %d.%d: collision with PUCCH2 or SR/AN: PUCCH2-occasion: %d, SR-AN-occasion[simSRS-SR-AN %d]: %d \n", frame_tx, subframe_tx, is_pucch2_subframe,
frame_parms->soundingrs_ul_config_common.ackNackSRS_SimultaneousTransmission, is_sr_an_subframe);
}
}
}
LOG_D(PHY," srsCellSubframe: %d, srsUeSubframe: %d, Nsymb-pusch: %d \n", pSoundingrs_ul_config_dedicated->srsCellSubframe, pSoundingrs_ul_config_dedicated->srsUeSubframe, ue->ulsch[eNB_id]->Nsymb_pusch);
LOG_D(PHY," srsCellSubframe: %d, srsUeSubframe: %d, Nsymb-pusch: %d \n", pSoundingrs_ul_config_dedicated->srsCellSubframe, pSoundingrs_ul_config_dedicated->srsUeSubframe,
ue->ulsch[eNB_id]->Nsymb_pusch);
}
}
void get_cqipmiri_params(PHY_VARS_UE *ue,uint8_t eNB_id)
{
void get_cqipmiri_params(PHY_VARS_UE *ue,uint8_t eNB_id) {
CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[eNB_id].CQI_ReportPeriodic;
int cqi_PMI_ConfigIndex = cqirep->cqi_PMI_ConfigIndex;
......@@ -596,24 +528,19 @@ void get_cqipmiri_params(PHY_VARS_UE *ue,uint8_t eNB_id)
} else if (cqi_PMI_ConfigIndex <= 316) { // 160 ms CQI_PMI period
cqirep->Npd = 160;
cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-157;
}
else if (cqi_PMI_ConfigIndex > 317) {
} else if (cqi_PMI_ConfigIndex > 317) {
if (cqi_PMI_ConfigIndex <= 349) { // 32 ms CQI_PMI period
cqirep->Npd = 32;
cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-318;
}
else if (cqi_PMI_ConfigIndex <= 413) { // 64 ms CQI_PMI period
} else if (cqi_PMI_ConfigIndex <= 413) { // 64 ms CQI_PMI period
cqirep->Npd = 64;
cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-350;
}
else if (cqi_PMI_ConfigIndex <= 541) { // 128 ms CQI_PMI period
} else if (cqi_PMI_ConfigIndex <= 541) { // 128 ms CQI_PMI period
cqirep->Npd = 128;
cqirep->N_OFFSET_CQI = cqi_PMI_ConfigIndex-414;
}
}
}
else { // TDD
} else { // TDD
if (cqi_PMI_ConfigIndex == 0) { // all UL subframes
cqirep->Npd = 1;
cqirep->N_OFFSET_CQI = 0;
......@@ -645,28 +572,25 @@ PUCCH_FMT_t get_pucch_format(lte_frame_type_t frame_type,
uint8_t nb_cw,
uint8_t cqi_status,
uint8_t ri_status,
uint8_t bundling_flag)
{
if((cqi_status == 0) && (ri_status==0))
{
uint8_t bundling_flag) {
if((cqi_status == 0) && (ri_status==0)) {
// PUCCH Format 1 1a 1b
// 1- SR only ==> PUCCH format 1
// 2- 1bit Ack/Nack with/without SR ==> PUCCH format 1a
// 3- 2bits Ack/Nack with/without SR ==> PUCCH format 1b
if((nb_cw == 1)&&(bundling_flag==bundling))
{
if((nb_cw == 1)&&(bundling_flag==bundling)) {
return pucch_format1a;
}
if((nb_cw == 1)&&(bundling_flag==multiplexing))
{
if((nb_cw == 1)&&(bundling_flag==multiplexing)) {
return pucch_format1b;
}
if(nb_cw == 2)
{
if(nb_cw == 2) {
return pucch_format1b;
}
if(SR_payload == 1)
{
if(SR_payload == 1) {
return pucch_format1;
/*
if (frame_type == FDD) {
......@@ -677,34 +601,29 @@ PUCCH_FMT_t get_pucch_format(lte_frame_type_t frame_type,
AssertFatal(1==0,"Unknown frame_type");
}*/
}
}
else
{
} else {
// PUCCH Format 2 2a 2b
// 1- CQI only or RI only ==> PUCCH format 2
// 2- CQI or RI + 1bit Ack/Nack for normal CP ==> PUCCH format 2a
// 3- CQI or RI + 2bits Ack/Nack for normal CP ==> PUCCH format 2b
// 4- CQI or RI + Ack/Nack for extended CP ==> PUCCH format 2
if(nb_cw == 0)
{
if(nb_cw == 0) {
return pucch_format2;
}
if(cyclic_prefix_type == NORMAL)
{
if(nb_cw == 1)
{
if(cyclic_prefix_type == NORMAL) {
if(nb_cw == 1) {
return pucch_format2a;
}
if(nb_cw == 2)
{
if(nb_cw == 2) {
return pucch_format2b;
}
}
else
{
} else {
return pucch_format2;
}
}
return pucch_format1a;
}
uint16_t get_n1_pucch(PHY_VARS_UE *ue,
......@@ -712,9 +631,7 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
harq_status_t *harq_ack,
uint8_t eNB_id,
uint8_t *b,
uint8_t SR)
{
uint8_t SR) {
LTE_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
uint8_t nCCE0,nCCE1,nCCE2,nCCE3,harq_ack1,harq_ack0,harq_ack3,harq_ack2;
ANFBmode_t bundling_flag;
......@@ -726,7 +643,6 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
uint8_t ack_counter=0;
// clear this, important for case where n1_pucch selection is not used
int subframe=proc->subframe_tx;
ue->pucch_sel[subframe] = 0;
if (frame_parms->frame_type == FDD ) { // FDD
......@@ -738,10 +654,9 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
else
return(ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
} else {
bundling_flag = ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode;
if (LOG_DEBUGFLAG(DEBUG_UE_PHYPROC)) {
if (LOG_DEBUGFLAG(DEBUG_UE_PHYPROC)) {
if (bundling_flag==bundling) {
LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, bundling, SR %d/%d\n",ue->Mod_id,proc->frame_tx,subframe,SR,
ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
......@@ -751,10 +666,8 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
}
}
switch (frame_parms->tdd_config) {
case 1: // DL:S:UL:UL:DL:DL:S:UL:UL:DL
harq_ack0 = 2; // DTX
M=1;
......