Commit 8039cd40 authored by Robert Schmidt's avatar Robert Schmidt
Browse files

share the allocation array rballoc_sub between slices

parent 44d1eb80
......@@ -412,6 +412,7 @@ schedule_dlsch(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, in
int i = 0;
slice_info_t *sli = &RC.mac[module_idP]->slice_info;
memset(sli->rballoc_sub, 0, sizeof(sli->rballoc_sub));
sli->tot_pct_dl = 0;
sli->avg_pct_dl = 1.0 / sli->n_dl;
......@@ -727,7 +728,8 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
slice_idxP,
frameP,
subframeP,
mbsfn_flag);
mbsfn_flag,
eNB->slice_info.rballoc_sub);
stop_meas(&eNB->schedule_dlsch_preprocessor);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR, VCD_FUNCTION_OUT);
......@@ -741,7 +743,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
//}
if (RC.mac[module_idP]->slice_info.interslice_share_active) {
dlsch_scheduler_interslice_multiplexing(module_idP, frameP, subframeP);
dlsch_scheduler_interslice_multiplexing(module_idP, frameP, subframeP, eNB->slice_info.rballoc_sub);
}
for (CC_id = 0; CC_id < NFAPI_CC_MAX; CC_id++) {
......@@ -843,7 +845,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
eNB_UE_stats->dlsch_mcs1 = 10; // cqi_to_mcs[ue_sched_ctl->dl_cqi[CC_id]];
} else { // this operation is also done in the preprocessor
eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1,
RC.mac[module_idP]->slice_info.dl[slice_idxP].maxmcs); // cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
eNB->slice_info.dl[slice_idxP].maxmcs); // cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
}
// Store stats
......@@ -1608,7 +1610,10 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
}
//------------------------------------------------------------------------------
void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id, int frameP, sub_frame_t subframeP)
void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id,
int frameP,
sub_frame_t subframeP,
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX])
//------------------------------------------------------------------------------
{
// FIXME: I'm prototyping the algorithm, so there may be arrays and variables that carry redundant information here and in pre_processor_results struct.
......@@ -1631,7 +1636,6 @@ void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id, int frameP, sub
uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB];
uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB];
uint8_t (*rballoc_sub)[N_RBG_MAX];
uint8_t (*MIMO_mode_indicator)[N_RBG_MAX];
// Initialize the free RBGs map
......@@ -1646,7 +1650,7 @@ void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id, int frameP, sub
for (i = 0; i < sli->n_dl; ++i) {
owned = sli->pre_processor_results[i].slice_allocation_mask[CC_id][rbg];
if (owned) {
used = sli->pre_processor_results[i].slice_allocated_rbgs[CC_id][rbg];
used = rballoc_sub[CC_id][rbg];
free_rbgs_map[CC_id][rbg] = used ? -1 : i;
break;
}
......@@ -1705,7 +1709,6 @@ void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id, int frameP, sub
nb_rbs_remaining = sli->pre_processor_results[slice_idx].nb_rbs_remaining;
nb_rbs_required = sli->pre_processor_results[slice_idx].nb_rbs_required;
rballoc_sub = sli->pre_processor_results[slice_idx].slice_allocated_rbgs;
MIMO_mode_indicator = sli->pre_processor_results[slice_idx].MIMO_mode_indicator;
// Allocation
......
......@@ -1131,7 +1131,6 @@ typedef struct {
uint16_t nb_rbs_accounted[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint16_t nb_rbs_remaining[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
uint8_t slice_allocation_mask[NFAPI_CC_MAX][N_RBG_MAX];
uint8_t slice_allocated_rbgs[NFAPI_CC_MAX][N_RBG_MAX];
uint8_t MIMO_mode_indicator[NFAPI_CC_MAX][N_RBG_MAX];
uint32_t bytes_lcid[MAX_MOBILES_PER_ENB][MAX_NUM_LCID];
......@@ -1264,6 +1263,9 @@ typedef struct {
slice_sched_conf_ul_t ul[MAX_NUM_SLICES];
pre_processor_results_t pre_processor_results[MAX_NUM_SLICES];
/// common rb allocation list between slices
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX];
} slice_info_t;
/*! \brief eNB common channels */
......
......@@ -203,7 +203,8 @@ void dlsch_scheduler_pre_processor(module_id_t module_idP,
int slice_idxP,
frame_t frameP,
sub_frame_t subframe,
int *mbsfn_flag);
int *mbsfn_flag,
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX]);
void dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
int slice_idx,
......@@ -249,7 +250,8 @@ void slice_priority_sort(module_id_t Mod_id, int slice_list[MAX_NUM_SLICES]);
void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id,
int frameP,
sub_frame_t subframeP);
sub_frame_t subframeP,
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX]);
void dlsch_scheduler_qos_multiplexing(module_id_t Mod_id,
int frameP,
......
......@@ -1234,7 +1234,8 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
int slice_idx,
frame_t frameP,
sub_frame_t subframeP,
int *mbsfn_flag)
int *mbsfn_flag,
uint8_t rballoc_sub[NFAPI_CC_MAX][N_RBG_MAX])
{
int UE_id;
uint8_t CC_id;
......@@ -1246,7 +1247,6 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_required;
uint16_t (*nb_rbs_accounted)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_accounted;
uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_remaining;
uint8_t (*rballoc_sub)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].slice_allocated_rbgs;
uint8_t (*MIMO_mode_indicator)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].MIMO_mode_indicator;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
......@@ -1581,7 +1581,6 @@ dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
// Initialize Subbands according to VRB map
for (i = 0; i < N_RBG[CC_id]; i++) {
int rb_size = i == N_RBG[CC_id] - 1 ? RBGsize_last : RBGsize;
rballoc_sub[CC_id][i] = 0;
#ifdef SF0_LIMIT
......
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