Commit 8da1c4b5 authored by knopp's avatar knopp

Note: this commit is work in progress. Contains initial integration of NFAPI...

Note: this commit is work in progress. Contains initial integration of NFAPI data structures which are tested for TX path. RX path to follow.
parent d23697ae
...@@ -27,6 +27,7 @@ cmake_minimum_required (VERSION 2.8) ...@@ -27,6 +27,7 @@ cmake_minimum_required (VERSION 2.8)
# Base directories, compatible with legacy OAI building # Base directories, compatible with legacy OAI building
################################################ ################################################
set (OPENAIR_DIR $ENV{OPENAIR_DIR}) set (OPENAIR_DIR $ENV{OPENAIR_DIR})
set (NFAPI_DIR $ENV{NFAPI_DIR})
set (OPENAIR1_DIR ${OPENAIR_DIR}/openair1) set (OPENAIR1_DIR ${OPENAIR_DIR}/openair1)
set (OPENAIR2_DIR ${OPENAIR_DIR}/openair2) set (OPENAIR2_DIR ${OPENAIR_DIR}/openair2)
set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3) set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3)
...@@ -725,6 +726,7 @@ else() ...@@ -725,6 +726,7 @@ else()
include_directories("${OPENAIR2_DIR}/UTIL") include_directories("${OPENAIR2_DIR}/UTIL")
include_directories("${OPENAIR2_DIR}/UTIL/LOG") include_directories("${OPENAIR2_DIR}/UTIL/LOG")
endif() endif()
include_directories("${NFAPI_DIR}")
include_directories("${OPENAIR1_DIR}") include_directories("${OPENAIR1_DIR}")
include_directories("${OPENAIR2_DIR}/NAS") include_directories("${OPENAIR2_DIR}/NAS")
include_directories("${OPENAIR2_DIR}") include_directories("${OPENAIR2_DIR}")
...@@ -958,7 +960,7 @@ set(SCHED_SRC ...@@ -958,7 +960,7 @@ set(SCHED_SRC
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_ue.c ${OPENAIR1_DIR}/SCHED/phy_procedures_lte_ue.c
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c ${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c
${OPENAIR1_DIR}/SCHED/ru_procedures.c ${OPENAIR1_DIR}/SCHED/ru_procedures.c
${OPENAIR1_DIR}/SCHED/phy_mac_stub.c # ${OPENAIR1_DIR}/SCHED/phy_mac_stub.c
${OPENAIR1_DIR}/SCHED/pucch_pc.c ${OPENAIR1_DIR}/SCHED/pucch_pc.c
${OPENAIR1_DIR}/SCHED/pusch_pc.c ${OPENAIR1_DIR}/SCHED/pusch_pc.c
${OPENAIR1_DIR}/SCHED/srs_pc.c ${OPENAIR1_DIR}/SCHED/srs_pc.c
...@@ -1070,6 +1072,7 @@ add_library(PHY ${PHY_SRC}) ...@@ -1070,6 +1072,7 @@ add_library(PHY ${PHY_SRC})
#Layer 2 library #Layer 2 library
##################### #####################
set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC) set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC)
set(PHY_INTERFACE_DIR ${OPENAIR2_DIR}/PHY_INTERFACE)
set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC) set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC)
set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0) set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0)
set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0) set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0)
...@@ -1120,7 +1123,7 @@ set(L2_SRC ...@@ -1120,7 +1123,7 @@ set(L2_SRC
${RRC_DIR}/L2_interface.c ${RRC_DIR}/L2_interface.c
) )
set (MAC_SRC set (MAC_SRC
${MAC_DIR}/lte_transport_init.c ${PHY_INTERFACE_DIR}/IF_Module.c
${MAC_DIR}/main.c ${MAC_DIR}/main.c
${MAC_DIR}/ue_procedures.c ${MAC_DIR}/ue_procedures.c
${MAC_DIR}/ra_procedures.c ${MAC_DIR}/ra_procedures.c
...@@ -1555,6 +1558,7 @@ ${OPENAIR1_DIR}/SIMULATION/TOOLS/multipath_tv_channel.c ...@@ -1555,6 +1558,7 @@ ${OPENAIR1_DIR}/SIMULATION/TOOLS/multipath_tv_channel.c
${OPENAIR1_DIR}/SIMULATION/RF/rf.c ${OPENAIR1_DIR}/SIMULATION/RF/rf.c
${OPENAIR1_DIR}/SIMULATION/RF/dac.c ${OPENAIR1_DIR}/SIMULATION/RF/dac.c
${OPENAIR1_DIR}/SIMULATION/RF/adc.c ${OPENAIR1_DIR}/SIMULATION/RF/adc.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
) )
add_library(SIMU_ETH add_library(SIMU_ETH
...@@ -1843,7 +1847,7 @@ add_executable(oaisim ...@@ -1843,7 +1847,7 @@ add_executable(oaisim
target_include_directories(oaisim PUBLIC ${OPENAIR_TARGETS}/SIMU/USER) target_include_directories(oaisim PUBLIC ${OPENAIR_TARGETS}/SIMU/USER)
target_link_libraries (oaisim target_link_libraries (oaisim
-Wl,-ldl,--start-group -Wl,-ldl,--start-group
RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB GTPV1U SECU_CN UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB PHY LFDS ${MSC_LIB} L2 ${RAL_LIB} LIB_NAS_UE SIMU SIMU_ETH SECU_OSA ${ITTI_LIB} ${MIH_LIB} RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB GTPV1U SECU_CN UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB PHY LFDS ${MSC_LIB} L2 ${RAL_LIB} LIB_NAS_UE SIMU SECU_OSA ${ITTI_LIB} ${MIH_LIB}
-Wl,--end-group ) -Wl,--end-group )
target_link_libraries (oaisim ${LIBXML2_LIBRARIES} ${LAPACK_LIBRARIES}) target_link_libraries (oaisim ${LIBXML2_LIBRARIES} ${LAPACK_LIBRARIES})
...@@ -1884,7 +1888,7 @@ add_executable(oaisim_nos1 ...@@ -1884,7 +1888,7 @@ add_executable(oaisim_nos1
target_include_directories(oaisim_nos1 PUBLIC ${OPENAIR_TARGETS}/SIMU/USER) target_include_directories(oaisim_nos1 PUBLIC ${OPENAIR_TARGETS}/SIMU/USER)
target_link_libraries (oaisim_nos1 target_link_libraries (oaisim_nos1
-Wl,--start-group -Wl,--start-group
RRC_LIB X2AP_LIB SECU_CN UTIL HASHTABLE SCHED_LIB PHY LFDS ${MSC_LIB} L2 ${RAL_LIB} SIMU SIMU_ETH SECU_OSA ${ITTI_LIB} ${MIH_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 RRC_LIB X2AP_LIB SECU_CN UTIL HASHTABLE SCHED_LIB PHY LFDS ${MSC_LIB} L2 ${RAL_LIB} SIMU SECU_OSA ${ITTI_LIB} ${MIH_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7
-Wl,--end-group ) -Wl,--end-group )
target_link_libraries (oaisim_nos1 ${LIBXML2_LIBRARIES} ${LAPACK_LIBRARIES}) target_link_libraries (oaisim_nos1 ${LIBXML2_LIBRARIES} ${LAPACK_LIBRARIES})
...@@ -2001,7 +2005,7 @@ if (${T_TRACER}) ...@@ -2001,7 +2005,7 @@ if (${T_TRACER})
oai_eth_transpro oai_eth_transpro
FLPT_MSG ASYNC_IF FLEXRAN_AGENT HASHTABLE MSC UTIL OMG_SUMO SECU_OSA FLPT_MSG ASYNC_IF FLEXRAN_AGENT HASHTABLE MSC UTIL OMG_SUMO SECU_OSA
SECU_CN SCHED_LIB PHY L2 default_sched remote_sched RAL MIH CN_UTILS SECU_CN SCHED_LIB PHY L2 default_sched remote_sched RAL MIH CN_UTILS
GTPV1U SCTP_CLIENT UDP LIB_NAS_UE LFDS LFDS7 SIMU SIMU_ETH OPENAIR0_LIB) GTPV1U SCTP_CLIENT UDP LIB_NAS_UE LFDS LFDS7 SIMU OPENAIR0_LIB)
if (TARGET ${i}) if (TARGET ${i})
add_dependencies(${i} generate_T) add_dependencies(${i} generate_T)
endif() endif()
......
...@@ -50,11 +50,17 @@ ...@@ -50,11 +50,17 @@
typedef struct { typedef struct {
/// RAN context config file name /// RAN context config file name
char *config_file_name; char *config_file_name;
/// Number of eNB instances in this node /// Number of RRC instances in this node
int nb_inst; int nb_inst;
/// Number of Component Carriers per instance in this node /// Number of Component Carriers per instance in this node
int *nb_CC; int *nb_CC;
/// Number of radio units /// Number of MACRLC instances in this node
int nb_macrlc_inst;
/// Number of L1 instances in this node
int nb_L1_inst;
/// Number of Component Carriers per instance in this node
int *nb_L1_CC;
/// Number of RU instances in this node
int nb_RU; int nb_RU;
/// eNB context variables /// eNB context variables
struct PHY_VARS_eNB_s ***eNB; struct PHY_VARS_eNB_s ***eNB;
......
...@@ -39,6 +39,13 @@ ...@@ -39,6 +39,13 @@
* @{ * @{
*/ */
/*!
\fn int l1_top_init_eNB(void)
\brief Initialize north interface for L1
@returns 0 on success
*/
int l1_north_init_eNB(void);
/*! /*!
\fn int phy_init_top(LTE_DL_FRAME_PARMS *frame_parms) \fn int phy_init_top(LTE_DL_FRAME_PARMS *frame_parms)
\brief Allocate and Initialize the PHY variables after receiving static configuration \brief Allocate and Initialize the PHY variables after receiving static configuration
...@@ -347,6 +354,7 @@ void phy_config_dedicated_scell_eNB(uint8_t Mod_id, ...@@ -347,6 +354,7 @@ void phy_config_dedicated_scell_eNB(uint8_t Mod_id,
\brief Cleanup the PHY variables*/ \brief Cleanup the PHY variables*/
void phy_cleanup(void); void phy_cleanup(void);
void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf); int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms); void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
......
This diff is collapsed.
...@@ -55,8 +55,7 @@ void lte_param_init(unsigned char N_tx_port_eNB, ...@@ -55,8 +55,7 @@ void lte_param_init(unsigned char N_tx_port_eNB,
UE = malloc(sizeof(PHY_VARS_UE)); UE = malloc(sizeof(PHY_VARS_UE));
memset((void*)eNB,0,sizeof(PHY_VARS_eNB)); memset((void*)eNB,0,sizeof(PHY_VARS_eNB));
memset((void*)UE,0,sizeof(PHY_VARS_UE)); memset((void*)UE,0,sizeof(PHY_VARS_UE));
//PHY_config = malloc(sizeof(PHY_CONFIG));
mac_xface = malloc(sizeof(MAC_xface));
srand(0); srand(0);
randominit(0); randominit(0);
......
...@@ -204,7 +204,7 @@ void lte_ue_measurements_emul(PHY_VARS_UE *phy_vars_ue,uint8_t last_slot,uint8_t ...@@ -204,7 +204,7 @@ void lte_ue_measurements_emul(PHY_VARS_UE *phy_vars_ue,uint8_t last_slot,uint8_t
@returns Path loss in dB @returns Path loss in dB
*/ */
int16_t get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index); int16_t get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
uint32_t get_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index); double get_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
uint32_t get_RSRQ(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index); uint32_t get_RSRQ(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
uint8_t get_n_adj_cells(module_id_t Mod_id,uint8_t CC_id); uint8_t get_n_adj_cells(module_id_t Mod_id,uint8_t CC_id);
uint32_t get_rx_total_gain_dB(module_id_t Mod_id,uint8_t CC_id); uint32_t get_rx_total_gain_dB(module_id_t Mod_id,uint8_t CC_id);
......
...@@ -114,15 +114,20 @@ uint32_t get_RSSI (uint8_t Mod_id,uint8_t CC_id) ...@@ -114,15 +114,20 @@ uint32_t get_RSSI (uint8_t Mod_id,uint8_t CC_id)
return 0xFFFFFFFF; return 0xFFFFFFFF;
} }
uint32_t get_RSRP(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index) double get_RSRP(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{ {
AssertFatal(PHY_vars_UE_g!=NULL,"PHY_vars_UE_g is null\n");
AssertFatal(PHY_vars_UE_g[Mod_id]!=NULL,"PHY_vars_UE_g[%d] is null\n",Mod_id);
AssertFatal(PHY_vars_UE_g[Mod_id][CC_id]!=NULL,"PHY_vars_UE_g[%d][%d] is null\n",Mod_id,CC_id);
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id]; PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue) if (ue)
return ue->measurements.rsrp[eNB_index]; return ((dB_fixed_times10(ue->measurements.rsrp[eNB_index]))/10.0-
get_rx_total_gain_dB(Mod_id,0) -
return 0xFFFFFFFF; 10*log10(ue->frame_parms.N_RB_DL*12));
return -140.0;
} }
uint32_t get_RSRQ(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index) uint32_t get_RSRQ(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
......
...@@ -2037,8 +2037,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci, ...@@ -2037,8 +2037,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
return(0); return(0);
} }
uint8_t generate_dci_top(uint8_t num_ue_spec_dci, uint8_t generate_dci_top(uint8_t num_dci,
uint8_t num_common_dci,
DCI_ALLOC_t *dci_alloc, DCI_ALLOC_t *dci_alloc,
uint32_t n_rnti, uint32_t n_rnti,
int16_t amp, int16_t amp,
...@@ -2094,9 +2093,8 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci, ...@@ -2094,9 +2093,8 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
break; break;
} }
num_pdcch_symbols = get_num_pdcch_symbols(num_ue_spec_dci+num_common_dci,dci_alloc,frame_parms,subframe); num_pdcch_symbols = get_num_pdcch_symbols(num_dci,dci_alloc,frame_parms,subframe);
// printf("subframe %d in generate_dci_top num_pdcch_symbols = %d, num_dci %d\n",
// subframe,num_pdcch_symbols,num_ue_spec_dci+num_common_dci);
generate_pcfich(num_pdcch_symbols, generate_pcfich(num_pdcch_symbols,
amp, amp,
frame_parms, frame_parms,
...@@ -2118,15 +2116,15 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci, ...@@ -2118,15 +2116,15 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
// generate DCIs in order of decreasing aggregation level, then common/ue spec // generate DCIs in order of decreasing aggregation level, then common/ue spec
// MAC is assumed to have ordered the UE spec DCI according to the RNTI-based randomization // MAC is assumed to have ordered the UE spec DCI according to the RNTI-based randomization
for (L=3; L>=0; L--) { for (L=3; L>=0; L--) {
for (i=0; i<num_common_dci; i++) { for (i=0; i<num_dci; i++) {
if (dci_alloc[i].L == (uint8_t)L) { if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING //#ifdef DEBUG_DCI_ENCODING
LOG_I(PHY,"Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L, LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu); *(unsigned int*)dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]); dump_dci(frame_parms,&dci_alloc[i]);
#endif //#endif
if (dci_alloc[i].firstCCE>=0) { if (dci_alloc[i].firstCCE>=0) {
e_ptr = generate_dci0(dci_alloc[i].dci_pdu, e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
...@@ -2137,29 +2135,6 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci, ...@@ -2137,29 +2135,6 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
} }
} }
} }
for (; i<num_ue_spec_dci + num_common_dci; i++) {
if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING
printf(" Generating UE (rnti %x) (nCCE %d) specific DCI %d of length %d, aggregation %d, format %d (%x)\n",dci_alloc[i].rnti,dci_alloc[i].firstCCE,i,dci_alloc[i].dci_length,1<<dci_alloc[i].L,dci_alloc[i].format,
dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]);
#endif
if (dci_alloc[i].firstCCE >= 0) {
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
e+(72*dci_alloc[i].firstCCE),
dci_alloc[i].dci_length,
dci_alloc[i].L,
dci_alloc[i].rnti);
}
else {
}
}
}
} }
// Scrambling // Scrambling
...@@ -2367,84 +2342,6 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci, ...@@ -2367,84 +2342,6 @@ uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
return(num_pdcch_symbols); return(num_pdcch_symbols);
} }
#ifdef PHY_ABSTRACTION
uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
uint8_t num_ue_spec_dci,
uint8_t num_common_dci,
DCI_ALLOC_t *dci_alloc,
uint8_t subframe)
{
int n_dci, n_dci_dl;
uint8_t ue_id;
LTE_eNB_DLSCH_t *dlsch_eNB;
uint8_t num_pdcch_symbols = get_num_pdcch_symbols(num_ue_spec_dci+num_common_dci,
dci_alloc,
&phy_vars_eNB->frame_parms,
subframe);
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].cntl.cfi=num_pdcch_symbols;
memcpy(phy_vars_eNB->dci_alloc[subframe&1],dci_alloc,sizeof(DCI_ALLOC_t)*(num_ue_spec_dci+num_common_dci));
phy_vars_eNB->num_ue_spec_dci[subframe&1]=num_ue_spec_dci;
phy_vars_eNB->num_common_dci[subframe&1]=num_common_dci;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].num_ue_spec_dci = num_ue_spec_dci;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].num_common_dci = num_common_dci;
LOG_D(PHY,"[eNB %d][DCI][EMUL] CC id %d: num spec dci %d num comm dci %d num PMCH %d \n",
phy_vars_eNB->Mod_id, phy_vars_eNB->CC_id, num_ue_spec_dci,num_common_dci,
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].num_pmch);
if (eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].cntl.pmch_flag == 1 )
n_dci_dl = eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].num_pmch;
else
n_dci_dl = 0;
for (n_dci =0 ;
n_dci < (eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].num_ue_spec_dci+ eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].num_common_dci);
n_dci++) {
if (dci_alloc[n_dci].format > 0) { // exclude the uplink dci
if (dci_alloc[n_dci].rnti == SI_RNTI) {
dlsch_eNB = RC.eNB[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_SI;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 0;//SI;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = 0;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[0]->TBS>>3;
LOG_D(PHY,"[DCI][EMUL]SI tbs is %d and dci index %d harq pid is %d \n",eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl],n_dci_dl,
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl]);
} else if (dci_alloc[n_dci_dl].ra_flag == 1) {
dlsch_eNB = RC.eNB[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch_ra;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 1;//RA;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = 0;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[0]->TBS>>3;
LOG_D(PHY,"[DCI][EMUL] RA tbs is %d and dci index %d harq pid is %d \n",eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl],n_dci_dl,
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl]);
} else {
ue_id = find_ue(dci_alloc[n_dci_dl].rnti,RC.eNB[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]);
DevAssert( ue_id != (uint8_t)-1 );
dlsch_eNB = RC.eNB[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id]->dlsch[ue_id][0];
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dlsch_type[n_dci_dl] = 2;//TB0;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl] = dlsch_eNB->current_harq_pid;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].ue_id[n_dci_dl] = ue_id;
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl] = dlsch_eNB->harq_processes[dlsch_eNB->current_harq_pid]->TBS>>3;
LOG_D(PHY,"[DCI][EMUL] TB1 tbs is %d and dci index %d harq pid is %d \n",eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].tbs[n_dci_dl],n_dci_dl,
eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].harq_pid[n_dci_dl]);
// check for TB1 later
}
}
n_dci_dl++;
}
memcpy((void *)&eNB_transport_info[phy_vars_eNB->Mod_id][phy_vars_eNB->CC_id].dci_alloc,
(void *)dci_alloc,
n_dci*sizeof(DCI_ALLOC_t));
return(num_pdcch_symbols);
}
#endif
void dci_decoding(uint8_t DCI_LENGTH, void dci_decoding(uint8_t DCI_LENGTH,
uint8_t aggregation_level, uint8_t aggregation_level,
...@@ -2768,9 +2665,8 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars, ...@@ -2768,9 +2665,8 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
else if (CCEind<96) else if (CCEind<96)
CCEmap = CCEmap2; CCEmap = CCEmap2;
else { else {
LOG_E(PHY,"Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind,Yk,m,nCCE,L2); AssertFatal(1==0,
mac_xface->macphy_exit("Illegal CCEind\n"); "Illegal CCEind %d (Yk %d, m %d, nCCE %d, L2 %d\n",CCEind,Yk,m,nCCE,L2);
return; // not reached
} }
switch (L2) { switch (L2) {
...@@ -2791,9 +2687,8 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars, ...@@ -2791,9 +2687,8 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
break; break;
default: default:
LOG_E( PHY, "Illegal L2 value %d\n", L2 ); AssertFatal(1==0,
mac_xface->macphy_exit( "Illegal L2\n" ); "Illegal L2 value %d\n", L2 );
return; // not reached
} }
CCEmap_cand = (*CCEmap)&CCEmap_mask; CCEmap_cand = (*CCEmap)&CCEmap_mask;
......
This source diff could not be displayed because it is too large. You can view the blob instead.
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#ifndef __LTE_TRANSPORT_DEFS__H__ #ifndef __LTE_TRANSPORT_DEFS__H__
#define __LTE_TRANSPORT_DEFS__H__ #define __LTE_TRANSPORT_DEFS__H__
#include "PHY/defs.h" #include "PHY/defs.h"
#include "PHY/impl_defs_lte.h"
#include "dci.h" #include "dci.h"
#include "uci.h" #include "uci.h"
#ifndef STANDALONE_COMPILE #ifndef STANDALONE_COMPILE
...@@ -90,6 +91,8 @@ ...@@ -90,6 +91,8 @@
#define PMI_2A_R1_11 1 #define PMI_2A_R1_11 1
#define PMI_2A_R1_1j 2 #define PMI_2A_R1_1j 2
typedef enum { SEARCH_EXIST=0,
SEARCH_EXIST_OR_FREE} find_type_t;
typedef enum { typedef enum {
SCH_IDLE, SCH_IDLE,
...@@ -104,6 +107,8 @@ typedef struct { ...@@ -104,6 +107,8 @@ typedef struct {
SCH_status_t status; SCH_status_t status;
/// Transport block size /// Transport block size
uint32_t TBS; uint32_t TBS;
/// pointer to pdu from MAC interface (this is "a" in 36.212)
uint8_t *pdu;
/// The payload + CRC size in bits, "B" from 36-212 /// The payload + CRC size in bits, "B" from 36-212
uint32_t B; uint32_t B;
/// Pointer to the payload /// Pointer to the payload
...@@ -253,12 +258,12 @@ typedef struct { ...@@ -253,12 +258,12 @@ typedef struct {
uint16_t rnti; uint16_t rnti;
/// Active flag for baseband transmitter processing /// Active flag for baseband transmitter processing
uint8_t active; uint8_t active;
/// HARQ process mask, indicates which processes are currently active
uint16_t harq_mask;
/// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK. /// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK.
uint8_t subframe_tx[10]; uint8_t subframe_tx[10];
/// First CCE of last PDSCH scheduling per subframe. Again used during PUCCH detection for ACK/NAK. /// First CCE of last PDSCH scheduling per subframe. Again used during PUCCH detection for ACK/NAK.
uint8_t nCCE[10]; uint8_t nCCE[10];
/// Current HARQ process id
uint8_t current_harq_pid;
/// Process ID's per subframe. Used to associate received ACKs on PUSCH/PUCCH to DLSCH harq process ids /// Process ID's per subframe. Used to associate received ACKs on PUSCH/PUCCH to DLSCH harq process ids
uint8_t harq_ids[10]; uint8_t harq_ids[10];
/// Window size (in outgoing transport blocks) for fine-grain rate adaptation /// Window size (in outgoing transport blocks) for fine-grain rate adaptation
...@@ -482,6 +487,8 @@ typedef struct { ...@@ -482,6 +487,8 @@ typedef struct {
} LTE_UL_eNB_HARQ_t; } LTE_UL_eNB_HARQ_t;
typedef struct { typedef struct {
/// HARQ process mask, indicates which processes are currently active
uint16_t harq_mask;
/// Pointers to 8 HARQ processes for the ULSCH /// Pointers to 8 HARQ processes for the ULSCH
LTE_UL_eNB_HARQ_t *harq_processes[8]; LTE_UL_eNB_HARQ_t *harq_processes[8];
/// Maximum number of HARQ rounds /// Maximum number of HARQ rounds
...@@ -738,22 +745,7 @@ typedef struct { ...@@ -738,22 +745,7 @@ typedef struct {
int8_t g_pucch; int8_t g_pucch;
} LTE_UE_DLSCH_t; } LTE_UE_DLSCH_t;
typedef enum {format0,
format1,
format1A,
format1B,
format1C,
format1D,
format1E_2A_M10PRB,
format2,
format2A,
format2B,
format2C,
format2D,
format3,
format3A,
format4
} DCI_format_t;
typedef enum { typedef enum {
SI_PDSCH=0, SI_PDSCH=0,
...@@ -782,22 +774,6 @@ typedef enum { ...@@ -782,22 +774,6 @@ typedef enum {
} PUCCH_FMT_t; } PUCCH_FMT_t;
typedef struct {
/// Length of DCI in bits
uint8_t dci_length;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// Format
DCI_format_t format;
/// DCI pdu
uint8_t dci_pdu[8];
} DCI_ALLOC_t;
/**@}*/ /**@}*/
......
...@@ -274,9 +274,10 @@ int dlsch_encoding_2threads0(te_params *tep) { ...@@ -274,9 +274,10 @@ int dlsch_encoding_2threads0(te_params *tep) {
LTE_eNB_DLSCH_t *dlsch = tep->dlsch; LTE_eNB_DLSCH_t *dlsch = tep->dlsch;
unsigned int G = tep->G; unsigned int G = tep->G;
unsigned char harq_pid = tep->harq_pid;
unsigned short iind; unsigned short iind;
unsigned char harq_pid = dlsch->current_harq_pid;
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb; unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int Kr=0,Kr_bytes,r,r_offset=0; unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs; unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
...@@ -394,7 +395,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB, ...@@ -394,7 +395,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned int crc=1;