Commit 9489bd98 authored by yilmazt's avatar yilmazt
Browse files

Merge branch 'nr_pdcch' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_pdcch

parents 3ecc2bdf 6fad2945
...@@ -90,7 +90,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -90,7 +90,6 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars; LTE_eNB_PUSCH** const pusch_vars = gNB->pusch_vars;
LTE_eNB_SRS* const srs_vars = gNB->srs_vars; LTE_eNB_SRS* const srs_vars = gNB->srs_vars;
LTE_eNB_PRACH* const prach_vars = &gNB->prach_vars; LTE_eNB_PRACH* const prach_vars = &gNB->prach_vars;
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
int i, UE_id; int i, UE_id;
...@@ -122,7 +121,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -122,7 +121,8 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
// Polar encoder init for PBCH // Polar encoder init for PBCH
nr_polar_init(&fp->pbch_polar_params, 1, NR_POLAR_PBCH_PAYLOAD_BITS); nr_polar_init(&fp->pbch_polar_params, 1, NR_POLAR_PBCH_PAYLOAD_BITS);
//PDCCH DMRS init //PDCCH DMRS init
pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**)); gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n"); AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
for (int slot=0; slot<fp->slots_per_frame; slot++) { for (int slot=0; slot<fp->slots_per_frame; slot++) {
pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t*)); pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t*));
......
...@@ -28,7 +28,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB) ...@@ -28,7 +28,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
unsigned char Lmax, l, n_hf, N_hf; unsigned char Lmax, l, n_hf, N_hf;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset=1; uint8_t reset;
Nid = cfg->sch_config.physical_cell_id.value; Nid = cfg->sch_config.physical_cell_id.value;
...@@ -40,6 +40,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB) ...@@ -40,6 +40,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
i_ssb = l & (Lmax-1); i_ssb = l & (Lmax-1);
i_ssb2 = (i_ssb<<2) + n_hf; i_ssb2 = (i_ssb<<2) + n_hf;
reset = 1;
x2 = (1<<11) * (i_ssb2 + 1) * ((Nid>>2) + 1) + (1<<6) * (i_ssb2 + 1) + (Nid&3); x2 = (1<<11) * (i_ssb2 + 1) * ((Nid>>2) + 1) + (1<<6) * (i_ssb2 + 1) + (Nid&3);
for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) { for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
...@@ -56,13 +57,14 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid) ...@@ -56,13 +57,14 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
{ {
uint32_t x1, x2; uint32_t x1, x2;
uint8_t reset = 1; uint8_t reset;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs; uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
for (uint8_t slot=0; fp->slots_per_frame; slot++) { for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; fp->symbols_per_slot; symb++) { for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1))&(((uint32_t)1<<31)-1); x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1))&(((uint32_t)1<<31)-1);
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_LENGTH_DWORD; n++) { for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_LENGTH_DWORD; n++) {
......
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