added master clock for 5MHz

a4a5dbbc · Rohit Gupta · a0ffa8ca · a4a5dbbc
Commit a4a5dbbc authored Apr 21, 2016 by Rohit Gupta
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targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp +1 -0

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--- a/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+++ b/targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
@@ -625,6 +625,7 @@ extern "C" {
      openair0_cfg[0].tx_scheduling_advance = 10240;
      break;
    case 7680000:
+      s->usrp->set_master_clock_rate(30.72e6);
      openair0_cfg[0].samples_per_packet    = 1024;
      openair0_cfg[0].tx_sample_advance     = 80;
      openair0_cfg[0].tx_bw                 = 20e6;