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openairinterface5G
Commit ae884afe authored by knopp's avatar knopp
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integration of LTE-M SIB1/SI interfaces and scheduling

parent d56525c8
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Showing with 1134 additions and 232 deletions
openair1/PHY/CODING/defs.h
View file @ ae884afe
......@@ -178,6 +178,7 @@ uint32_t generate_dummy_w_cc(uint32_t D, uint8_t *w);
\param Qm modulation order (2,4,6)
\param Nl number of layers (1,2)
\param r segment number
\param nb_rb Number of PRBs
\returns \f$E\f$, the number of coded bits per segment */
......@@ -193,8 +194,7 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
uint8_t Qm,
uint8_t Nl,
uint8_t r,
uint8_t nb_rb,
uint8_t m);
uint8_t nb_rb);
/**
\brief This is the LTE rate matching algorithm for Convolutionally-coded channels (e.g. BCH,DCI,UCI). It is taken directly from 36-212 (Rel 8 8.6, 2009-03), pages 16-18 )
......
openair1/PHY/CODING/lte_rate_matching.c
View file @ ae884afe
......@@ -463,8 +463,8 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
uint8_t Qm,
uint8_t Nl,
uint8_t r,
uint8_t nb_rb,
uint8_t m)
uint8_t nb_rb)
// uint8_t m)
{
......
openair1/PHY/INIT/lte_init.c
View file @ ae884afe
......@@ -1652,6 +1652,9 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
eNB->total_transmitted_bits = 0;
eNB->total_system_throughput = 0;
eNB->check_for_MUMIMO_transmissions=0;
while(eNB->configured == 0) usleep(10000);
LOG_I(PHY,"[eNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d\n",
eNB->Mod_id,
fp->N_RB_DL,fp->phich_config_common.phich_resource,
......
openair1/PHY/LTE_TRANSPORT/dci.h
View file @ ae884afe
......@@ -29,11 +29,8 @@
* \note
* \warning
*/
#ifndef USER_MODE
#include "PHY/types.h"
#else
#include <stdint.h>
#endif
/// DCI Format Type 0 (5 MHz,TDD0, 27 bits)
struct DCI0_5MHz_TDD0 {
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ ae884afe
This diff is collapsed.
openair1/PHY/LTE_TRANSPORT/defs.h
View file @ ae884afe
......@@ -34,6 +34,7 @@
#include "PHY/defs.h"
#include "PHY/impl_defs_lte.h"
#include "dci.h"
#include "mdci.h"
#include "uci.h"
#ifndef STANDALONE_COMPILE
#include "UTIL/LISTS/list.h"
......@@ -123,7 +124,9 @@ typedef struct {
uint32_t subframe;
/// Index of current HARQ round for this DLSCH
uint8_t round;
/// MCS format for this DLSCH
/// Modulation order
uint8_t Qm;
/// MCS
uint8_t mcs;
/// Redundancy-version of the current sub-frame
uint8_t rvidx;
......
openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
View file @ ae884afe
......@@ -280,7 +280,7 @@ int dlsch_encoding_2threads0(te_params *tep) {
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
// unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_IN);
......@@ -340,11 +340,11 @@ int dlsch_encoding_2threads0(te_params *tep) {
dlsch->Mdlharq,
dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs),
dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl,
r,
nb_rb,
m); // r
nb_rb);
// m); // r
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_OUT);
......@@ -400,12 +400,12 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned int A;
unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
// unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = dlsch->harq_processes[harq_pid]->TBS; //6228
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs);
mod_order = dlsch->harq_processes[harq_pid]->Qm;
G = get_G(frame_parms,nb_rb,dlsch->harq_processes[harq_pid]->rb_alloc,mod_order,dlsch->harq_processes[harq_pid]->Nl,num_pdcch_symbols,frame,subframe,dlsch->harq_processes[harq_pid]->mimo_mode==TM7?7:0);
......@@ -524,7 +524,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
// get information for E for the segments that are handled by the worker thread
if (r<(dlsch->harq_processes[harq_pid]->C>>1)) {
int Nl=dlsch->harq_processes[harq_pid]->Nl;
int Qm=get_Qm(dlsch->harq_processes[harq_pid]->mcs);
int Qm=dlsch->harq_processes[harq_pid]->Qm;
int C = dlsch->harq_processes[harq_pid]->C;
int Gp = G/Nl/Qm;
int GpmodC = Gp%C;
......@@ -544,11 +544,11 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
dlsch->Mdlharq,
dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs),
dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl,
r,
nb_rb,
m); // r
nb_rb);
// m); // r
stop_meas(rm_stats);
}
}
......@@ -584,14 +584,14 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned int A;
unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
// unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
uint8_t beamforming_mode=0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = dlsch->harq_processes[harq_pid]->TBS; //6228
// printf("Encoder: A: %d\n",A);
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs);
mod_order = dlsch->harq_processes[harq_pid]->Qm;
if(dlsch->harq_processes[harq_pid]->mimo_mode == TM7)
beamforming_mode = 7;
......@@ -720,11 +720,11 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
dlsch->Mdlharq,
dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs),
dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl,
r,
nb_rb,
m); // r
nb_rb);
// m); // r
stop_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING
......@@ -761,14 +761,14 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue,
unsigned int A;
unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
// unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
uint8_t beamforming_mode=0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = dlsch->harq_processes[harq_pid]->TBS; //6228
// printf("Encoder: A: %d\n",A);
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs);
mod_order = dlsch->harq_processes[harq_pid]->Qm;
if(dlsch->harq_processes[harq_pid]->mimo_mode == TM7)
beamforming_mode = 7;
......@@ -897,11 +897,11 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue,
dlsch->Mdlharq,
dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs),
dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl,
r,
nb_rb,
m); // r
nb_rb);
// m); // r
stop_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING
......
openair1/PHY/LTE_TRANSPORT/dlsch_modulation.c
View file @ ae884afe
......@@ -585,8 +585,8 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
int first_layer0 = -1; //= dlsch0_harq->first_layer;
int Nlayers0 = -1; // = dlsch0_harq->Nlayers;
uint8_t mod_order0=0; // = get_Qm(dlsch0_harq->mcs);
uint8_t mod_order1=0; //=2;
uint8_t mod_order0=0;
uint8_t mod_order1=0;
uint8_t precoder_index0,precoder_index1;
uint8_t *x1=NULL;
......@@ -640,12 +640,12 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs);
mod_order0 = dlsch0_harq->Qm;
x1 = dlsch1_harq->e;
// Fill these in later for TM8-10
// Nlayers1 = dlsch1_harq->Nlayers;
// first_layer1 = dlsch1_harq->first_layer;
mod_order1 = get_Qm(dlsch1_harq->mcs);
mod_order1 = dlsch1_harq->Qm;
} else if ((dlsch0_harq != NULL) && (dlsch1_harq == NULL)){ //This is for SIS0 TM1, TM6, etc
......@@ -653,7 +653,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs);
mod_order0 = dlsch0_harq->Qm;
} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){ // This is for TM4 retransmission
......@@ -661,7 +661,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
mimo_mode = dlsch1_harq->mimo_mode;
first_layer0 = dlsch1_harq->first_layer;
Nlayers0 = dlsch1_harq->Nlayers;
mod_order0 = get_Qm(dlsch1_harq->mcs);
mod_order0 = dlsch1_harq->Qm;
}
......@@ -2065,14 +2065,14 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
harq_pid = dlsch0->harq_ids[subframe_offset];
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = get_Qm(dlsch0_harq->mcs);
mod_order0 = dlsch0_harq->Qm;
rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl;
#endif
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mod_order1 = get_Qm(dlsch1_harq->mcs);
mod_order1 = dlsch1_harq->Qm;
#ifdef DEBUG_DLSCH_MODULATION
Nl1 = dlsch1_harq->Nl;
#endif
......@@ -2082,7 +2082,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
harq_pid = dlsch0->harq_ids[subframe_offset];
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = get_Qm(dlsch0_harq->mcs);
mod_order0 = dlsch0_harq->Qm;
rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl;
......@@ -2099,7 +2099,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
harq_pid = dlsch1->harq_ids[subframe_offset];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mimo_mode = dlsch1_harq->mimo_mode;
mod_order0 = get_Qm(dlsch1_harq->mcs);
mod_order0 = dlsch1_harq->Qm;
rb_alloc = dlsch1_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch1_harq->Nl;
......@@ -2460,7 +2460,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer,
uint8_t harq_pid = -1;//dlsch0->current_harq_pid;
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
uint32_t i,jj,re_allocated=0;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs);
uint8_t mod_order0 = dlsch0_harq->Qm;
uint8_t *x0 = dlsch0_harq->e;
uint8_t qam64_table_offset_re = 0;
uint8_t qam64_table_offset_im = 0;
......@@ -2599,7 +2599,7 @@ int mch_modulation(int32_t **txdataF,
uint32_t i,jj,re_allocated,symbol_offset;
uint16_t l,rb,re_offset;
uint8_t skip_dc=0;
uint8_t mod_order = get_Qm(dlsch->harq_processes[0]->mcs);
uint8_t mod_order = dlsch->harq_processes[0]->Qm;
int16_t qam16_table_a[4],qam64_table_a[8];//,qam16_table_b[4],qam64_table_b[8];
int16_t *qam_table_s;
......
openair1/PHY/LTE_TRANSPORT/ulsch_coding.c
View file @ ae884afe
......@@ -568,8 +568,8 @@ uint32_t ulsch_encoding(uint8_t *a,
get_Qm_ul(ulsch->harq_processes[harq_pid]->mcs),
1,
r,
ulsch->harq_processes[harq_pid]->nb_rb,
ulsch->harq_processes[harq_pid]->mcs); // r
ulsch->harq_processes[harq_pid]->nb_rb);
//ulsch->harq_processes[harq_pid]->mcs); // r
stop_meas(rm_stats);
#ifdef DEBUG_ULSCH_CODING
......
openair1/PHY/defs.h
View file @ ae884afe
......@@ -833,6 +833,8 @@ typedef struct PHY_VARS_eNB_s {
nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU];
Sched_Rsp_t Sched_INFO;
LTE_eNB_PDCCH pdcch_vars[2];
LTE_eNB_EPDCCH epdcch_vars[2];
LTE_eNB_MPDCCH mpdcch_vars[2];
LTE_eNB_COMMON common_vars;
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PBCH pbch;
......
openair1/PHY/impl_defs_lte.h
View file @ ae884afe
......@@ -638,6 +638,10 @@ typedef struct {
/// - first index: tx antenna [0..nb_antennas_tx[
/// - second index: sample [0..]
int32_t **txdataF_BF;
/// \brief holds the transmit data before beamforming for epdcch/mpdcch
/// - first index : tx antenna [0..nb_epdcch_antenna_ports[
/// - second index: sampl [0..]
int32_t **txdataF_epdcch;
/// \brief Holds the receive data in the frequency domain.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..2*ofdm_symbol_size*frame_parms->symbols_per_tti[
......@@ -674,7 +678,13 @@ typedef enum {format0,
format2D,
format3,
format3A,
format4
format4,
format5,
format6_0A,
format6_0B,
format6_1A,
format6_1B,
format6_2
} DCI_format_t;
typedef struct {
......@@ -696,6 +706,74 @@ typedef struct {
uint8_t dci_pdu[8];
} DCI_ALLOC_t;
#define MAX_EPDCCH_PRB 8
typedef struct {
/// Length of DCI in bits
uint8_t dci_length;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// Format
DCI_format_t format;
/// epdcch resource assignment (0=localized,1=distributed)
uint8_t epdcch_resource_assignment_flag;
/// epdcch index
uint16_t epdcch_id;
/// epdcch start symbol
uint8_t epdcch_start_symbol;
/// epdcch number of PRBs in set
uint8_t epdcch_num_prb;
/// vector of prb ids for set
uint8_t epdcch_prb_index[MAX_EPDCCH_PRB];
/// LBT parameter for frame configuration
uint8_t dwpts_symbols;
/// LBT parameter for frame configuration
uint8_t initial_lbt_sf;
/// DCI pdu
uint8_t dci_pdu[8];
} eDCI_ALLOC_t;
typedef struct {
/// Length of DCI in bits
uint8_t dci_length;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// Format
DCI_format_t format;
/// harq process index
uint8_t harq_pid;
/// Narrowband index
uint8_t narrowband;
/// number of PRB pairs for MPDCCH
uint8_t number_of_prb_pairs;
/// mpdcch resource assignement (0=localized,1=distributed)
uint8_t resource_block_assignment;
/// transmission type
uint8_t transmission_type;
/// mpdcch start symbol
uint8_t start_symbol;
/// CE mode (1=ModeA,2=ModeB)
uint8_t ce_mode;
/// 0-503 n_EPDCCHid_i
uint16_t dmrs_scrambling_init;
/// Absolute subframe of the initial transmission (0-10239)
uint16_t initial_transmission_sf_io;
/// DCI pdu
uint8_t dci_pdu[8];
} mDCI_ALLOC_t;
typedef struct {
uint8_t num_dci;
......@@ -703,15 +781,17 @@ typedef struct {
DCI_ALLOC_t dci_alloc[32];
} LTE_eNB_PDCCH;
/*
typedef struct {
} LTE_eNB_ePDCCH;
typedef struct {
uint8_t num_dci;
eDCI_ALLOC_t edci_alloc[32];
} LTE_eNB_EPDCCH;
typedef struct {
uint8_t num_dci;
mDCI_ALLOC_t mdci_alloc[32];
} LTE_eNB_MPDCCH;
*/
typedef struct {
/// \brief Hold the channel estimates in frequency domain based on SRS.
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ ae884afe
......@@ -909,6 +909,21 @@ void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,
fill_dci_and_dlsch(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
}
void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,nfapi_dl_config_request_pdu_t *dl_config_pdu);
void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu) {
int idx = proc->subframe_tx&1;
LTE_eNB_MPDCCH *mpdcch_vars = &eNB->mpdcch_vars[idx];
nfapi_dl_config_mpdcch_pdu *pdu = &dl_config_pdu->mpdcch_pdu;
LOG_I(PHY,"Frame %d, Subframe %d: MDCI processing\n",proc->frame_tx,proc->subframe_tx);
// copy dci configuration into eNB structure
fill_mdci_and_dlsch(eNB,proc,&mpdcch_vars->mdci_alloc[mpdcch_vars->num_dci],pdu);
}
void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu);
......@@ -954,12 +969,26 @@ handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
}
#ifdef Rel14
extern uint32_t localRIV2alloc_LUT6[32];
extern uint32_t localRIV2alloc_LUT25[512];
extern uint32_t localRIV2alloc_LUT50_0[1600];
extern uint32_t localRIV2alloc_LUT50_1[1600];
extern uint32_t localRIV2alloc_LUT100_0[6000];
extern uint32_t localRIV2alloc_LUT100_1[6000];
extern uint32_t localRIV2alloc_LUT100_2[6000];
extern uint32_t localRIV2alloc_LUT100_3[6000];
#endif
handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t codeword_index,
uint8_t *sdu) {
nfapi_dl_config_dlsch_pdu_rel8_t *rel8 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8;
#ifdef Rel14
nfapi_dl_config_dlsch_pdu_rel13_t *rel13 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13;
#endif
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int UE_id;
......@@ -969,9 +998,14 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0];
dlsch1 = eNB->dlsch[UE_id][1];
#ifdef Rel14
if ((rel13->pdsch_payload_type == 0) && (rel13->ue_type>0)) dlsch0->harq_ids[proc->subframe_tx] = 0;
#endif
harq_pid = dlsch0->harq_ids[proc->subframe_tx];
AssertFatal((harq_pid>=0) && (harq_pid<8),"harq_pid %d not in 0...7\n",harq_pid);
dlsch0_harq = dlsch0->harq_processes[harq_pid];
......@@ -983,6 +1017,52 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu;
#ifdef Rel14
if ((rel13->pdsch_payload_type == 0) && (rel13->ue_type>0)) { // this is a BR/CE UE and SIB1-BR
// configure PDSCH
switch (eNB->frame_parms.N_RB_DL) {
case 6:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding];
break;
case 15:
AssertFatal(1==0,"15 PRBs not supported for now\n");
break;
case 25:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding];
break;
case 50:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding];
break;
case 75:
AssertFatal(1==0,"75 PRBs not supported for now\n");
break;
case 100:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding];
}
dlsch0->active = 1;
dlsch0_harq->nb_rb = 6;
dlsch0_harq->vrb_type = LOCALIZED;
dlsch0_harq->rvidx = 0;
dlsch0_harq->Nl = 0;
dlsch0_harq->mimo_mode = (eNB->frame_parms.nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
dlsch0_harq->dl_power_off = 1;
dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->TBS = rel8->length;
}
else {
}
#endif
}
handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
......@@ -1121,7 +1201,8 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
// handle_nfapi_epdcch_pdu(eNB,dl_config_pdu);
break;
case NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE:
// handle_nfapi_mpdcch_pdu(eNB,dl_config_pdu);
handle_nfapi_mpdcch_pdu(eNB,proc,dl_config_pdu);
eNB->mpdcch_vars[subframe&1].num_dci++;
break;
}
}
......@@ -1138,6 +1219,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
case NFAPI_HI_DCI0_HI_PDU_TYPE:
handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu);
eNB->pdcch_vars[subframe&1].num_dci++;
break;
}
}
......
openair2/LAYER2/MAC/config.c
View file @ ae884afe
......@@ -444,23 +444,26 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
SCellToAddMod_r10_t *sCellToAddMod_r10,
//struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10,
#endif
MeasObjectToAddMod_t **measObj,
MAC_MainConfig_t *mac_MainConfig,
long logicalChannelIdentity,
LogicalChannelConfig_t *logicalChannelConfig,
MeasGapConfig_t *measGapConfig,
TDD_Config_t *tdd_Config,
MobilityControlInfo_t *mobilityControlInfo,
uint8_t *SIwindowsize,
uint16_t *SIperiod,
uint32_t ul_CarrierFreq,
long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission,
struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList
MeasObjectToAddMod_t **measObj,
MAC_MainConfig_t *mac_MainConfig,
long logicalChannelIdentity,
LogicalChannelConfig_t *logicalChannelConfig,
MeasGapConfig_t *measGapConfig,
TDD_Config_t *tdd_Config,
MobilityControlInfo_t *mobilityControlInfo,
SchedulingInfoList_t *schedulingInfoList,
uint32_t ul_CarrierFreq,
long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission,
struct MBSFN_SubframeConfigList *mbsfn_SubframeConfigList
#if defined(Rel10) || defined(Rel14)
,uint8_t MBMS_Flag,
MBSFN_AreaInfoList_r9_t *mbsfn_AreaInfoList,
PMCH_InfoList_r9_t *pmch_InfoList
,uint8_t MBMS_Flag,
MBSFN_AreaInfoList_r9_t *mbsfn_AreaInfoList,
PMCH_InfoList_r9_t *pmch_InfoList
#endif
#ifdef Rel14
,
SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext
#endif
) {
......@@ -513,13 +516,16 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
mac_init_cell_params(Mod_idP,CC_idP);
}
if ((SIwindowsize!=NULL) && (SIperiod!=NULL)) {
RC.mac[Mod_idP]->common_channels[CC_idP].tdd_Config = tdd_Config;
RC.mac[Mod_idP]->common_channels[CC_idP].SIwindowsize = *SIwindowsize;
RC.mac[Mod_idP]->common_channels[CC_idP].SIperiod = *SIperiod;
if (schedulingInfoList!=NULL) {
RC.mac[Mod_idP]->common_channels[CC_idP].tdd_Config = tdd_Config;
RC.mac[Mod_idP]->common_channels[CC_idP].schedulingInfoList = schedulingInfoList;
config_sib1(Mod_idP,CC_idP,tdd_Config);
}
#ifdef Rel14
if (sib1_v13ext != NULL) {
RC.mac[Mod_idP]->common_channels[CC_idP].sib1_v13ext = sib1_v13ext;
}