Commit cab3d882 authored by knopp's avatar knopp

new code for UE band scanning, more cleanup of warnings in openair1

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@6424 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent 1a3548e5
...@@ -283,13 +283,16 @@ void compute_beta8(llr_t* alpha,llr_t* beta,llr_t *m_11,llr_t* m_10,unsigned sho ...@@ -283,13 +283,16 @@ void compute_beta8(llr_t* alpha,llr_t* beta,llr_t *m_11,llr_t* m_10,unsigned sho
__m128i *beta128,*alpha128,*beta_ptr; __m128i *beta128,*alpha128,*beta_ptr;
__m128i beta_max; __m128i beta_max;
int16_t m11,m10,beta0_16,beta1_16,beta2_16,beta3_16,beta4_16,beta5_16,beta6_16,beta7_16,beta0_2,beta1_2,beta2_2,beta3_2,beta_m;
llr_t beta0,beta1; llr_t beta0,beta1;
llr_t beta2,beta3,beta4,beta5,beta6,beta7; llr_t beta2,beta3,beta4,beta5,beta6,beta7;
__m128i beta_16;
#if 0 #if 0
int16_t m11,m10;
int16_t beta0_16,beta1_16,beta2_16,beta3_16,beta4_16,beta5_16,beta6_16,beta7_16,beta0_2,beta1_2,beta2_2,beta3_2,beta_m;
__m128i beta_16;
// termination for beta initialization // termination for beta initialization
m11=(int16_t)m_11[2+frame_length]; m11=(int16_t)m_11[2+frame_length];
...@@ -626,7 +629,8 @@ unsigned char phy_threegpplte_turbo_decoder8(short *y, ...@@ -626,7 +629,8 @@ unsigned char phy_threegpplte_turbo_decoder8(short *y,
llr_t m10[n+16] __attribute__ ((aligned(16))); llr_t m10[n+16] __attribute__ ((aligned(16)));
int *pi2_p,*pi4_p,*pi5_p,*pi6_p; // int *pi2_p,*pi4_p,*pi5_p,*pi6_p;
int *pi4_p,*pi5_p,*pi6_p;
llr_t *s,*s1,*s2,*yp1,*yp2,*yp; llr_t *s,*s1,*s2,*yp1,*yp2,*yp;
__m128i *yp128; __m128i *yp128;
unsigned int i,j,iind;//,pi; unsigned int i,j,iind;//,pi;
......
...@@ -43,10 +43,17 @@ ...@@ -43,10 +43,17 @@
/*!\brief Timing drift hysterisis in samples*/ /*!\brief Timing drift hysterisis in samples*/
#define SYNCH_HYST 1 #define SYNCH_HYST 1
/*!
\brief This function is used for time-frequency scanning prior to complete cell search. It scans
over the entire LTE band for maximum correlation and keeps the 10 best scores and the correspoding frequency offset (5 kHz granularity) for each of the 3 PSS sequences.
\param ue Pointer to UE variables
\param band index of lte band
\param DL_freq Central RF Frequency in Hz
*/
/*! /*!
\brief This function allocates memory needed for the synchronization. \brief This function allocates memory needed for the synchronization.
\param frame_parms LTE DL frame parameter structure \param frame_parms LTE DL frame parameter structure
*/ */
int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms); //LTE_UE_COMMON *common_vars int lte_sync_time_init(LTE_DL_FRAME_PARMS *frame_parms); //LTE_UE_COMMON *common_vars
......
...@@ -190,15 +190,7 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* phy_vars_eNB,uint8_t UE_id,uint8_ ...@@ -190,15 +190,7 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* phy_vars_eNB,uint8_t UE_id,uint8_
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms; LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->lte_frame_parms;
LTE_eNB_PUSCH *eNB_pusch_vars = phy_vars_eNB->lte_eNB_pusch_vars[UE_id]; LTE_eNB_PUSCH *eNB_pusch_vars = phy_vars_eNB->lte_eNB_pusch_vars[UE_id];
int32_t **ul_ch_estimates_time= eNB_pusch_vars->drs_ch_estimates_time[0]; int32_t **ul_ch_estimates_time= eNB_pusch_vars->drs_ch_estimates_time[0];
int subframe = phy_vars_eNB->proc[sched_subframe].subframe_rx; uint8_t cyclic_shift = 0;
uint8_t harq_pid;
uint8_t Ns = 1; //we take the estimate from the second slot
uint8_t cyclic_shift = 0;//(frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
//phy_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->n_DMRS2 +
//frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[(subframe<<1)+Ns]) % 12;
harq_pid = subframe2harq_pid(frame_parms,phy_vars_eNB->proc[sched_subframe].frame_rx,subframe);
int sync_pos = (frame_parms->ofdm_symbol_size-cyclic_shift*frame_parms->ofdm_symbol_size/12)%(frame_parms->ofdm_symbol_size); int sync_pos = (frame_parms->ofdm_symbol_size-cyclic_shift*frame_parms->ofdm_symbol_size/12)%(frame_parms->ofdm_symbol_size);
......
This diff is collapsed.
% OCTAVE Code to generate upsampled pss0-2
n=0:61;
d0 = zeros(1,62);
d1 = zeros(1,62);
d2 = zeros(1,62);
d0(1+(0:30)) = exp(-sqrt(-1)*pi*25*(0:30).*(1:31)/63);
d1(1+(0:30)) = exp(-sqrt(-1)*pi*29*(0:30).*(1:31)/63);
d2(1+(0:30)) = exp(-sqrt(-1)*pi*34*(0:30).*(1:31)/63);
d0(1+(31:61)) = exp(-sqrt(-1)*pi*25*(32:62).*(33:63)/63);
d1(1+(31:61)) = exp(-sqrt(-1)*pi*29*(32:62).*(33:63)/63);
d2(1+(31:61)) = exp(-sqrt(-1)*pi*34*(32:62).*(33:63)/63);
pss0f = zeros(1,2048);
pss0f(2:32) = d0(1:31);
pss0f(2048+(-30:0)) = d0(32:62);
pss1f = zeros(1,2048);
pss1f(2:32) = d1(1:31);
pss1f(2048+(-30:0)) = d1(32:62);
pss2f = zeros(1,2048);
pss2f(2:32) = d2(1:31);
pss2f(2048+(-30:0)) = d2(32:62);
pss0_6144f = fftshift(fft(ifft(pss0f)*sqrt(2048),6144)/sqrt(6144));
pss1_6144f = fftshift(fft(ifft(pss1f)*sqrt(2048),6144)/sqrt(6144));
pss2_6144f = fftshift(fft(ifft(pss2f)*sqrt(2048),6144)/sqrt(6144));
pss0_6144_fp = zeros(1,512);
pss0_6144_fp(1:2:512) = (floor(32767*real(pss0_6144f(3072+(-128:127)))));
pss0_6144_fp(2:2:512) = (floor(32767*imag(pss0_6144f(3072+(-128:127)))));
pss1_6144_fp = zeros(1,512);
pss1_6144_fp(1:2:512) = (floor(32767*real(pss1_6144f(3072+(-128:127)))));
pss1_6144_fp(2:2:512) = (floor(32767*imag(pss1_6144f(3072+(-128:127)))));
pss2_6144_fp = zeros(1,512);
pss2_6144_fp(1:2:512) = (floor(32767*real(pss2_6144f(3072+(-128:127)))));
pss2_6144_fp(2:2:512) = (floor(32767*imag(pss2_6144f(3072+(-128:127)))));
fprintf("int16_t pss6144_0[512]={");
fprintf("%d,",pss0_6144_fp(1:511));
fprintf("%d};\n",pss0_6144_fp(512));
fprintf("int16_t pss6144_1[512]={");
fprintf("%d,",pss1_6144_fp(1:511));
fprintf("%d};\n",pss1_6144_fp(512));
fprintf("int16_t pss6144_2[512]={");
fprintf("%d,",pss2_6144_fp(1:511));
fprintf("%d};\n",pss2_6144_fp(512));
...@@ -105,10 +105,8 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB, ...@@ -105,10 +105,8 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB,
*temp_out_fft_1_ptr = (int32_t*)0,*out_fft_ptr_1 = (int32_t*)0, *temp_out_fft_1_ptr = (int32_t*)0,*out_fft_ptr_1 = (int32_t*)0,
*temp_in_ifft_ptr = (int32_t*)0; *temp_in_ifft_ptr = (int32_t*)0;
#ifdef NEW_FFT
__m128i *rxdataF128,*ul_ref128,*ul_ch128; __m128i *rxdataF128,*ul_ref128,*ul_ch128;
__m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3; __m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3;
#endif
Msc_RS = N_rb_alloc*12; Msc_RS = N_rb_alloc*12;
...@@ -142,15 +140,7 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB, ...@@ -142,15 +140,7 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB,
#endif #endif
#endif #endif
#ifndef NEW_FFT
if ( (frame_parms->ofdm_symbol_size == 128) ||
(frame_parms->ofdm_symbol_size == 512) )
rx_power_correction = 2;
else
rx_power_correction = 1;
#else
rx_power_correction = 1; rx_power_correction = 1;
#endif
if (l == (3 - frame_parms->Ncp)) { if (l == (3 - frame_parms->Ncp)) {
...@@ -159,13 +149,6 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB, ...@@ -159,13 +149,6 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB,
for (aa=0; aa<nb_antennas_rx; aa++){ for (aa=0; aa<nb_antennas_rx; aa++){
// msg("Componentwise prod aa %d, symbol_offset %d,ul_ch_estimates %p,ul_ch_estimates[aa] %p,ul_ref_sigs_rx[0][0][Msc_RS_idx] %p\n",aa,symbol_offset,ul_ch_estimates,ul_ch_estimates[aa],ul_ref_sigs_rx[0][0][Msc_RS_idx]); // msg("Componentwise prod aa %d, symbol_offset %d,ul_ch_estimates %p,ul_ch_estimates[aa] %p,ul_ref_sigs_rx[0][0][Msc_RS_idx] %p\n",aa,symbol_offset,ul_ch_estimates,ul_ch_estimates[aa],ul_ref_sigs_rx[0][0][Msc_RS_idx]);
#ifndef NEW_FFT
mult_cpx_vector_norep2((int16_t*) &rxdataF_ext[aa][symbol_offset<<1],
(int16_t*) ul_ref_sigs_rx[u][v][Msc_RS_idx],
(int16_t*) &ul_ch_estimates[aa][symbol_offset],
Msc_RS,
15);
#else
rxdataF128 = (__m128i *)&rxdataF_ext[aa][symbol_offset]; rxdataF128 = (__m128i *)&rxdataF_ext[aa][symbol_offset];
ul_ch128 = (__m128i *)&ul_ch_estimates[aa][symbol_offset]; ul_ch128 = (__m128i *)&ul_ch_estimates[aa][symbol_offset];
ul_ref128 = (__m128i *)ul_ref_sigs_rx[u][v][Msc_RS_idx]; ul_ref128 = (__m128i *)ul_ref_sigs_rx[u][v][Msc_RS_idx];
...@@ -219,7 +202,6 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB, ...@@ -219,7 +202,6 @@ int32_t lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB,
ul_ref128+=3; ul_ref128+=3;
rxdataF128+=3; rxdataF128+=3;
} }
#endif
alpha_ind = 0; alpha_ind = 0;
if((cyclic_shift != 0)){ if((cyclic_shift != 0)){
......
...@@ -125,29 +125,8 @@ void generate_ul_ref_sigs_rx(void) { ...@@ -125,29 +125,8 @@ void generate_ul_ref_sigs_rx(void) {
for (n=0;n<dftsizes[Msc_RS];n++) { for (n=0;n<dftsizes[Msc_RS];n++) {
m=n%ref_primes[Msc_RS]; m=n%ref_primes[Msc_RS];
phase = (double)q*m*(m+1)/ref_primes[Msc_RS]; phase = (double)q*m*(m+1)/ref_primes[Msc_RS];
#ifndef IFFT_FPGA
#ifndef NEW_FFT
ul_ref_sigs_rx[u][v][Msc_RS][n<<2] =(int16_t)(floor(32767*cos(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<2)] =-(int16_t)(floor(32767*sin(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][2+(n<<2)] =(int16_t)(floor(32767*sin(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][3+(n<<2)] =(int16_t)(floor(32767*cos(M_PI*phase)));
#else
ul_ref_sigs_rx[u][v][Msc_RS][n<<1] =(int16_t)(floor(32767*cos(M_PI*phase))); ul_ref_sigs_rx[u][v][Msc_RS][n<<1] =(int16_t)(floor(32767*cos(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<1)] =-(int16_t)(floor(32767*sin(M_PI*phase))); ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<1)] =-(int16_t)(floor(32767*sin(M_PI*phase)));
#endif
#else
#ifndef OFDMA_ULSCH
ul_ref_sigs_rx[u][v][Msc_RS][n<<2] =(int16_t)(floor(32767*cos(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<2)] =-(int16_t)(floor(32767*sin(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][2+(n<<2)] =(int16_t)(floor(32767*sin(M_PI*phase)));
ul_ref_sigs_rx[u][v][Msc_RS][3+(n<<2)] =(int16_t)(floor(32767*cos(M_PI*phase)));
#else
ul_ref_sigs_rx[u][v][Msc_RS][n<<2] =(int16_t) ((cos(M_PI*phase)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<2)] =(int16_t)((-sin(M_PI*phase)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][v][Msc_RS][2+(n<<2)] =(int16_t)((-sin(M_PI*phase)>=0) ? -ONE_OVER_SQRT2_Q15 : ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][v][Msc_RS][3+(n<<2)] =(int16_t) ((cos(M_PI*phase)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
#endif
#endif
#ifdef MAIN #ifdef MAIN
if (Msc_RS<5) if (Msc_RS<5)
printf("(%d,%d) ",ul_ref_sigs_rx[u][v][Msc_RS][n<<2],ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<2)]); printf("(%d,%d) ",ul_ref_sigs_rx[u][v][Msc_RS][n<<2],ul_ref_sigs_rx[u][v][Msc_RS][1+(n<<2)]);
...@@ -165,60 +144,19 @@ void generate_ul_ref_sigs_rx(void) { ...@@ -165,60 +144,19 @@ void generate_ul_ref_sigs_rx(void) {
for (u=0;u<30;u++) { for (u=0;u<30;u++) {
ul_ref_sigs_rx[u][0][0] = (int16_t*)malloc16(4*sizeof(int16_t)*dftsizes[0]); ul_ref_sigs_rx[u][0][0] = (int16_t*)malloc16(4*sizeof(int16_t)*dftsizes[0]);
for (n=0;n<dftsizes[0];n++) { for (n=0;n<dftsizes[0];n++) {
#ifndef IFFT_FPGA
#ifndef NEW_FFT
ul_ref_sigs_rx[u][0][0][n<<2] = (int16_t)(floor(32767*cos(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][1+(n<<2)]= (int16_t)(floor(32767*sin(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][2+(n<<2)]=-(int16_t)(floor(32767*sin(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][3+(n<<2)]= (int16_t)(floor(32767*cos(M_PI*ref12[(u*12) + n]/4)));
#else
ul_ref_sigs_rx[u][0][0][n<<1] = (int16_t)(floor(32767*cos(M_PI*ref12[(u*12) + n]/4))); ul_ref_sigs_rx[u][0][0][n<<1] = (int16_t)(floor(32767*cos(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][1+(n<<1)]= (int16_t)(floor(32767*sin(M_PI*ref12[(u*12) + n]/4))); ul_ref_sigs_rx[u][0][0][1+(n<<1)]= (int16_t)(floor(32767*sin(M_PI*ref12[(u*12) + n]/4)));
#endif
#else
#ifndef OFDMA_ULSCH
ul_ref_sigs_rx[u][0][0][n<<2] = (int16_t)(floor(32767*cos(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][1+(n<<2)]= (int16_t)(floor(32767*sin(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][2+(n<<2)]=-(int16_t)(floor(32767*sin(M_PI*ref12[(u*12) + n]/4)));
ul_ref_sigs_rx[u][0][0][3+(n<<2)]= (int16_t)(floor(32767*cos(M_PI*ref12[(u*12) + n]/4)));
#else
ul_ref_sigs_rx[u][0][0][n<<2] = (int16_t)((cos(M_PI*ref12[(u*12) + n]/4)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][0][0][1+(n<<2)]= (int16_t)((sin(M_PI*ref12[(u*12) + n]/4)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][0][0][2+(n<<2)]= (int16_t)((sin(M_PI*ref12[(u*12) + n]/4)>=0) ? -ONE_OVER_SQRT2_Q15 : ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][0][0][3+(n<<2)]= (int16_t)((cos(M_PI*ref12[(u*12) + n]/4)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
#endif
#endif
} }
} }
// These are the sequences for RB 2 // These are the sequences for RB 2
for (u=0;u<30;u++) { for (u=0;u<30;u++) {
ul_ref_sigs_rx[u][0][1] = (int16_t*)malloc16(4*sizeof(int16_t)*dftsizes[1]); ul_ref_sigs_rx[u][0][1] = (int16_t*)malloc16(4*sizeof(int16_t)*dftsizes[1]);
for (n=0;n<dftsizes[1];n++) { for (n=0;n<dftsizes[1];n++) {
#ifndef IFFT_FPGA
#ifndef NEW_FFT
ul_ref_sigs_rx[u][0][1][n<<2] = (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4)));
ul_ref_sigs_rx[u][0][1][1+(n<<2)]= (int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4)));
#else
ul_ref_sigs_rx[u][0][1][n<<1] = (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4))); ul_ref_sigs_rx[u][0][1][n<<1] = (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4)));
ul_ref_sigs_rx[u][0][1][1+(n<<1)]= (int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4))); ul_ref_sigs_rx[u][0][1][1+(n<<1)]= (int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4)));
#endif
ul_ref_sigs_rx[u][0][1][2+(n<<2)]=-(int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4)));
ul_ref_sigs_rx[u][0][1][3+(n<<2)]= (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4)));
#else
#ifndef OFDMA_ULSCH
ul_ref_sigs_rx[u][0][1][n<<2] = (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4)));
ul_ref_sigs_rx[u][0][1][1+(n<<2)]= (int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4)));
ul_ref_sigs_rx[u][0][1][2+(n<<2)]=-(int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4))); ul_ref_sigs_rx[u][0][1][2+(n<<2)]=-(int16_t)(floor(32767*sin(M_PI*ref24[(u*24) + n]/4)));
ul_ref_sigs_rx[u][0][1][3+(n<<2)]= (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4))); ul_ref_sigs_rx[u][0][1][3+(n<<2)]= (int16_t)(floor(32767*cos(M_PI*ref24[(u*24) + n]/4)));
#else
ul_ref_sigs_rx[u][0][1][n<<2] = (int16_t)((cos(M_PI*ref24[(u*24) + n]/4)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][0][1][1+(n<<2)]= (int16_t)((sin(M_PI*ref24[(u*24) + n]/4)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][0][1][2+(n<<2)]= (int16_t)((sin(M_PI*ref24[(u*24) + n]/4)>=0) ? -ONE_OVER_SQRT2_Q15 : ONE_OVER_SQRT2_Q15);
ul_ref_sigs_rx[u][0][1][3+(n<<2)]= (int16_t)((cos(M_PI*ref24[(u*24) + n]/4)>=0) ? ONE_OVER_SQRT2_Q15 : -ONE_OVER_SQRT2_Q15);
#endif
#endif
} }
} }
......
...@@ -2550,11 +2550,11 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue, ...@@ -2550,11 +2550,11 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
uint8_t format0_found=0,format_c_found=0; uint8_t format0_found=0,format_c_found=0;
uint8_t tmode = phy_vars_ue->transmission_mode[eNB_id]; uint8_t tmode = phy_vars_ue->transmission_mode[eNB_id];
uint8_t frame_type = frame_parms->frame_type; uint8_t frame_type = frame_parms->frame_type;
uint8_t format1A_size_bits,format1A_size_bytes; uint8_t format1A_size_bits=0,format1A_size_bytes=0;
uint8_t format0_size_bits,format0_size_bytes; uint8_t format0_size_bits=0,format0_size_bytes=0;
uint8_t format1_size_bits,format1_size_bytes; uint8_t format1_size_bits=0,format1_size_bytes=0;
uint8_t format2_size_bits,format2_size_bytes; uint8_t format2_size_bits=0,format2_size_bytes=0;
uint8_t format2A_size_bits,format2A_size_bytes; uint8_t format2A_size_bits=0,format2A_size_bytes=0;
switch (frame_parms->N_RB_DL) { switch (frame_parms->N_RB_DL) {
case 6: case 6:
......
...@@ -5371,7 +5371,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, ...@@ -5371,7 +5371,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
// uint32_t current_dlsch_cqi = phy_vars_ue->current_dlsch_cqi[eNB_id]; // uint32_t current_dlsch_cqi = phy_vars_ue->current_dlsch_cqi[eNB_id];
uint32_t cqi_req; uint32_t cqi_req;
uint32_t dai; uint32_t dai=0;
uint32_t cshift; uint32_t cshift;
uint32_t TPC; uint32_t TPC;
uint32_t ndi; uint32_t ndi;
...@@ -6141,7 +6141,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6141,7 +6141,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
uint32_t dai = 0; uint32_t dai = 0;
uint32_t cshift = 0; uint32_t cshift = 0;
uint32_t TPC = 0; uint32_t TPC = 0;
uint32_t ndi = 0;
uint32_t mcs = 0; uint32_t mcs = 0;
uint32_t rballoc = UINT32_MAX; uint32_t rballoc = UINT32_MAX;
uint32_t RIV_max = 0; uint32_t RIV_max = 0;
...@@ -6170,7 +6169,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6170,7 +6169,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
dai = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai; dai = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->dai;
cshift = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift; cshift = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
TPC = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC; TPC = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
ndi = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
mcs = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs; mcs = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
rballoc = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc; rballoc = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping; // hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
...@@ -6180,7 +6178,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6180,7 +6178,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
cqi_req = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req; cqi_req = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift; cshift = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC; TPC = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->TPC;
ndi = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->ndi;
mcs = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs; mcs = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->mcs;
rballoc = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc; rballoc = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping; // hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping;
...@@ -6197,7 +6194,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6197,7 +6194,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
dai = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai; dai = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->dai;
cshift = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift; cshift = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
TPC = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC; TPC = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
ndi = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->ndi;
mcs = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs; mcs = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->mcs;
rballoc = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc; rballoc = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping; // hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
...@@ -6207,7 +6203,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6207,7 +6203,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req; cqi_req = ((DCI0_5MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift; cshift = ((DCI0_5MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC; TPC = ((DCI0_5MHz_FDD_t *)dci_pdu)->TPC;
ndi = ((DCI0_5MHz_FDD_t *)dci_pdu)->ndi;
mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs; mcs = ((DCI0_5MHz_FDD_t *)dci_pdu)->mcs;
rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc; rballoc = ((DCI0_5MHz_FDD_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping; // hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
...@@ -6224,7 +6219,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6224,7 +6219,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
dai = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai; dai = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->dai;
cshift = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift; cshift = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->cshift;
TPC = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC; TPC = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->TPC;
ndi = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->ndi;
mcs = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs; mcs = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->mcs;
rballoc = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc; rballoc = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping; // hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping;
...@@ -6234,7 +6228,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6234,7 +6228,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
cqi_req = ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req; cqi_req = ((DCI0_10MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift; cshift = ((DCI0_10MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC; TPC = ((DCI0_10MHz_FDD_t *)dci_pdu)->TPC;
ndi = ((DCI0_10MHz_FDD_t *)dci_pdu)->ndi;
mcs = ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs; mcs = ((DCI0_10MHz_FDD_t *)dci_pdu)->mcs;
rballoc = ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc; rballoc = ((DCI0_10MHz_FDD_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping; // hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping;
...@@ -6251,7 +6244,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6251,7 +6244,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
dai = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai; dai = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->dai;
cshift = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift; cshift = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->cshift;
TPC = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC; TPC = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->TPC;
ndi = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->ndi;
mcs = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs; mcs = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->mcs;
rballoc = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc; rballoc = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping; // hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping;
...@@ -6261,7 +6253,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6261,7 +6253,6 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
cqi_req = ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req; cqi_req = ((DCI0_20MHz_FDD_t *)dci_pdu)->cqi_req;
cshift = ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift; cshift = ((DCI0_20MHz_FDD_t *)dci_pdu)->cshift;
TPC = ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC; TPC = ((DCI0_20MHz_FDD_t *)dci_pdu)->TPC;
ndi = ((DCI0_20MHz_FDD_t *)dci_pdu)->ndi;
mcs = ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs; mcs = ((DCI0_20MHz_FDD_t *)dci_pdu)->mcs;
rballoc = ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc; rballoc = ((DCI0_20MHz_FDD_t *)dci_pdu)->rballoc;
// hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping; // hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping;
...@@ -6288,14 +6279,12 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu, ...@@ -6288,14 +6279,12 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
} }
#ifdef DEBUG_DCI #ifdef DEBUG_DCI
LOG_D(PHY,"generate_eNB_ulsch_params_from_dci: subframe %d, rnti %x,harq_pid %d,ndi %d,cqi_req %d\n",subframe,rnti,harq_pid,ndi,cqi_req); LOG_D(PHY,"generate_eNB_ulsch_params_from_dci: subframe %d, rnti %x,harq_pid %d,cqi_req %d\n",subframe,rnti,harq_pid,cqi_req);
#endif #endif
ulsch->harq_processes[harq_pid]->dci_alloc = 1; ulsch->harq_processes[harq_pid]->dci_alloc = 1;
ulsch->harq_processes[harq_pid]->rar_alloc = 0; ulsch->harq_processes[harq_pid]->rar_alloc = 0;
ulsch->harq_processes[harq_pid]->TPC = TPC; ulsch->harq_processes[harq_pid]->TPC = TPC;
// ulsch->harq_processes[harq_pid]->Ndi = ndi;
ulsch->harq_processes[harq_pid]->n_DMRS = cshift; ulsch->harq_processes[harq_pid]->n_DMRS = cshift;
......
...@@ -474,19 +474,19 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue, ...@@ -474,19 +474,19 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
#include "LAYER2/MAC/defs.h" #include "LAYER2/MAC/defs.h"
#endif #endif
int dlsch_abstraction_EESM(double* sinr_dB, uint8_t TM, uint32_t rb_alloc[4], uint8_t mcs, uint8_t dl_power_off) { int dlsch_abstraction_EESM(double* sinr_dB, uint8_t TM, uint32_t rb_alloc[4], uint8_t mcs, uint8_t dl_power_off) {
int index,ii; int ii;
double sinr_eff = 0; double sinr_eff = 0;
int rb_count = 0; int rb_count = 0;
int offset; int offset;
double bler = 0; double bler = 0;
if(TM==5 && dl_power_off==1) if(TM==5 && dl_power_off==1)
{ //do nothing -- means there is no second UE and TM 5 is behaving like TM 6 for a singal user { //do nothing -- means there is no second UE and TM 5 is behaving like TM 6 for a singal user
} }
else else
TM = TM-1; TM = TM-1;
for (offset = 0; offset <= 24; offset++) { for (offset = 0; offset <= 24; offset++) {
if (rb_alloc[0] & (1<<offset)) { if (rb_alloc[0] & (1<<offset)) {
rb_count++; rb_count++;
...@@ -505,12 +505,12 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue, ...@@ -505,12 +505,12 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
LOG_D(OCM,"sinr_eff (lin, weighted) = %f\n",sinr_eff); LOG_D(OCM,"sinr_eff (lin, weighted) = %f\n",sinr_eff);
sinr_eff = 10 * log10(sinr_eff); sinr_eff = 10 * log10(sinr_eff);
LOG_D(OCM,"sinr_eff (dB) = %f\n",sinr_eff); LOG_D(OCM,"sinr_eff (dB) = %f\n",sinr_eff);
bler = interp(sinr_eff,&sinr_bler_map[mcs][0][0],&sinr_bler_map[mcs][1][0],table_length[mcs]); bler = interp(sinr_eff,&sinr_bler_map[mcs][0][0],&sinr_bler_map[mcs][1][0],table_length[mcs]);
#ifdef USER_MODE // need to be adapted for the emulation in the kernel space #ifdef USER_MODE // need to be adapted for the emulation in the kernel space
if (uniformrandom() < bler) { if (uniformrandom() < bler) {
LOG_I(OCM,"abstraction_decoding failed (mcs=%d, sinr_eff=%f, bler=%f, TM %d)\n",mcs,sinr_eff,bler, TM); LOG_I(OCM,"abstraction_decoding failed (mcs=%d, sinr_eff=%f, bler=%f, TM %d)\n",mcs,sinr_eff,bler, TM);
return(1); return(1);
} }
else { else {
...@@ -520,11 +520,11 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue, ...@@ -520,11 +520,11 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
#endif #endif
} }
int dlsch_abstraction_MIESM(double* sinr_dB,uint8_t TM, uint32_t rb_alloc[4], uint8_t mcs,uint8_t dl_power_off) { int dlsch_abstraction_MIESM(double* sinr_dB,uint8_t TM, uint32_t rb_alloc[4], uint8_t mcs,uint8_t dl_power_off) {
int index,ii; int ii;
double sinr_eff = 0; double sinr_eff = 0;
double x = 0; double x = 0;
double I =0; double I =0;
double qpsk_max=12.2; double qpsk_max=12.2;
double qam16_max=19.2; double qam16_max=19.2;
double qam64_max=25.2; double qam64_max=25.2;
......
...@@ -658,19 +658,10 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB, ...@@ -658,19 +658,10 @@ int32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
re_offset -= (frame_parms->ofdm_symbol_size); re_offset -= (frame_parms->ofdm_symbol_size);
symbol_offset = (unsigned int)frame_parms->ofdm_symbol_size*l; symbol_offset = (unsigned int)frame_parms->ofdm_symbol_size*l;
#ifndef NEW_FFT
rxptr = (int16_t *)&eNB_common_vars->rxdataF[0][aa][2*symbol_offset];
#else
rxptr = (int16_t *)&eNB_common_vars->rxdataF[0][aa][symbol_offset]; rxptr = (int16_t *)&eNB_common_vars->rxdataF[0][aa][symbol_offset];
#endif
for (i=0;i<12;i++,j+=2,re_offset++) { for (i=0;i<12;i++,j+=2,re_offset++) {
#ifndef NEW_FFT
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<2]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<2)]*(int32_t)zptr[1+j])>>15); rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<2]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<2)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<2]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<2)]*(int32_t)zptr[j])>>15); rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<2]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<2)]*(int32_t)zptr[j])>>15);
#else
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
#endif
if (re_offset==frame_parms->ofdm_symbol_size) if (re_offset==frame_parms->ofdm_symbol_size)
re_offset = 0; re_offset = 0;
#ifdef DEBUG_PUCCH_RX #ifdef DEBUG_PUCCH_RX
...@@ -956,7 +947,7 @@ int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB, ...@@ -956,7 +947,7 @@ int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
rnti = phy_vars_eNB->ulsch_eNB[UE_index]->rnti; rnti = phy_vars_eNB->ulsch_eNB[UE_index]->rnti;
for (UE_id=0;UE_id<NB_UE_INST;UE_id++) { for (UE_id=0;UE_id<NB_UE_INST;UE_id++) {
if (rnti == PHY_vars_UE_g[UE_id][phy_vars_eNB->CC_id]->lte_ue_pdcch_vars[0]->crnti) if (rnti == PHY_vars_UE_g[UE_id][CC_id]->lte_ue_pdcch_vars[0]->crnti)
break; break;
} }
if (UE_id==NB_UE_INST) { if (UE_id==NB_UE_INST) {
...@@ -965,19 +956,19 @@ int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB, ...@@ -965,19 +956,19 @@ int32_t rx_pucch_emul(PHY_VARS_eNB *phy_vars_eNB,
} }
if (fmt == pucch_format1) { if (fmt == pucch_format1) {
payload[0] = PHY_vars_UE_g[UE_id][phy_vars_eNB->CC_id]->sr[subframe]; payload[0] = PHY_vars_UE_g[UE_id][CC_id]->sr[subframe];
} }
else if (fmt == pucch_format1a) { else if (fmt == pucch_format1a) {
payload[0] = PHY_vars_UE_g[UE_id][phy_vars_eNB->CC_id]->pucch_payload[0]; payload[0] = PHY_vars_UE_g[UE_id][CC_id]->pucch_payload[0];
} }
else if (fmt == pucch_format1b) { else if (fmt == pucch_format1b) {
payload[0] = PHY_vars_UE_g[UE_id][phy_vars_eNB->CC_id]->pucch_payload[0]; payload[0] = PHY_vars_UE_g[UE_id][CC_id]->pucch_payload[0];
payload[1] = PHY_vars_UE_g[UE_id][phy_vars_eNB->CC_id]->pucch_payload[1]; payload[1] = PHY_vars_UE_g[UE_id][CC_id]->pucch_payload[1];
}