Commit d3d423f5 authored by knopp's avatar knopp
Browse files

split phy_procedures_eNB_TX into sub-modules for better understanding. No functional differences.

parent e2c32228
...@@ -726,7 +726,9 @@ typedef enum {format0, ...@@ -726,7 +726,9 @@ typedef enum {format0,
format2B, format2B,
format2C, format2C,
format2D, format2D,
format3 format3,
format3A,
format4
} DCI_format_t; } DCI_format_t;
typedef enum { typedef enum {
......
...@@ -638,7 +638,7 @@ int32_t generate_prach( PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id, uint8_t subfra ...@@ -638,7 +638,7 @@ int32_t generate_prach( PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id, uint8_t subfra
prach_start = ((subframe*phy_vars_ue->lte_frame_parms.samples_per_tti)<<1)-phy_vars_ue->N_TA_offset; prach_start = ((subframe*phy_vars_ue->lte_frame_parms.samples_per_tti)<<1)-phy_vars_ue->N_TA_offset;
#else #else
#if defined(EXMIMO) || defined(OAI_USRP) #if defined(EXMIMO) || defined(OAI_USRP)
prach_start = (phy_vars_ue->rx_offset+subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->N_TA_offset); prach_start = (phy_vars_ue->rx_offset+subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-phy_vars_ue->hw_timing_advance-phy_vars_ue->N_TA_offset);
if (prach_start<0) if (prach_start<0)
prach_start+=(phy_vars_ue->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME); prach_start+=(phy_vars_ue->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
......
...@@ -102,7 +102,7 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t ...@@ -102,7 +102,7 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
len += sprintf(&buffer[len], "[UE PROC] RX Gain %d dB\n",phy_vars_ue->rx_total_gain_dB); len += sprintf(&buffer[len], "[UE PROC] RX Gain %d dB\n",phy_vars_ue->rx_total_gain_dB);
#endif #endif
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
len += sprintf(&buffer[len], "[UE_PROC] Frequency offset %d Hz (%d), estimated carrier frequency %f Hz\n",phy_vars_ue->lte_ue_common_vars.freq_offset,openair_daq_vars.freq_offset,openair0_cfg[0].rx_freq[0]-phy_vars_ue->lte_ue_common_vars.freq_offset); len += sprintf(&buffer[len], "[UE_PROC] Frequency offset %d Hz, estimated carrier frequency %f Hz\n",phy_vars_ue->lte_ue_common_vars.freq_offset,openair0_cfg[0].rx_freq[0]-phy_vars_ue->lte_ue_common_vars.freq_offset);
#endif #endif
len += sprintf(&buffer[len], "[UE PROC] UE mode = %s (%d)\n",mode_string[phy_vars_ue->UE_mode[0]],phy_vars_ue->UE_mode[0]); len += sprintf(&buffer[len], "[UE PROC] UE mode = %s (%d)\n",mode_string[phy_vars_ue->UE_mode[0]],phy_vars_ue->UE_mode[0]);
len += sprintf(&buffer[len], "[UE PROC] timing_advance = %d\n",phy_vars_ue->timing_advance); len += sprintf(&buffer[len], "[UE PROC] timing_advance = %d\n",phy_vars_ue->timing_advance);
...@@ -529,7 +529,7 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t ...@@ -529,7 +529,7 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
#endif #endif
len += sprintf(&buffer[len], "[UE PROC] DLSCH Bitrate %dkbps\n",(phy_vars_ue->bitrate[0]/1000)); len += sprintf(&buffer[len], "[UE PROC] DLSCH Bitrate %dkbps\n",(phy_vars_ue->bitrate[0]/1000));
len += sprintf(&buffer[len], "[UE PROC] Total Received Bits %dkbits\n",(phy_vars_ue->total_received_bits[0]/1000)); len += sprintf(&buffer[len], "[UE PROC] Total Received Bits %dkbits\n",(phy_vars_ue->total_received_bits[0]/1000));
len += sprintf(&buffer[len], "[UE PROC] IA receiver %d\n",openair_daq_vars.use_ia_receiver); len += sprintf(&buffer[len], "[UE PROC] IA receiver %d\n",phy_vars_ue->use_ia_receiver);
} }
......
...@@ -47,11 +47,11 @@ static void ia_receiver_on_off( FL_OBJECT *button, long arg) ...@@ -47,11 +47,11 @@ static void ia_receiver_on_off( FL_OBJECT *button, long arg)
if (fl_get_button(button)) { if (fl_get_button(button)) {
fl_set_object_label(button, "IA Receiver ON"); fl_set_object_label(button, "IA Receiver ON");
openair_daq_vars.use_ia_receiver = 1; // PHY_vars_UE_g[0][0]->use_ia_receiver = 1;
fl_set_object_color(button, FL_GREEN, FL_GREEN); fl_set_object_color(button, FL_GREEN, FL_GREEN);
} else { } else {
fl_set_object_label(button, "IA Receiver OFF"); fl_set_object_label(button, "IA Receiver OFF");
openair_daq_vars.use_ia_receiver = 0; // PHY_vars_UE_g[0][0]->use_ia_receiver = 0;
fl_set_object_color(button, FL_RED, FL_RED); fl_set_object_color(button, FL_RED, FL_RED);
} }
} }
......
...@@ -37,7 +37,6 @@ ...@@ -37,7 +37,6 @@
#include "../defs.h" #include "../defs.h"
#include "../../SCHED/defs.h" // for OPENAIR_DAQ_VARS #include "../../SCHED/defs.h" // for OPENAIR_DAQ_VARS
extern OPENAIR_DAQ_VARS openair_daq_vars;
/* Forms and Objects */ /* Forms and Objects */
typedef struct { typedef struct {
......
...@@ -330,6 +330,15 @@ typedef struct PHY_VARS_eNB_s { ...@@ -330,6 +330,15 @@ typedef struct PHY_VARS_eNB_s {
MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX]; MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX];
/// target_ue_dl_mcs : only for debug purposes
uint32_t target_ue_dl_mcs;
/// target_ue_ul_mcs : only for debug purposes
uint32_t target_ue_ul_mcs;
/// target_ue_dl_rballoc : only for debug purposes
uint32_t ue_dl_rb_alloc;
/// target ul PRBs : only for debug
uint32_t ue_ul_nb_rb;
///check for Total Transmissions ///check for Total Transmissions
uint32_t check_for_total_transmissions; uint32_t check_for_total_transmissions;
...@@ -347,6 +356,8 @@ typedef struct PHY_VARS_eNB_s { ...@@ -347,6 +356,8 @@ typedef struct PHY_VARS_eNB_s {
uint32_t total_transmitted_bits; uint32_t total_transmitted_bits;
uint32_t total_system_throughput; uint32_t total_system_throughput;
int hw_timing_advance;
time_stats_t phy_proc; time_stats_t phy_proc;
time_stats_t phy_proc_tx; time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx; time_stats_t phy_proc_rx;
...@@ -577,6 +588,7 @@ typedef struct { ...@@ -577,6 +588,7 @@ typedef struct {
// uint8_t prach_timer; // uint8_t prach_timer;
int rx_offset; /// Timing offset int rx_offset; /// Timing offset
int timing_advance; ///timing advance signalled from eNB int timing_advance; ///timing advance signalled from eNB
int hw_timing_advance;
int N_TA_offset; ///timing offset used in TDD int N_TA_offset; ///timing offset used in TDD
/// Flag to tell if UE is secondary user (cognitive mode) /// Flag to tell if UE is secondary user (cognitive mode)
unsigned char is_secondary_ue; unsigned char is_secondary_ue;
...@@ -645,6 +657,8 @@ typedef struct { ...@@ -645,6 +657,8 @@ typedef struct {
time_stats_t phy_proc_tx; time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx; time_stats_t phy_proc_rx;
uint32_t use_ia_receiver;
time_stats_t ofdm_mod_stats; time_stats_t ofdm_mod_stats;
time_stats_t ulsch_encoding_stats; time_stats_t ulsch_encoding_stats;
time_stats_t ulsch_modulation_stats; time_stats_t ulsch_modulation_stats;
......
...@@ -86,7 +86,7 @@ enum openair_SYNCH_STATUS { ...@@ -86,7 +86,7 @@ enum openair_SYNCH_STATUS {
#define DAQ_AGC_OFF 0 #define DAQ_AGC_OFF 0
/*
typedef struct { typedef struct {
boolean_t is_eNB; boolean_t is_eNB;
uint8_t mode; uint8_t mode;
...@@ -133,6 +133,7 @@ typedef struct { ...@@ -133,6 +133,7 @@ typedef struct {
uint32_t get_frame_done; uint32_t get_frame_done;
uint32_t use_ia_receiver; uint32_t use_ia_receiver;
} OPENAIR_DAQ_VARS; } OPENAIR_DAQ_VARS;
*/
#ifndef USER_MODE #ifndef USER_MODE
int32_t openair_sched_init(void); int32_t openair_sched_init(void);
......
...@@ -75,7 +75,6 @@ extern int openair_sched_status; ...@@ -75,7 +75,6 @@ extern int openair_sched_status;
extern int synch_wait_cnt; extern int synch_wait_cnt;
extern OPENAIR_DAQ_VARS openair_daq_vars;
extern int16_t hundred_times_delta_TF[100]; extern int16_t hundred_times_delta_TF[100];
extern uint16_t hundred_times_log10_NPRB[100]; extern uint16_t hundred_times_log10_NPRB[100];
......
...@@ -234,7 +234,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -234,7 +234,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
...@@ -253,7 +253,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -253,7 +253,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
...@@ -265,7 +265,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -265,7 +265,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
...@@ -284,7 +284,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -284,7 +284,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
...@@ -301,7 +301,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -301,7 +301,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
...@@ -320,7 +320,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -320,7 +320,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
...@@ -332,7 +332,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -332,7 +332,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
...@@ -351,7 +351,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -351,7 +351,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
...@@ -367,7 +367,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -367,7 +367,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
...@@ -386,7 +386,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -386,7 +386,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
...@@ -398,7 +398,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -398,7 +398,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
...@@ -417,7 +417,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -417,7 +417,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0; ((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
...@@ -438,14 +438,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -438,14 +438,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = phy_vars_eNB->target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = phy_vars_eNB->target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = phy_vars_eNB->ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0; ((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
} else if (transmission_mode==5) { } else if (transmission_mode==5) {
...@@ -462,13 +462,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -462,13 +462,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]]; //DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28); //DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs; DLSCH_alloc_pdu1E.mcs = phy_vars_eNB->target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28); //DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs; phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]; DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
DLSCH_alloc_pdu1E.dai = 0; DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0; DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc; DLSCH_alloc_pdu1E.rballoc = phy_vars_eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0; DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
...@@ -479,7 +479,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -479,7 +479,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DCI_pdu->dci_alloc[1].rnti = 0x1236; DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB; DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0; DCI_pdu->dci_alloc[1].ra_flag = 0;
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs; //DLSCH_alloc_pdu1E.mcs = phy_vars_eNB->target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28); //DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28); //DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28); DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
...@@ -531,8 +531,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -531,8 +531,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
UL_alloc_pdu.type = 0; UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0; UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb); UL_alloc_pdu.rballoc = computeRIV(25,2,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs; UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0; UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0; UL_alloc_pdu.cshift = 0;
...@@ -551,10 +551,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e ...@@ -551,10 +551,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
UL_alloc_pdu.type = 0; UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0; UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0) if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb); UL_alloc_pdu.rballoc = computeRIV(25,2+phy_vars_eNB->ue_ul_nb_rb,phy_vars_eNB->ue_ul_nb_rb);
else else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb); UL_alloc_pdu.rballoc = computeRIV(25,0,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs; UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1; UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0; UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1)) if ((cooperation_flag==0) || (cooperation_flag==1))
...@@ -611,11 +611,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN ...@@ -611,11 +611,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
DCI_pdu->dci_alloc[0].format = format1; DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0; DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc; DLSCH_alloc_pdu.rballoc = phy_vars_eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu.TPC = 0; DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0; DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1; DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs; DLSCH_alloc_pdu.mcs = phy_vars_eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1; DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0; DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
...@@ -632,7 +632,7 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN ...@@ -632,7 +632,7 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
DLSCH_alloc_pdu.TPC = 0; DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0; DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1; DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs; DLSCH_alloc_pdu.mcs = phy_vars_eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1; DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0; DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
...@@ -649,11 +649,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN ...@@ -649,11 +649,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0; DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = 1; DLSCH_alloc_pdu1E.ndi = 1;
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs; DLSCH_alloc_pdu1E.mcs = phy_vars_eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu1E.harq_pid = 1; DLSCH_alloc_pdu1E.harq_pid = 1;
DLSCH_alloc_pdu1E.dai = 0; DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0; DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc; DLSCH_alloc_pdu1E.rballoc = phy_vars_eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0; DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t)); memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
...@@ -705,8 +705,8 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN ...@@ -705,8 +705,8 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
UL_alloc_pdu.type = 0; UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0; UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb); UL_alloc_pdu.rballoc = computeRIV(25,0,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs; UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1; UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0; UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0; UL_alloc_pdu.cshift = 0;
...@@ -725,10 +725,10 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN ...@@ -725,10 +725,10 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
UL_alloc_pdu.type = 0; UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0; UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0) if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb); UL_alloc_pdu.rballoc = computeRIV(25,2+phy_vars_eNB->ue_ul_nb_rb,phy_vars_eNB->ue_ul_nb_rb);
else else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb); UL_alloc_pdu.rballoc = computeRIV(25,0,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs; UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1; UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0; UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1)) if ((cooperation_flag==0) || (cooperation_flag==1))
......
This diff is collapsed.
...@@ -115,7 +115,7 @@ extern int rx_sig_fifo; ...@@ -115,7 +115,7 @@ extern int rx_sig_fifo;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
#endif #endif
#ifdef USER_MODE
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid) void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid)
{ {
...@@ -286,7 +286,7 @@ void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) ...@@ -286,7 +286,7 @@ void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_mag0,300*nsymb,1,1); write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_mag0,300*nsymb,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1); write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
} }
#endif
void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index) void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{ {
...@@ -367,13 +367,11 @@ void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,uint16_t timing_advance ...@@ -367,13 +367,11 @@ void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,uint16_t timing_advance
timing_advance = timing_advance - (1<<11); timing_advance = timing_advance - (1<<11);
*/ */
if (openair_daq_vars.manual_timing_advance == 0) { phy_vars_ue->timing_advance = timing_advance*4;
phy_vars_ue->timing_advance = timing_advance*4;
}
#ifdef DEBUG_PHY_PROC #ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, received (rar) timing_advance %d, HW timing advance %d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame_rx, phy_vars_ue->timing_advance,openair_daq_vars.timing_advance);