Commit e190c4e2 authored by Cedric Roux's avatar Cedric Roux
Browse files

Merge remote-tracking branch 'origin/RA-notation' into develop_integration_w46

parents 4a348988 d01aa2d0
This diff is collapsed.
......@@ -90,12 +90,12 @@
#if defined(Rel10) || defined(Rel14)
// Mask for identifying subframe for MBMS
#define MBSFN_TDD_SF3 0x80// for TDD
#define MBSFN_TDD_SF3 0x80 // for TDD
#define MBSFN_TDD_SF4 0x40
#define MBSFN_TDD_SF7 0x20
#define MBSFN_TDD_SF8 0x10
#define MBSFN_TDD_SF9 0x08
#define MBSFN_FDD_SF1 0x80// for FDD
#define MBSFN_FDD_SF1 0x80 // for FDD
#define MBSFN_FDD_SF2 0x40
#define MBSFN_FDD_SF3 0x20
#define MBSFN_FDD_SF6 0x10
......@@ -172,7 +172,7 @@ typedef struct {
uint8_t RAPID:6;
uint8_t T:1;
uint8_t E:1;
} __attribute__((__packed__))RA_HEADER_RAPID;
} __attribute__ ((__packed__)) RA_HEADER_RAPID;
/*!\brief MAC header of Random Access Response for backoff indicator (BI)*/
typedef struct {
......@@ -180,7 +180,7 @@ typedef struct {
uint8_t R:2;
uint8_t T:1;
uint8_t E:1;
} __attribute__((__packed__))RA_HEADER_BI;
} __attribute__ ((__packed__)) RA_HEADER_BI;
/*
typedef struct {
uint64_t padding:16;
......@@ -217,7 +217,7 @@ typedef struct {
uint8_t R:2; // octet 1 MSB
uint8_t L:7; // octet 2 LSB
uint8_t F:1; // octet 2 MSB
} __attribute__((__packed__))SCH_SUBHEADER_SHORT;
} __attribute__ ((__packed__)) SCH_SUBHEADER_SHORT;
/*!\brief MAC subheader long with 15bit Length field */
typedef struct {
uint8_t LCID:5; // octet 1 LSB
......@@ -227,19 +227,19 @@ typedef struct {
uint8_t F:1; // octet 2 MSB
uint8_t L_LSB:8;
uint8_t padding;
} __attribute__((__packed__))SCH_SUBHEADER_LONG;
} __attribute__ ((__packed__)) SCH_SUBHEADER_LONG;
/*!\brief MAC subheader short without length field */
typedef struct {
uint8_t LCID:5;
uint8_t E:1;
uint8_t R:2;
} __attribute__((__packed__))SCH_SUBHEADER_FIXED;
} __attribute__ ((__packed__)) SCH_SUBHEADER_FIXED;
/*!\brief mac control element: short buffer status report for a specific logical channel group ID*/
typedef struct {
uint8_t Buffer_size:6; // octet 1 LSB
uint8_t LCGID:2; // octet 1 MSB
} __attribute__((__packed__))BSR_SHORT;
} __attribute__ ((__packed__)) BSR_SHORT;
typedef BSR_SHORT BSR_TRUNCATED;
/*!\brief mac control element: long buffer status report for all logical channel group ID*/
......@@ -248,63 +248,63 @@ typedef struct {
uint8_t Buffer_size2:6;
uint8_t Buffer_size1:6;
uint8_t Buffer_size0:6;
} __attribute__((__packed__))BSR_LONG;
} __attribute__ ((__packed__)) BSR_LONG;
#define BSR_LONG_SIZE (sizeof(BSR_LONG))
/*!\brief mac control element: timing advance */
typedef struct {
uint8_t TA:6;
uint8_t R:2;
} __attribute__((__packed__))TIMING_ADVANCE_CMD;
} __attribute__ ((__packed__)) TIMING_ADVANCE_CMD;
/*!\brief mac control element: power headroom report */
typedef struct {
uint8_t PH:6;
uint8_t R:2;
} __attribute__((__packed__))POWER_HEADROOM_CMD;
} __attribute__ ((__packed__)) POWER_HEADROOM_CMD;
/*! \brief MIB payload */
typedef struct {
uint8_t payload[3] ;
} __attribute__((__packed__))MIB_PDU;
uint8_t payload[3];
} __attribute__ ((__packed__)) MIB_PDU;
/*! \brief CCCH payload */
typedef struct {
uint8_t payload[CCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))CCCH_PDU;
uint8_t payload[CCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) CCCH_PDU;
/*! \brief BCCH payload */
typedef struct {
uint8_t payload[BCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))BCCH_PDU;
uint8_t payload[BCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) BCCH_PDU;
/*! \brief RAR payload */
typedef struct {
uint8_t payload[RAR_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) RAR_PDU;
/*! \brief BCCH payload */
typedef struct {
uint8_t payload[PCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))PCCH_PDU;
uint8_t payload[PCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) PCCH_PDU;
#if defined(Rel10) || defined(Rel14)
/*! \brief MCCH payload */
typedef struct {
uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ;
} __attribute__((__packed__))MCCH_PDU;
uint8_t payload[MCCH_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) MCCH_PDU;
/*!< \brief MAC control element for activation and deactivation of component carriers */
typedef struct {
uint8_t C7:1;/*!< \brief Component carrier 7 */
uint8_t C6:1;/*!< \brief Component carrier 6 */
uint8_t C5:1;/*!< \brief Component carrier 5 */
uint8_t C4:1;/*!< \brief Component carrier 4 */
uint8_t C3:1;/*!< \brief Component carrier 3 */
uint8_t C2:1;/*!< \brief Component carrier 2 */
uint8_t C1:1;/*!< \brief Component carrier 1 */
uint8_t R:1;/*!< \brief Reserved */
} __attribute__((__packed__))CC_ELEMENT;
uint8_t C7:1; /*!< \brief Component carrier 7 */
uint8_t C6:1; /*!< \brief Component carrier 6 */
uint8_t C5:1; /*!< \brief Component carrier 5 */
uint8_t C4:1; /*!< \brief Component carrier 4 */
uint8_t C3:1; /*!< \brief Component carrier 3 */
uint8_t C2:1; /*!< \brief Component carrier 2 */
uint8_t C1:1; /*!< \brief Component carrier 1 */
uint8_t R:1; /*!< \brief Reserved */
} __attribute__ ((__packed__)) CC_ELEMENT;
/*! \brief MAC control element: MCH Scheduling Information */
typedef struct {
uint8_t stop_sf_MSB:3; // octet 1 LSB
uint8_t lcid:5; // octet 2 MSB
uint8_t stop_sf_LSB:8;
} __attribute__((__packed__))MSI_ELEMENT;
} __attribute__ ((__packed__)) MSI_ELEMENT;
#endif
/*! \brief Values of CCCH LCID for DLSCH */
#define CCCH_LCHANID 0
......@@ -396,9 +396,18 @@ typedef struct {
#include "PHY/impl_defs_top.h"
/*!\brief RA process state*/
typedef enum {
IDLE = 0,
MSG2,
WAITMSG3,
MSG4,
WAITMSG4ACK
} RA_state;
/*!\brief UE ULSCH scheduling states*/
typedef enum {
S_UL_NONE =0,
S_UL_NONE = 0,
S_UL_WAITING,
S_UL_SCHEDULED,
S_UL_BUFFERED,
......@@ -407,7 +416,7 @@ typedef enum {
/*!\brief UE DLSCH scheduling states*/
typedef enum {
S_DL_NONE =0,
S_DL_NONE = 0,
S_DL_WAITING,
S_DL_SCHEDULED,
S_DL_BUFFERED,
......@@ -416,7 +425,7 @@ typedef enum {
/*!\brief scheduling policy for the contention-based access */
typedef enum {
CBA_ES=0, /// equal share of RB among groups w
CBA_ES = 0, /// equal share of RB among groups w
CBA_ES_S, /// equal share of RB among groups with small allocation
CBA_PF, /// proportional fair (kind of)
CBA_PF_S, /// proportional fair (kind of) with small RB allocation
......@@ -846,25 +855,7 @@ typedef struct {
/*! \brief eNB template for the Random access information */
typedef struct {
/// Flag to indicate this process is active
boolean_t RA_active;
/// Size of DCI for RA-Response (bytes)
uint8_t RA_dci_size_bytes1;
/// Size of DCI for RA-Response (bits)
uint8_t RA_dci_size_bits1;
/// Actual DCI to transmit for RA-Response
uint8_t RA_alloc_pdu1[(MAX_DCI_SIZE_BITS>>3)+1];
/// DCI format for RA-Response (should be 1A)
uint8_t RA_dci_fmt1;
/// Size of DCI for Msg4/ContRes (bytes)
uint8_t RA_dci_size_bytes2;
/// Size of DCI for Msg4/ContRes (bits)
uint8_t RA_dci_size_bits2;
/// Actual DCI to transmit for Msg4/ContRes
uint8_t RA_alloc_pdu2[(MAX_DCI_SIZE_BITS>>3)+1];
/// DCI format for Msg4/ContRes (should be 1A)
uint8_t RA_dci_fmt2;
/// Flag to indicate the eNB should generate RAR. This is triggered by detection of PRACH
uint8_t generate_rar;
RA_state state;
/// Subframe where preamble was received
uint8_t preamble_subframe;
/// Subframe where Msg2 is to be sent
......@@ -879,10 +870,6 @@ typedef struct {
sub_frame_t Msg4_subframe;
/// Frame where Msg4 is to be sent
frame_t Msg4_frame;
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
uint8_t generate_Msg4;
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
uint8_t wait_ack_Msg4;
/// harq_pid used for Msg4 transmission
uint8_t harq_pid;
/// UE RNTI allocated during RAR
......@@ -922,7 +909,7 @@ typedef struct {
uint8_t msg2_narrowband;
uint8_t msg34_narrowband;
#endif
} RA_TEMPLATE;
} RA_t;
/*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */
......@@ -936,7 +923,8 @@ typedef struct {
/*! \brief UE list used by eNB to order UEs/CC for scheduling*/
typedef struct {
/// Dedicated information for UEs
struct PhysicalConfigDedicated *physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
struct PhysicalConfigDedicated
*physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// DLSCH pdu
DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX];
/// DCI template and MAC connection parameters for UEs
......@@ -993,7 +981,7 @@ typedef struct {
/// Outgoing RAR pdu for PHY
RAR_PDU RAR_pdu;
/// Template for RA computations
RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
RA_t ra[NB_RA_PROC_MAX];
/// VRB map for common channels
uint8_t vrb_map[100];
/// VRB map for common channels and retransmissions by PHICH
......@@ -1055,23 +1043,28 @@ typedef struct eNB_MAC_INST_s {
/// NFAPI Config Request Structure
nfapi_config_request_t config[MAX_NUM_CCs];
/// Preallocated DL pdu list
nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU];
nfapi_dl_config_request_pdu_t
dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU];
/// NFAPI DL Config Request Structure
nfapi_dl_config_request_t DL_req[MAX_NUM_CCs];
/// Preallocated UL pdu list
nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
nfapi_ul_config_request_pdu_t
ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
/// Preallocated UL pdu list for ULSCH (n+k delay)
nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU];
nfapi_ul_config_request_pdu_t
ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU];
/// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place
nfapi_ul_config_request_t UL_req[MAX_NUM_CCs];
/// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10];
/// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
nfapi_hi_dci0_request_pdu_t
hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure
nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs];
/// Prealocated TX pdu list
nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
nfapi_tx_request_pdu_t
tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
/// NFAPI DL PDU structure
nfapi_tx_request_t TX_req[MAX_NUM_CCs];
/// UL handle
......@@ -1122,7 +1115,7 @@ typedef enum {
/*!\brief UE layer 2 status */
typedef enum {
CONNECTION_OK=0,
CONNECTION_OK = 0,
CONNECTION_LOST,
PHY_RESYNCH,
PHY_HO_PRACH
......@@ -1214,7 +1207,8 @@ typedef struct {
struct PhysicalConfigDedicated *physicalConfigDedicated;
#if defined(Rel10) || defined(Rel14)
/// pointer to RRC PHY configuration SCEll
struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10;
struct PhysicalConfigDedicatedSCell_r10
*physicalConfigDedicatedSCell_r10;
#endif
/// pointer to TDD Configuration (NULL for FDD)
TDD_Config_t *tdd_Config;
......@@ -1298,7 +1292,7 @@ typedef struct {
/// MCCH status
uint8_t mcch_status;
/// MSI status
uint8_t msi_status;// could be an array if there are >1 MCH in one MBSFN area
uint8_t msi_status; // could be an array if there are >1 MCH in one MBSFN area
#endif
//#ifdef CBA
/// CBA RNTI for each group
......@@ -1311,7 +1305,7 @@ typedef struct {
/// UE ULSCH tx processing time inlcuding RLC interface (rlc_data_req) and mac header generation
time_stats_t tx_ulsch_sdu;
/// UE DLSCH rx processing time inlcuding RLC interface (mac_rrc_data_ind or mac_rlc_status_ind+mac_rlc_data_ind) and mac header parser
time_stats_t rx_dlsch_sdu ;
time_stats_t rx_dlsch_sdu;
/// UE query for MCH subframe processing time
time_stats_t ue_query_mch;
/// UE MCH rx processing time
......@@ -1330,6 +1324,3 @@ typedef struct {
#include "proto.h"
/*@}*/
#endif /*__LAYER2_MAC_DEFS_H__ */
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......@@ -102,5 +102,3 @@ extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#endif //DEF_H
......@@ -55,8 +55,9 @@ TAILQ_HEAD(DlMacConfigHead, dl_mac_config_element_s);
/*
* Default scheduler used by the eNB agent
*/
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subframe,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info);
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
// Find the difference in subframes from the given subframe
......
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