Tx proc optim
new optimizations of NR TX path to bring TX processing below 500us for up to 162 PRBs, 2x2 MIMO
- ldpc-encode and parallelization (L. Thomas)
- resource element mapping (SIMD + loop optimization for symbols with no PTRS or DMRS)
integration of Intel SIMD-based CRC computations, 24-bit A/B, (from github.com/intel/soft-crc)