phy_procedures_lte_eNb.c 154 KB
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/*******************************************************************************
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    OpenAirInterface
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    Copyright(c) 1999 - 2014 Eurecom
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    OpenAirInterface is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
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    OpenAirInterface is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with OpenAirInterface.The full GNU General Public License is
   included in this distribution in the file called "COPYING". If not,
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   see <http://www.gnu.org/licenses/>.
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  Contact Information
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  OpenAirInterface Admin: openair_admin@eurecom.fr
  OpenAirInterface Tech : openair_tech@eurecom.fr
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  OpenAirInterface Dev  : openair4g-devel@lists.eurecom.fr
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  Address      : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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 *******************************************************************************/
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/*! \file phy_procedures_lte_eNB.c
 * \brief Implementation of eNB procedures from 36.213 LTE specifications
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 * \author R. Knopp, F. Kaltenberger, N. Nikaein
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 * \date 2011
 * \version 0.1
 * \company Eurecom
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 * \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr,navid.nikaein@eurecom.fr
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 * \note
 * \warning
 */

#include "PHY/defs.h"
#include "PHY/extern.h"
#include "MAC_INTERFACE/defs.h"
#include "MAC_INTERFACE/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"

#ifdef EMOS
#include "SCHED/phy_procedures_emos.h"
#endif

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//#define DEBUG_PHY_PROC (Already defined in cmake)
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//#define DEBUG_ULSCH

#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"

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#include "assertions.h"
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#include "msc.h"
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#if defined(ENABLE_ITTI)
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#   include "intertask_interface.h"
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#   if ENABLE_RAL
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#     include "timer.h"
#   endif
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#endif

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//#define DIAG_PHY

#define NS_PER_SLOT 500000

#define PUCCH 1

extern int exit_openair;
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//extern void do_OFDM_mod(mod_sym_t **txdataF, int32_t **txdata, uint32_t frame, uint16_t next_slot, LTE_DL_FRAME_PARMS *frame_parms);
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unsigned char dlsch_input_buffer[2700] __attribute__ ((aligned(16)));
int eNB_sync_buffer0[640*6] __attribute__ ((aligned(16)));
int eNB_sync_buffer1[640*6] __attribute__ ((aligned(16)));
int *eNB_sync_buffer[2] = {eNB_sync_buffer0, eNB_sync_buffer1};

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extern uint16_t hundred_times_log10_NPRB[100];
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unsigned int max_peak_val;
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int max_sect_id, max_sync_pos;

//DCI_ALLOC_t dci_alloc[8];

#ifdef EMOS
fifo_dump_emos_eNB emos_dump_eNB;
#endif

#if defined(SMBV) && !defined(EXMIMO)
extern const char smbv_fname[];
extern unsigned short config_frames[4];
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extern uint8_t smbv_frame_cnt;
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#endif

#ifdef DIAG_PHY
extern int rx_sig_fifo;
#endif

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uint8_t is_SR_subframe(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t sched_subframe)
{
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  const int subframe = phy_vars_eNB->proc[sched_subframe].subframe_rx;
  const int frame = phy_vars_eNB->proc[sched_subframe].frame_rx;
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  LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking for SR TXOp(sr_ConfigIndex %d)\n",
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        phy_vars_eNB->Mod_id,phy_vars_eNB->ulsch_eNB[UE_id]->rnti,frame,subframe,
        phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex);

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  if (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 4) {        // 5 ms SR period
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    if ((subframe%5) == phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex)
      return(1);
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  } else if (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 14) { // 10 ms SR period
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    if (subframe==(phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex-5))
      return(1);
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  } else if (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 34) { // 20 ms SR period
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    if ((10*(frame&1)+subframe) == (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex-15))
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      return(1);
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  } else if (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 74) { // 40 ms SR period
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    if ((10*(frame&3)+subframe) == (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex-35))
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      return(1);
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  } else if (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 154) { // 80 ms SR period
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    if ((10*(frame&7)+subframe) == (phy_vars_eNB->scheduling_request_config[UE_id].sr_ConfigIndex-75))
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      return(1);
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  }

  return(0);
}
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void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
{
  DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->tail_freelist] = harq_pid;
  DLSCH_ptr->tail_freelist = (DLSCH_ptr->tail_freelist + 1) % 10;
}

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void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
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{
  if (DLSCH_ptr->head_freelist == DLSCH_ptr->tail_freelist) {
    LOG_E(PHY, "%s:%d: you cannot read this!\n", __FILE__, __LINE__);
    abort();
  }
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  /* basic check, in case several threads deal with the free list at the same time
   * in normal situations it should not happen, that's also why we don't use any
   * locking mechanism to protect the free list
   * to be refined in case things don't work properly
   */
  if (harq_pid != DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]) {
    LOG_E(PHY, "%s:%d: critical error, get in touch with the authors\n", __FILE__, __LINE__);
    abort();
  }
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  DLSCH_ptr->head_freelist = (DLSCH_ptr->head_freelist + 1) % 10;
}

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int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB)
{
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  uint8_t i;
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#ifdef DEBUG_PHY_PROC
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  LOG_I(PHY,"[eNB %d/%d] Adding UE with rnti %x\n",
        phy_vars_eNB->Mod_id,
        phy_vars_eNB->CC_id,
        (uint16_t)rnti);
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#endif
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if ((phy_vars_eNB->dlsch_eNB[i]==NULL) || (phy_vars_eNB->ulsch_eNB[i]==NULL)) {
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      MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed add ue %"PRIx16" (ENOMEM)", rnti);
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      LOG_E(PHY,"Can't add UE, not enough memory allocated\n");
      return(-1);
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    } else {
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      if (phy_vars_eNB->eNB_UE_stats[i].crnti==0) {
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        MSC_LOG_EVENT(MSC_PHY_ENB, "0 Add ue %"PRIx16" ", rnti);
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        LOG_I(PHY,"UE_id %d associated with rnti %x\n",i, (uint16_t)rnti);
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        phy_vars_eNB->dlsch_eNB[i][0]->rnti = rnti;
        phy_vars_eNB->ulsch_eNB[i]->rnti = rnti;
        phy_vars_eNB->eNB_UE_stats[i].crnti = rnti;
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	phy_vars_eNB->eNB_UE_stats[i].Po_PUCCH1_below = 0;
	phy_vars_eNB->eNB_UE_stats[i].Po_PUCCH1_above = (int32_t)pow(10.0,.1*(phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH+phy_vars_eNB->rx_total_gain_eNB_dB));
	phy_vars_eNB->eNB_UE_stats[i].Po_PUCCH        = (int32_t)pow(10.0,.1*(phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH+phy_vars_eNB->rx_total_gain_eNB_dB));
	LOG_I(PHY,"Initializing Po_PUCCH: p0_NominalPUCCH %d, gain %d => %d\n",
	      phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
	      phy_vars_eNB->rx_total_gain_eNB_dB,
	      phy_vars_eNB->eNB_UE_stats[i].Po_PUCCH);
  
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        return(i);
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      }
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    }
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  }
  return(-1);
}

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int32_t remove_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB, uint8_t abstraction_flag)
{
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  uint8_t i;
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  int j;
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if ((phy_vars_eNB->dlsch_eNB[i]==NULL) || (phy_vars_eNB->ulsch_eNB[i]==NULL)) {
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      MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed remove ue %"PRIx16" (ENOMEM)", rnti);
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      LOG_E(PHY,"Can't remove UE, not enough memory allocated\n");
      return(-1);
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    } else {
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      if (phy_vars_eNB->eNB_UE_stats[i].crnti==rnti) {
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        MSC_LOG_EVENT(MSC_PHY_ENB, "0 Removed ue %"PRIx16" ", rnti);
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#ifdef DEBUG_PHY_PROC
	LOG_I(PHY,"eNB %d removing UE %d with rnti %x\n",phy_vars_eNB->Mod_id,i,rnti);
#endif
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        //msg("[PHY] UE_id %d\n",i);
        clean_eNb_dlsch(phy_vars_eNB->dlsch_eNB[i][0], abstraction_flag);
        clean_eNb_ulsch(phy_vars_eNB->ulsch_eNB[i],abstraction_flag);
        //phy_vars_eNB->eNB_UE_stats[i].crnti = 0;
        memset(&phy_vars_eNB->eNB_UE_stats[i],0,sizeof(LTE_eNB_UE_stats));
        //  mac_exit_wrapper("Removing UE");
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        /* clear the harq pid freelist */
        phy_vars_eNB->dlsch_eNB[i][0]->head_freelist = 0;
        phy_vars_eNB->dlsch_eNB[i][0]->tail_freelist = 0;
        for (j = 0; j < 8; j++)
          put_harq_pid_in_freelist(phy_vars_eNB->dlsch_eNB[i][0], j);

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        return(i);
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      }
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    }
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  }
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  MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed remove ue %"PRIx16" (not found)", rnti);
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  return(-1);
}

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int8_t find_next_ue_index(PHY_VARS_eNB *phy_vars_eNB)
{
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  uint8_t i;
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if (phy_vars_eNB->eNB_UE_stats[i].crnti==0) {
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      /*if ((phy_vars_eNB->dlsch_eNB[i]) &&
      (phy_vars_eNB->dlsch_eNB[i][0]) &&
      (phy_vars_eNB->dlsch_eNB[i][0]->rnti==0))*/
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      LOG_D(PHY,"Next free UE id is %d\n",i);
      return(i);
    }
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  }
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  return(-1);
}

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int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16_t rnti, const int frame, const uint8_t subframe,uint8_t *harq_pid,uint8_t *round,const uint8_t ul_flag)
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{
  LTE_eNB_DLSCH_t *DLSCH_ptr;
  LTE_eNB_ULSCH_t *ULSCH_ptr;
  uint8_t ulsch_subframe,ulsch_frame;
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  uint8_t i;
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  int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
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  int sf1=(10*frame)+subframe,sf2,sfdiff,sfdiff_max=7;
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  if (UE_id==-1) {
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    LOG_D(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
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    *round=0;
    return(-1);
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  }

  if (ul_flag == 0)  {// this is a DL request
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    DLSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->dlsch_eNB[(uint32_t)UE_id][0];
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    // set to no available process first
    *harq_pid = -1;

    for (i=0; i<DLSCH_ptr->Mdlharq; i++) {
      if (DLSCH_ptr->harq_processes[i]!=NULL) {
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	if (DLSCH_ptr->harq_processes[i]->status == ACTIVE) {
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	  sf2 = (DLSCH_ptr->harq_processes[i]->frame*10) + DLSCH_ptr->harq_processes[i]->subframe;
	  if (sf2<=sf1)
	    sfdiff = sf1-sf2;
	  else // this happens when wrapping around 1024 frame barrier
	    sfdiff = 10240 + sf1-sf2;
	  LOG_D(PHY,"process %d is active, round %d (waiting %d)\n",i,DLSCH_ptr->harq_processes[i]->round,sfdiff);

	  if (sfdiff>sfdiff_max) { // this is an active process that is waiting longer than the others (and longer than 7 ms)
	    sfdiff_max = sfdiff; 
	    *harq_pid = i;
	    *round = DLSCH_ptr->harq_processes[i]->round;
	  }
	}
      } else { // a process is not defined
	LOG_E(PHY,"[eNB %d] DLSCH process %d for rnti %x (UE_id %d) not allocated\n",Mod_id,i,rnti,UE_id);
	return(-1);
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      }
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    }
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    /* if no active harq pid, get the oldest in the freelist, if any */
    if (*harq_pid == 255 && DLSCH_ptr->head_freelist != DLSCH_ptr->tail_freelist) {
      *harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
      *round = 0;
      LOG_D(PHY,"process %d is first free process\n", *harq_pid);
    }

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    LOG_D(PHY,"get_ue_active_harq_pid DL => Frame %d, Subframe %d : harq_pid %d\n",
	  frame,subframe,*harq_pid);
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  } else { // This is a UL request
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    ULSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->ulsch_eNB[(uint32_t)UE_id];
    ulsch_subframe = pdcch_alloc2ul_subframe(&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,subframe);
    ulsch_frame    = pdcch_alloc2ul_frame(&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,frame,subframe);
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    // Note this is for TDD configuration 3,4,5 only
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    *harq_pid = subframe2harq_pid(&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,
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                                  ulsch_frame,
                                  ulsch_subframe);
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    *round    = ULSCH_ptr->harq_processes[*harq_pid]->round;
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    LOG_T(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Checking HARQ, round %d\n",Mod_id,*harq_pid,frame,subframe,*round);
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  }
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  return(0);
}

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int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
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{
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  //return PHY_vars_eNB_g[module_idP][CC_id]->PHY_measurements_eNB[0].n0_power_tot_dBm;
  return PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.ul_power_control_config_common.p0_NominalPUSCH;
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}

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int16_t get_target_pucch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
{
  //return PHY_vars_eNB_g[module_idP][CC_id]->PHY_measurements_eNB[0].n0_power_tot_dBm;
  return PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH;
}

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#ifdef EMOS
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void phy_procedures_emos_eNB_TX(unsigned char subframe, PHY_VARS_eNB *phy_vars_eNB)
{
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}
#endif

/*
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  void phy_procedures_eNB_S_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,uint8_t abstraction_flag) {
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  int sect_id = 0, aa;

  if (next_slot%2==0) {
  #ifdef DEBUG_PHY_PROC
  msg("[PHY][eNB %d] Frame %d, slot %d: Generating pilots for DL-S\n",
  phy_vars_eNB->Mod_id,phy_vars_eNB->frame,next_slot);
  #endif
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  for (sect_id=0;sect_id<number_of_cards;sect_id++) {
  if (abstraction_flag == 0) {

  for (aa=0; aa<phy_vars_eNB->lte_frame_parms.nb_antennas_tx; aa++) {
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  #ifdef IFFT_FPGA
  memset(&phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id][aa][next_slot*(phy_vars_eNB->lte_frame_parms.N_RB_DL*12)*(phy_vars_eNB->lte_frame_parms.symbols_per_tti>>1)],
  0,(phy_vars_eNB->lte_frame_parms.N_RB_DL*12)*(phy_vars_eNB->lte_frame_parms.symbols_per_tti>>1)*sizeof(mod_sym_t));
  #else
  memset(&phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id][aa][next_slot*phy_vars_eNB->lte_frame_parms.ofdm_symbol_size*(phy_vars_eNB->lte_frame_parms.symbols_per_tti>>1)],
  0,phy_vars_eNB->lte_frame_parms.ofdm_symbol_size*(phy_vars_eNB->lte_frame_parms.symbols_per_tti>>1)*sizeof(mod_sym_t));
  #endif
  }

  generate_pilots_slot(phy_vars_eNB,
  phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
  AMP,
  next_slot);

  msg("[PHY][eNB] Frame %d, subframe %d Generating PSS\n",
  phy_vars_eNB->frame,next_slot>>1);
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  generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
  4*AMP,
  &phy_vars_eNB->lte_frame_parms,
  2,
  next_slot);
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  }
  else {
  #ifdef PHY_ABSTRACTION
  generate_pss_emul(phy_vars_eNB,sect_id);
  #endif
  }
  }
  }
  }
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*/
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void phy_procedures_eNB_S_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_eNB,uint8_t abstraction_flag,relaying_type_t r_type)
{
  UNUSED(r_type);
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  //  unsigned char sect_id=0;
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  int subframe = phy_vars_eNB->proc[sched_subframe].subframe_rx;
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#ifdef DEBUG_PHY_PROC
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  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_S_RX(%d)\n", phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_rx, subframe);
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#endif
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  //  for (sect_id=0;sect_id<number_of_cards;sect_id++) {
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  if (abstraction_flag == 0) {
    lte_eNB_I0_measurements(phy_vars_eNB,
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			    subframe,
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                            0,
                            phy_vars_eNB->first_run_I0_measurements);
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  }
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#ifdef PHY_ABSTRACTION
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  else {
    lte_eNB_I0_measurements_emul(phy_vars_eNB,
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                                 0);
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  }
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#endif

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}

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#ifdef EMOS
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void phy_procedures_emos_eNB_RX(unsigned char subframe,PHY_VARS_eNB *phy_vars_eNB)
{

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  uint8_t aa;
  uint16_t last_subframe_emos;
  uint16_t pilot_pos1 = 3 - phy_vars_eNB->lte_frame_parms.Ncp, pilot_pos2 = 10 - 2*phy_vars_eNB->lte_frame_parms.Ncp;
  uint32_t bytes;
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  last_subframe_emos=0;

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#ifdef EMOS_CHANNEL
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  //if (last_slot%2==1) // this is for all UL subframes
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  if (subframe==3)
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    for (aa=0; aa<phy_vars_eNB->lte_frame_parms.nb_antennas_rx; aa++) {
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      memcpy(&emos_dump_eNB.channel[aa][last_subframe_emos*2*phy_vars_eNB->lte_frame_parms.N_RB_UL*12],
             &phy_vars_eNB->lte_eNB_pusch_vars[0]->drs_ch_estimates[0][aa][phy_vars_eNB->lte_frame_parms.N_RB_UL*12*pilot_pos1],
             phy_vars_eNB->lte_frame_parms.N_RB_UL*12*sizeof(int));
      memcpy(&emos_dump_eNB.channel[aa][(last_subframe_emos*2+1)*phy_vars_eNB->lte_frame_parms.N_RB_UL*12],
             &phy_vars_eNB->lte_eNB_pusch_vars[0]->drs_ch_estimates[0][aa][phy_vars_eNB->lte_frame_parms.N_RB_UL*12*pilot_pos2],
             phy_vars_eNB->lte_frame_parms.N_RB_UL*12*sizeof(int));
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    }
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#endif

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  if (subframe==4) {
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    emos_dump_eNB.timestamp = rt_get_time_ns();
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    emos_dump_eNB.frame_tx = phy_vars_eNB->proc[subframe].frame_rx;
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    emos_dump_eNB.rx_total_gain_dB = phy_vars_eNB->rx_total_gain_eNB_dB;
    emos_dump_eNB.mimo_mode = phy_vars_eNB->transmission_mode[0];
    memcpy(&emos_dump_eNB.PHY_measurements_eNB,
           &phy_vars_eNB->PHY_measurements_eNB[0],
           sizeof(PHY_MEASUREMENTS_eNB));
    memcpy(&emos_dump_eNB.eNB_UE_stats[0],&phy_vars_eNB->eNB_UE_stats[0],NUMBER_OF_UE_MAX*sizeof(LTE_eNB_UE_stats));

    bytes = rtf_put(CHANSOUNDER_FIFO_MINOR, &emos_dump_eNB, sizeof(fifo_dump_emos_eNB));
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    //bytes = rtf_put(CHANSOUNDER_FIFO_MINOR, "test", sizeof("test"));
    if (bytes!=sizeof(fifo_dump_emos_eNB)) {
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      LOG_W(PHY,"[eNB %d] Frame %d, subframe %d, Problem writing EMOS data to FIFO (bytes=%d, size=%d)\n",
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            phy_vars_eNB->Mod_id,phy_vars_eNB->proc[(subframe+1)%10].frame_rx, subframe,bytes,sizeof(fifo_dump_emos_eNB));
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    } else {
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      if (phy_vars_eNB->proc[(subframe+1)%10].frame_tx%100==0) {
        LOG_I(PHY,"[eNB %d] Frame %d (%d), subframe %d, Writing %d bytes EMOS data to FIFO\n",
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              phy_vars_eNB->Mod_id,phy_vars_eNB->proc[(subframe+1)%10].frame_rx, ((fifo_dump_emos_eNB*)&emos_dump_eNB)->frame_tx, subframe, bytes);
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      }
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    }
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  }
}
#endif


#define AMP_OVER_SQRT2 ((AMP*ONE_OVER_SQRT2_Q15)>>15)
#define AMP_OVER_2 (AMP>>1)
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int QPSK[4]= {AMP_OVER_SQRT2|(AMP_OVER_SQRT2<<16),AMP_OVER_SQRT2|((65536-AMP_OVER_SQRT2)<<16),((65536-AMP_OVER_SQRT2)<<16)|AMP_OVER_SQRT2,((65536-AMP_OVER_SQRT2)<<16)|(65536-AMP_OVER_SQRT2)};
int QPSK2[4]= {AMP_OVER_2|(AMP_OVER_2<<16),AMP_OVER_2|((65536-AMP_OVER_2)<<16),((65536-AMP_OVER_2)<<16)|AMP_OVER_2,((65536-AMP_OVER_2)<<16)|(65536-AMP_OVER_2)};
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#if defined(ENABLE_ITTI)
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#   if ENABLE_RAL
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extern PHY_MEASUREMENTS PHY_measurements;

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void phy_eNB_lte_measurement_thresholds_test_and_report(instance_t instanceP, ral_threshold_phy_t* threshold_phy_pP, uint16_t valP)
{
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  MessageDef *message_p = NULL;
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  if (
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    (
      ((threshold_phy_pP->threshold.threshold_val <  valP) && (threshold_phy_pP->threshold.threshold_xdir == RAL_ABOVE_THRESHOLD)) ||
      ((threshold_phy_pP->threshold.threshold_val >  valP) && (threshold_phy_pP->threshold.threshold_xdir == RAL_BELOW_THRESHOLD))
    )  ||
    (threshold_phy_pP->threshold.threshold_xdir == RAL_NO_THRESHOLD)
  ) {
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    message_p = itti_alloc_new_message(TASK_PHY_ENB , PHY_MEAS_REPORT_IND);
    memset(&PHY_MEAS_REPORT_IND(message_p), 0, sizeof(PHY_MEAS_REPORT_IND(message_p)));

    memcpy(&PHY_MEAS_REPORT_IND (message_p).threshold,
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           &threshold_phy_pP->threshold,
           sizeof(PHY_MEAS_REPORT_IND (message_p).threshold));
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    memcpy(&PHY_MEAS_REPORT_IND (message_p).link_param,
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           &threshold_phy_pP->link_param,
           sizeof(PHY_MEAS_REPORT_IND (message_p).link_param));
    \
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    switch (threshold_phy_pP->link_param.choice) {
    case RAL_LINK_PARAM_CHOICE_LINK_PARAM_VAL:
      PHY_MEAS_REPORT_IND (message_p).link_param._union.link_param_val = valP;
      break;
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    case RAL_LINK_PARAM_CHOICE_QOS_PARAM_VAL:
      //PHY_MEAS_REPORT_IND (message_p).link_param._union.qos_param_val.
      AssertFatal (1 == 0, "TO DO RAL_LINK_PARAM_CHOICE_QOS_PARAM_VAL\n");
      break;
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    }
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    itti_send_msg_to_task(TASK_RRC_ENB, instanceP, message_p);
  }
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}

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void phy_eNB_lte_check_measurement_thresholds(instance_t instanceP, ral_threshold_phy_t* threshold_phy_pP)
{
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  unsigned int  mod_id;

  mod_id = instanceP;

  switch (threshold_phy_pP->link_param.link_param_type.choice) {

  case RAL_LINK_PARAM_TYPE_CHOICE_GEN:
    switch (threshold_phy_pP->link_param.link_param_type._union.link_param_gen) {
    case RAL_LINK_PARAM_GEN_DATA_RATE:
      phy_eNB_lte_measurement_thresholds_test_and_report(instanceP, threshold_phy_pP, 0);
      break;
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    case RAL_LINK_PARAM_GEN_SIGNAL_STRENGTH:
      phy_eNB_lte_measurement_thresholds_test_and_report(instanceP, threshold_phy_pP, 0);
      break;
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    case RAL_LINK_PARAM_GEN_SINR:
      phy_eNB_lte_measurement_thresholds_test_and_report(instanceP, threshold_phy_pP, 0);
      break;
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    case RAL_LINK_PARAM_GEN_THROUGHPUT:
      break;
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    case RAL_LINK_PARAM_GEN_PACKET_ERROR_RATE:
      break;
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    default:
      ;
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    }
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    break;

  case RAL_LINK_PARAM_TYPE_CHOICE_LTE:
    switch (threshold_phy_pP->link_param.link_param_type._union.link_param_gen) {
    case RAL_LINK_PARAM_LTE_UE_RSRP:
      break;
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    case RAL_LINK_PARAM_LTE_UE_RSRQ:
      break;
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    case RAL_LINK_PARAM_LTE_UE_CQI:
      break;
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    case RAL_LINK_PARAM_LTE_AVAILABLE_BW:
      break;
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    case RAL_LINK_PARAM_LTE_PACKET_DELAY:
      break;
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    case RAL_LINK_PARAM_LTE_PACKET_LOSS_RATE:
      break;
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    case RAL_LINK_PARAM_LTE_L2_BUFFER_STATUS:
      break;
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    case RAL_LINK_PARAM_LTE_MOBILE_NODE_CAPABILITIES:
      break;
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    case RAL_LINK_PARAM_LTE_EMBMS_CAPABILITY:
      break;
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    case RAL_LINK_PARAM_LTE_JUMBO_FEASIBILITY:
      break;
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    case RAL_LINK_PARAM_LTE_JUMBO_SETUP_STATUS:
      break;
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    case RAL_LINK_PARAM_LTE_NUM_ACTIVE_EMBMS_RECEIVERS_PER_FLOW:
      break;
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    default:
      ;
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    }
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    break;

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  default:
    ;
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  }
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}
#   endif
#endif

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void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_eNB,uint8_t abstraction_flag,
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                           relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn)
{
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  UNUSED(phy_vars_rn);
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  uint8_t *pbch_pdu=&phy_vars_eNB->pbch_pdu[0];
  uint16_t input_buffer_length, re_allocated=0;
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  uint32_t i,aa;
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  uint8_t harq_pid;
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  DCI_PDU *DCI_pdu;
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  uint8_t *DLSCH_pdu=NULL;
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  DCI_PDU DCI_pdu_tmp;
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  uint8_t DLSCH_pdu_tmp[768*8];
  int8_t UE_id;
  uint8_t num_pdcch_symbols=0;
  uint8_t ul_subframe;
  uint32_t ul_frame;
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#ifdef Rel10
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  MCH_PDU *mch_pduP;
  MCH_PDU  mch_pdu;
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  //  uint8_t sync_area=255;
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#endif
#if defined(SMBV) && !defined(EXMIMO)
  // counts number of allocations in subframe
  // there is at least one allocation for PDCCH
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  uint8_t smbv_alloc_cnt = 1;
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#endif
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  int frame = phy_vars_eNB->proc[sched_subframe].frame_tx;
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  int subframe = phy_vars_eNB->proc[sched_subframe].subframe_tx;
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX,1);
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  start_meas(&phy_vars_eNB->phy_proc_tx);
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#ifdef DEBUG_PHY_PROC
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  LOG_D(PHY,"[%s %"PRIu8"] Frame %d subframe %d : Doing phy_procedures_eNB_TX\n",
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        (r_type == multicast_relay) ? "RN/eNB" : "eNB",
        phy_vars_eNB->Mod_id, frame, subframe);
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#endif
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    // If we've dropped the UE, go back to PRACH mode for this UE
    //#if !defined(EXMIMO_IOT)
    if (phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors == ULSCH_max_consecutive_errors) {
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      LOG_W(PHY,"[eNB %d, CC %d] frame %d, subframe %d, UE %d: ULSCH consecutive error count reached %u, removing UE\n",
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            phy_vars_eNB->Mod_id,phy_vars_eNB->CC_id,frame,subframe, i, phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors);
      phy_vars_eNB->eNB_UE_stats[i].mode = PRACH;
      remove_ue(phy_vars_eNB->eNB_UE_stats[i].crnti,phy_vars_eNB,abstraction_flag);
      phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors=0;
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    }
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    //#endif
  }


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  // Get scheduling info for next subframe
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  if (phy_vars_eNB->mac_enabled==1) {
    if (phy_vars_eNB->CC_id == 0) {
      mac_xface->eNB_dlsch_ulsch_scheduler(phy_vars_eNB->Mod_id,0,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);//,1);
    }
  }
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  if (abstraction_flag==0) {
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    // clear the transmit data array for the current subframe
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    for (aa=0; aa<phy_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB; aa++) {

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      memset(&phy_vars_eNB->lte_eNB_common_vars.txdataF[0][aa][subframe*phy_vars_eNB->lte_frame_parms.ofdm_symbol_size*(phy_vars_eNB->lte_frame_parms.symbols_per_tti)],
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             0,phy_vars_eNB->lte_frame_parms.ofdm_symbol_size*(phy_vars_eNB->lte_frame_parms.symbols_per_tti)*sizeof(mod_sym_t));
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    }
  }
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  if (is_pmch_subframe(phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,&phy_vars_eNB->lte_frame_parms)) {
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    if (abstraction_flag==0) {
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      // This is DL-Cell spec pilots in Control region
      generate_pilots_slot(phy_vars_eNB,
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                           phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
                           AMP,
                           subframe<<1,1);
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    }
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#ifdef Rel10
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    // if mcch is active, send regardless of the node type: eNB or RN
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    // when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing
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    mch_pduP = mac_xface->get_mch_sdu(phy_vars_eNB->Mod_id,
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                                      phy_vars_eNB->CC_id,
                                      phy_vars_eNB->proc[sched_subframe].frame_tx,
                                      subframe);

    switch (r_type) {
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    case no_relay:
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      if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0
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        LOG_I(PHY,"[eNB%"PRIu8"] Frame %d subframe %d : Got MCH pdu for MBSFN (MCS %"PRIu8", TBS %d) \n",
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              phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,mch_pduP->mcs,
              phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->TBS>>3);
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      else {
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        LOG_D(PHY,"[DeNB %"PRIu8"] Frame %d subframe %d : Do not transmit MCH pdu for MBSFN sync area %"PRIu8" (%s)\n",
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              phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,mch_pduP->sync_area,
              (mch_pduP->Pdu_size == 0)? "Empty MCH PDU":"Let RN transmit for the moment");
        mch_pduP = NULL;
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      }
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      break;
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    case multicast_relay:
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      if ((mch_pduP->Pdu_size > 0) && ((mch_pduP->mcch_active == 1) || mch_pduP->msi_active==1)) {
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        LOG_I(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Got the MCH PDU for MBSFN  sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n",
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              phy_vars_rn->Mod_id,phy_vars_rn->frame, subframe,
              mch_pduP->sync_area,mch_pduP->mcs,mch_pduP->Pdu_size);
      } else if (phy_vars_rn->mch_avtive[subframe%5] == 1) { // SF2 -> SF7, SF3 -> SF8
        mch_pduP= &mch_pdu;
        memcpy(&mch_pduP->payload, // could be a simple copy
               phy_vars_rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->b,
               phy_vars_rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3);
        mch_pduP->Pdu_size = (uint16_t) (phy_vars_rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3);
        mch_pduP->mcs = phy_vars_rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->mcs;
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        LOG_I(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Forward the MCH PDU for MBSFN received on SF %d sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n",
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              phy_vars_rn->Mod_id,phy_vars_rn->frame, subframe,subframe%5,
              phy_vars_rn->sync_area[subframe%5],mch_pduP->mcs,mch_pduP->Pdu_size);
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      } else {
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        /* LOG_I(PHY,"[RN %d] Frame %d subframe %d: do not forward MCH pdu for MBSFN  sync area %d (MCS %d, TBS %d)\n",
           phy_vars_rn->Mod_id,phy_vars_rn->frame, next_slot>>1,
           mch_pduP->sync_area,mch_pduP->mcs,mch_pduP->Pdu_size);*/
        mch_pduP=NULL;
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      }
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      phy_vars_rn->mch_avtive[subframe]=0;
      break;
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    default:
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      LOG_W(PHY,"[eNB %"PRIu8"] Frame %d subframe %d: unknown relaying type %d \n",
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            phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,r_type);
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      mch_pduP=NULL;
      break;
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    }// switch

    if (mch_pduP) {
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      fill_eNB_dlsch_MCH(phy_vars_eNB,mch_pduP->mcs,1,0, abstraction_flag);
      // Generate PMCH
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      generate_mch(phy_vars_eNB,sched_subframe,(uint8_t*)mch_pduP->payload,abstraction_flag);
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#ifdef DEBUG_PHY
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      for (i=0; i<mch_pduP->Pdu_size; i++)
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        msg("%2"PRIx8".",(uint8_t)mch_pduP->payload[i]);
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      msg("\n");
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#endif
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    } else {
      LOG_D(PHY,"[eNB/RN] Frame %d subframe %d: MCH not generated \n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
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    }
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#endif
  }
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  else {
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    // this is not a pmch subframe
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    if (abstraction_flag==0) {
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      VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1);
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      generate_pilots_slot(phy_vars_eNB,
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                           phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
                           AMP,
                           subframe<<1,0);
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      if (subframe_select(&phy_vars_eNB->lte_frame_parms,subframe) == SF_DL)
	generate_pilots_slot(phy_vars_eNB,
			     phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
			     AMP,
			     (subframe<<1)+1,0);

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      VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,0);
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      // First half of PSS/SSS (FDD)
      if (subframe == 0) {
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        if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
          generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
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                       AMP,
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                       &phy_vars_eNB->lte_frame_parms,
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                       (phy_vars_eNB->lte_frame_parms.Ncp==NORMAL) ? 6 : 5,
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                       0);
          generate_sss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
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                       AMP,
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                       &phy_vars_eNB->lte_frame_parms,
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                       (phy_vars_eNB->lte_frame_parms.Ncp==NORMAL) ? 5 : 4,
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                       0);

        }
      }
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    }
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  }
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  if (subframe == 0) {
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    // generate PBCH (Physical Broadcast CHannel) info
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    if ((phy_vars_eNB->proc[sched_subframe].frame_tx&3) == 0) {
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      pbch_pdu[2] = 0;
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      // FIXME setting pbch_pdu[2] to zero makes the switch statement easier: remove all the or-operators
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      switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
      case 6:
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        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (0<<5);
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        break;

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      case 15:
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        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (1<<5);
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        break;

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      case 25:
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        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (2<<5);
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        break;

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      case 50:
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        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (3<<5);
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        break;

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      case 75:
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        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (4<<5);
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        break;

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      case 100:
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        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (5<<5);
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        break;

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      default:
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        // FIXME if we get here, this should be flagged as an error, right?
        pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (2<<5);
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        break;
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      }
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      pbch_pdu[2] = (pbch_pdu[2]&0xef) |
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                    ((phy_vars_eNB->lte_frame_parms.phich_config_common.phich_duration << 4)&0x10);

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      switch (phy_vars_eNB->lte_frame_parms.phich_config_common.phich_resource) {
      case oneSixth:
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        pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (0<<2);
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        break;

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      case half:
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        pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (1<<2);
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        break;

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      case one:
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        pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (2<<2);
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        break;

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      case two:
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        pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (3<<2);
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        break;

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      default:
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        // unreachable
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        break;
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      }
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      pbch_pdu[2] = (pbch_pdu[2]&0xfc) | ((phy_vars_eNB->proc[sched_subframe].frame_tx>>8)&0x3);
      pbch_pdu[1] = phy_vars_eNB->proc[sched_subframe].frame_tx&0xfc;
      pbch_pdu[0] = 0;
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    }
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    /// First half of SSS (TDD)
    if (abstraction_flag==0) {
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      if (phy_vars_eNB->lte_frame_parms.frame_type == TDD) {
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        generate_sss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
                     AMP,
                     &phy_vars_eNB->lte_frame_parms,
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                     (phy_vars_eNB->lte_frame_parms.Ncp==NORMAL) ? 6 : 5,
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                     1);
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      }
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    }
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#ifdef DEBUG_PHY_PROC
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    uint16_t frame_tx = (((int) (pbch_pdu[2]&0x3))<<8) + ((int) (pbch_pdu[1]&0xfc)) + phy_vars_eNB->proc[sched_subframe].frame_tx%4;

    LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Generating PBCH, mode1_flag=%"PRIu8", frame_tx=%"PRIu16", pdu=%02"PRIx8"%02"PRIx8"%02"PRIx8"\n",
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          phy_vars_eNB->Mod_id,
          phy_vars_eNB->proc[sched_subframe].frame_tx,
          subframe,
          phy_vars_eNB->lte_frame_parms.mode1_flag,
          frame_tx,
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          pbch_pdu[2],
          pbch_pdu[1],
          pbch_pdu[0]);
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#endif
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    if (abstraction_flag==0) {
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      generate_pbch(&phy_vars_eNB->lte_eNB_pbch,
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                    phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
                    AMP,
                    &phy_vars_eNB->lte_frame_parms,
                    pbch_pdu,
                    phy_vars_eNB->proc[sched_subframe].frame_tx&3);

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    }
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#ifdef PHY_ABSTRACTION
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    else {
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      generate_pbch_emul(phy_vars_eNB,pbch_pdu);
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    }
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#endif
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  }
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  if (subframe == 1) {
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    if (abstraction_flag==0) {
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      if (phy_vars_eNB->lte_frame_parms.frame_type == TDD) {
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        //    printf("Generating PSS (frame %d, subframe %d)\n",phy_vars_eNB->proc[sched_subframe].frame_tx,next_slot>>1);
        generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
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                     AMP,
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                     &phy_vars_eNB->lte_frame_parms,
                     2,
                     2);
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      }
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    }
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  }

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  // Second half of PSS/SSS (FDD)
  if (subframe == 5) {
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    if (abstraction_flag==0) {
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      if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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        generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
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                     AMP,
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                     &phy_vars_eNB->lte_frame_parms,
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                     (phy_vars_eNB->lte_frame_parms.Ncp==NORMAL) ? 6 : 5,
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                     10);
        generate_sss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
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                     AMP,
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                     &phy_vars_eNB->lte_frame_parms,
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                     (phy_vars_eNB->lte_frame_parms.Ncp==NORMAL) ? 5 : 4,
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                     10);

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      }
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    }
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  }
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  //  Second-half of SSS (TDD)
  if (subframe == 5) {
    if (abstraction_flag==0) {
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      if (phy_vars_eNB->lte_frame_parms.frame_type == TDD) {
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        generate_sss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
                     AMP,
                     &phy_vars_eNB->lte_frame_parms,
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                     (phy_vars_eNB->lte_frame_parms.Ncp==NORMAL) ? 6 : 5,
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                     11);
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      }
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    }
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  }
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  // Second half of PSS (TDD)
  if (subframe == 6) {
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    if (abstraction_flag==0) {
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      if (phy_vars_eNB->lte_frame_parms.frame_type == TDD) {
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        //      printf("Generating PSS (frame %d, subframe %d)\n",phy_vars_eNB->proc[sched_subframe].frame_tx,next_slot>>1);
        generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[0],
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                     AMP,
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                     &phy_vars_eNB->lte_frame_parms,
                     2,
                     12);
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      }
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    }
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  }
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  //  sect_id=0;
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#if defined(SMBV) && !defined(EXMIMO)
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  // PBCH takes one allocation
  if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
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    if (subframe==0)
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      smbv_alloc_cnt++;
  }
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#endif
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  if (phy_vars_eNB->mac_enabled==1) {
    // Parse DCI received from MAC
    VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
    DCI_pdu = mac_xface->get_dci_sdu(phy_vars_eNB->Mod_id,
				     phy_vars_eNB->CC_id,
				     phy_vars_eNB->proc[sched_subframe].frame_tx,
				     subframe);
  }
  else {
    DCI_pdu = &DCI_pdu_tmp;
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#ifdef EMOS_CHANNEL
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    fill_dci_emos(DCI_pdu,sched_subframe,phy_vars_eNB);
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#else
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    fill_dci(DCI_pdu,sched_subframe,phy_vars_eNB);
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#endif
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  }
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  // clear existing ulsch dci allocations before applying info from MAC  (this is table
  ul_subframe = pdcch_alloc2ul_subframe(&phy_vars_eNB->lte_frame_parms,subframe);
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  ul_frame = pdcch_alloc2ul_frame(&phy_vars_eNB->lte_frame_parms,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
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  if ((subframe_select(&phy_vars_eNB->lte_frame_parms,ul_subframe)==SF_UL) ||
      (phy_vars_eNB->lte_frame_parms.frame_type == FDD)) {
    harq_pid = subframe2harq_pid(&phy_vars_eNB->lte_frame_parms,ul_frame,ul_subframe);
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    for (i=0; i<NUMBER_OF_UE_MAX; i++)
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      if (phy_vars_eNB->ulsch_eNB[i]) {
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        phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->dci_alloc=0;
        phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->rar_alloc=0;
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      }
  }
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#ifdef EMOS
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  //emos_dump_eNB.dci_cnt[next_slot>>1] = DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci; //nb_dci_common+nb_dci_ue_spec;
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#endif
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  // clear previous allocation information for all UEs
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    phy_vars_eNB->dlsch_eNB[i][0]->subframe_tx[subframe] = 0;
  }
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  //  init_nCCE_table();
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  num_pdcch_symbols = DCI_pdu->num_pdcch_symbols;
  /*get_num_pdcch_symbols(DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci,
    DCI_pdu->dci_alloc,
    &phy_vars_eNB->lte_frame_parms,
    subframe);*/
  /*
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  DCI_pdu->nCCE = get_nCCE(num_pdcch_symbols,
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                           &phy_vars_eNB->lte_frame_parms,
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                           get_mi(&phy_vars_eNB->lte_frame_parms,subframe));*/

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  LOG_D(PHY,"num_pdcch_symbols %"PRIu8", nCCE %u (dci commond %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,DCI_pdu->nCCE,
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        DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);

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#if defined(SMBV) && !defined(EXMIMO)
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  // Sets up PDCCH and DCI table
  if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4) && ((DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci)>0)) {
    msg("[SMBV] Frame %3d, SF %d PDCCH, number of DCIs %d\n",phy_vars_eNB->proc[sched_subframe].frame_tx,subframe,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci);
    dump_dci(&phy_vars_eNB->lte_frame_parms,&DCI_pdu->dci_alloc[0]);
    smbv_configure_pdcch(smbv_fname,(smbv_frame_cnt*10) + (subframe),num_pdcch_symbols,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci);
  }
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#endif

  for (i=0; i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci ; i++) {