nr_init.c 21.7 KB
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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */

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#include "PHY/defs_gNB.h"
#include "PHY/phy_extern.h"
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#include "PHY/NR_REFSIG/nr_refsig.h"
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#include "PHY/INIT/phy_init.h"
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#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
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#include "PHY/NR_TRANSPORT/nr_transport.h"
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#include "RadioResourceConfigCommonSIB.h"
#include "RadioResourceConfigDedicated.h"
#include "TDD-Config.h"
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#include "LAYER2/MAC/mac_extern.h"
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#include "MBSFN-SubframeConfigList.h"
#include "assertions.h"
#include <math.h>
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#include "PHY/NR_REFSIG/nr_refsig.h" 
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#include "PHY/LTE_REFSIG/lte_refsig.h"
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#include "SCHED_NR/fapi_nr_l1.h"
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extern uint32_t from_nrarfcn(int nr_bandP,uint32_t dl_nrarfcn);
extern int32_t get_uldl_offset(int nr_bandP);
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int l1_north_init_gNB() {

  int i,j;

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  if (RC.nb_nr_L1_inst > 0 && RC.nb_nr_L1_CC != NULL && RC.gNB != NULL)
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  {
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    AssertFatal(RC.nb_nr_L1_inst>0,"nb_nr_L1_inst=%d\n",RC.nb_nr_L1_inst);
    AssertFatal(RC.nb_nr_L1_CC!=NULL,"nb_nr_L1_CC is null\n");
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    AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");

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    LOG_I(PHY,"%s() RC.nb_nr_L1_inst:%d\n", __FUNCTION__, RC.nb_nr_L1_inst);
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    for (i=0;i<RC.nb_nr_L1_inst;i++) {
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      AssertFatal(RC.gNB[i]!=NULL,"RC.gNB[%d] is null\n",i);
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      AssertFatal(RC.nb_nr_L1_CC[i]>0,"RC.nb_nr_L1_CC[%d]=%d\n",i,RC.nb_nr_L1_CC[i]);
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      LOG_I(PHY,"%s() RC.nb_nr_L1_CC[%d]:%d\n", __FUNCTION__, i,  RC.nb_nr_L1_CC[i]);
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      for (j=0;j<RC.nb_nr_L1_CC[i];j++) {
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        AssertFatal(RC.gNB[i][j]!=NULL,"RC.gNB[%d][%d] is null\n",i,j);

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        if ((RC.gNB[i][j]->if_inst =  NR_IF_Module_init(i))<0) return(-1); 
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        LOG_I(PHY,"%s() RC.gNB[%d][%d] installing callbacks\n", __FUNCTION__, i,  j);

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        RC.gNB[i][j]->if_inst->NR_PHY_config_req = nr_phy_config_request;
        RC.gNB[i][j]->if_inst->NR_Schedule_response = nr_schedule_response;
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      }
    }
  }
  else
  {
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    LOG_I(PHY,"%s() Not installing PHY callbacks - RC.nb_nr_L1_inst:%d RC.nb_nr_L1_CC:%p RC.gNB:%p\n", __FUNCTION__, RC.nb_nr_L1_inst, RC.nb_nr_L1_CC, RC.gNB);
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  }
  return(0);
}


int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
                     unsigned char is_secondary_gNB,
                     unsigned char abstraction_flag)
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{

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  // shortcuts
  NR_DL_FRAME_PARMS* const fp       = &gNB->frame_parms;
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  nfapi_nr_config_request_t* cfg       = &gNB->gNB_config;
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  NR_gNB_COMMON* const common_vars  = &gNB->common_vars;
  LTE_eNB_PUSCH** const pusch_vars   = gNB->pusch_vars;
  LTE_eNB_SRS* const srs_vars        = gNB->srs_vars;
  LTE_eNB_PRACH* const prach_vars    = &gNB->prach_vars;

  int i, UE_id; 

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  LOG_I(PHY,"[gNB %d] %s() About to wait for gNB to be configured\n", gNB->Mod_id, __FUNCTION__);
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  gNB->total_dlsch_bitrate = 0;
  gNB->total_transmitted_bits = 0;
  gNB->total_system_throughput = 0;
  gNB->check_for_MUMIMO_transmissions=0;
 
  while(gNB->configured == 0) usleep(10000);
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  init_dfts();
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/*
  LOG_I(PHY,"[gNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d nb_antennas_tx:%u nb_antennas_rx:%u PRACH[rootSequenceIndex:%u prach_Config_enabled:%u configIndex:%u highSpeed:%u zeroCorrelationZoneConfig:%u freqOffset:%u]\n",
        gNB->Mod_id,
        fp->N_RB_DL,fp->phich_config_common.phich_resource,
        fp->phich_config_common.phich_duration,
        fp->nb_antennas_tx, fp->nb_antennas_rx,
        fp->prach_config_common.rootSequenceIndex,
        fp->prach_config_common.prach_Config_enabled,
        fp->prach_config_common.prach_ConfigInfo.prach_ConfigIndex,
        fp->prach_config_common.prach_ConfigInfo.highSpeedFlag,
        fp->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig,
        fp->prach_config_common.prach_ConfigInfo.prach_FreqOffset
        );*/
  LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_gNB][MOD %02"PRIu8"][]\n", gNB->Mod_id);

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  crcTableInit();

  init_dfts();
  
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  // PBCH DMRS gold sequences generation
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  nr_init_pbch_dmrs(gNB);
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  // Polar encoder init for PBCH
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  nr_polar_init(&gNB->nrPolar_params,
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		NR_POLAR_PBCH_MESSAGE_TYPE,
		NR_POLAR_PBCH_PAYLOAD_BITS,
		NR_POLAR_PBCH_AGGREGATION_LEVEL);
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  //PDCCH DMRS init
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  gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t**));
  uint32_t ***pdcch_dmrs             = gNB->nr_gold_pdcch_dmrs;
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  AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
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  for (int slot=0; slot<fp->slots_per_frame; slot++) {
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    pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t*));
    AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
    for (int symb=0; symb<fp->symbols_per_slot; symb++){
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      pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
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      AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
    }
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  }
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  nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
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  nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
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   //PDSCH DMRS init
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   gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t***));
   uint32_t ****pdsch_dmrs             = gNB->nr_gold_pdsch_dmrs;
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   for (int slot=0; slot<fp->slots_per_frame; slot++) {
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    pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t**));
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    AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
    for (int symb=0; symb<fp->symbols_per_slot; symb++){
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      pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_MAX_NB_CODEWORDS*sizeof(uint32_t*));
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      AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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      for (int q=0; q<NR_MAX_NB_CODEWORDS; q++) {
        pdsch_dmrs[slot][symb][q] = (uint32_t*)malloc16(NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD*sizeof(uint32_t));
        AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
      }
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    }
  }
   
   nr_init_pdsch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
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  /// Transport init necessary for NR synchro
  init_nr_transport(gNB);
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/*
  lte_gold(fp,gNB->lte_gold_table,fp->Nid_cell);
  generate_pcfich_reg_mapping(fp);
  generate_phich_reg_mapping(fp);*/

  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
    gNB->first_run_timing_advance[UE_id] =
      1; ///This flag used to be static. With multiple gNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here.
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    // clear whole structure
    bzero( &gNB->UE_stats[UE_id], sizeof(LTE_eNB_UE_stats) );
    
    gNB->physicalConfigDedicated[UE_id] = NULL;
  }
  
  gNB->first_run_I0_measurements = 1; ///This flag used to be static. With multiple gNBs this does no longer work, hence we put it in the structure. However it has to be initialized with 1, which is performed here.

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  common_vars->rxdata  = (int32_t **)NULL;
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  common_vars->txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
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  common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*));
  
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  for (i=0;i<15;i++){ 
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      common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t) );
      
      LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
	    i,common_vars->txdataF[i],
	    fp->samples_per_frame_wCP*sizeof(int32_t));
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  }
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  // Channel estimates for SRS
  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
    
    srs_vars[UE_id].srs_ch_estimates      = (int32_t**)malloc16( 64*sizeof(int32_t*) );
    srs_vars[UE_id].srs_ch_estimates_time = (int32_t**)malloc16( 64*sizeof(int32_t*) );
    
    for (i=0; i<64; i++) {
      srs_vars[UE_id].srs_ch_estimates[i]      = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size );
      srs_vars[UE_id].srs_ch_estimates_time[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
    }
  } //UE_id


  /*generate_ul_ref_sigs_rx();
  
  init_ulsch_power_LUT();*/

  // SRS
  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
    srs_vars[UE_id].srs = (int32_t*)malloc16_clear(2*fp->ofdm_symbol_size*sizeof(int32_t));
  }

  // PRACH
  prach_vars->prachF = (int16_t*)malloc16_clear( 1024*2*sizeof(int16_t) );

  // assume maximum of 64 RX antennas for PRACH receiver
  prach_vars->prach_ifft[0]    = (int32_t**)malloc16_clear(64*sizeof(int32_t*)); 
  for (i=0;i<64;i++) prach_vars->prach_ifft[0][i]    = (int32_t*)malloc16_clear(1024*2*sizeof(int32_t)); 

  prach_vars->rxsigF[0]        = (int16_t**)malloc16_clear(64*sizeof(int16_t*));

  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
    
    //FIXME
    pusch_vars[UE_id] = (LTE_eNB_PUSCH*)malloc16_clear( NUMBER_OF_UE_MAX*sizeof(LTE_eNB_PUSCH) );
    
    pusch_vars[UE_id]->rxdataF_ext      = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    pusch_vars[UE_id]->rxdataF_ext2     = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    pusch_vars[UE_id]->drs_ch_estimates = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    pusch_vars[UE_id]->drs_ch_estimates_time = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    pusch_vars[UE_id]->rxdataF_comp     = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    pusch_vars[UE_id]->ul_ch_mag  = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    pusch_vars[UE_id]->ul_ch_magb = (int32_t**)malloc16( 2*sizeof(int32_t*) );
    
    for (i=0; i<2; i++) {
      // RK 2 times because of output format of FFT!
      // FIXME We should get rid of this
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      pusch_vars[UE_id]->rxdataF_ext[i]      = (int32_t*)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
      pusch_vars[UE_id]->rxdataF_ext2[i]     = (int32_t*)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
      pusch_vars[UE_id]->drs_ch_estimates[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
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      pusch_vars[UE_id]->drs_ch_estimates_time[i] = (int32_t*)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
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      pusch_vars[UE_id]->rxdataF_comp[i]     = (int32_t*)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot );
      pusch_vars[UE_id]->ul_ch_mag[i]  = (int32_t*)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
      pusch_vars[UE_id]->ul_ch_magb[i] = (int32_t*)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 );
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      }
    
    pusch_vars[UE_id]->llr = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) );
  } //UE_id

    
  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
    gNB->UE_stats_ptr[UE_id] = &gNB->UE_stats[UE_id];
  
  gNB->pdsch_config_dedicated->p_a = dB0; //defaul value until overwritten by RRCConnectionReconfiguration
  

  return (0);

}
/*
void phy_config_request(PHY_Config_t *phy_config) {

  uint8_t Mod_id              = phy_config->Mod_id;
  int CC_id                   = phy_config->CC_id;
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  nfapi_nr_config_request_t *cfg = phy_config->cfg;
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  NR_DL_FRAME_PARMS *fp;
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  PHICH_RESOURCE_t phich_resource_table[4]={oneSixth,half,one,two};
  int                 eutra_band     = cfg->nfapi_config.rf_bands.rf_band[0];  
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  int                 dl_Bandwidth   = cfg->rf_config.dl_carrier_bandwidth.value;
  int                 ul_Bandwidth   = cfg->rf_config.ul_carrier_bandwidth.value;
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  int                 Nid_cell       = cfg->sch_config.physical_cell_id.value;
  int                 Ncp            = cfg->subframe_config.dl_cyclic_prefix_type.value;
  int                 p_eNB          = cfg->rf_config.tx_antenna_ports.value;
  uint32_t            dl_CarrierFreq = cfg->nfapi_config.earfcn.value;

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  LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,Ncp %d,DL freq %u)\n",
	Mod_id, CC_id, eutra_band, dl_Bandwidth, ul_Bandwidth, Nid_cell, p_eNB,Ncp,dl_CarrierFreq	);
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  AssertFatal(RC.gNB != NULL, "PHY instance pointer doesn't exist\n");
  AssertFatal(RC.gNB[Mod_id] != NULL, "PHY instance %d doesn't exist\n",Mod_id);
  AssertFatal(RC.gNB[Mod_id][CC_id] != NULL, "PHY instance %d, CCid %d doesn't exist\n",Mod_id,CC_id);
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  if (RC.gNB[Mod_id][CC_id]->configured == 1)
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  {
    LOG_E(PHY,"Already eNB already configured, do nothing\n");
    return;
  }

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  RC.gNB[Mod_id][CC_id]->mac_enabled     = 1;
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  fp = &RC.gNB[Mod_id][CC_id]->frame_parms;
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  fp->threequarter_fs                    = 0;

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  nr_init_frame_parms(fp,1);
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  RC.gNB[Mod_id][CC_id]->configured                                   = 1;
  LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);
}*/
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void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{
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  //NR_DL_FRAME_PARMS* const fp       = &gNB->frame_parms;
  //nfapi_nr_config_request_t *cfg       = &gNB->gNB_config;
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  NR_gNB_COMMON* const common_vars  = &gNB->common_vars;
  LTE_eNB_PUSCH** const pusch_vars   = gNB->pusch_vars;
  LTE_eNB_SRS* const srs_vars        = gNB->srs_vars;
  LTE_eNB_PRACH* const prach_vars    = &gNB->prach_vars;
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  uint32_t ***pdcch_dmrs             = gNB->nr_gold_pdcch_dmrs;
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  int i, UE_id;

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  for (i = 0; i < 15; i++) {
    free_and_zero(common_vars->txdataF[i]);
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      /* rxdataF[i] is not allocated -> don't free */
  }
  free_and_zero(common_vars->txdataF);
  free_and_zero(common_vars->rxdataF);

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  // PDCCH DMRS sequences
  free_and_zero(pdcch_dmrs);

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  // Channel estimates for SRS
  for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
    for (i=0; i<64; i++) {
      free_and_zero(srs_vars[UE_id].srs_ch_estimates[i]);
      free_and_zero(srs_vars[UE_id].srs_ch_estimates_time[i]);
    }
    free_and_zero(srs_vars[UE_id].srs_ch_estimates);
    free_and_zero(srs_vars[UE_id].srs_ch_estimates_time);
  } //UE_id

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  //free_ul_ref_sigs();
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  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) free_and_zero(srs_vars[UE_id].srs);

  free_and_zero(prach_vars->prachF);

  for (i = 0; i < 64; i++) free_and_zero(prach_vars->prach_ifft[0][i]);
  free_and_zero(prach_vars->prach_ifft[0]);

  free_and_zero(prach_vars->rxsigF[0]);

  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
    for (i = 0; i < 2; i++) {
      free_and_zero(pusch_vars[UE_id]->rxdataF_ext[i]);
      free_and_zero(pusch_vars[UE_id]->rxdataF_ext2[i]);
      free_and_zero(pusch_vars[UE_id]->drs_ch_estimates[i]);
      free_and_zero(pusch_vars[UE_id]->drs_ch_estimates_time[i]);
      free_and_zero(pusch_vars[UE_id]->rxdataF_comp[i]);
      free_and_zero(pusch_vars[UE_id]->ul_ch_mag[i]);
      free_and_zero(pusch_vars[UE_id]->ul_ch_magb[i]);
    }
    free_and_zero(pusch_vars[UE_id]->rxdataF_ext);
    free_and_zero(pusch_vars[UE_id]->rxdataF_ext2);
    free_and_zero(pusch_vars[UE_id]->drs_ch_estimates);
    free_and_zero(pusch_vars[UE_id]->drs_ch_estimates_time);
    free_and_zero(pusch_vars[UE_id]->rxdataF_comp);
    free_and_zero(pusch_vars[UE_id]->ul_ch_mag);
    free_and_zero(pusch_vars[UE_id]->ul_ch_magb);
    free_and_zero(pusch_vars[UE_id]->llr);
    free_and_zero(pusch_vars[UE_id]);
  } //UE_id

  for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) gNB->UE_stats_ptr[UE_id] = NULL;
}
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/*
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void install_schedule_handlers(IF_Module_t *if_inst)
{
  if_inst->PHY_config_req = phy_config_request;
  if_inst->schedule_response = schedule_response;
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}*/
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/// this function is a temporary addition for NR configuration
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void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
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{
  NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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  nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config;
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  //overwrite for new NR parameters
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  gNB_config->nfapi_config.rf_bands.rf_band[0] = 78;
  gNB_config->nfapi_config.nrarfcn.value = 620000;
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  gNB_config->subframe_config.numerology_index_mu.value = mu;
  gNB_config->subframe_config.duplex_mode.value = TDD;
  gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
  gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
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  gNB_config->sch_config.half_frame_index.value = 0;
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  gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
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  gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20);
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  gNB_config->sch_config.ssb_subcarrier_offset.value = 0;
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  gNB->mac_enabled     = 1;

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  fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
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  fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
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  fp->threequarter_fs                    = 0;

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  nr_init_frame_parms(gNB_config, fp);
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  gNB->configured                                   = 1;
  LOG_I(PHY,"gNB configured\n");
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}
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void nr_phy_config_request(NR_PHY_Config_t *phy_config)
{

  uint8_t Mod_id                  = phy_config->Mod_id;
  int     CC_id                   = phy_config->CC_id;

  NR_DL_FRAME_PARMS         *fp         = &RC.gNB[Mod_id][CC_id]->frame_parms;
  nfapi_nr_config_request_t *gNB_config = &RC.gNB[Mod_id][CC_id]->gNB_config;


  gNB_config->nfapi_config.rf_bands.rf_band[0]          = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
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  gNB_config->nfapi_config.nrarfcn.value                = phy_config->cfg->nfapi_config.nrarfcn.value; //6600
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  gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
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  gNB_config->rf_config.dl_carrier_bandwidth.value      = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106;
  gNB_config->rf_config.ul_carrier_bandwidth.value      = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
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  gNB_config->sch_config.half_frame_index.value         = 0;
  gNB_config->sch_config.ssb_subcarrier_offset.value    = phy_config->cfg->sch_config.ssb_subcarrier_offset.value;//0;
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  gNB_config->sch_config.n_ssb_crb.value                = (phy_config->cfg->rf_config.dl_carrier_bandwidth.value-20);
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  gNB_config->sch_config.physical_cell_id.value         = phy_config->cfg->sch_config.physical_cell_id.value;

  if (phy_config->cfg->subframe_config.duplex_mode.value == 0) {
    gNB_config->subframe_config.duplex_mode.value    = TDD;
  }
  else {
    gNB_config->subframe_config.duplex_mode.value    = FDD;
  }

  RC.gNB[Mod_id][CC_id]->mac_enabled     = 1;

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  fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
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  fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
  fp->threequarter_fs                    = 0;

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  LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %u)\n",
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	Mod_id, 
	CC_id, 
	gNB_config->nfapi_config.rf_bands.rf_band[0], 
	gNB_config->rf_config.dl_carrier_bandwidth.value, 
	gNB_config->rf_config.ul_carrier_bandwidth.value, 
	gNB_config->sch_config.physical_cell_id.value, 
	fp->dl_CarrierFreq );
  
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  nr_init_frame_parms(gNB_config, fp);

  if (RC.gNB[Mod_id][CC_id]->configured == 1){
    LOG_E(PHY,"Already gNB already configured, do nothing\n");
    return;
  }

  RC.gNB[Mod_id][CC_id]->configured     = 1;
  LOG_I(PHY,"gNB %d/%d configured\n",Mod_id,CC_id);



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}
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void init_nr_transport(PHY_VARS_gNB *gNB) {

  int i;
  int j;
  NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
  nfapi_nr_config_request_t *cfg = &gNB->gNB_config;

  LOG_I(PHY, "Initialise nr transport\n");

  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
    LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH, UE %d\n",i);
    for (j=0; j<2; j++) {
      gNB->dlsch[i][j] = new_gNB_dlsch(1,16,NSOFT,0,fp,cfg);
      if (!gNB->dlsch[i][j]) {
	LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i);
	exit(-1);
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      }/* else {
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	gNB->dlsch[i][j]->rnti=0;
	LOG_D(PHY,"dlsch[%d][%d] => %p rnti:%d\n",i,j,gNB->dlsch[i][j], gNB->dlsch[i][j]->rnti);
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      }*/
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    }
    
    //LOG_I(PHY,"Allocating Transport Channel Buffer for ULSCH, UE %d\n",i);
    //gNB->ulsch[1+i] = new_gNB_ulsch(MAX_TURBO_ITERATIONS,fp->N_RB_UL, 0);
    
    /*if (!gNB->ulsch[1+i]) {
      LOG_E(PHY,"Can't get gNB ulsch structures\n");
      exit(-1);
    }*/
    
    // this is the transmission mode for the signalling channels
    // this will be overwritten with the real transmission mode by the RRC once the UE is connected
    //gNB->transmission_mode[i] = fp->nb_antenna_ports_gNB==1 ? 1 : 2;
  }
  // ULSCH for RA
  //gNB->ulsch[0] = new_gNB_ulsch(MAX_TURBO_ITERATIONS, fp->N_RB_UL, 0);
  
  /*if (!gNB->ulsch[0]) {
    LOG_E(PHY,"Can't get gNB ulsch structures\n");
    exit(-1);
  }*/
  gNB->dlsch_SI  = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
  LOG_D(PHY,"gNB %d.%d : SI %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_SI);
  gNB->dlsch_ra  = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
  LOG_D(PHY,"gNB %d.%d : RA %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_ra);
  gNB->dlsch_MCH = new_gNB_dlsch(1,8,NSOFT, 0, fp, cfg);
  LOG_D(PHY,"gNB %d.%d : MCH %p\n",gNB->Mod_id,gNB->CC_id,gNB->dlsch_MCH);
  
  
  gNB->rx_total_gain_dB=130;
  
  for(i=0; i<NUMBER_OF_UE_MAX; i++)
    gNB->mu_mimo_mode[i].dl_pow_off = 2;
  
  gNB->check_for_total_transmissions = 0;
  
  gNB->check_for_MUMIMO_transmissions = 0;
  
  gNB->FULL_MUMIMO_transmissions = 0;
  
  gNB->check_for_SUMIMO_transmissions = 0;
  
  //fp->pucch_config_common.deltaPUCCH_Shift = 1;
    
}