Commit 0937339a authored by nikaeinn's avatar nikaeinn Committed by Robert Schmidt

Update MAC scheduler for slicing (not tested)

parent 78dd80b0
......@@ -69,6 +69,7 @@ typedef uint32_t frame_t;
typedef int32_t sframe_t;
typedef uint32_t sub_frame_t;
typedef uint8_t module_id_t;
typedef uint8_t slice_id_t;
typedef uint8_t eNB_index_t;
typedef uint16_t ue_id_t;
typedef int16_t smodule_id_t;
......
......@@ -800,7 +800,7 @@ typedef struct {
///Contention resolution timer used during random access
uint8_t mac_ContentionResolutionTimer;
uint16_t max_allowed_rbs[MAX_NUM_LCID];
uint16_t max_rbs_allowed_slice[MAX_NUM_LCID][MAX_NUM_SLICES];
uint8_t max_mcs[MAX_NUM_LCID];
......
......@@ -744,40 +744,14 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
copy_ulreq(module_idP, frameP, subframeP);
// This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP);
#if defined(FLEXRAN_AGENT_SB_IF)
if (mac_agent_registered[module_idP]){
agent_mac_xface[module_idP]->flexran_agent_schedule_ul_spec(module_idP,frameP,cooperation_flag,0,4, &msg);
}
flexran_agent_mac_destroy_ul_config(msg);
#else
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP);
#endif
// This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP);
#if defined(FLEXRAN_AGENT_SB_IF)
if (mac_agent_registered[module_idP]) {
agent_mac_xface[module_idP]->flexran_agent_schedule_ue_spec(
module_idP,
frameP,
subframeP,
mbsfn_status,
&msg);
flexran_apply_scheduling_decisions(module_idP,
frameP,
subframeP,
mbsfn_status,
msg);
flexran_agent_mac_destroy_dl_config(msg);
}
#else
// This schedules DLSCH in subframeP
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
#endif
schedule_dlsch(module_idP, frameP, subframeP, mbsfn_status);
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
......
......@@ -57,6 +57,15 @@
#include "intertask_interface.h"
#endif
#if defined FLEXRAN_AGENT_SB_IF
#include "ENB_APP/flexran_agent_defs.h"
#include "flexran_agent_ran_api.h"
#include "header.pb-c.h"
#include "flexran.pb-c.h"
#include "flexran_agent_mac.h"
#include <dlfcn.h>
#endif
#include "T.h"
#define ENABLE_MAC_PAYLOAD_DEBUG
......@@ -64,6 +73,36 @@
extern RAN_CONTEXT_t RC;
// number of active slices for past and current time
int n_active_slices = 1;
int n_active_slices_current = 1;
// RB share for each slice for past and current time
float avg_slice_percentage=0.25;
float slice_percentage[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float slice_percentage_current[MAX_NUM_SLICES] = {1.0, 0.0, 0.0, 0.0};
float total_slice_percentage = 0;
float total_slice_percentage_current = 0;
// MAX MCS for each slice for past and current time
int slice_maxmcs[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int slice_maxmcs_current[MAX_NUM_SLICES] = { 28, 28, 28, 28 };
int update_dl_scheduler[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
int update_dl_scheduler_current[MAX_NUM_SLICES] = { 1, 1, 1, 1 };
// name of available scheduler
char *dl_scheduler_type[MAX_NUM_SLICES] =
{ "schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec",
"schedule_ue_spec"
};
// pointer to the slice specific scheduler
slice_scheduler_dl slice_sched_dl[MAX_NUM_SLICES] = {0};
//------------------------------------------------------------------------------
void
add_ue_dlsch_info(module_id_t module_idP,
......@@ -408,12 +447,117 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
}
}
//------------------------------------------------------------------------------
void
schedule_dlsch(module_id_ module_idP,
frame_t frameP, sub_frame_t subframeP, int *mbsfn_flag)
//------------------------------------------------------------------------------{
{
int i=0;
total_slice_percentage=0;
avg_slice_percentage=1.0/n_active_slices;
// reset the slice percentage for inactive slices
for (i = n_active_slices; i< MAX_NUM_SLICES; i++) {
slice_percentage[i]=0;
}
for (i = 0; i < n_active_slices; i++) {
if (slice_percentage[i] < 0 ){
LOG_W(MAC, "[eNB %d] frame %d subframe %d:invalid slice %d percentage %f. resetting to zero",
mod_id, frame, subframe, i, slice_percentage[i]);
slice_percentage[i]=0;
}
total_slice_percentage+=slice_percentage[i];
}
for (i = 0; i < n_active_slices; i++) {
// Load any updated functions
if (update_dl_scheduler[i] > 0 ) {
slice_sched_dl[i] = dlsym(NULL, dl_scheduler_type[i]);
update_dl_scheduler[i] = 0;
update_dl_scheduler_current[i] = 0;
LOG_N(MAC,"update dl scheduler slice %d\n", i);
}
if (total_slice_percentage <= 1.0){ // the new total RB share is within the range
// check if the number of slices has changed, and log
if (n_active_slices_current != n_active_slices ){
if ((n_active_slices > 0) && (n_active_slices <= MAX_NUM_SLICES)) {
LOG_N(MAC,"[eNB %d]frame %d subframe %d: number of active DL slices has changed: %d-->%d\n",
mod_id, frame, subframe, n_active_slices_current, n_active_slices);
n_active_slices_current = n_active_slices;
} else {
LOG_W(MAC,"invalid number of DL slices %d, revert to the previous value %d\n",n_active_slices, n_active_slices_current);
n_active_slices = n_active_slices_current;
}
}
// check if the slice rb share has changed, and log the console
if (slice_percentage_current[i] != slice_percentage[i]){ // new slice percentage
LOG_N(MAC,"[eNB %d][SLICE %d][DL] frame %d subframe %d: total percentage %f-->%f, slice RB percentage has changed: %f-->%f\n",
mod_id, i, frame, subframe, total_slice_percentage_current, total_slice_percentage, slice_percentage_current[i], slice_percentage[i]);
total_slice_percentage_current= total_slice_percentage;
slice_percentage_current[i] = slice_percentage[i];
}
// check if the slice max MCS, and log the console
if (slice_maxmcs_current[i] != slice_maxmcs[i]){
if ((slice_maxmcs[i] >= 0) && (slice_maxmcs[i] < 29)){
LOG_N(MAC,"[eNB %d][SLICE %d][DL] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n",
mod_id, i, frame, subframe, slice_maxmcs_current[i], slice_maxmcs[i]);
slice_maxmcs_current[i] = slice_maxmcs[i];
} else {
LOG_W(MAC,"[eNB %d][SLICE %d][DL] invalid slice max mcs %d, revert the previous value %d\n",mod_id, i, slice_maxmcs[i],slice_maxmcs_current[i]);
slice_maxmcs[i]= slice_maxmcs_current[i];
}
}
// check if a new scheduler, and log the console
if (update_dl_scheduler_current[i] != update_dl_scheduler[i]){
LOG_N(MAC,"[eNB %d][SLICE %d][DL] frame %d subframe %d: DL scheduler for this slice is updated: %s \n",
mod_id, i, frame, subframe, dl_scheduler_type[i]);
update_dl_scheduler_current[i] = update_dl_scheduler[i];
}
} else {
// here we can correct the values, e.g. reduce proportionally
if (n_active_slices == n_active_slices_current){
LOG_W(MAC,"[eNB %d][SLICE %d][DL] invalid total RB share (%f->%f), reduce proportionally the RB share by 0.1\n",
mod_id,i,
total_slice_percentage_current, total_slice_percentage);
if (slice_percentage[i] >= avg_slice_percentage){
slice_percentage[i]-=0.1;
total_slice_percentage-=0.1;
}
} else {
LOG_W(MAC,"[eNB %d][SLICE %d][DL] invalid total RB share (%f->%f), revert the number of slice to its previous value (%d->%d)\n",
mod_id,i,
total_slice_percentage_current, total_slice_percentage,
n_active_slices, n_active_slices_current );
n_active_slices = n_active_slices_current;
slice_percentage[i] = slice_percentage_current[i];
}
}
// Run each enabled slice-specific schedulers one by one
slice_sched_dl[i](mod_id, i, frame, subframe, mbsfn_flag,dl_info);
}
}
// changes to pre-processor for eMTC
//------------------------------------------------------------------------------
void
schedule_ue_spec(module_id_t module_idP,
schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
frame_t frameP, sub_frame_t subframeP, int *mbsfn_flag)
//------------------------------------------------------------------------------
{
......@@ -539,7 +683,11 @@ schedule_ue_spec(module_id_t module_idP,
(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR, VCD_FUNCTION_IN);
start_meas(&eNB->schedule_dlsch_preprocessor);
dlsch_scheduler_pre_processor(module_idP,
frameP, subframeP, N_RBG, mbsfn_flag);
slice_idP,
frameP,
subframeP,
N_RBG,
mbsfn_flag);
stop_meas(&eNB->schedule_dlsch_preprocessor);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR, VCD_FUNCTION_OUT);
......@@ -570,6 +718,8 @@ schedule_ue_spec(module_id_t module_idP,
LOG_D(MAC, "[eNB] Cannot find eNB_UE_stats\n");
continue_flag = 1;
}
if (flexran_slice_member(UE_id, slice_idP) == 0)
continue;
if (continue_flag != 1) {
switch (get_tmode(module_idP, CC_id, UE_id)) {
......@@ -656,7 +806,7 @@ schedule_ue_spec(module_id_t module_idP,
*/
eNB_UE_stats->dlsch_mcs1 =
cqi_to_mcs[ue_sched_ctl->dl_cqi[CC_id]];
eNB_UE_stats->dlsch_mcs1 = eNB_UE_stats->dlsch_mcs1; //cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
eNB_UE_stats->dlsch_mcs1 =cmin(eNB_UE_stats->dlsch_mcs1, flexran_slice_maxmcs(slice_idP));//openair_daq_vars.target_ue_dl_mcs);
// store stats
......
......@@ -4472,3 +4472,28 @@ harq_indication(module_id_t mod_idP, int CC_idP, frame_t frameP,
sched_ctl->pucch1_cqi_update[CC_idP] = 1;
}
}
// Flexran Slicing functions
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs)
{
return (uint16_t) floor(rb_percentage * total_rbs);
}
int flexran_slice_maxmcs(int slice_id)
{
return slice_maxmcs[slice_id];
}
int flexran_slice_member(int UE_id, int slice_id)
{
if ((slice_id < 0) || (slice_id > n_active_slices))
LOG_W(MAC, "out of range slice id %d\n", slice_id);
if ((UE_id % n_active_slices) == slice_id) {
return 1; // this ue is a member of this slice
}
return 0;
}
This diff is collapsed.
......@@ -578,7 +578,7 @@ _dlsch_scheduler_pre_processor(module_id_t Mod_id,
if (!phy_stats_exist(Mod_id, rnti))
continue;
for (ii=0; ii < UE_num_active_CC(UE_list,UE_id); ii++) {
for (ii=0; ii < UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
ue_sched_ctl->max_allowed_rbs[CC_id]=nb_rbs_allowed_slice[CC_id][slice_id];
......
This diff is collapsed.
......@@ -102,11 +102,12 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,
/** \brief ULSCH Scheduling per RNTI
@param Mod_id Instance ID of eNB
@param slice_id Instance slice for this eNB
@param frame Frame index
@param subframe Subframe number on which to act
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
*/
void schedule_ulsch_rnti(module_id_t module_idP, frame_t frameP,
void schedule_ulsch_rnti(module_id_t module_idP, slice_id_t slice_idP, frame_t frameP,
sub_frame_t subframe,
unsigned char sched_subframe,
uint16_t * first_rb);
......@@ -127,9 +128,12 @@ void fill_DLSCH_dci(module_id_t module_idP, frame_t frameP,
@param mbsfn_flag Indicates that MCH/MCCH is in this subframe
*/
void schedule_ue_spec(module_id_t module_idP, frame_t frameP,
void schedule_dlsch(module_id_t module_idP, frame_t frameP,
sub_frame_t subframe, int *mbsfn_flag);
void schedule_ue_spec(module_id_t module_idP, slice_id_t slice_idP,
frame_t frameP,sub_frame_t subframe, int *mbsfn_flag);
/** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
@param Mod_id Module id of UE
......@@ -209,6 +213,7 @@ void dlsch_scheduler_pre_processor_reset(int module_idP, int UE_id,
void dlsch_scheduler_pre_processor(module_id_t module_idP,
slice_id_t slice_idP,
frame_t frameP,
sub_frame_t subframe,
int N_RBG[MAX_NUM_CCs],
......@@ -633,7 +638,7 @@ int UE_PCCID(module_id_t mod_idP, int ue_idP);
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP,
void ulsch_scheduler_pre_processor(module_id_t module_idP, slice_id_t slice_id, int frameP,
sub_frame_t subframeP,
uint16_t * first_rb);
void store_ulsch_buffer(module_id_t module_idP, int frameP,
......@@ -1158,5 +1163,12 @@ int32_t get_uldl_offset(int eutra_bandP);
int l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
uint8_t HO_active);
/*Slice related functions */
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int flexran_slice_member(int UE_id, int slice_id);
int flexran_slice_maxmcs(int slice_id;)
#endif
/** @}*/
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