Commit 11c1256f authored by Hongzhi's avatar Hongzhi

Merge branch 'develop-nr' into nr_pdcch

Conflicts:
	cmake_targets/CMakeLists.txt
parents 69ec0ddd 0c22058d
......@@ -361,11 +361,14 @@ message( FATAL_ERROR "The script ${asn1c_call} must be present" )
endif(NOT EXISTS ${asn1c_call})
message("calling ASN1C_PREFIX=NR_ asn1c -findirect-choice -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}")
execute_process(COMMAND ${asn1c_call}
${NR_RRC_FULL_DIR}
${NR_RRC_GRAMMAR}
NR_RRC
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET )
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${asn1c_call}: error")
......@@ -374,7 +377,6 @@ endif (NOT ${ret} STREQUAL 0)
if(NOT EXISTS ${fix_asn1c_call})
message( FATAL_ERROR "The script ${fix_asn1c_call} must be present" )
endif(NOT EXISTS ${fix_asn1c_call})
execute_process(COMMAND ${fix_asn1c_call}
${NR_RRC_FULL_DIR}
NR_RRC
......@@ -398,6 +400,7 @@ include_directories ("${NR_RRC_FULL_DIR}")
# add the command to generate the source code
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
add_custom_command (
OUTPUT ${NR_RRC_FULL_DIR}/asn1_constants.h
COMMAND ${asn1c_call} ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR} RRC
......@@ -434,7 +437,11 @@ message("calling ASN1C_PREFIX=S1AP_ asn1c -fcompound-names -fno-include-deps -ge
execute_process(COMMAND mkdir -p ${S1AP_C_DIR}
COMMAND env "ASN1C_PREFIX=S1AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET
)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
......@@ -499,7 +506,9 @@ message("calling asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -
execute_process(COMMAND mkdir -p ${X2AP_C_DIR}
COMMAND env "ASN1C_PREFIX=X2AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET )
#execute_process(COMMAND ${asn1c_call}
# ${X2AP_C_DIR}
......@@ -1342,6 +1351,10 @@ if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_library(PHY ${PHY_SRC})
add_library(PHY_UE ${PHY_SRC_UE})
......@@ -1463,6 +1476,7 @@ set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
# ${NR_UE_RRC_DIR}/mac_vars.c
#${RRC_DIR}/rrc_UE.c
)
set(L2_NR_SRC_UE
......@@ -1582,6 +1596,7 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
)
add_library( NR_LTE_UE_REUSE_LIB
......@@ -2265,6 +2280,7 @@ target_link_libraries (lte-uesoftmodem-nos1 ${T_LIB})
add_executable(nr-softmodem
${rrc_h}
${nr_rrc_h}
${s1ap_h}
${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
......@@ -2272,7 +2288,6 @@ add_executable(nr-softmodem
${OPENAIR_TARGETS}/RT/USER/nr-ru.c
${OPENAIR_TARGETS}/RT/USER/nr-softmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/COMMON/create_tasks.c
${OPENAIR_TARGETS}/COMMON/create_nr_tasks.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
......
#ifndef _FAPI_NR_UE_CONSTANTS_H_
#define _FAPI_NR_UE_CONSTANTS_H_
// constants defined by specification 38.331
#define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
/// RX_IND
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
#define FAPI_NR_DCI_IND 0x04
#define FAPI_NR_SIBS_MASK_SIB1 0x1
/// DCI_IND
#define FAPI_NR_DCI_TYPE_0_0 0x01
#define FAPI_NR_DCI_TYPE_0_1 0x02
#define FAPI_NR_DCI_TYPE_1_0 0x03
#define FAPI_NR_DCI_TYPE_1_1 0x04
#define FAPI_NR_DCI_TYPE_2_0 0x05
#define FAPI_NR_DCI_TYPE_2_1 0x06
#define FAPI_NR_DCI_TYPE_2_2 0x07
#define FAPI_NR_DCI_TYPE_2_3 0x08
/// TX_REQ
/// DL_CONFIG_REQ
#define FAPI_NR_DL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
/// UL_CONFIG_REQ
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_DL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_DL_CONFIG_TYPE_PUSCH 0x03
#endif
\ No newline at end of file
......@@ -657,6 +657,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
//phy_init_nr_top(&ue->frame_parms);
//nr_init_frame_parms_ue(&ue->frame_parms);
// many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" );
......
......@@ -159,8 +159,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
return 0;
}
int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms)
{
int N_RB = 106;
......@@ -283,7 +282,7 @@ int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config,
frame_parms->ofdm_symbol_size = 2048;
frame_parms->samples_per_tti = 30720;
frame_parms->samples_per_subframe = 30720 * frame_parms->ttis_per_subframe;
frame_parms->first_carrier_offset = 2048-600;
//frame_parms->first_carrier_offset = 2048-600;
frame_parms->slots_per_frame = 10* frame_parms->slots_per_subframe;
frame_parms->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
......
......@@ -375,7 +375,8 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
......
......@@ -50,7 +50,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
//NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t nb_rb_pdsch = 100;
......@@ -239,7 +239,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
printf("PDCCH Channel estimation eNB %d, aatx %d, slot %d, symbol %d start_sc %d\n",eNB_id,aa,Ns,l,coreset_start_subcarrier);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
......
......@@ -53,7 +53,7 @@ int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1
short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
/*int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
......@@ -65,8 +65,6 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t qpsk[4],n;
int w,ind,l,ind_dword,ind_qpsk_symb,kp,k;
short pamp;
// Compute the correct pilot amplitude, sqrt_rho_b = Q3.13
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
......@@ -80,7 +78,6 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
((short *)&qpsk[3])[1] = pamp;
if (p==2000) {
// r_n from 38.211 7.4.1.3
for (n=0; n<nb_rb_coreset*3; n++) {
for (l =0; l<length_dmrs; l++){
for (kp=0; kp<3; kp++){
......@@ -106,7 +103,7 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
}
return(0);
}
}*/
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
......@@ -189,6 +186,35 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
return(0);
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
{
uint8_t idx=0;
uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH
if (i<8)
printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
#endif
}
}
return(0);
}
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch,
int32_t *output )
{
......
......@@ -64,7 +64,7 @@ void nr_gold_pbch(PHY_VARS_NR_UE* ue)
}
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned short n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
......@@ -74,7 +74,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
if (n_idDMRS)
nid = n_idDMRS;
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
......@@ -95,7 +95,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<10; n++) {
for (n=0; n<52; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
......@@ -107,7 +107,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
}
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int Nid_cell, unsigned short *n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
......@@ -122,7 +122,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int Nid_cell,
if (n_idDMRS)
nid = n_idDMRS[nscid];
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
......
......@@ -37,10 +37,9 @@ int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch, int32_t *output );
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
......@@ -55,13 +54,11 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
void nr_gold_pbch(PHY_VARS_NR_UE* ue);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned int Nid_cell,
unsigned short n_idDMRS,
unsigned short length_dmrs);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short lbar,
unsigned int Nid_cell,
unsigned short *n_idDMRS,
unsigned short length_dmrs);
......
......@@ -51,10 +51,16 @@
#define PSS_SC_START_NR (52) /* see from TS 38.211 table 7.4.3.1-1: Resources within an SS/PBCH block for PSS... */
/* define ofdm symbol offset in the SS/PBCH block of NR synchronisation */
#define PSS_SYMBOL_NB (4) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB (5)
#define SSS_SYMBOL_NB (6)
#define PBCH_LAST_SYMBOL_NB (7)
#ifdef NR_UNIT_TEST
#define OFFSET_SS_PBCH (0)
#else
#define OFFSET_SS_PBCH (4)
#endif
#define PSS_SYMBOL_NB ((0) + OFFSET_SS_PBCH) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB ((1) + OFFSET_SS_PBCH)
#define SSS_SYMBOL_NB ((2) + OFFSET_SS_PBCH)
#define PBCH_LAST_SYMBOL_NB ((3) + OFFSET_SS_PBCH)
/* SS/PBCH parameters */
#define N_RB_SS_PBCH_BLOCK (20)
......
......@@ -219,6 +219,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t nushift;
uint8_t *xbyte = pbch->pbch_a;
memset((void*) xbyte, 0, 1);
uint8_t pbch_a_b[32];
LOG_I(PHY, "PBCH generation started\n");
......@@ -281,6 +282,10 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
printf("pbch_a_prime[%d]: 0x%02x\n", i, pbch->pbch_a_prime[i]);
#endif
for (int m=0;m<32;m++){
pbch_a_b[m] = ((pbch->pbch_a_prime[m/8]>>(m&7))&01);
//printf("pbch_a_b[%d] %d\n", m, pbch_a_b[m] );
}
/// CRC, coding and rate matching
polar_encoder (pbch->pbch_a_prime, pbch->pbch_e, &frame_parms->pbch_polar_params);
......
......@@ -113,12 +113,12 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("pbch ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
//if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
......@@ -214,7 +214,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
}
//}
}
......@@ -257,7 +257,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d cell_id %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,Nid_cell,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
......@@ -266,7 +266,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fr = filt16a_r1;
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,symbol, nb_rb_coreset);
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
......@@ -279,12 +279,12 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
multadd_complex_vector_real_scalar(dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
//#ifdef DEBUG_CH
printf("pdcch ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
//#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
......
This diff is collapsed.
......@@ -4815,6 +4815,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
}
}
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Ending function nr_extract_dci_info()\n");
#endif
......@@ -6934,7 +6935,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES])
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted)
{
/*
* Note only format0_0 and format1_0 are implemented
......@@ -6946,7 +6948,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL,*ulsch1=NULL;
NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
//NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
uint8_t status=0,left_shift=0;
uint64_t pdu_bitmap = 0xFFFFFFFFFFFFFFFF;
pdu_bitmap = (pdu_bitmap << (64 - dci_length)) >> (64 - dci_length); // this variable will help to remove the bits of other fields when left-switching
......@@ -6955,15 +6957,15 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
dlsch0->active = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15] != 0) { // 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format-15];
nr_dci_info_extracted.harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
nr_dci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted.harq_process_number);
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted->harq_process_number);
#endif
}
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted.harq_process_number];
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted->harq_process_number];
ulsch0 = ulsch;
/* printf("nr_dci_info_extracted.harq_process_number = %d\n",nr_dci_info_extracted.harq_process_number);
printf("dlsch0 = %d\n",dlsch0);
......
......@@ -47,6 +47,7 @@
extern openair0_config_t openair0_cfg[];
static nfapi_nr_config_request_t config_t;
static nfapi_nr_config_request_t* config =&config_t;
int cnt=0;
/* forward declarations */
void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
......@@ -54,7 +55,7 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
int nr_pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
{
printf("nr pbch detec RB_DL %d\n", ue->frame_parms.N_RB_DL);
uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
char phich_resource[6];
......@@ -174,9 +175,10 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
// LOG_I(PHY,"**************************************************************\n");
// First try FDD normal prefix
frame_parms->Ncp=NORMAL;
frame_parms->frame_type=FDD;
frame_parms->frame_type=TDD;
set_default_frame_parms_single(config,frame_parms);
nr_init_frame_parms_ue(config,frame_parms);
nr_init_frame_parms_ue(frame_parms);
printf("nr_initial sync ue RB_DL %d\n", ue->frame_parms.N_RB_DL);
/*
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
exit(-1);
......@@ -194,7 +196,9 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
* --------------------------
* sync_pos SS/PBCH block
*/
cnt++;
if (cnt >100){
cnt =0;
/* process pss search on received buffer */
sync_pos = pss_synchro_nr(ue, NO_RATE_CHANGE);
......@@ -211,7 +215,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
else
ue->rx_offset = FRAME_LENGTH_COMPLEX_SAMPLES + sync_pos2 - sync_pos_slot;
printf("sync_pos %d sync_pos_slot %d rx_offset\n",sync_pos,sync_pos_slot, ue->rx_offset);
printf("sync_pos %d sync_pos_slot %d rx_offset %d\n",sync_pos,sync_pos_slot, ue->rx_offset);
// write_output("rxdata1.m","rxd1",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
......@@ -234,6 +238,11 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
nr_gold_pbch(ue);
ret = nr_pbch_detection(ue,mode);
nr_gold_pdcch(ue,0, 2);
nr_slot_fep(ue,0, 0, ue->rx_offset, 1, 1, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->rx_offset, 1, 1, NR_PDCCH_EST);
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
ue->Mod_id,
......@@ -254,6 +263,10 @@ LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %
LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
#endif
}
}
else {
ret = -1;
}
/* Consider this is a false detection if the offset is > 1000 Hz */
if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
......
......@@ -486,11 +486,11 @@ void nr_pbch_quantize(int8_t *pbch_llr8,
uint16_t i;
for (i=0; i<len; i++) {
/*if (pbch_llr[i]>7)
pbch_llr8[i]=7;
else if (pbch_llr[i]<-8)
pbch_llr8[i]=-8;
else*/
if (pbch_llr[i]>127)
pbch_llr8[i]=127;
else if (pbch_llr[i]<-128)
pbch_llr8[i]=-128;
else
pbch_llr8[i] = (char)(pbch_llr[i]);
}
......@@ -696,14 +696,27 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//#ifdef DEBUG_PBCH
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder_output[%d] = %x\n",i,decoded_output[i]);
//printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
}
//#endif
ue->dl_indication.rx_ind.rx_request_body.pdu_index = FAPI_NR_RX_PDU_BCCH_BCH_TYPE;
ue->dl_indication.rx_ind.rx_request_body.pdu_length = 3;
ue->dl_indication.rx_ind.rx_request_body.pdu = &decoded_output[0];
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[1];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = decoded_output[0];
ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->if_inst->dl_indication(&ue->dl_indication);
return 0;
}
......@@ -1352,24 +1352,6 @@ int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void generate_pcfich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void pcfich_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
int16_t *d);
uint8_t rx_pcfich(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
NR_UE_PDCCH *lte_ue_pdcch_vars,
MIMO_mode_t mimo_mode);
void generate_phich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void init_transport_channels(uint8_t);
void generate_RIV_tables(void);
......@@ -1381,7 +1363,7 @@ void generate_RIV_tables(void);
parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.)
@param phy_vars_ue Pointer to UE variables
*/
int initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
/*!
......
......@@ -282,6 +282,12 @@ typedef struct {
uint32_t G;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current RB allocation (even slots)
......
......@@ -369,7 +369,7 @@ void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
assert(0);
}
size = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
size = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
q = malloc16(size);
if (q != NULL) {
pss_corr_ue[i] = q;
......@@ -578,7 +578,7 @@ void restore_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_ch
void decimation_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change, int **rxdata)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
int samples_for_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
#if TEST_SYNCHRO_TIMING_PSS
......@@ -631,7 +631,7 @@ int pss_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change)
#ifdef DBG_PSS_NR