Commit 21f66094 authored by Robert Schmidt's avatar Robert Schmidt

FlexRAN: move slice param verification to agent

- until now, on every iteration, the scheduler checked for changed parameter
  (and verified some)
- this functionality moves to the FlexRAN Agent, which verifies all parameters
  * individually, e.g. Max MCS <= 28 for DL
  * group-based, e.g. the sum of slice percentages is <= 100
- slice configuration changes are only applied if all verifications pass
- it is assumed in the scheduler, that configuration passed from outside is
  correct and can be used "as-is"

fix accounting setting
parent 6b3dd871
......@@ -870,6 +870,7 @@ add_library(FLEXRAN_AGENT
${OPENAIR2_DIR}/ENB_APP/flexran_agent_net_comm.c
${OPENAIR2_DIR}/ENB_APP/flexran_agent_async.c
${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/MAC/flexran_agent_mac_internal.c
${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/MAC/flexran_agent_mac_slice_verification.c
)
set(FLEXRAN_AGENT_LIB FLEXRAN_AGENT)
#include_directories(${OPENAIR2_DIR}/ENB_APP)
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file flexran_agent_mac_slice_verification.h
* \brief MAC Agent slice verification helper functions
* \author Robert Schmidt
* \date 2018
* \version 0.1
*/
#include "flexran_agent_common_internal.h"
#include "flexran_agent_mac_internal.h"
int flexran_verify_dl_slice(mid_t mod_id, Protocol__FlexDlSlice *dls);
int flexran_verify_group_dl_slices(mid_t mod_id, Protocol__FlexDlSlice **existing,
int n_ex, Protocol__FlexDlSlice **update, int n_up);
int flexran_verify_ul_slice(mid_t mod_id, Protocol__FlexUlSlice *uls);
int flexran_verify_group_ul_slices(mid_t mod_id, Protocol__FlexUlSlice **existing,
int n_ex, Protocol__FlexUlSlice **update, int n_up);
......@@ -414,193 +414,7 @@ schedule_dlsch(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, in
slice_info_t *sli = &RC.mac[module_idP]->slice_info;
memset(sli->rballoc_sub, 0, sizeof(sli->rballoc_sub));
sli->tot_pct_dl = 0;
sli->avg_pct_dl = 1.0 / sli->n_dl;
//sli->slice_counter = sli->n_dl;
for (i = 0; i < sli->n_dl; i++) {
if (sli->dl[i].pct < 0) {
LOG_W(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: invalid percentage %f. resetting to zero",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].pct);
sli->dl[i].pct = 0;
}
sli->tot_pct_dl += sli->dl[i].pct;
}
// Check for *intra*slice share activation
if (sli->intraslice_share_active_current != sli->intraslice_share_active) {
if (sli->intraslice_share_active != 1 && sli->intraslice_share_active != 0) {
LOG_W(MAC,
"[eNB %d][DL] frame %d subframe %d: invalid intraslice sharing status (%d), revert to its previous value (%d)\n",
module_idP, frameP, subframeP, sli->intraslice_share_active, sli->intraslice_share_active_current);
sli->intraslice_share_active = sli->intraslice_share_active_current;
} else {
LOG_N(MAC, "[eNB %d][DL] frame %d subframe %d: intraslice sharing status has changed (%x-->%x)\n",
module_idP, frameP, subframeP, sli->intraslice_share_active_current, sli->intraslice_share_active);
sli->intraslice_share_active_current = sli->intraslice_share_active;
}
}
// Check for *inter*slice share activation
if (sli->interslice_share_active_current != sli->interslice_share_active) {
if (sli->interslice_share_active != 1 && sli->interslice_share_active != 0) {
LOG_W(MAC,
"[eNB %d][DL] frame %d subframe %d: invalid interslice sharing status (%d), revert to its previous value (%d)\n",
module_idP, frameP, subframeP, sli->interslice_share_active, sli->interslice_share_active_current);
sli->interslice_share_active = sli->interslice_share_active_current;
} else {
LOG_N(MAC, "[eNB %d][DL] frame %d subframe %d: interslice sharing status has changed (%x-->%x)\n",
module_idP, frameP, subframeP, sli->interslice_share_active_current, sli->interslice_share_active);
sli->interslice_share_active_current = sli->interslice_share_active;
}
}
for (i = 0; i < sli->n_dl; i++) {
// Load any updated functions
if (sli->dl[i].update_sched > 0) {
sli->dl[i].sched_cb = dlsym(NULL, sli->dl[i].sched_name);
sli->dl[i].update_sched = 0;
sli->dl[i].update_sched_current = 0;
LOG_I(MAC, "update dl scheduler (%s) slice index %d ID %d\n",
sli->dl[i].sched_name, i, sli->dl[i].id);
}
if (sli->tot_pct_dl <= 1.0) { // the new total RB share is within the range
// check if the number of slices has changed, and log
if (sli->n_dl_current != sli->n_dl) {
if ((sli->n_dl > 0) && (sli->n_dl <= MAX_NUM_SLICES)) {
LOG_I(MAC, "[eNB %d]frame %d subframe %d: number of active DL slices has changed: %d-->%d\n",
module_idP, frameP, subframeP, sli->n_dl_current, sli->n_dl);
sli->n_dl_current = sli->n_dl;
} else {
LOG_W(MAC, "invalid number of DL slices %d, revert to the previous value %d\n",
sli->n_dl, sli->n_dl_current);
sli->n_dl = sli->n_dl_current;
}
}
// check if the slice rb share has changed, and log the console
if (sli->dl[i].pct_current != sli->dl[i].pct) { // new slice percentage
LOG_I(MAC,
"[eNB %d][SLICE %d][DL] frame %d subframe %d: total percentage %f-->%f, slice RB percentage has changed: %f-->%f\n",
module_idP, sli->dl[i].id, frameP, subframeP,
sli->tot_pct_dl_current, sli->tot_pct_dl,
sli->dl[i].pct_current, sli->dl[i].pct);
sli->tot_pct_dl_current = sli->tot_pct_dl;
sli->dl[i].pct_current = sli->dl[i].pct;
}
// check if the slice max MCS, and log the console
if (sli->dl[i].maxmcs_current != sli->dl[i].maxmcs) {
if ((sli->dl[i].maxmcs >= 0) && (sli->dl[i].maxmcs < 29)) {
LOG_I(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n",
module_idP, sli->dl[i].id, frameP, subframeP,
sli->dl[i].maxmcs_current, sli->dl[i].maxmcs);
sli->dl[i].maxmcs_current = sli->dl[i].maxmcs;
} else {
LOG_W(MAC, "[eNB %d][SLICE %d][DL] invalid slice max mcs %d, revert the previous value %d\n",
module_idP, sli->dl[i].id, sli->dl[i].maxmcs, sli->dl[i].maxmcs_current);
sli->dl[i].maxmcs = sli->dl[i].maxmcs_current;
}
}
// check if a new scheduler, and log the console
if (sli->dl[i].update_sched_current != sli->dl[i].update_sched) {
LOG_I(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: DL scheduler for this slice is updated: %s \n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].sched_name);
sli->dl[i].update_sched_current = sli->dl[i].update_sched;
}
} else {
// here we can correct the values, e.g. reduce proportionally
if (sli->n_dl == sli->n_dl_current) {
LOG_W(MAC,
"[eNB %d][SLICE %d][DL] invalid total RB share (%f->%f), reduce proportionally the RB share by 0.1\n",
module_idP, sli->dl[i].id, sli->tot_pct_dl_current, sli->tot_pct_dl);
if (sli->dl[i].pct >= sli->avg_pct_dl) {
sli->dl[i].pct -= 0.1;
sli->tot_pct_dl -= 0.1;
}
} else {
LOG_W(MAC,
"[eNB %d][SLICE %d][DL] invalid total RB share (%f->%f), revert the number of slice to its previous value (%d->%d)\n",
module_idP, sli->dl[i].id, sli->tot_pct_dl_current, sli->tot_pct_dl,
sli->n_dl, sli->n_dl_current);
sli->n_dl = sli->n_dl_current;
sli->dl[i].pct = sli->dl[i].pct_current;
}
}
// Check for new slice positions
if (sli->dl[i].pos_low > sli->dl[i].pos_high ||
sli->dl[i].pos_low < 0 ||
sli->dl[i].pos_high > N_RBG_MAX) {
LOG_W(MAC, "[eNB %d][SLICE %d][DL] invalid slicing position (%d-%d), using previous values (%d-%d)\n",
module_idP, sli->dl[i].id,
sli->dl[i].pos_low, sli->dl[i].pos_high,
sli->dl[i].pos_low_current, sli->dl[i].pos_high_current);
sli->dl[i].pos_low = sli->dl[i].pos_low_current;
sli->dl[i].pos_high = sli->dl[i].pos_high_current;
} else {
if (sli->dl[i].pos_low_current != sli->dl[i].pos_low) {
LOG_N(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: start frequency has changed (%d-->%d)\n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].pos_low_current, sli->dl[i].pos_low);
sli->dl[i].pos_low_current = sli->dl[i].pos_low;
}
if (sli->dl[i].pos_high_current != sli->dl[i].pos_high) {
LOG_N(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: end frequency has changed (%d-->%d)\n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].pos_high_current, sli->dl[i].pos_high);
sli->dl[i].pos_high_current = sli->dl[i].pos_high;
}
}
// Check for new sorting policy
if (sli->dl[i].sorting_current != sli->dl[i].sorting) {
LOG_I(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: UE sorting policy has changed (%x-->%x)\n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].sorting_current, sli->dl[i].sorting);
sli->dl[i].sorting_current = sli->dl[i].sorting;
}
// Check for new slice isolation
if (sli->dl[i].isol_current != sli->dl[i].isol) {
if (sli->dl[i].isol != 1 && sli->dl[i].isol != 0) {
LOG_W(MAC,
"[eNB %d][SLICE %d][DL] frame %d subframe %d: invalid slice isolation setting (%d), revert to its previous value (%d)\n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].isol, sli->dl[i].isol_current);
sli->dl[i].isol = sli->dl[i].isol_current;
} else {
LOG_I(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: slice isolation setting has changed (%x-->%x)\n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].isol_current, sli->dl[i].isol);
sli->dl[i].isol_current = sli->dl[i].isol;
}
}
// Check for new slice priority
if (sli->dl[i].prio_current != sli->dl[i].prio) {
LOG_I(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: slice priority setting has changed (%d-->%d)\n",
module_idP, sli->dl[i].id, frameP, subframeP, sli->dl[i].prio_current, sli->dl[i].prio);
sli->dl[i].prio_current = sli->dl[i].prio;
}
// Check for new accounting policy
if (sli->dl[i].accounting_current != sli->dl[i].accounting) {
if (sli->dl[i].accounting > 1 || sli->dl[i].accounting < 0) {
LOG_W(MAC,
"[eNB %d][SLICE %d][DL] frame %d subframe %d: invalid accounting policy (%d), revert to its previous value (%d)\n",
module_idP, sli->dl[i].id, frameP, subframeP,
sli->dl[i].accounting, sli->dl[i].accounting_current);
sli->dl[i].accounting = sli->dl[i].accounting_current;
} else {
LOG_N(MAC, "[eNB %d][SLICE %d][DL] frame %d subframe %d: UE sorting policy has changed (%x-->%x)\n",
module_idP, sli->dl[i].id, frameP, subframeP,
sli->dl[i].accounting_current, sli->dl[i].accounting);
sli->dl[i].accounting_current = sli->dl[i].accounting;
}
}
// Run each enabled slice-specific schedulers one by one
sli->dl[i].sched_cb(module_idP, i, frameP, subframeP, mbsfn_flag/*, dl_info*/);
}
......
......@@ -1038,112 +1038,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
}
}
// perform slice-specifc operations
sli->tot_pct_ul = 0;
sli->avg_pct_ul = 1.0 / sli->n_ul;
for (i = 0; i < sli->n_ul; i++) {
if (sli->ul[i].pct < 0 ){
LOG_W(MAC,
"[eNB %d][SLICE %d][UL] frame %d subframe %d: invalid percentage %f. resetting to zero",
module_idP, sli->ul[i].id, frameP, subframeP, sli->ul[i].pct);
sli->ul[i].pct = 0;
}
sli->tot_pct_ul += sli->ul[i].pct;
}
for (i = 0; i < sli->n_ul; i++) {
// Load any updated functions
if (sli->ul[i].update_sched > 0 ) {
sli->ul[i].sched_cb = dlsym(NULL, sli->ul[i].sched_name);
sli->ul[i].update_sched = 0;
sli->ul[i].update_sched_current = 0;
//sli->ul[i].pct_current = sli->ul[i].pct;
//sli->tot_pct_ul_current += sli->ul[i].pct;
//if (sli->tot_pct_ul_current > 1)
//sli->tot_pct_ul_current = 1;
LOG_I(MAC,"update ul scheduler (%s) slice index %d ID %d\n",
sli->ul[i].sched_name, i, sli->ul[i].id);
}
// the new total RB share is within the range
if (sli->tot_pct_ul <= 1.0){
// check if the number of slices has changed, and log
if (sli->n_ul_current != sli->n_ul ){
if ((sli->n_ul > 0) && (sli->n_ul <= MAX_NUM_SLICES)) {
LOG_I(MAC,"[eNB %d]frame %d subframe %d: number of active UL slices has changed: %d-->%d\n",
module_idP, frameP, subframeP, sli->n_ul_current, sli->n_ul);
sli->n_ul_current = sli->n_ul;
} else {
LOG_W(MAC,"invalid number of UL slices %d, revert to the previous value %d\n",
sli->n_ul, sli->n_ul_current);
sli->n_ul = sli->n_ul_current;
}
}
// check if the slice rb share has changed, and log the console
if (sli->ul[i].pct_current != sli->ul[i].pct){
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: total percentage %f-->%f, slice RB percentage has changed: %f-->%f\n",
module_idP, sli->ul[i].id, frameP, subframeP, sli->tot_pct_ul_current,
sli->tot_pct_ul, sli->ul[i].pct_current, sli->ul[i].pct);
sli->tot_pct_ul_current = sli->tot_pct_ul;
sli->ul[i].pct_current = sli->ul[i].pct;
}
// check if the slice max MCS, and log the console
if (sli->ul[i].maxmcs_current != sli->ul[i].maxmcs){
if ((sli->ul[i].maxmcs >= 0) && (sli->ul[i].maxmcs <= 20)){
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice MAX MCS has changed: %d-->%d\n",
module_idP, sli->ul[i].id, frameP, subframeP,
sli->ul[i].maxmcs_current, sli->ul[i].maxmcs);
sli->ul[i].maxmcs_current = sli->ul[i].maxmcs;
} else {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice max mcs %d, revert the previous value %d\n",
module_idP, sli->ul[i].id, sli->ul[i].maxmcs, sli->ul[i].maxmcs_current);
sli->ul[i].maxmcs = sli->ul[i].maxmcs_current;
}
}
if (sli->ul[i].first_rb_current != sli->ul[i].first_rb){
if (sli->ul[i].first_rb >= 0){ // FIXME: Max limit is checked in the scheduler
LOG_N(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: slice first rb has changed: %d-->%d\n",
module_idP, sli->ul[i].id, frameP, subframeP,
sli->ul[i].first_rb_current, sli->ul[i].first_rb);
sli->ul[i].first_rb_current = sli->ul[i].first_rb;
} else {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid slice first rb %d, revert the previous value %d\n",
module_idP, sli->ul[i].id, sli->ul[i].first_rb,
sli->ul[i].first_rb_current);
sli->ul[i].first_rb = sli->ul[i].first_rb_current;
}
}
// check if a new scheduler, and log the console
if (sli->ul[i].update_sched_current != sli->ul[i].update_sched) {
LOG_I(MAC,"[eNB %d][SLICE %d][UL] frame %d subframe %d: UL scheduler for this slice is updated: %s \n",
module_idP, sli->ul[i].id, frameP, subframeP, sli->ul[i].sched_name);
sli->ul[i].update_sched_current = sli->ul[i].update_sched;
}
} else {
if (sli->n_ul == sli->n_ul_current) {
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), reduce proportionally the RB share by 0.1\n",
module_idP, sli->ul[i].id, sli->tot_pct_ul_current, sli->tot_pct_ul);
if (sli->ul[i].pct > sli->avg_pct_ul) {
sli->ul[i].pct -= 0.1;
sli->tot_pct_ul -= 0.1;
}
} else {
// here we can correct the values, e.g. reduce proportionally
LOG_W(MAC,"[eNB %d][SLICE %d][UL] invalid total RB share (%f->%f), revert the number of slice to its previous value (%d->%d)\n",
module_idP, sli->ul[i].id, sli->tot_pct_ul_current,
sli->tot_pct_ul, sli->n_ul, sli->n_ul_current);
sli->n_ul = sli->n_ul_current;
sli->ul[i].pct = sli->ul[i].pct_current;
}
}
// Run each enabled slice-specific schedulers one by one
sli->ul[i].sched_cb(module_idP, i, frameP, subframeP, sched_subframe, first_rb);
}
......
......@@ -1151,38 +1151,29 @@ typedef void (*slice_scheduler_dl)(module_id_t mod_id,
typedef struct {
slice_id_t id;
/// RB share for each slice for past and current time
/// RB share for each slice
float pct;
float pct_current;
/// whether this slice is isolated from the others for past and current time
/// whether this slice is isolated from the others
int isol;
int isol_current;
int prio;
int prio_current;
/// Frequency ranges for slice positioning
int pos_low;
int pos_high;
int pos_low_current;
int pos_high_current;
// max mcs for each slice for past and current time
// max mcs for each slice
int maxmcs;
int maxmcs_current;
/// criteria for sorting policies of the slices
uint32_t sorting;
uint32_t sorting_current;
/// Accounting policy (just greedy(1) or fair(0) setting for now)
int accounting;
int accounting_current;
/// Whether the scheduler callback should be updated
int update_sched;
int update_sched_current;
/// name of available scheduler
char *sched_name;
......@@ -1202,25 +1193,20 @@ typedef void (*slice_scheduler_ul)(module_id_t mod_id,
typedef struct {
slice_id_t id;
/// RB share for each slice for past and current time
/// RB share for each slice
float pct;
float pct_current;
// MAX MCS for each slice for past and current time
// MAX MCS for each slice
int maxmcs;
int maxmcs_current;
/// criteria for sorting policies of the slices
uint32_t sorting;
uint32_t sorting_current;
/// starting RB (RB offset) of UL scheduling
int first_rb;
int first_rb_current;
/// Slice scheduler callback update needed
int update_sched;
int update_sched_current;
/// name of available scheduler
char *sched_name;
......@@ -1238,28 +1224,16 @@ typedef struct {
/// indicates whether remaining RBs after first intra-slice allocation will
/// be allocated to UEs of the same slice
int intraslice_share_active;
int intraslice_share_active_current;
/// indicates whether remaining RBs after slice allocation will be
/// allocated to UEs of another slice. Isolated slices will be ignored
int interslice_share_active;
int interslice_share_active_current;
/// number of active slices for past and current time in DL
/// number of active DL slices
int n_dl;
int n_dl_current;
/// RB share stats for DL
float tot_pct_dl;
float tot_pct_dl_current;
float avg_pct_dl;
slice_sched_conf_dl_t dl[MAX_NUM_SLICES];
/// number of active slices for past and current time in UL
/// number of active UL slices
int n_ul;
int n_ul_current;
/// RB share stats for UL
float tot_pct_ul;
float tot_pct_ul_current;
float avg_pct_ul;
slice_sched_conf_ul_t ul[MAX_NUM_SLICES];
pre_processor_results_t pre_processor_results[MAX_NUM_SLICES];
......
......@@ -138,44 +138,24 @@ void mac_top_init_eNB(void)
sli = &mac->slice_info;
sli->intraslice_share_active = 1;
sli->intraslice_share_active_current = 1;
sli->interslice_share_active = 1;
sli->interslice_share_active_current = 1;
sli->n_dl = 1;
sli->n_dl_current = 1;
sli->tot_pct_dl = 1;
sli->tot_pct_dl_current = 1;
sli->avg_pct_dl = 0.25;
memset(sli->dl, 0, sizeof(slice_sched_conf_dl_t) * MAX_NUM_SLICES);
sli->dl[0].pct = 1.0;
sli->dl[0].pct_current = 1.0;
sli->dl[0].prio = 10;
sli->dl[0].prio_current = 10;
sli->dl[0].pos_high = N_RBG_MAX;
sli->dl[0].pos_high_current = N_RBG_MAX;
sli->dl[0].maxmcs = 28;
sli->dl[0].maxmcs_current = 28;
sli->dl[0].sorting = 0x012345;
sli->dl[0].sorting_current = 0x012345;
sli->dl[0].update_sched = 1;
sli->dl[0].update_sched_current = 1;
sli->dl[0].sched_name = "schedule_ue_spec";
sli->n_ul = 1;
sli->n_ul_current = 1;
sli->tot_pct_ul = 1;
sli->tot_pct_ul_current = 1;
sli->avg_pct_ul = 0.25;
memset(sli->ul, 0, sizeof(slice_sched_conf_ul_t) * MAX_NUM_SLICES);
sli->ul[0].pct = 1.0;
sli->ul[0].pct_current = 1.0;
sli->ul[0].maxmcs = 20;
sli->ul[0].maxmcs_current = 20;
sli->ul[0].sorting = 0x0123;
sli->ul[0].sorting_current = 0x0123;
sli->ul[0].update_sched = 1;
sli->ul[0].update_sched_current = 1;
sli->ul[0].sched_name = "schedule_ulsch_rnti";
}
......
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