Commit 22367109 authored by David Price's avatar David Price

Change +4 for tx to a variable and get it to run at +2, this alllows nFAPI to...

Change +4 for tx to a variable and get it to run at +2, this alllows nFAPI to get the reply back for HI_DCI0 to generate the PHICH in time
parent 7a577094
......@@ -291,6 +291,7 @@ int vnf_unpack_vendor_extension_tlv(nfapi_tl_t* tl, uint8_t **ppReadPackedMessag
void install_schedule_handlers(IF_Module_t *if_inst);
extern int single_thread_flag;
extern void init_eNB_afterRU(void);
extern uint16_t sf_ahead;
void oai_create_enb(void)
{
......@@ -512,7 +513,7 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf)
}
#endif
// wake up TX for subframe n+4
// wake up TX for subframe n+sf_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&proc_rxtx->mutex_rxtx,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", proc_rxtx->subframe_rx&1,proc_rxtx->instance_cnt_rxtx );
......@@ -542,13 +543,13 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf)
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
// transmitted timestamp of the next TX slot (first).
// The last (TS_rx mod samples_per_frame) was n*samples_per_tti,
// we want to generate subframe (n+4), so TS_tx = TX_rx+4*samples_per_tti,
// and proc->subframe_tx = proc->subframe_rx+4
proc_rxtx->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_tti);
// we want to generate subframe (n+N), so TS_tx = TX_rx+N*samples_per_tti,
// and proc->subframe_tx = proc->subframe_rx+sf_ahead
proc_rxtx->timestamp_tx = proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx->frame_rx = proc->frame_rx;
proc_rxtx->subframe_rx = proc->subframe_rx;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > 5) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + 4)%10;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > (9-sf_ahead)) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + sf_ahead)%10;
LOG_E(PHY, "sfn/sf:%d:%d proc[frame_rx:%d subframe_rx:%d timestamp_rx:%ld timestamp_tx:%ld] proc_rxtx[instance_cnt_rxtx:%d frame_rx:%d subframe_rx:%d]\n", sfn, sf, proc->frame_rx, proc->subframe_rx, proc->timestamp_rx, proc->timestamp_tx, proc_rxtx->instance_cnt_rxtx, proc_rxtx->frame_rx, proc_rxtx->subframe_rx);
......
This diff is collapsed.
......@@ -832,8 +832,7 @@ int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
AssertFatal(eNB->dlsch[i]!=NULL,"eNB->dlsch[%d] is null\n",i);
AssertFatal(eNB->dlsch[i]!=NULL,"eNB->dlsch[%d][0] is null\n",i);
LOG_D(PHY,"searching for rnti %x : UE index %d=> harq_mask %x, rnti %x, first_free_index %d\n",
rnti,i,eNB->dlsch[i][0]->harq_mask,eNB->dlsch[i][0]->rnti,first_free_index);
//LOG_D(PHY,"searching for rnti %x : UE index %d=> harq_mask %x, rnti %x, first_free_index %d\n", rnti,i,eNB->dlsch[i][0]->harq_mask,eNB->dlsch[i][0]->rnti,first_free_index);
if ((eNB->dlsch[i][0]->harq_mask >0) &&
(eNB->dlsch[i][0]->rnti==rnti)) return i;
else if ((eNB->dlsch[i][0]->harq_mask == 0) && (first_free_index==-1)) first_free_index=i;
......
......@@ -615,7 +615,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
eNB->pdcch_vars[subframe&1].num_dci = number_dci;
eNB->phich_vars[subframe&1].num_hi = 0;
LOG_D(PHY,"NFAPI: Frame %d, Subframe %d: received %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config num_pdcch_symbols:%d\n",
LOG_D(PHY,"NFAPI: Sched_INFO[Frame %d, Subframe %d]: %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config num_pdcch_symbols:%d\n",
frame,subframe,number_dl_pdu,TX_req->tx_request_body.number_of_pdus,number_hi_dci0_pdu,number_ul_pdu,
eNB->pdcch_vars[subframe&1].num_pdcch_symbols
);
......
......@@ -552,11 +552,11 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_PHICH,0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_PHICH,1);
generate_phich_top(eNB,
proc,
AMP);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_PHICH,1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_PHICH,0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,0);
if (do_meas==1) stop_meas(&eNB->phy_proc_tx);
......
......@@ -74,9 +74,12 @@ void feptx0(RU_t *ru,int slot) {
((fp->Ncp==1) ? 6 : 7);
int subframe = ru->proc.subframe_tx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 1 );
slot_offset = subframe*fp->samples_per_tti + (slot*(fp->samples_per_tti>>1));
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
//LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d\n",ru->proc.frame_tx, ru->proc.subframe_tx,slot);
for (aa=0; aa<ru->nb_tx; aa++) {
if (fp->Ncp == EXTENDED) PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
......@@ -132,6 +135,7 @@ void feptx0(RU_t *ru,int slot) {
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 0);
}
static void *feptx_thread(void *param) {
......@@ -359,6 +363,10 @@ void feptx_prec(RU_t *ru) {
eNB = eNB_list[0];
fp = &eNB->frame_parms;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 1);
//LOG_D(PHY, "%s() subframe:%d\n", __FUNCTION__, subframe);
if (0) LOG_E(PHY,"%s() run->nb_tx:%u subframe:%u fp->symbols_per_tti:%u fp->ofdm_symbol_size:%u symbols:(%d, %d), (%d,%d)\n",
__FUNCTION__, ru->nb_tx, subframe, fp->symbols_per_tti, fp->ofdm_symbol_size,
((short*)&eNB->common_vars.txdataF[0][1])[0],
......@@ -371,6 +379,8 @@ void feptx_prec(RU_t *ru) {
memcpy((void*)ru->common.txdataF_BF[aa],
(void*)&eNB->common_vars.txdataF[aa][subframe*fp->symbols_per_tti*fp->ofdm_symbol_size],
fp->symbols_per_tti*fp->ofdm_symbol_size*sizeof(int32_t));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC , 0);
}
else {
for (i=0;i<ru->num_eNB;i++) {
......@@ -406,6 +416,8 @@ void fep0(RU_t *ru,int slot) {
// printf("fep0: slot %d\n",slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+slot, 1);
remove_7_5_kHz(ru,(slot&1)+(proc->subframe_rx<<1));
for (l=0; l<fp->symbols_per_tti/2; l++) {
slot_fep_ul(ru,
......@@ -414,6 +426,7 @@ void fep0(RU_t *ru,int slot) {
0
);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+slot, 0);
}
......
......@@ -63,6 +63,7 @@
#include "T.h"
extern uint8_t nfapi_mode;
extern int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req);
void add_subframe(uint16_t *frameP, uint16_t *subframeP, int offset)
{
......@@ -210,6 +211,9 @@ void add_msg3(module_id_t module_idP,int CC_id, RA_TEMPLATE *RA_template, frame_
hi_dci0_req->sfn_sf = sfnsf_add_subframe(RA_template->Msg3_frame, RA_template->Msg3_subframe, 4);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
oai_nfapi_hi_dci0_req(hi_dci0_req);
hi_dci0_req_body->number_of_hi=0;
LOG_D(MAC, "MSG3: HI_DCI0 SFN/SF:%d number_of_dci:%d number_of_hi:%d\n", NFAPI_SFNSF2DEC(hi_dci0_req->sfn_sf), hi_dci0_req_body->number_of_dci, hi_dci0_req_body->number_of_hi);
// save UL scheduling information for preprocessor
......
......@@ -631,7 +631,7 @@ schedule_SI(
0); // not used in this case
if (bcch_sdu_length > 0) {
LOG_D(MAC,"[eNB %d] Frame %d subframe %d : BCCH->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,subframeP,CC_id,bcch_sdu_length);
//LOG_D(MAC,"[eNB %d] Frame %d subframe %d : BCCH->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,subframeP,CC_id,bcch_sdu_length);
// Allocate 4 PRBs in a random location
/*
......@@ -702,7 +702,7 @@ schedule_SI(
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(sizeof(nfapi_dl_config_dci_dl_pdu));
dl_req->number_dci++;
LOG_D(MAC, "%s() number_dci:%u\n", __FUNCTION__, dl_req->number_dci);
//LOG_D(MAC, "%s() number_dci:%u\n", __FUNCTION__, dl_req->number_dci);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_DCI_DL_PDU_REL8_TAG;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = 4;
......@@ -720,17 +720,16 @@ schedule_SI(
dl_config_request->header.message_id = NFAPI_DL_CONFIG_REQUEST;
dl_config_request->sfn_sf = sfn_sf;
LOG_D(MAC, "%s() mcs:%d bcch_sdu_length:%d N_RB_DL:%d first_rb:%d resource_block_coding:%d\n", __FUNCTION__, mcs, bcch_sdu_length, N_RB_DL, first_rb, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding);
//LOG_D(MAC, "%s() mcs:%d bcch_sdu_length:%d N_RB_DL:%d first_rb:%d resource_block_coding:%d\n", __FUNCTION__, mcs, bcch_sdu_length, N_RB_DL, first_rb, dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding);
if (!CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,SI_RNTI)) {
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
frameP,subframeP);
//LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n", frameP,subframeP);
dl_req->number_dci++;
dl_req->number_pdu++;
dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n", frameP,subframeP);
//LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n", frameP,subframeP);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
......@@ -786,7 +785,7 @@ schedule_SI(
eNB->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
eNB->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
if (frameP%100==0) LOG_D(MAC,"%s() TX_REQ: sfn_sf:%u pdus:%u pdu_length:%u pdu_index:%u segments:%u segment_length:%u\n",
if (0 && frameP%100==0) LOG_D(MAC,"%s() TX_REQ: sfn_sf:%u pdus:%u pdu_length:%u pdu_index:%u segments:%u segment_length:%u\n",
__FUNCTION__, NFAPI_SFNSF2DEC(eNB->TX_req[CC_id].sfn_sf), eNB->TX_req[CC_id].tx_request_body.number_of_pdus,
TX_req->pdu_length, TX_req->pdu_index, TX_req->num_segments, TX_req->segments[0].segment_length);
}
......@@ -815,7 +814,7 @@ schedule_SI(
bcch_sdu_length,
mcs);
} else {
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (FDD) for CC_id %d SI %d bytes (mcs %d, rb 3)\n",
if (0) LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (FDD) for CC_id %d SI %d bytes (mcs %d, rb 3)\n",
frameP,
CC_id,
bcch_sdu_length,
......
......@@ -538,7 +538,7 @@ schedule_ue_spec(
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
//LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
......@@ -585,8 +585,7 @@ schedule_ue_spec(
if ((ue_sched_ctl->pre_nb_available_rbs[CC_id] == 0) || // no RBs allocated
CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,aggregation,rnti)
) {
LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n",
module_idP, frameP, UE_id, CC_id);
//LOG_D(MAC,"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue \n", module_idP, frameP, UE_id, CC_id);
continue_flag=1; //to next user (there might be rbs availiable for other UEs in TM5
}
......
......@@ -1692,8 +1692,7 @@ unsigned char get_aggregation (uint8_t bw_index, uint8_t cqi, uint8_t dci_fmt)
LOG_W(MAC,"unsupported DCI format %d\n",dci_fmt);
}
LOG_D(MAC,"Aggregation level %d (cqi %d, bw_index %d, format %d)\n",
1<<aggregation, cqi,bw_index,dci_fmt);
//LOG_D(MAC,"Aggregation level %d (cqi %d, bw_index %d, format %d)\n", 1<<aggregation, cqi,bw_index,dci_fmt);
return 1<<aggregation;
}
......@@ -2700,7 +2699,7 @@ int allocate_CCEs(int module_idP,
int i,j,idci;
int nCCE=0;
LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",subframeP,test_onlyP,DL_req->number_pdu,DL_req->number_dci,HI_DCI0_req->number_of_dci);
//LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",subframeP,test_onlyP,DL_req->number_pdu,DL_req->number_dci,HI_DCI0_req->number_of_dci);
DL_req->number_pdcch_ofdm_symbols=1;
try_again:
......@@ -2712,7 +2711,7 @@ try_again:
if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
(dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti_type==2)
) {
LOG_D(MAC,"Trying to allocate COMMON DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
if (0) LOG_D(MAC,"Trying to allocate COMMON DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
idci,DL_req->number_dci+HI_DCI0_req->number_of_dci,
DL_req->number_dci,HI_DCI0_req->number_of_dci,
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
......@@ -2761,10 +2760,10 @@ try_again:
// the allocation is feasible, rnti rule passes
nCCE += dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
//LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
if (test_onlyP == 0) {
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx=fCCE;
LOG_D(MAC,"Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",subframeP,test_onlyP,dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,fCCE);
//LOG_D(MAC,"Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",subframeP,test_onlyP,dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,fCCE);
}
idci++;
}
......@@ -2838,7 +2837,7 @@ try_again:
// allocate DL UE specific DCIs
if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
(dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti_type==1)) {
LOG_D(MAC,"Trying to allocate DL UE-SPECIFIC DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
if (0)LOG_D(MAC,"Trying to allocate DL UE-SPECIFIC DCI %d/%d (%d,%d) : rnti %x, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
idci,DL_req->number_dci+HI_DCI0_req->number_of_dci,
DL_req->number_dci,HI_DCI0_req->number_of_dci,
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
......@@ -2887,10 +2886,10 @@ try_again:
// the allocation is feasible, rnti rule passes
nCCE += dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
//LOG_D(MAC,"Allocating at nCCE %d\n",fCCE);
if (test_onlyP == 0) {
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx=fCCE;
LOG_D(MAC,"Allocate CCEs subframe %d, test %d\n",subframeP,test_onlyP);
//LOG_D(MAC,"Allocate CCEs subframe %d, test %d\n",subframeP,test_onlyP);
}
idci++;
}
......
......@@ -891,7 +891,7 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
#endif
LOG_D(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
//LOG_D(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
// initialize harq_pid and round
if (ue_sched_ctl->ta_timer) ue_sched_ctl->ta_timer--;
......@@ -1014,11 +1014,11 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
for (j = 0; j < rb_size; j++) {
if (vrb_map[j+(i*RBGsize)] != 0) {
rballoc_sub[CC_id][i] = 1;
LOG_D(MAC,"Frame %d, subframe %d : vrb %d allocated\n",frameP,subframeP,j+(i*RBGsize));
//LOG_D(MAC,"Frame %d, subframe %d : vrb %d allocated\n",frameP,subframeP,j+(i*RBGsize));
break;
}
}
LOG_D(MAC,"Frame %d Subframe %d CC_id %d RBG %i : rb_alloc %d\n",frameP,subframeP,CC_id,i,rballoc_sub[CC_id][i]);
//LOG_D(MAC,"Frame %d Subframe %d CC_id %d RBG %i : rb_alloc %d\n",frameP,subframeP,CC_id,i,rballoc_sub[CC_id][i]);
MIMO_mode_indicator[CC_id][i] = 2;
}
}
......@@ -1124,7 +1124,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
}
LOG_D(MAC,"In ulsch_preprocessor: step2 \n");
//LOG_D(MAC,"In ulsch_preprocessor: step2 \n");
// step 2: calculate the average rb per UE
total_ue_count =0;
max_num_ue_to_be_scheduled=0;
......@@ -1142,11 +1142,11 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_id = i;
LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x\n",UE_id,rnti);
//LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x\n",UE_id,rnti);
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
// This is the actual CC_id in the list
CC_id = UE_list->ordered_ULCCids[n][UE_id];
LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x CCid %d\n",UE_id,rnti,CC_id);
//LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x CCid %d\n",UE_id,rnti,CC_id);
UE_template = &UE_list->UE_template[CC_id][UE_id];
average_rbs_per_user[CC_id]=0;
......@@ -1177,9 +1177,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
}
}
if (total_ue_count > 0)
LOG_D(MAC,"[eNB %d] Frame %d subframe %d: total ue to be scheduled %d/%d\n",
module_idP, frameP, subframeP,total_ue_count, max_num_ue_to_be_scheduled);
//if (total_ue_count > 0) LOG_D(MAC,"[eNB %d] Frame %d subframe %d: total ue to be scheduled %d/%d\n", module_idP, frameP, subframeP,total_ue_count, max_num_ue_to_be_scheduled);
//LOG_D(MAC,"step3\n");
......@@ -1209,7 +1207,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
total_allocated_rbs[CC_id]+= nb_allocated_rbs[CC_id][UE_id];
LOG_D(MAC,"In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",nb_allocated_rbs[CC_id][UE_id],UE_id,rnti,CC_id,harq_pid);
//LOG_D(MAC,"In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",nb_allocated_rbs[CC_id][UE_id],UE_id,rnti,CC_id,harq_pid);
}
}
......@@ -1245,8 +1243,8 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
} else {
UE_template->pre_allocated_nb_rb_ul= nb_allocated_rbs[CC_id][UE_id];
LOG_D(MAC,"******************UL Scheduling Information for UE%d CC_id %d ************************\n",UE_id, CC_id);
LOG_D(MAC,"[eNB %d] total RB allocated for UE%d CC_id %d = %d\n", module_idP, UE_id, CC_id, UE_template->pre_allocated_nb_rb_ul);
//LOG_D(MAC,"******************UL Scheduling Information for UE%d CC_id %d ************************\n",UE_id, CC_id);
//LOG_D(MAC,"[eNB %d] total RB allocated for UE%d CC_id %d = %d\n", module_idP, UE_id, CC_id, UE_template->pre_allocated_nb_rb_ul);
}
}
}
......@@ -1255,7 +1253,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if (total_allocated_rbs[CC_id]>0) {
LOG_D(MAC,"[eNB %d] total RB allocated for all UEs = %d/%d\n", module_idP, total_allocated_rbs[CC_id], N_RB_UL - first_rb[CC_id]);
//LOG_D(MAC,"[eNB %d] total RB allocated for all UEs = %d/%d\n", module_idP, total_allocated_rbs[CC_id], N_RB_UL - first_rb[CC_id]);
}
}
}
......
......@@ -15,6 +15,7 @@ extern int oai_nfapi_crc_indication(nfapi_crc_indication_t *crc_ind);
extern int oai_nfapi_cqi_indication(nfapi_cqi_indication_t *cqi_ind);
extern int oai_nfapi_rx_ind(nfapi_rx_indication_t *ind);
extern uint8_t nfapi_mode;
extern uint16_t sf_ahead;
void handle_rach(UL_IND_t *UL_info) {
int i;
......@@ -135,8 +136,8 @@ void handle_harq(UL_IND_t *UL_info) {
for (i=0;i<UL_info->harq_ind.harq_indication_body.number_of_harqs;i++)
harq_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
NFAPI_SFNSF2SFN(UL_info->harq_ind.sfn_sf),
NFAPI_SFNSF2SF(UL_info->harq_ind.sfn_sf),
&UL_info->harq_ind.harq_indication_body.harq_pdu_list[i]);
UL_info->harq_ind.harq_indication_body.number_of_harqs=0;
......@@ -206,13 +207,13 @@ void handle_ulsch(UL_IND_t *UL_info) {
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++)
}
if (NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf) == UL_info->frame && NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf) == UL_info->subframe && UL_info->rx_ind.rx_indication_body.number_of_pdus>0)
if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0)
{
UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
LOG_D(PHY, "UL_INFO:SFN/SF:%d/%d ZEROING rx_ind.number_of_pdus:%d \n", UL_info->frame, UL_info->subframe, UL_info->rx_ind.rx_indication_body.number_of_pdus);
}
if (NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf) == UL_info->frame && NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf) == UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0)
if (UL_info->subframe && UL_info->crc_ind.crc_indication_body.number_of_crcs>0)
{
LOG_D(PHY, "UL_INFO:SFN/SF:%d/%d crcs:%d Reset to zero\n", UL_info->frame, UL_info->subframe, UL_info->crc_ind.crc_indication_body.number_of_crcs);
UL_info->crc_ind.crc_indication_body.number_of_crcs=0;
......@@ -557,19 +558,19 @@ void UL_indication(UL_IND_t *UL_info)
if (ifi->CC_mask == ((1<<MAX_NUM_CCs)-1)) {
eNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->subframe>5)?1:0)) % 1024,
(UL_info->subframe+4)%10);
(UL_info->frame+((UL_info->subframe>(9-sf_ahead))?1:0)) % 1024,
(UL_info->subframe+sf_ahead)%10);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->subframe>5) ? 1 : 0)) % 1024;
sched_info->subframe = (UL_info->subframe+4)%10;
sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->subframe = (UL_info->subframe+sf_ahead)%10;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+4)%10)>0))
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
......
......@@ -121,6 +121,8 @@ extern int transmission_mode;
extern int oaisim_flag;
uint16_t sf_ahead=2;
//pthread_t main_eNB_thread;
time_stats_t softmodem_stats_mt; // main thread
......@@ -236,7 +238,7 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
// *****************************************
// TX processing for subframe n+4
// TX processing for subframe n+sf_ahead
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// *****************************************
......@@ -348,8 +350,8 @@ void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string)
proc_rxtx->subframe_rx = proc->subframe_rx;
proc_rxtx->frame_rx = proc->frame_rx;
proc_rxtx->subframe_tx = (proc->subframe_rx+4)%10;
proc_rxtx->frame_tx = (proc->subframe_rx>5) ? (1+proc->frame_rx)&1023 : proc->frame_rx;
proc_rxtx->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
proc_rxtx->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (1+proc->frame_rx)&1023 : proc->frame_rx;
proc->frame_tx = proc_rxtx->frame_tx;
proc_rxtx->timestamp_tx = proc->timestamp_tx;
......@@ -412,7 +414,7 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
}
#endif
// wake up TX for subframe n+4
// wake up TX for subframe n+2
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&proc_rxtx->mutex_rxtx,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", proc_rxtx->subframe_rx&1,proc_rxtx->instance_cnt_rxtx );
......@@ -427,13 +429,13 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
// transmitted timestamp of the next TX slot (first).
// The last (TS_rx mod samples_per_frame) was n*samples_per_tti,
// we want to generate subframe (n+4), so TS_tx = TX_rx+4*samples_per_tti,
// and proc->subframe_tx = proc->subframe_rx+4
proc_rxtx->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_tti);
// we want to generate subframe (n+sf_ahead), so TS_tx = TX_rx+sf_ahead*samples_per_tti,
// and proc->subframe_tx = proc->subframe_rx+sf_ahead
proc_rxtx->timestamp_tx = proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx->frame_rx = proc->frame_rx;
proc_rxtx->subframe_rx = proc->subframe_rx;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > 5) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + 4)%10;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > (9-sf_ahead)) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + sf_ahead)%10;
LOG_D(PHY,"Signal &proc_rxtx->cond_rxtx\n");
......
......@@ -130,6 +130,7 @@ int attach_rru(RU_t *ru);
int connect_rau(RU_t *ru);
extern uint8_t nfapi_mode;
extern uint16_t sf_ahead;
/*************************************************************/
/* Functions to attach and configure RRU */
......@@ -388,8 +389,8 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
proc->frame_rx = f;
proc->timestamp_rx = ((proc->frame_rx * 10) + proc->subframe_rx ) * fp->samples_per_tti ;
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_tti);
proc->subframe_tx = (sf+4)%10;
proc->frame_tx = (sf>5) ? (f+1)&1023 : f;
proc->subframe_tx = (sf+sf_ahead)%10;
proc->frame_tx = (sf>(9-sf_ahead)) ? (f+1)&1023 : f;
if (proc->first_rx == 0) {
if (proc->subframe_rx != *subframe){
......@@ -726,9 +727,9 @@ void rx_rf(RU_t *ru,int *frame,int *subframe) {
proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
// synchronize first reception to frame 0 subframe 0
proc->timestamp_tx = proc->timestamp_rx+(4*fp->samples_per_tti);
proc->subframe_tx = (proc->subframe_rx+4)%10;
proc->frame_tx = (proc->subframe_rx>5) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_tti);
proc->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
proc->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
#if 0
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, subframe %d\n",
......@@ -788,7 +789,9 @@ void tx_rf(RU_t *ru) {
lte_subframe_t prevSF_type = subframe_select(fp,(proc->subframe_tx+9)%10);
lte_subframe_t nextSF_type = subframe_select(fp,(proc->subframe_tx+1)%10);
//LOG_E(PHY,"%s() nb_tx:%d sf:%d tti:%d\n", __FUNCTION__, ru->nb_tx, proc->subframe_tx, fp->samples_per_tti);
//struct timespec t;
//clock_gettime(CLOCK_MONOTONIC, &t);
//LOG_E(PHY,"%s() nb_tx:%d sf:%d tti:%d t:%ld.%09ld\n", __FUNCTION__, ru->nb_tx, proc->subframe_tx, fp->samples_per_tti, t.tv_sec, t.tv_nsec);
if ((SF_type == SF_DL) ||
(SF_type == SF_S)) {
......@@ -1526,7 +1529,7 @@ static void* ru_thread( void* param ) {
// do RX front-end processing (frequency-shift, dft) if needed
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
//if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
if (ru->feprx) ru->feprx(ru);
// At this point, all information for subframe has been received on FH interface
......@@ -1538,11 +1541,10 @@ static void* ru_thread( void* param ) {
if (ru->num_eNB>0) wakeup_eNBs(ru);
//LOG_E(PHY,"%s() Before wait_on_condition()\n", __FUNCTION__);
// wait until eNBs are finished subframe RX n and TX n+4
// wait until eNBs are finished subframe RX n and TX n+sf_ahead
wait_on_condition(&proc->mutex_eNBs,&proc->cond_eNBs,&proc->instance_cnt_eNBs,"ru_thread");
//LOG_E(PHY,"%s() AFTER wait_on_condition() ru->feptx_prec:%p ru->fh_north_asynch_in:%p ru->feptx_ofdm:%p ru->fh_south_out:%p ru->fh_north_out:%p\n",
//__FUNCTION__, ru->feptx_prec, ru->fh_north_asynch_in, ru->feptx_ofdm, ru->fh_south_out, ru->fh_north_out);
//LOG_E(PHY,"%s() AFTER wait_on_condition() ru->feptx_prec:%p ru->fh_north_asynch_in:%p ru->feptx_ofdm:%p ru->fh_south_out:%p ru->fh_north_out:%p\n", __FUNCTION__, ru->feptx_prec, ru->fh_north_asynch_in, ru->feptx_ofdm, ru->fh_south_out, ru->fh_north_out);
// do TX front-end processing if needed (precoding and/or IDFTs)
if (ru->feptx_prec) ru->feptx_prec(ru);
......
......@@ -20,39 +20,35 @@ functions.trx_write
@24
variables.trx_ts[63:0]
variables.trx_tst[63:0]
@28
functions.eNB_thread_rxtx0
@24
@25
variables.frame_number_RX0_RU[63:0]
variables.subframe_number_RX0_RU[63:0]
@25
variables.frame_number_TX0_RU[63:0]
@24
variables.subframe_number_TX0_RU[63:0]
@28
functions.phy_procedures_eNb_tx0
functions.eNB_thread_rxtx1
functions.phy_enb_sfgen
functions.phy_enb_prach_rx
@24
functions.phy_procedures_ru_feprx0
functions.phy_procedures_ru_feprx1
functions.phy_procedures_eNb_rx_uespec0
functions.phy_procedures_eNb_rx_uespec1
functions.phy_procedures_eNb_tx0
functions.eNB_thread_rxtx1
functions.phy_enb_prach_rx
functions.phy_eNB_dlsch_encoding
functions.phy_eNB_dlsch_modulation
functions.phy_eNB_dlsch_scrambling
functions.phy_enb_rs_tx
functions.phy_enb_pdcch_tx
functions.pdsch_thread
functions.nfapi_subframe
functions.generate_pcfich
functions.generate_dci0
functions.generate_dlsch
functions.generate_phich
functions.pdcch_scrambling
functions.pdcch_modulation
functions.pdcch_interleaving
functions.pdcch_tx
functions.generate_dlsch
functions.generate_phich
functions.udp_enb_task
functions.phy_procedures_ru_feptx_ofdm0
functions.phy_procedures_ru_feptx_ofdm1
functions.phy_procedures_ru_feptx_prec0
functions.phy_procedures_ru_feptx_prec1
functions.phy_enb_prach_rx
[pattern_trace] 1
[pattern_trace] 0
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