[GITLAB] - UPGRADE TO v12 on Wednesday the 18th of December at 11.30AM

Commit 326a40a9 authored by Guy De Souza's avatar Guy De Souza

All contiguous RB update

parent 854e0a68
......@@ -34,7 +34,7 @@
//#define DEBUG_PDCCH_DMRS
//#define DEBUG_DCI
//#define DEBUG_POLAR_PARAMS
//#define DEBUG_CHANNEL_CODING
#define PDCCH_TEST_POLAR_TEMP_FIX
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
......@@ -220,7 +220,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
#endif
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, n_RNTI);
#ifdef DEBUG_POLAR_PARAMS
#ifdef DEBUG_CHANNEL_CODING
printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]);
printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
......@@ -231,7 +231,7 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
// QPSK modulation
int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
for (int i=0; i<encoded_length>>1; i++) {
idx = (((scrambled_output[i<<1]>>(i<<1))&1)<<1) ^ ((scrambled_output[(i<<1)+1]>>((i<<1)+1))&1);
idx = ((((scrambled_output[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((scrambled_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_DCI
......@@ -248,57 +248,70 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
/*Reorder REG list for a freq first mapping*/
uint8_t symb_idx[NR_MAX_CSET_DURATION] = {0,0,0};
uint8_t nb_regs = dci_alloc.L*NR_NB_REG_PER_CCE;
uint8_t regs_per_symb = nb_regs/cset_nsymb;
for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++){
cce = dci_alloc.cce_list[cce_idx];
for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
reg = cce.reg_list[reg_idx];
reg_mapping_list[reg.symb_idx*regs_per_symb + symb_idx[reg.symb_idx]++] = reg;
}
/*Reorder REG list for a freq first mapping*/
uint8_t symb_idx[NR_MAX_CSET_DURATION] = {0,0,0};
uint8_t nb_regs = dci_alloc.L*NR_NB_REG_PER_CCE;
uint8_t regs_per_symb = nb_regs/cset_nsymb;
for (int cce_idx=0; cce_idx<dci_alloc.L; cce_idx++){
cce = dci_alloc.cce_list[cce_idx];
for (int reg_idx=0; reg_idx<NR_NB_REG_PER_CCE; reg_idx++) {
reg = cce.reg_list[reg_idx];
reg_mapping_list[reg.symb_idx*regs_per_symb + symb_idx[reg.symb_idx]++] = reg;
}
}
#ifdef DEBUG_DCI
printf("\n Ordered REG list:\n");
for (int i=0; i<nb_regs; i++)
printf("%d\t",reg_mapping_list[i].reg_idx );
printf("\n");
printf("\n Ordered REG list:\n");
for (int i=0; i<nb_regs; i++)
printf("%d\t",reg_mapping_list[i].reg_idx );
printf("\n");
#endif
/*Now mapping based on newly constructed list*/
for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) {
reg = reg_mapping_list[reg_idx];
k = cset_start_sc + reg.start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS) {
/*in this case the DMRS are mapped on all the coreset*/
for (l=cset_start_symb; l<cset_start_symb+ cset_nsymb; l++) {
dmrs_idx = 0;
k = cset_start_sc + 1;
while (dmrs_idx<3*pdcch_params.n_rb) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
k+=4;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + reg.symb_idx;
dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS
dmrs_idx++;
}
}
}
/*Now mapping the encoded DCI based on newly constructed REG list
* and the DMRS for the precoder granularity same as REG bundle*/
for (int reg_idx=0; reg_idx<nb_regs; reg_idx++) {
reg = reg_mapping_list[reg_idx];
k = cset_start_sc + reg.start_sc_idx;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
l = cset_start_symb + reg.symb_idx;
dmrs_idx = (reg.reg_idx/cset_nsymb)*3;
k_prime = 0;
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
k_prime++;
dmrs_idx++;
}
else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
}
else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
dci_idx++;
}
k++;
if (k >= frame_parms.ofdm_symbol_size)
k -= frame_parms.ofdm_symbol_size;
}
}
else { //NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
}
}
#ifdef DEBUG_DCI
......
......@@ -31,7 +31,7 @@
*/
#include "nr_dci.h"
//#define DEBUG_NFAPI_NR_RNTI_RA
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m) {
......@@ -131,20 +131,6 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
case NFAPI_NR_RNTI_RA:
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
#ifdef DEBUG_NFAPI_NR_RNTI_RA
printf("frequency_domain_assignment = %05d = %#010x\n"
" time_domain_assignment = %05d = %#010x\n"
" vrb_to_prb_mapping = %05d = %#010x\n"
" MCS = %05d = %#010x\n"
" tb_scaling = %05d = %#010x\n"
" N_RB = %05d = %#010x\n"
" fsize = %05d = %#010x\n",
pdu_rel15->frequency_domain_assignment,pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment,pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping,pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs,pdu_rel15->mcs,pdu_rel15->tb_scaling,pdu_rel15->tb_scaling,
N_RB,N_RB,fsize,fsize);
#endif
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment
......@@ -180,50 +166,5 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
cfg->sch_config.physical_cell_id.value : dci_alloc->pdcch_params.shift_index;
nr_fill_cce_list(dci_alloc, n_shift, cand_idx);
LOG_I(PHY, "DCI type %d payload (size %d) generated on candidate %d\n", dci_alloc->pdcch_params.dci_format, dci_alloc->size, cand_idx);
/* if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
if (rel15->rnti_type == NFAPI_NR_RNTI_C
|| rel15->rnti_type == NFAPI_NR_RNTI_CS
|| rel15->rnti_type == NFAPI_NR_RNTI_new) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_P) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_SI) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_RA) {
} else if (rel15->rnti_type == NFAPI_NR_RNTI_TC) {
} else {
AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d) and RNTI Type(%d) combination",rel15->dci_format, rel15->rnti_type);
}
} else if (rel15->dci_format == NFAPI_NR_UL_DCI_FORMAT_0_0) {
dci_alloc->format = NFAPI_NR_UL_DCI_FORMAT_0_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_ul ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_1_1) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_1_1;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_UL_DCI_FORMAT_0_1) {
dci_alloc->format = NFAPI_NR_UL_DCI_FORMAT_0_1;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_ul ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_0) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_0;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_1) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_1;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_2) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_2;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else if (rel15->dci_format == NFAPI_NR_DL_DCI_FORMAT_2_3) {
dci_alloc->format = NFAPI_NR_DL_DCI_FORMAT_2_3;
dci_alloc->size = nr_get_dci_size(rel15->dci_format, rel15->rnti_type, &fp->initial_bwp_params_dl ,cfg);
} else {
AssertFatal(1==0, "[nr_fill_dci_and_dlsch] Incorrect DCI Format(%d)",rel15->dci_format);
}*/
}
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